Preparation method of display module and display module

By using limit structure and contact electrode design in the preparation of Micro LED display modules, the problem of light emitting chip failure caused by huge transfer is solved, and the yield and preparation efficiency of the display module are improved.

CN119108470APending Publication Date: 2024-12-10HKC CORP LTD
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Patent Information

Application Number
CN202411216778.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-30
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

During the preparation of Micro LED display module, the stability and accuracy of the huge transfer process are insufficient, resulting in the position of the light-emitting chip being offset, fall off or damaged, resulting in a low yield on the display module.

Method used

By preparing the transfer substrate and the driving substrate, the limit structure and contact electrode design are adopted to align the light-emitting chip with the driving substrate, reducing the number of transfers, avoiding the welding process, and improving the chip fixation degree.

Benefits of technology

It effectively reduces damage and misalignment of the light-emitting chip, improves the yield rate of the display module, simplifies the huge transfer process, and improves the preparation efficiency.

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Abstract

The invention provides a preparation method of a display module and the display module, and relates to the technical field of semiconductors, the method comprises the steps that a transfer substrate is prepared, the transfer substrate comprises a substrate and light-emitting chips formed on the substrate in an array mode, and each light-emitting chip comprises a P-type electrode and an N-type electrode; a driving substrate is provided, the driving substrate comprises a substrate and a driving layer formed on the substrate, a limiting structure matched with the light-emitting chips in shape is arranged on the side, away from the substrate, of the driving layer, and P-type contact electrodes corresponding to the P-type electrodes and N-type contact electrodes corresponding to the N-type electrodes are arranged on the limiting structure; the transfer substrate and the driving substrate are aligned and attached, so that the P-type contact electrodes are electrically connected with the corresponding P-type electrodes, and the N-type contact electrodes are electrically connected with the corresponding N-type electrodes; and stripping the substrate. According to the technical scheme provided by the invention, the yield of the display module can be improved.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for preparing a display module and a display module. Background Art

[0002] Micro Light Emitting Diode (MicroLED) display technology refers to using micron-sized MicroLED light-emitting chips as light-emitting pixel units, which are transferred to a driving substrate to form MicroLED display modules of various sizes.

[0003] In the preparation process of Micro LED display modules, mass transfer technology is usually used to transfer Micro LED light-emitting chips to the driver substrate in batches, so the stability and accuracy of the mass transfer process are very high. However, the current mass transfer process is not mature. During the transfer and installation of the light-emitting chips, the light-emitting chips may shift, fall off or even be damaged, resulting in failure of the light-emitting chips after mass transfer, which leads to a low yield rate of the display module. Summary of the invention

[0004] In view of this, the embodiments of the present application provide a method for preparing a display module and a display module, which are used to reduce the problem of light-emitting chip failure caused by mass transfer, thereby improving the yield rate of the display module.

[0005] In order to achieve the above objectives, in a first aspect, an embodiment of the present application provides a method for preparing a display module, comprising:

[0006] Prepare a transfer substrate, the transfer substrate comprising a substrate and light-emitting chips arranged in an array on the substrate, the light-emitting chips comprising a P-type electrode and an N-type electrode;

[0007] Providing a driving substrate, the driving substrate comprising a base and a driving layer formed on the base, a limiting structure matching the shape of each of the light-emitting chips is provided on a side of the driving layer away from the base, and a P-type contact electrode corresponding to the P-type electrode and an N-type contact electrode corresponding to the N-type electrode are provided on the limiting structure;

[0008] Aligning and laminating the transfer substrate with the drive substrate so that the P-type contact electrode is electrically connected to the corresponding P-type electrode, and the N-type contact electrode is electrically connected to the corresponding N-type electrode;

[0009] The substrate is peeled off.

[0010] In a possible implementation manner of the first aspect, the light-emitting chip includes multiple primary colors, and the substrate includes a preparation area corresponding to each primary color;

[0011] The method of preparing the transfer substrate comprises:

[0012] Providing a mask, wherein the mask includes a plurality of opening areas;

[0013] The corresponding light-emitting chips are prepared in the preparation areas corresponding to the primary colors in sequence through the opening area.

[0014] In a possible implementation manner of the first aspect, for each primary color, preparing a corresponding light-emitting chip in a preparation area corresponding to the primary color includes:

[0015] A deposition process is used to sequentially form a base layer, a light-emitting layer corresponding to the primary color, an insulating protection layer and a photoresist layer in the preparation area corresponding to the primary color through the opening area; wherein the light-emitting layer includes an N-type semiconductor layer, a multi-quantum well layer corresponding to the primary color and a P-type semiconductor layer stacked from bottom to top;

[0016] Performing patterning on the photoresist layer to remove the photoresist in the first target area and the second target area to form a patterned photoresist layer; wherein the first target area and the second target area are spaced apart;

[0017] Using the patterned photoresist layer as a mask, removing the insulating protective layer corresponding to the first target area;

[0018] Using the patterned photoresist layer as a mask, etching the insulating protection layer and the light-emitting layer corresponding to the second target area until the N-type semiconductor layer is etched to a target thickness;

[0019] forming the P-type electrode and the N-type electrode in the first target area and the second target area, respectively;

[0020] The patterned photoresist layer is removed.

[0021] In a possible implementation of the first aspect, the multiple primary colors include a first primary color, a second primary color and a third primary color, the material of the multi-quantum well layer corresponding to the first primary color is gallium arsenide, the material of the second primary color multi-quantum well layer corresponding to the second primary color is gallium nitride, and the material of the third primary color multi-quantum well layer corresponding to the third primary color is indium gallium nitride.

[0022] In a possible implementation manner of the first aspect, the driving layer includes: a thin film transistor layer and an insulating layer stacked along a first direction;

[0023] The providing of a driving substrate comprises:

[0024] The thin film transistor layer is formed on the substrate; a thin film transistor controller and thin film transistors corresponding to each of the light-emitting chips are formed in the thin film transistor layer, and the thin film transistor controller is electrically connected to the gate and source of each of the thin film transistors respectively;

[0025] The limiting structure is formed on a side of the insulating layer away from the substrate, a drain transmission line and a ground layer are formed in the insulating layer, a P-type contact electrode on the limiting structure is electrically connected to the drain of the corresponding thin film transistor through the drain transmission line, and an N-type contact electrode is electrically connected to the ground layer;

[0026] The thin film transistor controller is used to control the on and off of each thin film transistor and the brightness of each light emitting chip according to the picture signal to be displayed.

[0027] In a possible implementation of the first aspect, the thin film transistor controller receives a signal of a picture to be displayed sent by a terminal device through a wireless connection.

[0028] In a possible implementation manner of the first aspect, the wireless connection mode is a Bluetooth connection.

[0029] In a possible implementation of the first aspect, the limiting structure is also provided with a first adhesive layer attached to the P-type contact electrode and a second adhesive layer attached to the N-type contact electrode, and the P-type electrode of each light-emitting chip is electrically connected to the corresponding P-type contact electrode through the first adhesive layer, and the N-type electrode is electrically connected to the corresponding N-type contact electrode through the second adhesive layer.

[0030] In a possible implementation manner of the first aspect, the first adhesive layer and the second adhesive layer are anisotropic conductive adhesive layers.

[0031] In a second aspect, an embodiment of the present application provides a display module, comprising: a display module prepared by the preparation method described in the first aspect or any possible implementation manner of the first aspect.

[0032] The method for preparing a display module provided in an embodiment of the present application includes: preparing a transfer substrate, the transfer substrate including a substrate and light-emitting chips arranged in an array on the substrate, the light-emitting chips including a P-type electrode and an N-type electrode; providing a driving substrate, the driving substrate including a base and a driving layer formed on the base, a limiting structure matching the shape of each light-emitting chip is provided on a side of the driving layer away from the base, and a P-type contact electrode corresponding to the P-type electrode and an N-type contact electrode corresponding to the N-type electrode are provided on the limiting structure; aligning and fitting the transfer substrate with the driving substrate so that the P-type contact electrode is electrically connected to the corresponding P-type electrode, and the N-type contact electrode is electrically connected to the corresponding N-type electrode; peeling off the substrate, which can reduce the number of mass transfers and does not require a welding process to fix the light-emitting chip, thereby reducing damage and dislocation of the light-emitting chip, thereby reducing the number of lamp bead failures and improving the yield rate of the display module. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of a process for preparing a display module provided in an embodiment of the present application;

[0034] Figure 2 A schematic diagram of a process for preparing a transfer substrate provided in an embodiment of the present application;

[0035] Figure 3 A top view of a first mask provided in an embodiment of the present application;

[0036] Figure 4 A schematic diagram of a process for preparing a light-emitting chip on a substrate provided in an embodiment of the present application;

[0037] FIG. 5A to FIG. 5H A schematic diagram of a process for preparing a light-emitting chip on a substrate provided in an embodiment of the present application;

[0038] Figure 6 A schematic diagram of the structure of a drive substrate provided in an embodiment of the present application;

[0039] Figure 7 A schematic diagram of the alignment structure of the transfer substrate and the drive substrate provided in an embodiment of the present application;

[0040] Figure 8 A schematic diagram of the structure of a display module provided in an embodiment of the present application.

[0041] Description of reference numerals:

[0042] 1-transfer substrate; 11-substrate; 12-first primary color light-emitting chip; 121-base layer; 122-light-emitting layer; 1221-N-type semiconductor layer; 1222-first primary color multi-quantum well layer; 1223-P-type semiconductor layer; 123-insulating protection layer; 124-electrode layer; 1241-N-type electrode; 1242-P-type electrode; 13-second primary color light-emitting chip; 14-third primary color light-emitting chip;

[0043] 2-driving substrate; 21-substrate; 22-driving layer; 221-thin film transistor layer; 2211-thin film transistor controller; 2212-thin film transistor; 222-insulating layer; 2221-limiting structure; 22211-P-type contact electrode; 22212-N-type contact electrode; 22213-first bonding layer; 22214-second bonding layer;

[0044] 3-first mask; 31-opening area; 4-photoresist layer; 41-patterned photoresist layer. DETAILED DESCRIPTION

[0045] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application. The terms used in the implementation method section of the embodiments of the present application are only used to explain the specific embodiments of the present application, and are not intended to limit the present application. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0046] Figure 1 A schematic diagram of the process of manufacturing a display module provided in this application, such as Figure 1 As shown, the method may include the following steps:

[0047] Step S110: preparing a transfer substrate.

[0048] The transfer substrate may include a substrate, and the material of the substrate may be one of sapphire, silicon carbide and silicon, thereby reducing the difficulty of obtaining. Of course, the substrate may also be made of other materials, such as gallium arsenide, aluminum nitride, zinc oxide, etc.

[0049] The substrate may include a preparation area for a light-emitting chip, which is a semiconductor device for emitting light, and may include but is not limited to MiniLED and MicroLED. Depending on the color of the light, the light-emitting chip may include multiple types such as red, green, blue, and yellow.

[0050] See also Figure 2 , preparing the transfer substrate may include the following steps:

[0051] Step S111, providing a first mask.

[0052] For each color, a corresponding light-emitting chip can be prepared in a preparation area corresponding to the color. For ease of description, the following is an example of an exemplary description using a first preparation area on a substrate for preparing a first primary color light-emitting chip, a second preparation area for preparing a second primary color light-emitting chip, and a third preparation area for preparing a third primary color light-emitting chip. The first primary color can be red, the second primary color can be green, and the third primary color can be blue.

[0053] Figure 3 The top view of the first mask provided in the embodiment of the present application is shown in FIG. Figure 3 The first mask plate 3 may include a plurality of opening areas 31. In the row direction, the spacing H between adjacent opening areas 31 may be no less than the width of the preparation area corresponding to any two adjacent columns of light-emitting chips.

[0054] It is understood that the spacing between adjacent opening areas 31 in the row direction may be equal or unequal, and similarly, the spacing between adjacent opening areas 31 in the column direction may be equal or unequal. The shape and size of the opening area 31 may also be selected according to actual needs. Figure 3 The example in which the shape of the opening area 31 is a rectangle is used for exemplary description.

[0055] Step S112, preparing corresponding light-emitting chips in preparation areas corresponding to each primary color in sequence through the opening area.

[0056] Figure 4 A schematic diagram of the process of preparing a light-emitting chip on a substrate provided in an embodiment of the present application. FIG. 5A to FIG. 5H Schematic diagram of the preparation process of a light-emitting chip on a substrate provided in an embodiment of the present application. Figures 4 to 5H As shown, the preparation of the light-emitting chip may include the following steps:

[0057] Step S1121: using a deposition process to sequentially form a base layer, a light-emitting layer corresponding to the base color, an insulating protection layer and a photoresist layer in a preparation area corresponding to the base color through the opening area.

[0058] Take the preparation of the first primary color light emitting chip 12 as an example, refer to Figure 5A and Figure 5B , a base material may be deposited in the first preparation area on the substrate 11 through a deposition process to form a base layer 121, and the deposition process may include but is not limited to physical vapor deposition, chemical vapor deposition, and plasma vapor deposition. The material of the base layer 121 may be aluminum gallium nitride (AlGaN) or gallium nitride (GaN) to alleviate the lattice mismatch and thermal expansion coefficient mismatch between the subsequently formed film layer and the substrate 11, and improve device performance and yield.

[0059] In some embodiments, before depositing the base material, the substrate 11 may be cleaned and dried to improve the cleanliness of the surface of the substrate 11 and thereby improve the adhesion of the base material.

[0060] After the base material is deposited, the light-emitting layer material may be deposited to facilitate the subsequent preparation of the light-emitting layer 122. The light-emitting layer 122 may include an N-type semiconductor layer 1221, a first primary color multi-quantum well layer 1222, and a P-type semiconductor layer 1223 stacked from bottom to top. The N-type semiconductor layer 1221 may be used to provide free electrons, the P-type semiconductor layer 1223 may be used to provide holes, the material of the multi-quantum well layer may determine the light color of the light-emitting chip, and the material of the first primary color multi-quantum well layer 1222 may be gallium arsenide (GaAs). When current passes through the first primary color light-emitting chip 12, free electrons and holes may be injected and recombined in the first primary color multi-quantum well layer 1222, so that the first primary color light-emitting chip 12 emits red light.

[0061] Considering that the P-type semiconductor layer 1223 is easily oxidized and thus has a reduced conductivity, in some embodiments, an insulating protection layer 123 may be deposited on the P-type semiconductor layer 1223 to protect the P-type semiconductor layer 1223. The material of the insulating protection layer 123 may be silicon dioxide (SiO2) or aluminum oxide (Al2O3), and the material of the insulating protection layer 123 may be selected according to actual needs.

[0062] The photoresist layer 4 may include phenolic resin, photosensitizer, solvent and some additives. After forming the photoresist layer 4, the photoresist may be baked to reduce the solvent content in the photoresist, thereby improving the stability of the photoresist and the adhesion between the photoresist and the insulating protection layer 123.

[0063] It should be noted that the thickness of each film layer deposited above can be set according to actual needs, and this application does not impose any special restrictions on this.

[0064] Step S1122 , patterning the photoresist layer to remove the photoresist in the first target area and the second target area to form a patterned photoresist layer.

[0065] The photoresist may be a positive photoresist, that is, the exposed portion undergoes a photochemical reaction and can be removed in the development stage. After the photoresist layer 4 is formed, the photoresist layer 4 may be patterned through a second mask (not shown) to form a patterned photoresist layer 41, exposing the insulating protection layer 123 corresponding to the first target area A and the second target area B. Figure 5C , the first target area A and the second target area B can be set at intervals.

[0066] Step S1123: using the patterned photoresist layer as a mask, removing the insulating protection layer corresponding to the first target area.

[0067] See also Figure 5D , the insulating protection layer 123 of the exposed first target area A is etched by a laser etching process to expose the P-type semiconductor layer 1223 corresponding to the first target area A. Of course, the insulating protection layer 123 may also be etched by other etching processes, such as plasma dry etching.

[0068] Step S1124: using the patterned photoresist layer as a mask, etching the insulating protection layer and the light-emitting layer corresponding to the second target area until the N-type semiconductor layer is etched to a target thickness.

[0069] In addition to removing the insulating protection layer 123 in the first target area A by means of the laser etching process, the insulating protection layer 123 and the light emitting layer 122 corresponding to the second target area B may also be etched by means of the laser etching process.

[0070] Considering that a magnetic field is generated when current passes through, the magnetic field will affect the movement trajectory of electrons and holes in the multi-quantum well layer, thereby affecting the injection and recombination of electrons and holes, reducing the luminance and brightness stability of the first primary color light-emitting chip 12.

[0071] In some embodiments, the thickness of the exposed N-type semiconductor layer 1221 can be reduced, so that the distance between the subsequently formed N-type electrode 1241 and the first primary color multi-quantum well layer 1222 can be increased, so that the influence of the magnetic field on the movement trajectory of the holes can be reduced, and the working reliability of the first primary color light-emitting chip 12 can be improved. By reducing the thickness of the exposed N-type semiconductor, the resistance can also be reduced, the hole mobility can be improved, and the luminous efficiency and device performance of the first primary color light-emitting chip 12 can be improved.

[0072] The target thickness can be set according to actual needs. For example, during actual etching, the etching depth can be controlled by controlling the etching power and etching time, thereby controlling the target thickness. In some embodiments, etching can be stopped after the N-type semiconductor layer 1221 is exposed, thereby shortening the etching time.

[0073] Step S1125 , forming a P-type electrode and an N-type electrode in the first target region and the second target region respectively.

[0074] After the etching of the first target area A and the second target area B is completed, the electrode layer 124 can be covered on the exposed P-type semiconductor layer 1223, the patterned photoresist layer 41 and the exposed N-type semiconductor layer 1221 by sputtering or evaporation process using the opening area 31 of the first mask 3, see Figure 5EThen, the electrode layer 124 above the patterned photoresist layer 41 may be etched to form a P-type electrode 1242 above the P-type semiconductor layer 1223 in the first target area A and an N-type electrode 1241 above the N-type semiconductor layer 1221 in the second target area B. Fig. 5F The electrode material can be set according to actual needs, and the embodiment of the present application does not impose any special limitation on this.

[0075] Step S1126, removing the patterned photoresist layer.

[0076] See also Figure 5G Since the ashing process can realize the patterning process at the micron level, in some embodiments, the patterned photoresist layer 41 can be ashed to remove the patterned photoresist layer 41, thereby reducing the process difficulty and improving the yield rate of the micron-level first primary color light-emitting chip 12. In other embodiments, the patterned photoresist layer 41 can also be exposed and developed to remove the patterned photoresist layer 41.

[0077] Through the above-mentioned implementation, the preparation of the first primary color light emitting chip 12 can be completed in the first preparation area. Figure 5H , the second primary color light emitting chip 13 and the third primary color light emitting chip 14 can be prepared in the second preparation area and the third preparation area respectively, thereby completing the preparation of the light emitting chip. Among them, the differences between the primary color light emitting chips are mainly that the material of the first primary color multi-quantum well layer 1222 corresponding to the first primary color light emitting chip 12 can be gallium arsenide (GaAs), the material of the second primary color multi-quantum well layer corresponding to the second primary color light emitting chip 13 can be gallium nitride (GaN), and the material of the third primary color multi-quantum well layer corresponding to the third primary color light emitting chip 14 can be indium gallium nitride (InGaN).

[0078] Step S120: providing a driving substrate.

[0079] See also Figure 6 , the first direction may be from bottom to top. The driving substrate 2 may include a base 21 and a driving layer 22 formed on the base 21, and the driving layer 22 includes a thin film transistor layer 221 and an insulating layer 222. A limiting structure 2221 matching the shape of each primary color light-emitting chip may be provided on the side of the driving layer 22 away from the base 21 (i.e., the insulating layer 222), and a P-type contact electrode 22211 corresponding to the P-type electrode 1242 and an N-type contact electrode 22212 corresponding to the N-type electrode 1241 may be provided on the limiting structure 2221.

[0080] The thin film transistor layer 221 may include a thin film transistor controller 2211 and thin film transistors 2212 corresponding to each light-emitting chip. The thin film transistor 2212 may include a gate, a source, and a drain. In some embodiments, the thin film transistor controller 2211 may be electrically connected to the gate and source of each thin film transistor 2212 through a gate control line and a source transmission line (not shown), respectively.

[0081] The thin film transistor controller 2211 can change the current between the source and the drain by controlling the gate voltage, thereby controlling the on and off of each thin film transistor 2212 connected thereto, and further controlling whether to display the picture. In the display module, there can be multiple thin film transistor controllers 2211, and each thin film transistor controller 2211 can control the picture display of the corresponding area respectively.

[0082] In a possible implementation, the thin film transistor controller 2211 may generate a corresponding image signal to be displayed according to the image to be displayed, and further control the on and off of the thin film transistor 2212 connected thereto and the brightness of each light-emitting chip according to the image signal to be displayed.

[0083] In another possible implementation, the thin film transistor controller 2211 can receive a signal of a picture to be displayed sent by other electronic devices through a wireless connection. The electronic device can be a terminal device, and the thin film transistor controller 2211 can control the picture display of the corresponding area according to the signal of the picture to be displayed sent by the terminal device. The wireless connection method can be a Bluetooth connection, a wireless local area network connection, etc.

[0084] By setting the thin film transistor controller 2211 to control the thin film transistor 2212, the display module no longer needs to turn on the thin film transistor 2212 by scanning the gate lines line by line, thereby reducing the refresh time of each frame and further improving the refresh rate of the display picture.

[0085] Considering the difference between the structure of the thin film transistor controller 2211 and the structure of the thin film transistor 2212, in some embodiments, the thin film transistor controller 2211 and the thin film transistor can be prepared in steps.

[0086] An insulating layer 222 may be formed above the thin film transistor layer 221, and a drain transmission line and a ground layer (not shown) may be formed in the insulating layer 222. The P-type contact electrode 22211 on the limiting structure 2221 may be electrically connected to the drain of the corresponding thin film transistor 2212 through the drain transmission line, and the N-type contact electrode 22212 may be electrically connected to the ground layer. The ground layer may be connected to the frame of the display device. In some embodiments, the P-type contact electrode 22211 may be formed integrally with the drain transmission line, and the N-type contact electrode 22212 may be formed integrally with the ground layer, thereby improving the manufacturing efficiency.

[0087] Step S130 , aligning and laminating the transfer substrate and the driving substrate.

[0088] See also Figure 7 , the side of the transfer substrate 1 on which the first primary color light-emitting chip 12, the second primary color light-emitting chip 13 and the third primary color light-emitting chip 14 are formed can be oriented toward the driving substrate 2, so that each light-emitting chip is matched one by one with the limiting structure 2221 on the driving substrate 2, so that the P-type electrode 1242 can be electrically connected to the corresponding P-type contact electrode 22211, and the N-type contact electrode 22212 can be electrically connected to the corresponding N-type electrode 1241.

[0089] By setting a limiting structure 2221 that matches the shape of each light-emitting chip, each light-emitting chip does not need to be fixed by soldering or other means during the installation process, thereby simplifying the efficiency of the mass transfer process and reducing the problem of light-emitting chip failure caused by inaccurate alignment during the installation process.

[0090] In order to improve the working reliability of the display module, the limiting structure 2221 may also be provided with a first adhesive layer 22213 attached to the P-type contact electrode 22211 and a second adhesive layer 22214 attached to the N-type contact electrode 22212. The P-type electrode 1242 of each light-emitting chip may be electrically connected to the corresponding P-type contact electrode 22211 through the first adhesive layer 22213, and the N-type electrode 1241 may be electrically connected to the corresponding N-type contact electrode 22212 through the second adhesive layer 22214. The first adhesive layer 22213 and the second adhesive layer 22214 may be anisotropic conductive film (ACF), so that the degree of fixation between the light-emitting chip and the driving substrate 2 can be further improved while satisfying the conductivity.

[0091] In some embodiments, in addition to setting the first adhesive layer 22213 and the second adhesive layer 22214, an adhesive can also be set in other contact areas between the limiting structure 2221 and the corresponding light-emitting chip, so as to improve the limiting effect on the light-emitting chip as much as possible. The setting position of the adhesive can be selected according to actual needs, and the embodiments of the present application do not impose any special restrictions on this.

[0092] Step S140: peeling off the substrate.

[0093] See also Figure 8 After the transfer substrate 1 and the drive substrate 2 are aligned and bonded, a laser lift-off process can be used on the side of the substrate 11 away from the first primary color light-emitting chip 12 to vaporize the base layer 121 in contact with the substrate 11, thereby achieving the lift-off of the substrate 11. Of course, other processes, such as a polishing process, can also be used to lift off the substrate 11.

[0094] It should be noted that the specific method of peeling off the substrate 11 can be selected according to actual needs, as long as the step of peeling off the substrate 11 can be completed.

[0095] The method for preparing a display module provided in an embodiment of the present application includes: preparing a transfer substrate, the transfer substrate including a substrate and light-emitting chips arranged in an array on the substrate, the light-emitting chips including a P-type electrode and an N-type electrode; providing a driving substrate, the driving substrate including a base and a driving layer formed on the base, a side of the driving layer away from the base is provided with a limiting structure matching the shape of each light-emitting chip, the limiting structure is provided with a P-type contact electrode corresponding to the P-type electrode and an N-type contact electrode corresponding to the N-type electrode; aligning and fitting the transfer substrate with the driving substrate so that the P-type contact electrode is electrically connected to the corresponding P-type electrode, and the N-type contact electrode is electrically connected to the corresponding N-type electrode; peeling off the substrate, and fixing the light-emitting chip formed on the substrate by the limiting structure, which can reduce the number of mass transfers and does not require complex fixing methods such as welding processes, thereby reducing damage and dislocation of the light-emitting chip, thereby reducing the number of lamp bead failures, and improving the preparation efficiency and yield rate of the display module.

[0096] It should be noted that the naming or numbering of the steps in this application does not mean that the steps in the method flow must be executed in the time / logical sequence indicated by the naming or numbering. The named or numbered process steps can change the execution order according to the technical purpose to be achieved, as long as the same or similar technical effect can be achieved.

[0097] Those skilled in the art will appreciate that the above embodiments are exemplary and are not intended to limit the present application. Where possible, the execution order of one or more of the above steps may be adjusted, or may be selectively combined to obtain one or more other embodiments. Those skilled in the art may select and combine any of the above steps as needed, and all those that do not depart from the essence of the present application fall within the scope of protection of the present application.

[0098] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application provides a display module, which is prepared according to the above method embodiment. For ease of reading, this module embodiment will no longer repeat the details of the above method embodiment one by one, but it should be clear that the device in this embodiment can correspond to all the contents of the above method embodiment.

[0099] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions may be transmitted from a website site, a computer, a server or a data center to another website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk or a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.

[0100] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by computer programs to instruct related hardware, and the programs can be stored in computer-readable storage media. When the programs are executed, they can include the processes of the above-mentioned method embodiments. The aforementioned storage media can include: ROM or random access memory RAM, magnetic disk or optical disk and other media that can store program codes.

[0101] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0102] In the embodiments provided in the present application, it should be understood that the disclosed devices / equipment and methods can be implemented in other ways. For example, the device / equipment embodiments described above are merely schematic, for example, the division of the modules or units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0103] It should be understood that when used in the present specification and the appended claims, the term "comprising" indicates the presence of described features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof.

[0104] In the description of this application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship, for example, A / B can represent A or B; "and / or" in this application is merely a description of the association relationship between associated objects, indicating that three relationships may exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

[0105] Furthermore, in the description of this application, unless otherwise specified, "plurality" means two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple.

[0106] As used in the specification and appended claims of this application, the term "if" can be interpreted as "when" or "uponce" or "in response to determining" or "in response to detecting", depending on the context. Similarly, the phrase "if it is determined" or "if [described condition or event] is detected" can be interpreted as meaning "uponce it is determined" or "in response to determining" or "uponce [described condition or event] is detected" or "in response to detecting [described condition or event]", depending on the context.

[0107] In addition, in the description of the present specification and the appended claims, the terms "first", "second", "third", etc. are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein.

[0108] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the phrases "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. appearing in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for preparing a display module, characterized in that: include: Prepare a transfer substrate, the transfer substrate comprising a substrate and light-emitting chips arranged in an array on the substrate, the light-emitting chips comprising a P-type electrode and an N-type electrode; Providing a driving substrate, the driving substrate comprising a base and a driving layer formed on the base, a limiting structure matching the shape of each of the light-emitting chips is provided on a side of the driving layer away from the base, and a P-type contact electrode corresponding to the P-type electrode and an N-type contact electrode corresponding to the N-type electrode are provided on the limiting structure; Aligning and laminating the transfer substrate with the drive substrate so that the P-type contact electrode is electrically connected to the corresponding P-type electrode, and the N-type contact electrode is electrically connected to the corresponding N-type electrode; The substrate is peeled off.

2. The method according to claim 1, characterized in that: The light-emitting chip includes a plurality of primary colors, and the substrate includes a preparation area corresponding to each primary color; The method of preparing the transfer substrate comprises: Providing a mask, wherein the mask includes a plurality of opening areas; The corresponding light-emitting chips are prepared in the preparation areas corresponding to the primary colors in sequence through the opening area.

3. The method according to claim 2, characterized in that For each primary color, a corresponding light-emitting chip is prepared in a preparation area corresponding to the primary color, including: A deposition process is used to sequentially form a base layer, a light-emitting layer corresponding to the primary color, an insulating protection layer and a photoresist layer in the preparation area corresponding to the primary color through the opening area; wherein the light-emitting layer includes an N-type semiconductor layer, a multi-quantum well layer corresponding to the primary color and a P-type semiconductor layer stacked from bottom to top; Performing patterning on the photoresist layer to remove the photoresist in the first target area and the second target area to form a patterned photoresist layer; wherein the first target area and the second target area are spaced apart; Using the patterned photoresist layer as a mask, removing the insulating protective layer corresponding to the first target area; Using the patterned photoresist layer as a mask, etching the insulating protection layer and the light-emitting layer corresponding to the second target area until the N-type semiconductor layer is etched to a target thickness; forming the P-type electrode and the N-type electrode in the first target area and the second target area, respectively; The patterned photoresist layer is removed.

4. The method according to claim 3, characterized in that The multiple primary colors include a first primary color, a second primary color and a third primary color. The material of the multi-quantum well layer corresponding to the first primary color is gallium arsenide, the material of the second primary color multi-quantum well layer corresponding to the second primary color is gallium nitride, and the material of the third primary color multi-quantum well layer corresponding to the third primary color is indium gallium nitride.

5. The method according to claim 1, characterized in that: The driving layer includes: a thin film transistor layer and an insulating layer stacked along a first direction; The providing of a driving substrate comprises: The thin film transistor layer is formed on the substrate; a thin film transistor controller and thin film transistors corresponding to each of the light-emitting chips are formed in the thin film transistor layer, and the thin film transistor controller is electrically connected to the gate and source of each of the thin film transistors respectively; The limiting structure is formed on a side of the insulating layer away from the substrate, a drain transmission line and a ground layer are formed in the insulating layer, a P-type contact electrode on the limiting structure is electrically connected to the drain of the corresponding thin film transistor through the drain transmission line, and an N-type contact electrode is electrically connected to the ground layer; The thin film transistor controller is used to control the on and off of each thin film transistor and the brightness of each light emitting chip according to the picture signal to be displayed.

6. The method according to claim 5, characterized in that The thin film transistor controller receives the image signal to be displayed sent by the terminal device through a wireless connection.

7. The method according to claim 6, characterized in that The wireless connection method is Bluetooth connection.

8. The method according to claim 5, characterized in that The limiting structure is also provided with a first adhesive layer attached to the P-type contact electrode and a second adhesive layer attached to the N-type contact electrode. The P-type electrode of each light-emitting chip is electrically connected to the corresponding P-type contact electrode through the first adhesive layer, and the N-type electrode is electrically connected to the corresponding N-type contact electrode through the second adhesive layer.

9. The method according to claim 8, characterized in that The first adhesive layer and the second adhesive layer are anisotropic conductive adhesive layers.

10. A display module, characterized in that: include: A display module prepared by the preparation method according to any one of claims 1 to 9.