Processing method for reducing thickness of surface treatment layer of circuit board and surface treatment layer

By forming nickel seed layer, nickel main layer, palladium layer and gold layer on the circuit board, the conductivity problem caused by excessive thickness of the surface treatment layer is solved, high-speed transmission of high-frequency signals is achieved, and production efficiency and cost are improved. benefit.

CN119110501APending Publication Date: 2024-12-10JIANGSU PROVISION ELECTRONICS CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202411216924.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-02
Publication Date
2024-12-10

AI Technical Summary

Technical Problem

The thickness of the existing circuit board surface treatment layer is too large, which affects the conductivity and is especially unfavorable to the high-speed transmission of high-frequency signals.

Method used

A method that includes the first electroless nickel plating treatment to form a nickel seed layer, the second electroless nickel plating treatment to form a nickel main layer, and then electroless palladium plating and gold plating treatment is followed by lamination to form thin nickel, palladium and gold layers. , reduce the total thickness of the surface treatment layer.

Benefits of technology

It effectively reduces the functional loss of the conductor and meets the high-speed transmission needs of high-frequency signals. At the same time, the method is simple and easy to implement, with high production efficiency and low cost.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119110501A_ABST
    Figure CN119110501A_ABST
Patent Text Reader

Abstract

The invention discloses a processing method for reducing the thickness of a surface treatment layer of a circuit board and the surface treatment layer, and the processing method comprises the steps: carrying out the first chemical nickel plating treatment of a circuit board after the pretreatment, so as to form a nickel seed layer with the thickness of 0.01-0.05 [mu] m and the stress of not greater than 5Mpa on the surface of the circuit board; carrying out secondary chemical nickel plating treatment on the circuit board with the nickel seed layer so as to form a nickel main body layer with the thickness of 0.2-0.5 mu m and the density of more than 90% on the nickel seed layer; then washing with water; sequentially carrying out chemical palladium plating and chemical gold plating treatment on the washed circuit board so as to form a palladium layer and a gold layer on the nickel main body layer in a laminating manner; and then washing and drying to finish the surface treatment processing of the circuit board. The processing method is simple, reasonable and easy to implement, the thickness of the surface treatment layer of the obtained circuit board is very thin, the functional loss of a conductor can be effectively reduced, and the high-speed transmission requirement of a high-frequency signal is met.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a processing method for reducing the thickness of a surface treatment layer of a circuit board, and a surface treatment layer. Background Art

[0002] The pads of the circuit board are the terminals for connecting the circuit board with external components. The pads of the circuit board are copper conductors and must be surface treated to protect the copper surface of the pads from pollution and oxidation, thereby ensuring reliable welding between the pads and components. At present, the surface treatment of the circuit board pads includes OSP, hot air leveling (HASL), chemical tin (ISn), chemical silver (IAg), chemical nickel immersion gold (ENIG) and chemical nickel palladium gold (ENEPIG). Among them, the chemical nickel palladium gold (ENEPIG) process has the advantages of low cost, bright metal, high uniformity, good flatness, good solderability, reduced gold wire cost, wear resistance and easy operation, and is particularly suitable for products with high connection reliability such as SMT and WB mixed assembly boards and mobile phone boards.

[0003] In addition, it is well known that the thickness of the surface treatment layer will affect the conductivity of the pad. The thicker the surface treatment layer, the worse the conductivity of the pad, which leads to greater functional loss of the conductor, and thus is not conducive to high-speed transmission of high-frequency signals. Therefore, how to achieve the thickness of the surface treatment layer made based on the chemical nickel-palladium-gold (ENEPIG) process to meet the high-speed transmission requirements of high-frequency signals has become a technical problem that needs to be solved urgently.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] In order to overcome the above-mentioned defects, the present invention provides a processing method and a surface treatment layer for reducing the thickness of the surface treatment layer of a circuit board. The processing method is simple, reasonable and easy to implement. The thickness of the obtained surface treatment layer of the circuit board is very thin, which can effectively reduce the functional loss of the conductor and meet the high-speed transmission requirements of high-frequency signals.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a processing method for reducing the thickness of the surface treatment layer of a circuit board, comprising:

[0007] Performing a first chemical nickel plating treatment on the circuit board material that has completed the pretreatment, so as to deposit a nickel seed layer with a thickness of 0.01 to 0.05 μm and a stress of no more than 5 MPa on the surface of the circuit board material;

[0008] The circuit board with the nickel seed layer is subjected to a second chemical nickel plating treatment to deposit a nickel main body layer with a thickness of 0.2 to 0.5 μm and a density of more than 90% on the nickel seed layer; and then washed with water;

[0009] The washed circuit board is subjected to chemical palladium plating and chemical gold plating in sequence to realize stacking of a palladium layer and a gold layer on the nickel main layer; then washed and dried to complete the surface treatment of the circuit board.

[0010] As a further improvement of the present invention, the method for the first chemical nickel plating treatment is: placing the circuit board that has completed the pre-treatment in a nickel plating solution A at 74°C to 84°C and immersing it for 30 to 60 seconds, wherein the nickel plating solution A includes sodium dihydrogen hypophosphite with a concentration of 18 to 32 g / L and a sulfide with a concentration of 4 to 5 mL / L.

[0011] As a further improvement of the present invention, the method of the second chemical nickel plating treatment is: placing the circuit board with the nickel seed layer in a nickel plating solution B at 74°C to 84°C and immersing it for 120 to 150 seconds, wherein the nickel plating solution B includes sodium hypophosphite with a concentration of 18 to 32 g / L, nickel sulfate with a concentration of 4.4 to 5.2 g / L, and sulfide with a concentration of 4 to 5 mL / L.

[0012] As a further improvement of the present invention, the above-mentioned pre-treatment includes degreasing, pickling A, micro-etching, pickling B, pre-dipping, activation and post-dipping treatment of the circuit board in sequence.

[0013] As a further improvement of the present invention, the above degreasing treatment method is: soaking the circuit board in an acidic degreasing agent at 45°C to 55°C for 1 to 2 minutes, and then washing with water;

[0014] The pickling A and pickling B are the same, both of which are: immersing the circuit board in sulfuric acid with a concentration of 30 to 70 mL / L for 50 to 60 seconds, and then washing with water;

[0015] The micro-etching treatment method is as follows: immersing the circuit board in a micro-etching solution at 24°C to 30°C for 50 to 60 seconds, and then washing with water;

[0016] The pre-preg treatment method is as follows: immersing the circuit board in sulfuric acid with a concentration of 10 to 20 mL / L for 50 to 60 seconds, and then washing with water;

[0017] The activation treatment method is as follows: soaking the circuit board in an activator solution at 22°C to 28°C for 40 to 50 seconds, and then washing with water;

[0018] The post-immersion treatment method is: immerse the circuit board in 1% sulfuric acid for 40 to 60 seconds, and then wash with water.

[0019] As a further improvement of the present invention, the copper etching amount of the above micro-etching is 0.4-0.6 μm; the processing parameters of the above water washing are: the water inflow in the water washing tank is (8-12) L / h, and the water washing time is 30-60 s.

[0020] As a further improvement of the present invention, the nickel seed layer and the nickel main layer are collectively referred to as a nickel layer; the circuit board with the nickel layer is immersed in a solution A at 50°C to 62°C for 7 to 8 minutes to form a palladium layer with a thickness of 0.05 to 0.1 μm on the nickel layer; and then washed with water; wherein the solution A includes an organic acid with a concentration of 100 to 120 mL / L and palladium sulfate with a concentration of 0.9 to 1.3 g / L.

[0021] As a further improvement of the present invention, the circuit board with the nickel layer and the palladium layer is immersed in a solution B at 72°C to 88°C for not less than 20 minutes to form the gold layer with a thickness of 0.05 to 0.1 μm on the palladium layer; and then washed with water; wherein the solution B includes potassium gold cyanide with a concentration of 1.4 to 2 g / L and potassium hydroxide with a concentration of 70 to 90 mL / L.

[0022] The present invention also provides a surface treatment layer, which is made by the processing method for reducing the thickness of the surface treatment layer of a circuit board as described in the present invention; that is, the surface treatment layer includes the nickel seed layer, the nickel main layer, the palladium layer and the gold layer stacked in sequence from bottom to top on the board surface of the circuit board.

[0023] The beneficial effects of the present invention are as follows: compared with the prior art, 1) the present invention can effectively reduce the thickness of the surface treatment layer of the circuit board through process innovation, thereby effectively reducing the functional loss of the conductor, and well meeting the high-speed transmission requirements of high-frequency signals. 2) The processing method provided by the present invention is simple, reasonable, easy to implement, high in production efficiency, and low in processing cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A flow chart of the processing method for reducing the thickness of the surface treatment layer of a circuit board according to the present invention;

[0025] Figure 2 It is a schematic diagram of the cross-sectional structure of the surface treatment layer of the present invention.

[0026] Combined with the attached drawings, the following description is given:

[0027] 1. Nickel layer; 11. Nickel seed layer; 12. Nickel main layer; 2. Palladium layer; 3. Gold layer. DETAILED DESCRIPTION

[0028] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0029] Embodiment 1:

[0030] Please refer to the attached Figure 1 and 2 As shown, this embodiment 1 provides a processing method for reducing the thickness of the surface treatment layer of the circuit board, that is: through this processing method, the thickness of the surface treatment layer of the circuit board can be effectively reduced, thereby effectively reducing the functional loss of the conductor, and well meeting the high-speed transmission requirements of high-frequency signals.

[0031] The processing method for reducing the thickness of the surface treatment layer of the circuit board described in this embodiment 1 mainly includes the following steps:

[0032] S1: Pre-processing the circuit board.

[0033] Specifically, the circuit board can be understood as a working board that has completed the inner layer circuit production, outer layer circuit production and solder mask operation and other processing procedures. And according to the processing requirements of the circuit board product, the pre-processing processing content includes: degreasing, pickling A, micro-etching, pickling B, pre-dip, activation and post-dip treatment of the circuit board (i.e., the working board) in sequence.

[0034] Note: The above-mentioned processing techniques of "degreasing, pickling A, micro-etching, pickling B, pre-immersion, activation and post-immersion treatment" are all commonly used technical means in the current chemical nickel palladium gold (ENEPIG) processing field, so they will not be described in detail here, but only briefly described as follows:

[0035] ① Degreasing treatment: soak the circuit board in an acidic degreasing agent at a temperature of 45℃ to 55℃ for 1 to 2 minutes, and then wash it with water to decompose and remove grease, dirt and other oily pollutants on the board surface (especially the copper surface) of the circuit board, and to discharge the air adsorbed on the copper surface, so that the degreasing agent can expand on the copper surface to achieve a wetting effect.

[0036] Furthermore, the acidic degreasing agent may preferably be degreasing agent ACL-007, whose main components include citric acid and non-ionic surfactants, etc. Of course, the present application is not limited to the above degreasing agent types, and the specific type can be determined according to the circuit board processing requirements.

[0037] ② Pickling A and Pickling B treatment: both involve soaking the circuit board in 30-70 mL / L sulfuric acid for 50-60 seconds, and then washing with water to remove oxides and other impurities on the board surface (especially the copper surface) of the circuit board.

[0038] ③ Micro-etching treatment: the circuit board is immersed in a micro-etching solution at 24°C to 30°C for 50 to 60 seconds, and then washed with water to remove oxides and other impurities on the board surface (especially the copper surface) of the circuit board, and to roughen the copper surface so that good adhesion is formed between the copper surface and the nickel layer described below.

[0039] Furthermore, the main components of the micro-etching solution include 80-120 g / L sodium persulfate and 10-20 mL / L sulfuric acid. It is understandable that the micro-etching solution is a commonly used agent in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0040] Furthermore, the amount of copper etched by the micro-etching treatment is 0.4-0.6 μm, and excessive copper etching / copper biting should be avoided.

[0041] ④ Pre-preg treatment: soak the circuit board in sulfuric acid with a concentration of 10-20 mL / L for 50-60 seconds, and then wash with water to make the board surface (especially the copper surface) of the circuit board in an oxygen-free state, thereby protecting the palladium bath from contamination by the pre-treatment bath liquid and extending the service life of the palladium bath.

[0042] ⑤ Activation treatment: soak the circuit board in an activator solution at 22°C to 28°C for 40 to 50 seconds, and then wash with water to activate the board surface (mainly the copper surface) of the circuit board and form a palladium film (also called an activation film) on the copper surface to serve as a catalyst for the reaction with the chemical nickel described below.

[0043] Furthermore, the main components of the activator solution include sulfuric acid with a concentration of 10-20 mL / L and palladium sulfate with a concentration of 8-14 PPM. It is understandable that the activator solution is also a commonly used agent in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0044] ⑥ Post-immersion treatment: the circuit board is immersed in 1% sulfuric acid for 40 to 60 seconds, and then washed with water to remove the palladium activation chemical (activation film) remaining on the board surface of the circuit board.

[0045] In addition, it can be seen from the above that when the circuit board is subjected to the above pre-treatment, the circuit board needs to be washed after each process is completed, so as to avoid the liquid in the previous process flowing into the subsequent process to cause pollution. As for the washing process, the following processing parameters can be preferably used: the water inflow in the washing tank is (8-12) L / h, and the washing time is 30-60s.

[0046] S2: performing a first chemical nickel plating treatment on the circuit board material that has completed the pretreatment, so as to deposit a nickel seed layer 11 with a thickness of 0.01-0.05 μm and a stress of no more than 5 MPa on the surface of the circuit board material.

[0047] Specifically, the method of the first chemical nickel plating treatment is: immerse the circuit board that has completed the above pretreatment in a nickel plating solution A at a temperature of 74°C to 84°C for 30 to 60 seconds to deposit and form the nickel seed layer 11 on the surface of the circuit board (especially the copper surface). The main components of the nickel plating solution A include sodium dihydrogen hypophosphite with a concentration of 18 to 32 g / L and a sulfide (such as potassium sulfide, etc.) with a concentration of 4 to 5 mL / L.

[0048] It can be understood that, ① by first depositing a layer of ultra-thin and low-stress nickel seed layer 11 on the copper surface of the circuit board, on the one hand, the bonding force between the nickel seed layer 11 and the copper surface can be effectively improved, and on the other hand, it can facilitate the subsequent deposition and growth of the nickel main layer 12 on the nickel seed layer 11, so that the density of the entire nickel layer structure is high, thereby laying a good foundation for the overall structure of the surface treatment layer to have high density. ② Regarding the nickel plating solution A, it uses a commonly used agent in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0049] Furthermore, the processing parameters of the first chemical nickel plating treatment can be optimally controlled as follows: reaction temperature is 80° C., immersion time is 40 seconds. Then, the thickness of the deposited nickel seed layer 11 is 0.01-0.02 μm, and the stress is not greater than 5 MPa.

[0050] S3: The circuit board material with the nickel seed layer 11 is subjected to a second chemical nickel plating treatment to deposit a nickel main layer 12 with a thickness of 0.2 to 0.5 μm and a density of more than 90% on the nickel seed layer 11; followed by water washing (same as above, the water washing in this step is also to prevent the nickel plating solution from contaminating the subsequent processes).

[0051] Specifically, the specific method of the second chemical nickel plating treatment is: immerse the circuit board with the nickel seed layer 11 in a nickel plating solution B at a temperature of 74°C to 84°C for 120 to 150 seconds to deposit and form the nickel main layer 12 on the nickel seed layer 11. The main components of the nickel plating solution B include sodium dihydrogen hypophosphite with a concentration of 18 to 32 g / L, nickel sulfate with a concentration of 4.4 to 5.2 g / L, and sulfide (such as potassium sulfide) with a concentration of 4 to 5 mL / L.

[0052] It is understandable that, ① based on the characteristics of the nickel seed layer 11, the nickel main layer 12 can be tightly combined with the nickel seed layer 11 and is not easy to fall off. ② Regarding the nickel plating solution B, it also uses the agent commonly used in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0053] Furthermore, the processing parameters of the second chemical nickel plating treatment can be optimally controlled as follows: the reaction temperature is 80° C., and the immersion time is 130 seconds. At this time, the thickness of the deposited nickel main layer 12 is 0.3 μm.

[0054] It can be understood that if the nickel seed layer 11 and the nickel main layer 12 are collectively referred to as a nickel layer 1, the thickness of the nickel layer 1 can be optimized to be 0.21-0.55 μm, such as: it can be further optimized to be about 0.3 μm; compared with the nickel layer thickness of 3-8 μm in the prior art, the thickness of the nickel layer 1 is very thin, which provides a very good foundation for the thinning or even ultra-thinning of the overall structure of the surface treatment layer.

[0055] S4: The circuit board material with the nickel layer 1 and washed with water is subjected to chemical palladium plating and chemical gold plating in sequence to realize the formation of a palladium layer 2 and a gold layer 3 stacked on the nickel main layer 12; then washed with water and dried to complete the surface treatment of the circuit board. It can be understood that by depositing the palladium layer 2 on the nickel layer 1, the nickel layer 1 can be protected, the nickel layer 1 can be prevented from being attacked, and the bonding force and stability with the circuit board surface can be enhanced; by depositing the gold layer 3 on the palladium layer 2, the conductivity of the copper surface of the circuit board can be improved.

[0056] Specifically, the specific method of the above-mentioned chemical palladium plating treatment is: immersing the circuit board with the nickel layer 1 in a solution A at 50°C to 62°C for 7 to 8 minutes to form the palladium layer 2 with a thickness of 0.05 to 0.1 μm on the nickel layer 1; then washing with water (same as above, to avoid contamination of the subsequent process by the solution A); wherein the main components of the solution A include an organic acid with a concentration of 100 to 120 mL / L and palladium sulfate with a concentration of 0.9 to 1.3 g / L.

[0057] Furthermore, the processing parameters of the chemical palladium plating treatment can be optimally controlled as follows: reaction temperature is 60° C., reaction time is 7 min. At that time, the thickness of the palladium layer 2 formed by deposition is 0.06 μm.

[0058] In addition, regarding the chemical solution A, it also uses a chemical commonly used in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0059] The specific method of the above-mentioned chemical gold plating treatment is: immersing the circuit board with the nickel layer 1 and the palladium layer 2 in a solution B at 72°C to 88°C for not less than 20 minutes to form the gold layer 3 with a thickness of 0.05 to 0.1 μm on the palladium layer 2; then washing with water (same as above, to avoid contamination of the subsequent process by the solution B); wherein the main components of the solution B include potassium gold cyanide with a concentration of 1.4 to 2 g / L and potassium hydroxide with a concentration of 70 to 90 mL / L.

[0060] Furthermore, the processing parameters of the chemical gold plating treatment can be optimally controlled as follows: the reaction temperature is 80° C., and the reaction time is 20 min. At that time, the thickness of the deposited gold layer 3 is 0.05 μm.

[0061] In addition, regarding the chemical solution B, it also uses a chemical commonly used in the field of chemical nickel palladium gold (ENEPIG) processing, so it will not be described in detail here.

[0062] In summary, after the surface treatment of the circuit board is completed, the thickness of the obtained surface treatment layer can be optimally controlled to be: (the thickness of the nickel layer 1 is 0.21-0.55 μm) + (the thickness of the palladium layer 2 is 0.05-0.1 μm) + (the thickness of the gold layer 3 is 0.05-0.1 μm) = 0.31-0.75 μm; much thinner than the thickness of the surface treatment layer in the prior art (generally 6.14 μm). Therefore, the surface treatment layer prepared by the present application can effectively reduce the functional loss of the conductor and well meet the high-speed transmission requirements of high-frequency signals.

[0063] Embodiment 2:

[0064] Please refer to the attached Figure 2 As shown, this embodiment 2 provides a surface treatment layer, which is made by the processing method for reducing the thickness of the surface treatment layer of the circuit board described in the above embodiment 1; that is, the surface treatment layer includes the nickel seed layer 11, the nickel main layer 12, the palladium layer 2 and the gold layer 3 stacked in sequence from bottom to top on the board surface of the circuit board.

[0065] Further preferably, the thickness of the nickel seed layer 11 is 0.01-0.05 μm; the thickness of the nickel main layer 12 is 0.2-0.5 μm; the thickness of the palladium layer 2 is 0.05-0.1 μm; the thickness of the gold layer 3 is 0.05-0.1 μm. Therefore, the overall thickness of the surface treatment layer is very thin, which can effectively reduce the functional loss of the conductor and well meet the high-speed transmission requirements of high-frequency signals.

[0066] Finally, the suffixes "A", "B", etc. (such as nickel plating solution A, nickel plating solution B, etc.) in the component names in the patent specification of this invention are only for the convenience of description and are not used to limit the scope of implementation of the patent of this invention.

[0067] Many specific details are described in the above description to facilitate a full understanding of the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person familiar with the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A processing method for reducing the thickness of a surface treatment layer of a circuit board, characterized in that: include: Performing a first chemical nickel plating treatment on the pre-treated circuit board material to deposit a nickel seed layer (11) with a thickness of 0.01 to 0.05 μm and a stress of no more than 5 MPa on the surface of the circuit board material; The circuit board material with the nickel seed layer (11) is subjected to a second chemical nickel plating treatment to deposit a nickel main body layer (12) with a thickness of 0.2 to 0.5 μm and a density of more than 90% on the nickel seed layer (11); and then washed with water; The washed circuit board is subjected to chemical palladium plating and chemical gold plating in sequence to form a palladium layer (2) and a gold layer (3) stacked on the nickel main layer (12); then washed and dried to complete the surface treatment of the circuit board.

2. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 1, characterized in that: The method of the first chemical nickel plating treatment is: immerse the circuit board that has completed the pre-treatment in a nickel plating solution A at 74°C to 84°C for 30 to 60 seconds, wherein the nickel plating solution A includes sodium dihydrogen hypophosphite with a concentration of 18 to 32 g / L and a sulfide with a concentration of 4 to 5 mL / L.

3. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 1, characterized in that: The method for the second chemical nickel plating treatment is as follows: the circuit board with the nickel seed layer (11) is immersed in a nickel plating solution B at 74°C to 84°C for 120 to 150 seconds, wherein the nickel plating solution B comprises sodium hypophosphite with a concentration of 18 to 32 g / L, nickel sulfate with a concentration of 4.4 to 5.2 g / L, and sulfide with a concentration of 4 to 5 mL / L.

4. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 1, characterized in that: The above-mentioned pre-treatment includes degreasing, pickling A, micro-etching, pickling B, pre-dipping, activation and post-dipping treatments performed on the circuit board in sequence.

5. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 4, characterized in that: The above degreasing treatment method is: soak the circuit board in an acidic degreasing agent at 45°C to 55°C for 1 to 2 minutes, and then wash with water; The pickling A and pickling B are the same, both of which are: immersing the circuit board in sulfuric acid with a concentration of 30 to 70 mL / L for 50 to 60 seconds, and then washing with water; The micro-etching treatment method is as follows: immersing the circuit board in a micro-etching solution at 24°C to 30°C for 50 to 60 seconds, and then washing with water; The pre-preg treatment method is as follows: immersing the circuit board in sulfuric acid with a concentration of 10 to 20 mL / L for 50 to 60 seconds, and then washing with water; The activation treatment method is as follows: soaking the circuit board in an activator solution at 22°C to 28°C for 40 to 50 seconds, and then washing with water; The post-immersion treatment method is: immerse the circuit board in 1% sulfuric acid for 40 to 60 seconds, and then wash with water.

6. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 5, characterized in that: The amount of copper etched by the above micro-etching is 0.4 to 0.6 μm; The treatment parameters of the above-mentioned water washing are: the water inlet volume in the water washing tank is (8-12) L / h, and the water washing time is 30-60 s.

7. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 1, characterized in that: The nickel seed layer (11) and the nickel main layer (12) are collectively referred to as a nickel layer (1); The circuit board with the nickel layer (1) is immersed in a solution A at 50°C to 62°C for 7 to 8 minutes to form a palladium layer (2) with a thickness of 0.05 to 0.1 μm on the nickel layer (1); and then washed with water; wherein the solution A comprises an organic acid with a concentration of 100 to 120 mL / L and palladium sulfate with a concentration of 0.9 to 1.3 g / L.

8. The method for reducing the thickness of the surface treatment layer of a circuit board according to claim 7, characterized in that: The circuit board with the nickel layer (1) and the palladium layer (2) is immersed in a solution B at a temperature of 72°C to 88°C for not less than 20 minutes to form a gold layer (3) with a thickness of 0.05 to 0.1 μm on the palladium layer (2); and then washed with water; wherein the solution B comprises potassium gold cyanide with a concentration of 1.4 to 2 g / L and potassium hydroxide with a concentration of 70 to 90 mL / L.

9. A surface treatment layer, characterized in that: The circuit board is manufactured by using the processing method for reducing the thickness of the surface treatment layer of the circuit board as described in any one of claims 1 to 8; that is, the surface treatment layer includes the nickel seed layer (11), the nickel main layer (12), the palladium layer (2) and the gold layer (3) which are stacked in sequence from bottom to top on the board surface of the circuit board.