Multi-chip IGBT module branch defect monitoring circuit and method based on gate voltage differential

Abstract

The invention discloses a monitoring circuit and a monitoring method for branch defects of a multi-chip IGBT (Insulated Gate Bipolar Translator) module based on gate voltage differentiation. The monitoring circuit comprises an isolation power supply module, a signal comparison module, a signal operation module, a conventional driving module and a state monitoring module, the isolation power supply module is used for supplying power to other modules; the signal comparison module is used for comparing the gate voltage Vge of the multi-chip IGBT module with a reference preset value Vsth; the signal operation module is used for outputting different control signals to the conventional driving module and the state monitoring module; the conventional driving module is used for controlling the on and off of the multi-chip IGBT module; the state monitoring module controls whether constant gate current is injected into the multi-chip IGBT module or not and whether differential operation is started or not. According to the invention, normal work of the multi-chip IGBT module can be ensured, monitoring can be conveniently carried out without dismounting, and the aging state of the multi-chip IGBT module can be accurately evaluated.

Description

Technical Field

[0001] The present invention relates to the technical field of reliability monitoring of IGBT modules, and in particular to a monitoring circuit and method for branch defects of a multi-chip IGBT module based on gate voltage differentiation. Background Art

[0002] In recent years, with the vigorous development of emerging industries such as new energy power generation, rail transit, smart grid, and electric vehicles, power devices such as IGBT have also been used more widely than ever before. According to an industrial survey report, power devices are one of the most unreliable parts of power electronic systems, accounting for 34% of the failure of the converter system. The working conditions of power electronic systems are complex and the cyclic power fluctuates. For example, wind power converters usually work in complex and severe environments. The current, voltage, and frequency of the machine-side converter change with the change of wind speed. The IGBT module is subjected to a large number of power cycles and thermal cycle loads. This harsh working environment has a great impact on the reliability of the IGBT module. Similarly, the IGBT devices in the power converter devices working in the field of rail traction and new energy electric vehicle drive have been subjected to large junction temperature fluctuations and periodic thermal stress shocks for a long time. Long-term junction temperature fluctuations and thermal stress shocks eventually lead to IGBT failure and aging. IGBT modules are gradually developing towards high-power and special important fields, which has higher requirements for the reliability of IGBT modules. As a key core device in power electronic devices, the reliability of IGBT modules is the main consideration for achieving higher power density and higher integration, and it is also a very important issue in power electronic applications. IGBT device package aging monitoring technology evaluates the degree of package aging by monitoring changes in characteristic parameters during the package aging process. It is the key to achieving device status evaluation, fault prediction and intelligent operation and maintenance.

[0003] At present, the failure of IGBT power modules is mainly divided into two categories: one is chip-level failure, and the other is package-level failure. Studies have shown that the bonding wire and solder layer, as the most vulnerable parts of the IGBT module, have the most direct impact on the reliability of the module. Among the causes of semiconductor device failure, bonding wire failure accounts for 49%. Therefore, mastering the reliability of the bonding wire is crucial to understanding the reliability of the entire module. The main cause of bonding wire failure is the mismatch between the thermal expansion coefficients of the bonding wire and the chip material. When the chip is always in the switching state, the current distribution between the bonding wires is extremely uneven due to the skin effect. The IGBT module is subjected to the thermal stress of high and low temperatures. When the elastic strain caused by the thermal stress on the bonding wire accumulates to a certain extent, it will cause the plastic strain of the bonding wire, and eventually lead to failures such as bonding wire shedding and breakage. Unlike the transient failure caused by the module after undergoing an instantaneous overstress impact, the fatigue aging failure of the bonding wire is a gradual process, which also provides the possibility for the status assessment of the power device. Summary of the invention

[0004] The present invention provides a monitoring circuit and method for branch defects of a multi-chip IGBT module based on gate voltage differential, so that branch defects of the multi-chip IGBT module can be monitored without affecting its normal operation, and the aging state of the multi-chip IGBT module can be accurately evaluated.

[0005] The technical solution adopted by the present invention is:

[0006] A monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation includes:

[0007] Isolation power module, signal comparison module, signal operation module, conventional drive module, status monitoring module;

[0008] The isolated power supply module is respectively connected to the signal comparison module, the signal operation module, the conventional drive module, and the status monitoring module to supply power to these modules;

[0009] The signal comparison module is connected to the multi-chip IGBT module and the signal operation module respectively, and the signal comparison module is used to compare the gate voltage Vge of the multi-chip IGBT module with the reference preset value Vsth, and output the comparison result to the signal operation module;

[0010] The signal operation module is connected to the conventional drive module and the state monitoring module respectively. The signal operation module outputs different control signals to the conventional drive module and the state monitoring module according to the comparison result of the received signal comparison module.

[0011] The conventional driving module is connected to the multi-chip IGBT module, and the conventional driving module controls the opening and closing of the multi-chip IGBT module according to the control signal received from the signal operation module;

[0012] The state monitoring module is connected to the multi-chip IGBT module. The state monitoring module controls whether to inject a constant gate current into the multi-chip IGBT module and whether to start differential operation according to the control signal received from the signal operation module.

[0013] The monitoring circuit also includes a microprocessor, which sends a control signal Svi of a conventional driving module and a control signal Sci of a state monitoring module to a signal operation module, and the signal operation module performs operation processing on the received input control signals Svi and Sci and the result output by the signal comparison module to obtain output signals Sv and Sc, and outputs the output signal Sv to the conventional driving module, and the signal operation module outputs the output signal Sc to the state monitoring module and the microprocessor, and when the state monitoring process ends, the output signal Sc notifies the microprocessor that the state monitoring process ends, and the microprocessor jumps the input control signal Sci to a low level. The microprocessor receives the result of the differential operation module in the state monitoring module, and calculates the gate input capacitance of the IGBT in combination with the current value of the constant current source.

[0014] The isolated power supply module has an input interface connected to an external power supply, and an output interface is a plurality of interfaces, wherein the output interfaces are respectively connected to a signal comparison module, a signal operation module, a conventional drive module and a status monitoring module; the voltages output by the isolated power supply module to the conventional drive module are -Vm and +Vs, and the voltages output to the status monitoring module are -Vm and +Vc.

[0015] The conventional driving module includes an IGBT gate driver Opt1, resistors R1, R10, a bidirectional voltage regulator TVS and an N-channel enhancement type MOSFET1 with a parallel body diode;

[0016] The input end of the IGBT gate driver Opt1 is connected to the output signal Sv of the signal operation module, the two power supply ends of the IGBT gate driver Opt1 are respectively connected to the -Vm voltage value output interface and the +Vs voltage value output interface of the isolation power supply module, the output end of the IGBT gate driver Opt1 is connected to the drain of the N-channel enhancement type MOSFET1, the gate of the N-channel enhancement type MOSFET1 is connected to the inverter, and the inverter is connected to the input signal Sc; the source of the N-channel enhancement type MOSFET1 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to one end of the resistor R10, one end of the bidirectional voltage regulator TVS, the output end of the constant current drive unit in the state monitoring module, the input end of the state monitoring unit in the state monitoring module, the input end of the signal comparison module, and the gate of the multi-chip IGBT module, one end of the bidirectional voltage regulator TVS is connected to the gate of the IGBT, and the other end of the bidirectional voltage regulator TVS is respectively connected to the emitter and the ground end of the IGBT, and the resistor R10 is connected in parallel with the bidirectional voltage regulator TVS.

[0017] The state monitoring module includes a constant current drive unit and a differential operation unit;

[0018] The constant current driving unit includes: IGBT gate driver Opt2, resistors R2, R3, R4, diodes D1, D2, unidirectional voltage regulator ZD, NPN transistor Q1, PNP transistor Q2;

[0019] The input end of the IGBT gate driver Opt2 is connected to the output control signal Sc, the two power supply ends of the IGBT gate driver Opt2 are respectively connected to the +Vc voltage value output interface and the -Vm voltage value output interface of the isolation power module, the output end of the IGBT gate driver Opt2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the base of the NPN transistor Q1, the collector of the NPN transistor Q1 is connected to the power supply end of the IGBT gate driver Opt2 for connecting the +Vc voltage value, and the emitter of the NPN transistor Q1 is respectively connected to one end of the resistor R3 and the unidirectional voltage regulator The cathode of ZD, the other end of the resistor R3 is connected to the emitter of the PNP transistor Q2, the anode of the unidirectional voltage regulator ZD is respectively connected to the base of the PNP transistor Q2 and one end of the resistor R4, the other end of the resistor R4 is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the power supply end of the IGBT gate driver Opt2 for connecting the -Vm voltage value, the collector of the PNP transistor Q2 is connected to the anode of the diode D2, and the cathode of the diode D2 is simultaneously connected to the gate of the multi-chip IGBT module, the input end of the signal comparison module and the input end of the differential operation unit in the state monitoring module;

[0020] The differential operation unit includes operational amplifiers Amp2, Amp3, Amp4, capacitor C2, diode D3, N-channel enhancement type MOSFET2, resistors R7, R8, R9, R10, R11;

[0021] The non-inverting input terminal of the operational amplifier Amp2 is connected to the gate of the multi-chip IGBT module, the output terminal of the operational amplifier Amp2 is respectively connected to the inverting input terminal of the operational amplifier Amp2 and one end of the capacitor C2, the other end of the capacitor C2 is respectively connected to the cathode of the diode D3 and the drain of the N-channel enhancement type MOSFET2, the gate of the N-channel enhancement type MOSFET2 is connected to the input signal Sc, the source of the N-channel enhancement type MOSFET2 is respectively connected to one end of the resistor R8 and the inverting input terminal of the operational amplifier Amp3, the non-inverting input terminal of the operational amplifier Amp3 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the resistor R8 is respectively connected to the output terminal of the operational amplifier Amp3 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to one end of the resistor R11 and the inverting input terminal of the operational amplifier Amp4, the non-inverting input terminal of the operational amplifier Amp4 is connected to one end of the resistor R10, the other end of the resistor R10 is grounded, and the resistor R11 is connected to the output terminal of the operational amplifier Amp4.

[0022] The signal comparison module includes resistors R5, R6, a comparator Comp, a digital isolator Diso, and an operational amplifier Amp1;

[0023] The non-inverting input terminal of the operational amplifier Amp1 is connected to the gate of the multi-chip IGBT module, the inverting input terminal of the operational amplifier Amp1 is respectively connected to the output terminal of the operational amplifier Amp1 and the inverting input terminal of the comparator Comp, one end of the resistor R5 is connected to the output interface of the power isolation module that can output the +VCC voltage value, the other end of the resistor R5 is respectively connected to one end of the resistor R6 and the non-inverting input terminal of the comparator Comp, the other end of the resistor R6 is grounded, and the output terminal of the comparator Comp is connected to the input terminal of the digital isolator Diso.

[0024] The signal operation module includes a NAND gate NaS, a NAND gate NaR, an AND gate And1, an AND gate And2, and a resistor R9;

[0025] NAND gate NaS and NAND gate NaR constitute an SR latch, one input end of NAND gate NaS is connected to input signal Sci, the other input end of NAND gate NaS is respectively connected to the output end of NAND gate NaR and one input end of AND gate, one input end of NAND gate NaR is connected to output end cp of digital isolator Diso, the other input end of NAND gate NaR is respectively connected to the output end of NAND gate NaS and one input end of AND gate And1, the other input end of AND gate And1 is connected to input signal Sci, the output end of AND gate And1 is connected to one input end of AND gate And2, the other input end of AND gate And2 is connected to inverter, the inverter is connected to input signal Svi, the output end of AND gate And2 generates output control signal Sc, and is grounded through pull-down resistor R9.

[0026] The present invention provides a monitoring circuit and method for branch defects of a multi-chip IGBT module based on gate voltage differentiation, and the technical effects are as follows:

[0027] 1) This method injects a constant current into the gate when the multi-chip IGBT module is in the off state during the switching cycle, which does not affect the normal operation of the multi-chip IGBT and can realize online monitoring;

[0028] 2) This method does not consider the influence of temperature in branch status monitoring, which brings great convenience to monitoring;

[0029] 3) The monitoring circuit has high integration, the monitoring method is easy to implement, the evaluation is accurate, and it has high practical application value. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 The present invention is a structural block diagram of a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving.

[0031] Figure 2 The circuit schematic diagram of a conventional driving module in a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving of the present invention is shown.

[0032] Figure 3 The circuit schematic diagram of the state monitoring module in the monitoring circuit of the branch defects of the multi-chip IGBT module based on gate voltage differentiation under constant current driving of the present invention.

[0033] Figure 4 The present invention is a circuit schematic diagram of a signal comparison module in a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving.

[0034] Figure 5 The present invention is a circuit schematic diagram of a signal operation module in a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving.

[0035] Figure 6 The circuit schematic diagram of the monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving of the present invention.

[0036] Figure 7 The timing diagram of the monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current driving of the present invention is shown.

[0037] Figure 8 It is a simulation waveform diagram of the monitoring circuit of the branch defects of the multi-chip IGBT module based on gate voltage differentiation under constant current driving of the present invention. DETAILED DESCRIPTION

[0038] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0039] like Figure 1 to Figure 6 As shown, a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current drive includes an isolation power supply module, a signal comparison module, a signal operation module, a conventional drive module and a status monitoring module;

[0040] An isolated power supply module, used to supply power to the signal comparison module, the signal operation module, the conventional drive module and the state monitoring module;

[0041] A signal comparison module, used for comparing the gate voltage Vge of the multi-chip IGBT module with a reference preset value Vsth, and outputting the comparison result to the signal operation module;

[0042] A signal operation module, outputting different control signals to the conventional driving module and the state monitoring module according to the comparison result received by the signal comparison module;

[0043] A conventional driving module controls the on and off of the multi-chip IGBT module according to the control signal received from the signal operation module;

[0044] The state monitoring module controls whether to inject a constant gate current into the multi-chip IGBT module and whether to start the differential operation according to the control signal received from the signal operation module.

[0045] The working principle of the present invention is: when monitoring the defect status of a branch of a multi-chip IGBT module, the signal operation module sends a control signal Sv to a conventional drive module, and the output control signal Sv is a low level, which controls the conventional drive module to shut down. At this time, the gate voltage Vge of the multi-chip IGBT module is less than the reference preset value Vsth, and the signal comparison module outputs a high level;

[0046] The signal operation module sends out a control signal Sc according to the control signal Svi of the state monitoring module of the microprocessor and the output signal of the signal comparison module. Sc is at a high level, the state monitoring modules are all turned on, the constant current drive unit starts to inject a constant current into the gate of the multi-chip IGBT module, the gate voltage increases, the differential operation unit monitors the voltage change rate Vk, and outputs it to the microprocessor, the signal comparison module monitors the gate voltage, when the signal comparison module monitors that the gate voltage value Vge is greater than the reference preset value Vsth, the output signal of the signal comparison module is low, the signal comparison module sends an output signal to the signal operation module, the control signal Sc sent by the signal operation module jumps to a low level, and is sent to the state monitoring module and the microprocessor, the state monitoring module is turned off, stops injecting a constant gate current into the multi-chip IGBT module, and the control signal Svi output by the microprocessor jumps to a low level; the microprocessor calculates the gate capacitance C of the multi-chip IGBT module using a capacitance calculation formula according to the current size sent by the state monitoring module and the voltage change rate Vk obtained by monitoring, and uses the capacitance value C to characterize the defect state of the multi-chip IGBT module branch.

[0047] The multi-chip IGBT module is composed of multiple IGBT chip branches in parallel, and each chip branch is composed of an IGBT branch and bonding wires connected thereto. When the status monitoring module injects a constant gate current into the multi-chip IGBT module, the gate current is evenly distributed and flows into multiple chips connected in parallel. When all the IGBT bonding wires in one or more chip branches are broken, the gate current will no longer flow into the chip where all the IGBT bonding wires are broken, thereby increasing the current distributed to the remaining chips connected in parallel. Therefore, the gate voltage Vge of the multi-chip IGBT module increases faster, and the rate of change of Vge increases. According to the capacitance calculation formula, the capacitance value decreases. Therefore, by calculating the gate capacitance value C of the multi-chip IGBT module, the defect state of the branch in the multi-chip IGBT module can be characterized.

[0048] In this embodiment, a microprocessor is also included. The microprocessor sends a control signal Svi of a conventional driving module and a control signal Sci of a state monitoring module to a signal operation module. The signal operation module performs operation processing on the received input control signals Svi and Sci and the result output by the signal comparison module to obtain output signals Sv and Sc, outputs the output signal Sv to the conventional driving module, and outputs the output signal Sc to the state monitoring module and the microprocessor. The microprocessor receives the output signal Sc of the signal operation module, determines whether to output Sci based on Sc, receives the result of the differential operation module in the state monitoring module, and calculates the size of the gate input capacitance of the IGBT in combination with the current value of the constant current source.

[0049] In this embodiment, the isolated power supply module has an input interface connected to an external power supply, and an output interface is a plurality of interfaces, and the output interfaces are respectively connected to a signal comparison module, a signal operation module, a conventional drive module and a status monitoring module. The isolated power supply module outputs voltages of +Vs and -Vm to the conventional drive module, and supplies power to the status monitoring module as +Vc and -Vm.

[0050] In this embodiment, the conventional driving module includes an IGBT gate driver Opt1, a resistor R1, a resistor R10, a bidirectional voltage regulator TVS and an N-channel enhancement type MOSFET1 with a parallel body diode. The input end of the IGBT gate driver Opt1 is connected to the output signal Sv of the signal operation module. The two power supply ends of the IGBT gate driver Opt1 are respectively connected to the -Vm voltage value output interface and the +Vs voltage value output interface of the isolation power supply module. The output end of the IGBT gate driver Opt1 is connected to the source of the N-channel enhancement type MOSFET1. The gate of FET1 is connected to the inverter, the inverter is connected to the input signal Sc, the drain of N-channel enhancement MOSFET1 is connected to one end of resistor R1, the other end of resistor R1 is simultaneously connected to one end of resistor R10, one end of the bidirectional voltage regulator TVS, the output end of the constant current drive unit in the state monitoring module, the input end of the state monitoring unit in the state monitoring module, the input end of the signal comparison module and the gate of the multi-chip IGBT module, one end of the bidirectional voltage regulator TVS is connected to the gate of the IGBT, and the other end is simultaneously connected to the emitter of the IGBT and the ground, and the resistor R10 is connected in parallel with the bidirectional voltage regulator TVS.

[0051] In this embodiment, the state monitoring module is divided into two parts: a constant current drive unit and a differential operation unit. The constant current drive unit includes an IGBT gate driver Opt2, resistors R2, R3, and R4, diodes D1, D2, a unidirectional voltage regulator ZD, an NPN transistor Q1, and a PNP transistor Q2. The input end of the gate driver Opt2 is connected to the output control signal Sc, and the two power supply ends of the IGBT gate driver Opt2 are respectively connected to the +Vc voltage value output interface and the -Vm voltage value output interface of the isolation power supply module. The output end of the IGBT gate driver Opt2 is connected to the resistor R2, and the other end of R2 is connected to the base of the NPN transistor Q1. The NPN transistor Q1 The collector of the NPN transistor Q1 is connected to the power supply terminal of the IGBT gate driver Opt2 for connecting to the +Vc voltage value. The emitter of the NPN transistor Q1 is connected to one end of the resistor R3 and the cathode of the unidirectional voltage regulator ZD at the same time. The other end of the resistor R3 is connected to the emitter of the PNP transistor Q2. The anode of the unidirectional voltage regulator ZD is connected to the base of the PNP transistor Q2 and one end of the resistor R4. The other end of the resistor R4 is connected to the anode of the diode D1. The cathode of the diode D1 is connected to the power supply terminal of the IGBT gate driver Opt2 for connecting to the -Vm voltage value. The collector of the PNP transistor Q2 is connected to the anode of the diode D2. The cathode of the diode D2 is connected to the gate, signal The input end of the signal comparison module and the input end of the differential operation unit in the state monitoring module; the differential operation unit includes operational amplifiers Amp2, Amp3, Amp4, capacitor C2, diode D3, N-channel enhancement type MOSFET2, resistors R7, R8, R9, R10, R11, the non-inverting input end of the operational amplifier Amp2 is connected to the gate of the multi-chip IGBT module, the output end of the operational amplifier Amp2 is simultaneously connected to the inverting input end of the operational amplifier Amp2 and one end of the capacitor C2, the other end of the capacitor C2 is simultaneously connected to the cathode of the diode D3 and the drain of the N-channel enhancement type MOSFET2, the gate of the N-channel enhancement type MOSFET2 is connected to the input signal Sc, The source of the N-channel enhancement type MOSFET2 is simultaneously connected to the inverting input terminal of the operational amplifier Amp3 and one end of the resistor R8, the other end of the resistor R8 is connected to the output terminal of the operational amplifier Amp3, the non-inverting input terminal of the operational amplifier Amp3 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the resistor R8 is respectively connected to the output terminal of the operational amplifier Amp3 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to one end of the resistor R11 and the inverting input terminal of the operational amplifier Amp4, the non-inverting input terminal of the operational amplifier Amp4 is connected to one end of the resistor R10, the other end of the resistor R10 is grounded, and the resistor R11 is connected to the output terminal of the operational amplifier Amp4.

[0052] In this embodiment, the signal comparison module includes resistors R5, R6, a comparator Comp, a digital isolator Diso and an operational amplifier Amp1, the non-inverting input terminal of the operational amplifier Amp1 is connected to the gate of the multi-chip IGBT module, the inverting input terminal of the operational amplifier Amp1 is simultaneously connected to the output terminal of the operational amplifier Amp1 and the inverting input terminal of the comparator Comp, one end of the resistor R5 is connected to the output interface of the power isolation module that can output the +VCC voltage value, the other end of the resistor R5 is simultaneously connected to one end of the resistor R6 and the non-inverting input terminal of the comparator Comp, the other end of the resistor R6 is grounded, and the output terminal of the comparator Comp is connected to the input terminal of the digital isolator Diso.

[0053] In this embodiment, the signal operation module includes a NAND gate NaS, a NAND gate NaR, an AND gate And1, an AND gate And2, and a resistor R9. The NAND gate NaS and the NAND gate NaR constitute an SR latch. One input end of the NAND gate NaS is connected to the input signal Sci, and the other input end of the NAND gate NaS is simultaneously connected to the output end of the NAND gate NaR and an input end of the AND gate. One input end of the NAND gate NaR is connected to the output end cp of the digital isolator Diso, and the other input end of the NAND gate NaR is simultaneously connected to the output end of the NAND gate NaS and an input end of the AND gate And1. The other input end of the AND gate And1 is connected to the input signal Sci, the output end of the AND gate And1 is connected to an input end of the AND gate And2, and the other input end of the AND gate And2 is connected to an inverter, the inverter is connected to the input signal Svi, and the output end of the AND gate And2 generates an output control signal Sc and is grounded through a pull-down resistor R9.

[0054] Next, a double pulse circuit is used to simulate the monitoring process of a multi-chip IGBT module in a converter. Figure 6 In the circuit shown, the DUT is a multi-chip IGBT module to be monitored, L load is an inductive load, C is a capacitor on the DC voltage side, and DM is a freewheeling diode. When the DUT is turned on, the load current I L The dotted line path flows when the DUT is turned off. L Circulate along a solid path.

[0055] Table 1 Figure 6 The circuit shown in Figure 7 Changes of the corresponding signals under the timing diagram shown

[0056]

[0057] In Table 1, MOS1 is an N-channel enhancement MOSFET in a conventional drive module, MOS2 is an N-channel enhancement MOSFET in a differential operation unit in a state monitoring module, 1 indicates that the MOSFET is turned on, 0 indicates that the MOSFET is turned off, s1 is the output state of the latch SR, and the result of s1 in the t2-t3 stage is based on the characteristics of the SR latch, and is maintained as the output state of the SR latch in the previous stage (t1-t2). The SR latch is to capture and stabilize the signal output by the signal comparison unit, and cp is the output state of the signal comparison unit. The specific analysis is as follows:

[0058] In the t0--t1 stage, when Svi is high and Sci is low, the N-channel enhancement MOSFET is turned on, the conventional drive unit works, the status monitoring unit does not output, and the IGBT gate driver outputs a high voltage of +15V to turn on the multi-chip IGBT module. At this time, the gate voltage Vge of the multi-chip IGBT module is equal to the high voltage +15V output by the IGBT gate driver. L Circulate along the dotted path.

[0059] In the stage t1--t2, Svi and Sci are both low, the N-channel enhancement MOSFET is still turned on, the conventional drive unit is working, the status monitoring unit still has no output, and the IGBT gate driver outputs a low voltage -Vm to turn off the multi-chip IGBT module. At this time, the gate voltage Vge of the multi-chip IGBT module is equal to the low voltage -Vm output by the IGBT gate driver, and IL flows in a solid line path. At this time, since the gate voltage Vge is less than the reference preset value Vsth of the signal comparison unit, the output signal cp of the signal comparison unit is high, and the latch SR output s1 is high.

[0060] The stage t2--t3 is the state monitoring stage. Svi is low level, Sci is high level, and N-channel enhancement type MOSFET1 is turned off. Since the gate voltage Vge is still less than the reference preset value Vsth of the signal comparison unit at this time, the output signal cp of the signal comparison unit is still high level, and the output s1 of the latch SR is still high level. The output of the AND gate And1 is low level, and the output signal Sc of the AND gate And2 becomes high level, the N-channel enhancement type MOSFET2 is turned on, and the output current i of the constant current drive module in the state monitoring unit is high. gsc With the preset size I setInjected into the gate of the multi-chip IGBT module, the gate voltage Vge begins to increase; when the gate voltage Vge reaches the reference preset value Vsth, the output signal cp of the signal comparison unit becomes low, the output s1 of the latch SR becomes low, the output of the AND gate And1 is low, the output control signal Sc of the AND gate And2 becomes low, the constant current drive unit automatically shuts down and stops injecting gate current into the multi-chip IGBT module, and the output signal Sc of the AND gate And2 is also fed back to the microprocessor. When the microprocessor detects that the output control signal Sc jumps from a high level to a low level, the microprocessor sets the input control signal Sci to a low level, and the input signal Sc set to a low level turns off the N-channel enhancement MOSFET2. , N-channel enhancement MOSFETMOSFET1 is turned on, and the gate voltage Vge decreases rapidly. When the gate voltage Vge is less than the reference preset value Vsth again, the output signal cp of the signal comparison unit becomes high level, and the latch SR output s1 also becomes high level again; in the parallel multi-chip IGBT module, when some chips fail due to the breakage of all bonding wires, the gate input capacitance of the multi-chip IGBT module decreases, which will increase the gate voltage change rate of the multi-chip IGBT module and reduce the gate capacitance value C of the multi-chip IGBT module under the constant output current of the status monitoring unit during the status monitoring stage, that is, the gate capacitance value C of the multi-chip IGBT module can be used to characterize the defect state of the monitoring branch.

[0061] In the t3--t4 stage, Sv and Sc are both low level, the driver and module status are the same as in the t1--t2 stage, and the DUT waits for the next switching cycle.

[0062] Figure 8 This is a simulation waveform diagram of a monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation under constant current drive of the present invention. Figure 8 In the figure, i represents the number of failed chip branches in the multi-chip IGBT module. As can be seen from the figure, as the number of failed chip branches increases, the voltage change rate value Vk output by the circuit also increases, indicating that this method can monitor chip branch failures caused by bonding wire defects inside the multi-chip IGBT module.

Claims

1. A monitoring circuit for branch defects of multi-chip IGBT modules based on gate voltage differentiation, characterized in that include: Isolation power module, signal comparison module, signal operation module, conventional drive module, status monitoring module; The isolated power supply module is respectively connected to the signal comparison module, the signal operation module, the conventional drive module, and the status monitoring module to supply power to these modules; The signal comparison module is connected to the multi-chip IGBT module and the signal operation module respectively, and the signal comparison module is used to compare the gate voltage Vge of the multi-chip IGBT module with the reference preset value Vsth, and output the comparison result to the signal operation module; The signal operation module is connected to the conventional drive module and the state monitoring module respectively. The signal operation module outputs different control signals to the conventional drive module and the state monitoring module according to the comparison result of the received signal comparison module. The conventional driving module is connected to the multi-chip IGBT module, and the conventional driving module controls the opening and closing of the multi-chip IGBT module according to the control signal received from the signal operation module; The state monitoring module is connected to the multi-chip IGBT module. The state monitoring module controls whether to inject a constant gate current into the multi-chip IGBT module and whether to start differential operation according to the control signal received from the signal operation module.

2. The monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation according to claim 1, characterized in that: The monitoring circuit also includes a microprocessor, which sends a control signal Svi of a conventional driving module and a control signal Sci of a state monitoring module to a signal operation module. The signal operation module performs operation processing on the received input control signals Svi and Sci and the result output by the signal comparison module to obtain output signals Sv and Sc, and outputs the output signal Sv to the conventional driving module. The signal operation module outputs the output signal Sc to the state monitoring module and the microprocessor. When the state monitoring process ends, the output signal Sc notifies the microprocessor that the state monitoring process ends, and the microprocessor jumps the input control signal Sci to a low level. The microprocessor receives the result of the differential operation module in the state monitoring module, and calculates the size of the gate input capacitance of the IGBT in combination with the current value of the constant current source.

3. The monitoring circuit for branch defects of a multi-chip IGBT module based on gate voltage differentiation according to claim 1, characterized in that: The isolated power supply module has an input interface connected to an external power supply, and an output interface is a plurality of interfaces, wherein the output interfaces are respectively connected to a signal comparison module, a signal operation module, a conventional drive module and a status monitoring module; the voltages output by the isolated power supply module to the conventional drive module are -Vm and +Vs, and the voltages output to the status monitoring module are -Vm and +Vc.

4. The monitoring circuit for branch defects of multi-chip IGBT modules based on gate voltage differentiation according to claim 1, characterized in that: The conventional driving module includes an IGBT gate driver Opt1, resistors R1, R10, a bidirectional voltage regulator TVS and an N-channel enhancement type MOSFET1 with a parallel body diode; The input end of the IGBT gate driver Opt1 is connected to the output signal Sv of the signal operation module, the two power supply ends of the IGBT gate driver Opt1 are respectively connected to the -Vm voltage value output interface and the +Vs voltage value output interface of the isolation power supply module, the output end of the IGBT gate driver Opt1 is connected to the drain of the N-channel enhancement type MOSFET1, the gate of the N-channel enhancement type MOSFET1 is connected to the inverter, and the inverter is connected to the input signal Sc; the source of the N-channel enhancement type MOSFET1 is connected to one end of the resistor R1, and the other end of the resistor R1 is respectively connected to one end of the resistor R10, one end of the bidirectional voltage regulator TVS, the output end of the constant current drive unit in the state monitoring module, the input end of the state monitoring unit in the state monitoring module, the input end of the signal comparison module, and the gate of the multi-chip IGBT module, one end of the bidirectional voltage regulator TVS is connected to the gate of the IGBT, and the other end of the bidirectional voltage regulator TVS is respectively connected to the emitter and the ground end of the IGBT, and the resistor R10 is connected in parallel with the bidirectional voltage regulator TVS.

5. The monitoring circuit for branch defects of multi-chip IGBT modules based on gate voltage differentiation according to claim 1, characterized in that: The state monitoring module includes a constant current drive unit and a differential operation unit; The constant current driving unit includes: IGBT gate driver Opt2, resistors R2, R3, R4, diodes D1, D2, unidirectional voltage regulator ZD, NPN transistor Q1, PNP transistor Q2; The input end of the IGBT gate driver Opt2 is connected to the output control signal Sc, the two power supply ends of the IGBT gate driver Opt2 are respectively connected to the +Vc voltage value output interface and the -Vm voltage value output interface of the isolation power module, the output end of the IGBT gate driver Opt2 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the base of the NPN transistor Q1, the collector of the NPN transistor Q1 is connected to the power supply end of the IGBT gate driver Opt2 for connecting the +Vc voltage value, and the emitter of the NPN transistor Q1 is respectively connected to one end of the resistor R3 and the unidirectional voltage regulator The cathode of ZD, the other end of the resistor R3 is connected to the emitter of the PNP transistor Q2, the anode of the unidirectional voltage regulator ZD is respectively connected to the base of the PNP transistor Q2 and one end of the resistor R4, the other end of the resistor R4 is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the power supply end of the IGBT gate driver Opt2 for connecting the -Vm voltage value, the collector of the PNP transistor Q2 is connected to the anode of the diode D2, and the cathode of the diode D2 is simultaneously connected to the gate of the multi-chip IGBT module, the input end of the signal comparison module and the input end of the differential operation unit in the state monitoring module; The differential operation unit includes operational amplifiers Amp2, Amp3, Amp4, capacitor C2, diode D3, N-channel enhancement type MOSFET2, resistors R7, R8, R9, R10, R11; The non-inverting input terminal of the operational amplifier Amp2 is connected to the gate of the multi-chip IGBT module, the output terminal of the operational amplifier Amp2 is respectively connected to the inverting input terminal of the operational amplifier Amp2 and one end of the capacitor C2, the other end of the capacitor C2 is respectively connected to the cathode of the diode D3 and the drain of the N-channel enhancement type MOSFET2, the gate of the N-channel enhancement type MOSFET2 is connected to the input signal Sc, the source of the N-channel enhancement type MOSFET2 is respectively connected to one end of the resistor R8 and the inverting input terminal of the operational amplifier Amp3, the non-inverting input terminal of the operational amplifier Amp3 is connected to one end of the resistor R7, the other end of the resistor R7 is grounded, the other end of the resistor R8 is respectively connected to the output terminal of the operational amplifier Amp3 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to one end of the resistor R11 and the inverting input terminal of the operational amplifier Amp4, the non-inverting input terminal of the operational amplifier Amp4 is connected to one end of the resistor R10, the other end of the resistor R10 is grounded, and the resistor R11 is connected to the output terminal of the operational amplifier Amp4.

6. The monitoring circuit for branch defects of multi-chip IGBT modules based on gate voltage differentiation according to claim 1, characterized in that: The signal comparison module includes resistors R5, R6, a comparator Comp, a digital isolator Diso, and an operational amplifier Amp1; The non-inverting input terminal of the operational amplifier Amp1 is connected to the gate of the multi-chip IGBT module, the inverting input terminal of the operational amplifier Amp1 is respectively connected to the output terminal of the operational amplifier Amp1 and the inverting input terminal of the comparator Comp, one end of the resistor R5 is connected to the output interface of the power isolation module that can output the +VCC voltage value, the other end of the resistor R5 is respectively connected to one end of the resistor R6 and the non-inverting input terminal of the comparator Comp, the other end of the resistor R6 is grounded, and the output terminal of the comparator Comp is connected to the input terminal of the digital isolator Diso.

7. The monitoring circuit for branch defects of multi-chip IGBT modules based on gate voltage differentiation according to claim 1, characterized in that: The signal operation module includes a NAND gate NaS, a NAND gate NaR, an AND gate And1, an AND gate And2, and a resistor R9; NAND gate NaS and NAND gate NaR constitute an SR latch, one input end of NAND gate NaS is connected to input signal Sci, the other input end of NAND gate NaS is respectively connected to the output end of NAND gate NaR and one input end of AND gate, one input end of NAND gate NaR is connected to output end cp of digital isolator Diso, the other input end of NAND gate NaR is respectively connected to the output end of NAND gate NaS and one input end of AND gate And1, the other input end of AND gate And1 is connected to input signal Sci, the output end of AND gate And1 is connected to one input end of AND gate And2, the other input end of AND gate And2 is connected to inverter, the inverter is connected to input signal Svi, the output end of AND gate And2 generates output control signal Sc, and is grounded through pull-down resistor R9.

8. A method for monitoring branch defects of a multi-chip IGBT module using a monitoring circuit as claimed in any one of claims 1 to 7, characterized in that: In the t0--t1 stage, when Svi is high and Sci is low, the N-channel enhancement MOSFET is turned on, the conventional drive unit works, the status monitoring unit does not output, and the IGBT gate driver outputs a high voltage of +15V to turn on the multi-chip IGBT module. At this time, the gate voltage Vge of the multi-chip IGBT module is equal to the high voltage +15V output by the IGBT gate driver. L Circulate along the dotted path; In the stage t1--t2, Svi and Sci are both low, the N-channel enhancement MOSFET is still turned on, the conventional drive unit is working, the state monitoring unit still has no output, and the IGBT gate driver outputs a low voltage -Vm to turn off the multi-chip IGBT module. At this time, the gate voltage Vge of the multi-chip IGBT module is equal to the low voltage -Vm output by the IGBT gate driver, and IL flows in a solid line path. At this time, since the gate voltage Vge is less than the reference preset value Vsth of the signal comparison unit, the output signal cp of the signal comparison unit is high, and the latch SR output s1 is high. The stage t2--t3 is the state monitoring stage; Svi is low level, Sci is high level, and N-channel enhancement type MOSFET1 is turned off; since the gate voltage Vge is still less than the reference preset value Vsth of the signal comparison unit at this time, the output signal cp of the signal comparison unit is still high level, and the output s1 of the latch SR is still high level, the output of the AND gate And1 is low level, and the output signal Sc of the AND gate And2 becomes high level, the N-channel enhancement type MOSFET2 is turned on, and the output current i of the constant current drive module in the state monitoring unit is gsc With the preset size I set Injected into the gate of the multi-chip IGBT module, the gate voltage Vge begins to increase; when the gate voltage Vge reaches the reference preset value Vsth, the output signal cp of the signal comparison unit becomes low, the output s1 of the latch SR becomes low, the output of the AND gate And1 is low, the output control signal Sc of the AND gate And2 becomes low, the constant current drive unit automatically shuts down and stops injecting gate current into the multi-chip IGBT module, and the output signal Sc of the AND gate And2 is also fed back to the microprocessor. When the microprocessor detects that the output control signal Sc jumps from a high level to a low level, the microprocessor sets the input control signal Sci to a low level. At the same time, the input signal Sc set to a low level turns off the N-channel enhancement MOSFET2 and turns on the N-channel enhancement MOSFETMOSFET1, and the gate voltage Vge decreases rapidly. When the gate voltage Vge is less than the reference preset value Vsth again, the output signal cp of the signal comparison unit becomes high, and the output s1 of the latch SR also becomes high again. In the t3--t4 stage, Sv and Sc are both low level, the driver and module status are the same as in the t1--t2 stage, and the DUT waits for the next switching cycle.

9. The method for monitoring branch defects of a multi-chip IGBT module according to claim 8, characterized in that: In a parallel multi-chip IGBT module, when some chips fail due to the breakage of all bonding wires, the gate input capacitance of the multi-chip IGBT module decreases. This will increase the gate voltage change rate of the multi-chip IGBT module and reduce the gate capacitance value C of the multi-chip IGBT module under the constant output current of the status monitoring unit during the status monitoring stage. That is, the gate capacitance value C of the multi-chip IGBT module can be used to characterize the defect status of the monitoring branch.

Images