Circuit architecture of MCU debugging port protection mechanism and implementation method thereof

Abstract

The invention discloses a circuit architecture of an MCU debugging port protection mechanism and an implementation method of the circuit architecture. The circuit architecture comprises a debugging access port and a debugging authentication module, the debugging access port comprises a register access path, a plurality of AP paths with independent locking / unlocking control and a lock control unit, and the lock control unit is used for being respectively connected with the plurality of AP paths with independent locking / unlocking control; the debugging authentication module comprises a register interface and is used for performing read-write access on a register access path; the main state machine is used for managing the unlocking process of each AP path according to the register configuration information; the mailbox information generation unit is used for generating a challenge request command and a response verification command according to a preset format and register configuration information under the management of the main state machine, and sending the challenge request command and the response verification command to the password service engine; and the AP lock control state unit is connected with the lock control unit for debugging the access port and is used for controlling the unlocking state of each AP channel under the management of the main state machine.

Description

Technical Field

[0001] The present invention belongs to the field of chip design, and particularly relates to debug interface access protection and authority management in an MCU chip, and proposes a hardware circuit architecture and a solution implementation process, specifically a circuit architecture of an MCU debug port protection mechanism and an implementation method thereof. Background Art

[0002] MCU (microcontroller), also known as a single-chip microcomputer, is a system-on-chip that includes a CPU (central processing unit), communication peripherals, memory, I\O, ADC, sensors and other circuits. It can realize relatively complex human-computer interaction, motor control, sensor monitoring and other functions; and with the continuous development of microelectronics technology and computer technology, the functions and performance of MCU are constantly improving, with higher and higher operating frequencies, more and more cores and pins, and richer functions. This has also made MCU more and more widely used in consumer electronics, industrial electronics, and automotive electronics.

[0003] As MCUs are increasingly used in important and critical fields, higher security requirements are placed on MCUs. Developers and users of MCU products hope to protect MCU hardware from being illegally stolen and software data from being illegally accessed. Standards and regulations for information security of electrical and electronic architectures have also begun to be continuously improved, such as the industrial network security standard IEC62443-4-1 and the automotive network security standard ISO21434.

[0004] In order to achieve information security protection of MCU, the HSM (Hardware Security Module) solution is adopted. HSM builds a security subsystem to provide secure boot, secure storage, secure services, secure access and other functions for the entire MCU. HSM strictly manages the permissions of the MCU interface to protect the MCU from illegal access. One of the very important interfaces is the JTAG debugging interface.

[0005] The debugging interface plays an important role in the development and debugging of MCU-based products. The debugging interfaces here include JTAG, SWD, UART and other methods. Considering that the JTAG protocol is widely used, JTAG is mainly described below.

[0006] Through the JTAG interface, it is very convenient to obtain key information inside the MCU and monitor the operation status of the MCU. In particular, the modern and perfect debug mechanism provides high visibility of the kernel, thereby accelerating product development and quickly locating problems. While providing convenience, the JTAG interface also exposes security risks and provides convenience for malicious attackers. Attackers can use the JTAG interface to obtain intellectual property information such as internal code and data of the MCU, and can even tamper with the internal firmware of the MCU through the JTAG interface and run illegal programs, all of which will cause serious consequences.

[0007] In order to prevent the illegal abuse of the JTAG interface, which may bring security vulnerabilities and intellectual property leakage to products, many manufacturers will add restrictions to JTAG permissions. Currently, there are three main approaches: 1. Based on OTP programming mechanism OTP is a non-volatile memory with one-time programming properties inside the MCU. After programming, it cannot be reprogrammed. Using this feature, the OTP content that controls JTAG enable can be modified in the final stage of MCU product production to permanently disable the debug port. 2. Based on fixed key mechanism Fixed password lock is a mechanism that uses the internal circuit of MCU and non-volatile storage area to realize key programming, locking, key comparison and unlocking. In the final stage of MCU product production, a fixed key value is programmed to lock, and the user unlocks by entering the corresponding key. 3. Cryptography-based authentication mechanism The authentication mechanism is implemented through a Challenge-Response handshake. Before locking the JTAG, the user needs to store the key for unlocking in the MCU. When unlocking, the user usually requests random number related information from the MCU through the communication interface, which is the Challenge. The user then uses the unlock key to sign and encrypt the Challenge, and inputs the encrypted value into the MCU, which is the Response. The application in the MCU uses the stored key to verify the encrypted value using the same protocol. If the verification passes, JTAG is enabled.

[0008] The disadvantages of Solution 1 and Solution 2 are poor flexibility, easy leakage, and easy cracking. They are no longer applicable to MCU products that implement important functions and have high security requirements. Solution 3 is increasingly being used due to its cryptographic confidentiality mechanism. For example, the ARM architecture provides a set of Authentication signals to limit the Debug function, and allows users to drive the signal through their own "Authentication Module". It is also recommended to use a cryptographic-based Challenge-Response mechanism for management. The ARM kernel technical document describes: "ARM recommends using a Challenge-Response mechanism based on a random number generator in the chip or a unique hardware key of the device." A typical MCU product that adopts Solution 3 usually has an encryption and decryption module (such as AES, Hash) and a random number generator (TRNG) inside. Some MCU products will adopt the HSM module (Hardware Security Module) solution. HSM combines the above encryption module, TRNG and security core to form a "safe island" that is securely isolated from the application core, and provides functions including key management, random number generation, encryption and decryption services. The application core uses the inter-core communication module (Mail Box) to transmit information with the HSM, thereby realizing various cryptographic service applications.

[0009] The HSM solution and the combination of an independent encryption and decryption module and a TRNG module can also implement the method described in this patent. For the sake of simplicity and unified description, the cryptographic service engine is used to represent the above two solutions.

[0010] The main implementation process of the current solution 3 is: 1. The initiator transmits the debug unlock request information to the MCU application core through the peripheral communication module, and the application core application initiates a challenge generation request to the cryptographic service engine; 2. The cryptographic service engine receives the Challenge generation request, runs the random number generation, and assembles the random number and other information into Challenge information and returns it to the application core; 3. The application returns the Challenge information to the initiator through the communication peripheral. The initiator needs to encrypt the received Challenge information with the key according to the agreed protocol and generate a message digest; 4. The initiator transmits the Response unlocking verification information to the MCU application core through the peripheral communication module, and the application core application initiates a Response verification request to the cryptographic service engine; 5. The cryptographic service engine receives the Response verification request. The cryptographic service engine runs the same protocol, uses the corresponding key to encrypt the Challenge information, and compares the generated information digest with the received Response information. If they are consistent, the MCU JTAG is unlocked, otherwise it remains locked and optionally feedbacks status information.

[0011] Based on the above analysis, the cryptographic authentication mechanism in Solution 3 is more suitable for high-value, high-security MCU application scenarios than Solution 1 and Solution 2. Correspondingly, it requires the use of certain additional software and hardware resources.

[0012] The existing implementation solutions still have the following defects and deficiencies: 1. It needs to occupy the MCU communication interface and the corresponding application space According to the description of the implementation process of the aforementioned solution 3, in the JTAG unlocking process, the initiator communicates with the MCU through communication peripheral modules, such as CAN, UART, etc. The MCU needs to add an application based on the peripheral for the authentication process, which is specifically used for the JTAG unlocking application; therefore, it will occupy the MCU's precious peripherals, pin resources and program storage space, which is not cost-effective or even unacceptable for resource-sensitive MCU products.

[0013] 2. Depends on the operation of the MCU application core According to the description of the implementation process of Solution 3 above, the MCU application core needs to be in a running state to run the application of the authentication process. However, in reality, the application core may not be able to run due to various complex reasons. For example, the application firmware error cannot be started, the application is stuck in an infinite loop, the hardware circuit fails, etc. In this scenario, JTAG cannot be unlocked, which will limit or even block the analysis of the problem.

[0014] 3. Lack of multi-core management function with different permission levels The current implementation scheme does not consider the scenario where different cores of a multi-core MCU have separate JTAG access rights management. Usually, the unlocking / locking of JTAG is achieved by directly controlling the enabling / disabling of the port or pin where JTAG is located. In this scheme, after JTAG is locked, all cores cannot be accessed through JTAG. After JTAG is unlocked, JTAG can access all core information. This is not friendly to the development of large MCU products. For example, some products will run different types of applications on different cores of the MCU, such as application core 0 running security functions and application core 1 running non-security functions. The developers and debuggers of application core 1 do not want other developers to be able to access the internal information of application core 0. Summary of the invention

[0015] The purpose of the present invention is to address the problems existing in the prior art and provide a circuit architecture of an MCU debug port protection mechanism and an implementation method thereof, which realizes a cryptographic authentication mechanism for high-value, high-security-requirement MCU application scenarios without occupying additional MCU communication interfaces, without relying on the operation of MCU application cores, and satisfying the management of multi-cores with different permission levels.

[0016] According to one aspect of the present specification, there is provided a circuit architecture of an MCU debug port protection mechanism, comprising: a debug access port and a debug authentication module; The debug access port includes a register access path, a plurality of AP paths with independent lock / unlock control, and a lock control unit, wherein the lock control unit is used to be connected to the plurality of AP paths with independent lock / unlock control respectively; The debugging authentication module includes a register interface for reading and writing access to the register access path; a main state machine for managing the unlocking process of each AP path according to the register configuration information; a mailbox information generation unit for generating a challenge request command and a response verification command in a predetermined format according to the register configuration information under the management of the main state machine and sending them to the password service engine; an AP lock control state unit connected to the lock control unit of the debugging access port and used to control the unlocking state of each AP path under the management of the main state machine.

[0017] As a further technical solution, the memory space includes: AP channel selection configuration register, used to select which AP channel to unlock; Challenge-response protocol related configuration registers, used to select the algorithm to be used; Challenge-response protocol related data register, used to store the challenge information to be read and the response information to be written; Command initiation control register, used to initiate challenge request command and response verification command; Command completion status register, used for command completion status.

[0018] As a further technical solution, the debugging authentication module communicates with the cryptographic service engine through hardware.

[0019] As a further technical solution, the debugging authentication module is connected to a hardware communication interface, and the hardware communication interface is connected to the cryptographic service engine via a bus.

[0020] According to one aspect of the present invention, a method for implementing an MCU debug port protection mechanism is provided, which is implemented using the circuit architecture, and the method includes: Receive an enabled challenge request command, wherein configuration information of the challenge request command includes an AP channel to be unlocked and an algorithm type used by a challenge-response protocol; In response to the challenge request command, generating and initiating a challenge request Mailbox command according to the configuration information; When the challenge request Mailbox command is completed and successful, the challenge information generated by the cryptographic service engine is obtained and stored in the register interface; Receiving an enabled response verification command, wherein the response verification command is generated after being encrypted using an agreed algorithm and key according to the generated challenge information; In response to the response verification command, generating and initiating a response verification Mailbox command according to the configuration information; When the response verification Mailbox command is completed and successful, the lock state of the corresponding AP is updated to unlock the corresponding AP path.

[0021] As a further technical solution, the method further includes: when the challenge request Mailbox command is completed but fails, automatically updating a command completion status register and outputting a challenge request command failure.

[0022] As a further technical solution, the method further includes: when the response verification Mailbox command is completed but fails, automatically updating a command completion status register and outputting a response verification command failure.

[0023] Compared with the prior art, the present invention has the following beneficial effects: 1. The present invention utilizes the circuit characteristics of the debug access port DAP and reuses the JTAG interface for the communication interface based on the cryptographic authentication mechanism scheme, without occupying additional peripherals and pin resources of the MCU.

[0024] 2. The present invention implements the Challenge-Response protocol by the debug authentication module ADM module hardware, does not require the participation of the MCU application core, saves application space, and reduces unlocking condition requirements.

[0025] 3. The present invention implements independent authority management of different AP paths through the debugging authentication module ADM module, thus meeting the flexible debugging authority management requirements of the MCU product level. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic diagram of an application of a circuit architecture of an MCU debug port protection mechanism provided by an embodiment of the present invention.

[0027] Figure 2 ADM module architecture schematic diagram provided in an embodiment of the present invention.

[0028] Figure 3 A schematic diagram of an authentication and unlocking process based on an ADM module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0029] It should be noted that: The debug access port (DAP) in the present invention refers to a port used for debugging and accessing internal resources of the system.

[0030] The Authentication Debug Module (ADM) in the present invention refers to a circuit unit that implements the authority control of other AP paths in the DAP, and the generation and communication of Challenge-Response protocol Mailbox commands.

[0031] The Challenge-Response mechanism can be regarded as an authentication mechanism based on cryptography in the present invention.

[0032] The Mailbox module (mailbox information interaction unit) can be regarded as a hardware interface connecting the ADM module and the cryptographic service engine in the present invention. The Mailbox command can be regarded as an agreed communication protocol, which is essentially a set of bus signals. The purpose is to transmit information to the cryptographic service engine, including the service request command type, the key ID used, the algorithm type used, the unlocked AP channel information, etc. This information will be used as parameters in the challenge-response mechanism. For example, the algorithm type determines whether the calculation of the random number verification value in the response stage is based on AES CMAC or HMAC based on a hash function.

[0033] The technical solution of the present invention will be described clearly and completely below in conjunction with the accompanying drawings of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0034] The embodiment of the present invention provides a circuit architecture of an MCU debug port protection mechanism, including: a debug access port (hereinafter referred to as a DAP module) and a debug authentication module (hereinafter referred to as an ADM module).

[0035] As a preferred embodiment, Figure 1 As shown, in the circuit architecture of the MCU debug port protection mechanism provided by the embodiment of the present invention, the DAP module is connected to the host computer, the ADM module and the MCU to be debugged, and the ADM module is also connected to the cryptographic service engine through the Mailbox and the system bus.

[0036] The DAP module is used to debug and access the internal resources of the system. It consists of two parts: DP and AP. DP is physically connected to the outside world through the JTAG Port, and then converts the data received from the JTAG port into internal AP access, which is then converted into bus access in address mapping mode.

[0037] In the embodiment of the present invention, for the DAP module, an ADM_AP path is added, and the ADM_AP path is specifically used for JTAG access to the ADM module register, that is, the ADM_AP path can and can only be used to access the ADM module register. Except for the ADM_AP path without permission control, other AP paths have independent lock / unlock control, control enable and disable, and the control signal is managed by the ADM module.

[0038] In the embodiment of the present invention, the ADM module mainly implements the above-mentioned authority control on other AP paths, and the generation and communication of Challenge-Response protocol Mailbox commands.

[0039] like Figure 2 As shown, the ADM module includes a register interface (ADM_AP Reg Interface), a main state machine (FSM), a mailbox information generation unit (Mailbox CMD Generate), and an AP lock control status unit (AP Lock ControlStatus).

[0040] The register interface (ADM_AP Reg Interface) is a register space that can only be read and written by ADM_AP. Specifically, it includes: AP channel selection configuration register: select which AP channel to unlock; Challenge-Response protocol related configuration registers: select which algorithm to use, such as AES-128 CMAC, ECDSA, etc.; Challenge-Response protocol related data register: used to store the Challenge information to be read and the Response information to be written; Command initiation control register: initiate Challenge request command, initiate Response verification command; Command completion status register: command completion status, such as whether the command is completed, command success or failure flag.

[0041] The function of the Mailbox CMD Generate unit is to generate the corresponding Challenge request command and Response verification command according to the register configuration information and the Mailbox command format requirements under the management of the FSM. This circuit unit communicates directly with the cryptographic service engine Mailbox.

[0042] The AP Lock Control Status unit is mainly used for the control logic of each AP channel unlocking status. Under the management of FSM, if the authentication process is completed and successful, the corresponding AP channel unlocking is enabled. This circuit unit is directly connected to the Lock Control unit in the DAP module.

[0043] FSM is the main state machine of the ADM module, responsible for managing the implementation of the entire unlocking process according to the above register configuration information.

[0044] When the aforementioned ADM module executes the Challenge-Response protocol to implement the unlocking workflow, the user can use the PC-side host software to access the ADM module registers through the JTAG interface, configure the corresponding command registers to initiate the Challenge request service; the ADM module generates the Mailbox command based on the configuration information hardware, configures the corresponding Mailbox registers by the hardware, and passes the request information to the HSM; the ADM module monitors the Mailbox cryptographic service engine side registers, and maps the Challenge request output results and status information to the ADM module register area for the host computer to read; the host computer reads the ADM module Challenge information and calculates the Response information, writes the Response information into the ADM module register area, and then configures the corresponding command registers to initiate the Response verification request; the ADM module generates the Mailbox command based on the configuration information, configures the corresponding Mailbox registers by the hardware, passes the request information to the cryptographic service engine, and waits for and receives the running results of the cryptographic service engine, and the ADM module unlocks the control lock of the corresponding AP channel according to the running results.

[0045] In the embodiment of the present invention, the application core of the MCU does not need to participate in the authentication and unlocking process. The application core here refers to the main CPU of the MCU that runs the user application program.

[0046] In the embodiment of the present invention, the cryptographic service engine is a security subsystem and a main module for implementing security services, and the cryptographic service engine Mailbox module is a main communication interface for implementing security services. In the embodiment of the present invention, the ADM module and the cryptographic service engine Mailbox communicate with each other by hardware.

[0047] In the embodiment of the present invention, the JTAG unlock requester can use a software host computer to implement the authentication unlocking process. Compared with the existing implementation scheme that requires special hardware devices to communicate through peripheral modules, the embodiment of the present invention only needs to use JTAG-based host computer software, which reduces the complexity of the device.

[0048] Based on the circuit architecture of the aforementioned MCU debug port protection mechanism, the present invention also provides a method for implementing the MCU debug port protection mechanism, which mainly includes the operation process of the entire process initiator host computer and the execution process of the ADM state machine, wherein the execution process inside the hardware security module HSM is not the focus of the present invention and will not be elaborated here.

[0049] like Figure 3 As shown, the implementation method of the MCU debug port protection mechanism specifically includes: Step 1: The host computer initiates a Challenge request.

[0050] The host computer first configures the AP channel to be unlocked and the algorithm type used by the Challenge-Response protocol through ADM_AP, and then configures the ADM command initiation control register to enable the Challenge request command.

[0051] Step 2: ADM generates a Challenge request Mailbox command.

[0052] The ADM module automatically generates and initiates the Mailbox command based on the configuration information. The internal state machine waits and checks the execution status of the Mailbox command. If the command is completed but fails, the ADM automatically updates the command completion status register, indicating that the Challenge command failed for query by the host computer. The host computer can check whether the configuration is wrong based on this information and re-initiate the Challenge request. If the command is completed and successful, the ADM automatically stores the Challenge information generated by the cryptographic service engine in the register space for the host computer to read.

[0053] Step 3: The host computer calculates the Response information.

[0054] After the host computer software reads the Challenge information from the ADM module, it uses the agreed algorithm and the corresponding key to perform encryption operations and generate the Response information.

[0055] Step 4: The host computer initiates Response verification.

[0056] The host computer writes the calculated Response information into the ADM register, and then configures the ADM command initiation control register to enable the Response verification command.

[0057] Step 5: ADM generates a Response to verify the Mailbox command.

[0058] The ADM module automatically generates and initiates the Mailbox command based on the configuration information. The internal state machine waits and checks the execution status of the Mailbox command. If the command is completed but fails, the ADM automatically updates the command completion status register, indicating that the Response command failed for query by the host computer. The host computer can use this information to analyze the cause of the failure, such as lack of correct permissions or Response comparison errors. If the command is completed and successful, the ADM will update the lock status of the corresponding AP to unlock the corresponding AP channel; after unlocking, the user can access the system resources of the AP channel through JTAG.

[0059] In summary, in view of the defects and deficiencies of the existing implementation schemes, namely, the need to additionally occupy the MCU communication interface and the corresponding application space, rely on the operation of the MCU application core, and lack the management function of multi-cores with different permission levels, the present invention proposes a hardware circuit structure dedicated to the JTAG unlocking function and a corresponding workflow scheme, which utilizes the JTAG interface to achieve direct communication with the HSM without occupying additional MCU pins, and completes the complete Challenge-Response authentication process with the HSM by hardware, without the operation and participation of the application core, and further increases the independent access control of each AP on the DAP side by hardware to achieve fine control of different permission levels of different cores.

[0060] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A circuit architecture of an MCU debug port protection mechanism, characterized in that: include: Debug access port and debug authentication module; The debug access port includes a register access path, a plurality of AP paths with independent lock / unlock control, and a lock control unit, wherein the lock control unit is used to be connected to the plurality of AP paths with independent lock / unlock control respectively; The debugging authentication module includes a register interface for register access path for read and write access; a main state machine for managing the unlocking process of each AP path according to the register configuration information; The mailbox information generation unit is used to generate a challenge request command and a response verification command in a predetermined format according to the register configuration information under the management of the main state machine and send them to the password service engine; the AP lock control state unit is connected to the lock control unit of the debug access port and is used to control the unlocking state of each AP channel under the management of the main state machine.

2. According to the circuit architecture of the MCU debug port protection mechanism described in claim 1, it is characterized in that: The memory space includes: AP channel selection configuration register, used to select which AP channel to unlock; Challenge-response protocol related configuration registers, used to select the algorithm to be used; Challenge-response protocol related data register, used to store the challenge information to be read and the response information to be written; Command initiation control register, used to initiate challenge request command and response verification command; Command completion status register, used for command completion status.

3. According to the circuit architecture of the MCU debug port protection mechanism described in claim 1, it is characterized in that: The debugging authentication module communicates with the cryptographic service engine through hardware.

4. The circuit architecture of the MCU debug port protection mechanism according to claim 3, characterized in that: The debugging authentication module is connected to a hardware communication interface, and the hardware communication interface is connected to the cryptographic service engine via a bus.

5. A method for implementing an MCU debug port protection mechanism, implemented by using the circuit architecture described in any one of claims 1 to 4, characterized in that: The method comprises: Receive an enabled challenge request command, wherein configuration information of the challenge request command includes an AP channel to be unlocked and an algorithm type used by a challenge-response protocol; In response to the challenge request command, generating and initiating a challenge request Mailbox command according to the configuration information; When the challenge request Mailbox command is completed and successful, the challenge information generated by the cryptographic service engine is obtained and stored in the register interface; Receiving an enabled response verification command, wherein the response verification command is generated after being encrypted using an agreed algorithm and key according to the generated challenge information; In response to the response verification command, generating and initiating a response verification Mailbox command according to the configuration information; When the response verification Mailbox command is completed and successful, the lock state of the corresponding AP is updated to unlock the corresponding AP path.

6. A method for implementing an MCU debug port protection mechanism according to claim 5, characterized in that: The method further includes: when the challenge request Mailbox command is completed but fails, automatically updating a command completion status register and outputting a challenge request command failure.

7. The method for implementing the MCU debug port protection mechanism according to claim 5, characterized in that: The method further comprises: when the response verification Mailbox command is completed but fails, automatically updating a command completion status register and outputting a response verification command failure.

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