Solar cell, preparation method thereof and photovoltaic module
By setting a first conductive structure with high density in the solar cell, the problem of large carrier transmission resistance is solved, the carrier mobility and photoelectric conversion efficiency are improved, and the performance of the solar cell is improved.
Patent Information
- Application Number
- CN202411044983.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-31
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2044-07-31
Smart Images

Figure CN119133294A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of solar cells, and in particular to a solar cell and a preparation method thereof, and a photovoltaic module. Background Art
[0002] In solar cells, the ability of carriers to transfer between the semiconductor layer and the electrode has an important impact on the photoelectric conversion efficiency of the solar cell. If the resistance encountered by carriers in their transfer to the electrode is large, the probability of carriers contacting defects and impurities in the semiconductor layer will increase, which will increase the probability of carrier scattering and lead to more carrier recombination, thus limiting the further improvement of the photoelectric conversion efficiency of the solar cell. Summary of the invention
[0003] The embodiment of the invention discloses a solar cell and a preparation method thereof, and a photovoltaic module. The solar cell can improve the efficiency of carrier transmission, reduce recombination, and lower scattering, thereby further improving the photoelectric conversion efficiency of the solar cell.
[0004] In a first aspect, an embodiment of the present application discloses a solar cell, the solar cell comprising:
[0005] Silicon substrate;
[0006] A first semiconductor layer and a second semiconductor layer are disposed on the silicon substrate, wherein the first semiconductor layer is doped with an N-type conductive element, and the second semiconductor layer is doped with a P-type conductive element;
[0007] a first electrode, the first electrode being electrically connected to the first semiconductor layer through a plurality of first conductive structures;
[0008] a second electrode, the second electrode being electrically connected to the second semiconductor layer through a plurality of second conductive structures;
[0009] Wherein, the density of the first conductive structure is greater than the density of the second conductive structure.
[0010] Furthermore, in any 1 mm×1 mm area where the first electrode contacts the first semiconductor layer, the number of the first conductive structures is 1×10 5 ~1×10 6 In any 1 mm×1 mm area where the second electrode contacts the second semiconductor layer, the number of the second conductive structures is 5×10 4 ~5×10 5 indivual.
[0011] Furthermore, a projection size of the first conductive structure on the first semiconductor layer is greater than or equal to a projection size of the second conductive structure on the second semiconductor layer, a projection size of any first conductive structure on the first semiconductor layer is 100nm to 2000nm, and a projection size of any second conductive structure on the second semiconductor layer is 100nm to 1000nm.
[0012] Furthermore, any one of the first conductive structures and any one of the second conductive structures are in the shape of leaf veins.
[0013] Further, any of the first conductive structures includes a plurality of strip-shaped first structures diverging toward the direction of the first electrode;
[0014] Any of the second conductive structures includes a plurality of strip-shaped second structures diverging toward the second electrode.
[0015] Further, any one of the first structures includes a first crystalline main chain, and a plurality of first crystalline side chains extending in a growth direction different from that of the first crystalline main chain;
[0016] Any one of the second structures includes a second crystalline main chain and a plurality of second crystalline side chains extending in a growth direction different from that of the second crystalline main chain.
[0017] Furthermore, the first structure and the second structure are both formed by crystallization and polymerization of a plurality of conductive particles.
[0018] Furthermore, the elements in the conductive particles include one or a combination of silver, aluminum, copper, and lead.
[0019] Furthermore, the doping concentration of the N-type conductive element in the first semiconductor layer is 1×10 20 atoms / cm 3 ~1×10 21 atoms / cm 3 ,
[0020] The doping concentration of the P-type conductive element in the second semiconductor layer is 1×10 18 atoms / cm 3 ~1×10 20 atoms / cm 3 .
[0021] Furthermore, the first semiconductor layer and the second semiconductor layer are arranged on the backlight surface of the silicon substrate, the first semiconductor layer and the second semiconductor layer are separated by an isolation region, and the first semiconductor layer and the second semiconductor layer are arranged in an interdigitated manner.
[0022] Furthermore, the solar cell further includes a first dielectric layer disposed between the first semiconductor layer and the silicon substrate, and a second dielectric layer disposed between the second semiconductor layer and the silicon substrate.
[0023] Furthermore, the silicon substrate is N-type, the second semiconductor layer is arranged on the light-receiving surface of the silicon substrate, the first semiconductor layer is arranged on the backlight surface of the silicon substrate, and a first dielectric layer is arranged between the first semiconductor layer and the silicon substrate.
[0024] Further, a plurality of the first semiconductor layers are arranged on the backlight surface, any one of the first semiconductor layers is arranged on a partial area of the backlight surface, and adjacent first semiconductor layers are separated by a first separation area; and / or,
[0025] A plurality of the second semiconductor layers are arranged on the light receiving surface, any one of the second semiconductor layers is arranged on a partial area of the light receiving surface, and two adjacent second semiconductor layers are separated by a second separation area, wherein a velvet structure is arranged on the second separation area.
[0026] In a second aspect, an embodiment of the present application discloses a method for preparing a solar cell as described in the first aspect, the method comprising the following steps:
[0027] Providing the silicon substrate, on which the first semiconductor layer and the second semiconductor layer are disposed;
[0028] Applying a slurry for making the first electrode on the first semiconductor layer, and applying a slurry for making the second electrode on the second semiconductor layer;
[0029] Thermal treatment to form a first conductive precursor at the contact interface between the first electrode and the first semiconductor layer, and to form a second conductive precursor at the contact interface between the second electrode and the second semiconductor layer;
[0030] Light is injected to transform the first conductive precursor into a first conductive structure and the second conductive precursor into a second conductive structure, thereby manufacturing the solar cell.
[0031] Furthermore, the light injection step includes:
[0032] A heating stage, heating the first conductive precursor and the second conductive precursor, wherein the peak temperature of the heating stage is 400° C. to 650° C.;
[0033] When the temperature in the heating stage drops from the peak temperature to the preset temperature, light is applied to the solar cell, the temperature of the light is 50°C to 400°C, and the energy density of the light is 10kW / m 2~100kW / m 2 ;
[0034] Wherein, the preset temperature is 320°C to 360°C.
[0035] Furthermore, the heating stage includes the following processes:
[0036] Heating to the preset temperature;
[0037] After heating from the preset temperature to the peak temperature within a preset time, the temperature is then cooled to the preset temperature, wherein the preset time is 10s to 30s.
[0038] Further, any of the first conductive precursors includes a plurality of first crystalline main chains diverging toward the first electrode;
[0039] Any of the second conductive precursors includes a plurality of second crystalline main chains diverging toward the second electrode.
[0040] Furthermore, in the heat treatment step, the heat treatment temperature is 700°C to 900°C.
[0041] Furthermore, the step of providing a silicon substrate comprises:
[0042] Depositing a second dielectric layer and a second semiconductor layer in sequence on the backlight surface of the silicon substrate;
[0043] Performing patterning on the second dielectric layer and the second semiconductor layer located on the backlight surface to expose a portion of the backlight surface;
[0044] Depositing a first dielectric layer and the first semiconductor layer in sequence on the exposed backlight surface and the second semiconductor layer;
[0045] The first semiconductor layer and the first dielectric layer located on the second semiconductor layer are removed, and an isolation region is formed between the adjacent second semiconductor layer and the first semiconductor layer.
[0046] Furthermore, the step of providing a silicon substrate comprises:
[0047] depositing the second semiconductor layer on the light-receiving surface of the silicon substrate;
[0048] A first dielectric layer and a first semiconductor layer are sequentially deposited on the backlight surface of the silicon substrate.
[0049] In a third aspect, an embodiment of the present application discloses a photovoltaic module, comprising: the solar cell as described in the first aspect, or the solar cell prepared by the preparation method described in the second aspect.
[0050] Compared with the prior art, the beneficial effects of this application are:
[0051] The present application provides a solar cell and a preparation method thereof, and a photovoltaic module. The solar cell can improve the carrier transport capacity, reduce recombination, and reduce scattering, thereby improving the stability and photoelectric conversion efficiency of the solar cell.
[0052] In the above solar cell structure, since the first semiconductor layer is doped with N-type conductive elements and the second semiconductor layer is doped with P-type conductive elements, the diffusion capacity of the carriers in the first semiconductor layer is higher than that in the second semiconductor layer. At this time, if the carriers in the first semiconductor layer are difficult to be effectively transmitted to the first electrode, the probability of the carriers in the first semiconductor layer contacting with impurities and defects will increase, resulting in aggravated scattering and serious recombination of the carriers in the first semiconductor layer. Therefore, in order to improve the effectiveness of the transmission of carriers in the first semiconductor layer, the present application sets the density of the first conductive structure to be higher than the density of the second conductive structure, so that the distribution of the first conductive structure is denser, providing multiple paths for the transmission of carriers, reducing the contact resistance, and helping to reduce the transmission barrier of carriers between the first semiconductor layer and the first electrode, thereby improving the mobility of carriers, reducing the degree of carrier scattering, and also helping to reduce the recombination of carriers and improve the photoelectric conversion efficiency of solar cells.
[0053] That is to say, by designing the density of the first conductive structure and the second conductive structure, the effectiveness of carrier transmission between the first semiconductor layer and the first conductive structure is improved, recombination is reduced, and scattering is reduced, thereby improving the photoelectric conversion efficiency of the solar cell. BRIEF DESCRIPTION OF THE DRAWINGS
[0054] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0055] Figure 1 is a schematic diagram of the structure of the first solar cell provided in the embodiment of the present application;
[0056] Figure 2 The embodiment of this application provides Figure 1 A magnified view of middle;
[0057] Figure 3 The embodiment of this application provides Figure 1 Enlarged view of middle B;
[0058] Figure 4is a schematic structural diagram of a first conductive structure provided in an embodiment of the present application;
[0059] Figure 5 is a structural schematic diagram of a first structure provided in an embodiment of the present application;
[0060] Figure 6 is a schematic diagram of the structure of a second solar cell provided in an embodiment of the present application;
[0061] Figure 7 is a schematic structural diagram of a third solar cell provided in an embodiment of the present application;
[0062] Figure 8 is an electron microscope image of the first conductive precursor provided in an embodiment of the present application;
[0063] Fig. 9 is an electron microscope image of a second conductive structure provided in an embodiment of the present application;
[0064] Fig.10 is an electron microscope image of the second conductive precursor provided in an embodiment of the present application;
[0065] Fig.11 It is an electron microscope image of the second conductive structure provided in the embodiment of the present application.
[0066] Icons: 1. Silicon substrate; 21. First semiconductor layer; 22. Second semiconductor layer; 31. First electrode; 32. Second electrode; 41. First conductive structure; 411. First structure; 4111. First crystalline main chain; 4112. First crystalline side chain; 42. Second conductive structure; 51. First dielectric layer; 52. Second dielectric layer; 61. First functional layer; 62. Second functional layer; 63. Third functional layer; 7. First separation region; 8. Second separation region. DETAILED DESCRIPTION
[0067] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0068] In the present invention, the directions or positional relationships indicated by the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal" and the like are based on the directions or positional relationships shown in the drawings. These terms are mainly used to better describe the present invention and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific direction, or to be constructed and operated in a specific direction.
[0069] In addition, some of the above terms may be used to express other meanings in addition to indicating orientation or positional relationship. For example, the term "on" may also be used to express a certain dependency or connection relationship in some cases. For those skilled in the art, the specific meanings of these terms in the present invention can be understood according to specific circumstances.
[0070] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, "plurality" means two or more.
[0071] The technical solution provided by the present invention will be further described below in conjunction with embodiments and drawings.
[0072] In solar cells, the concentration of carriers and the carrier transport capacity have a very important influence on the performance of solar cells such as the photoelectric conversion efficiency.
[0073] Since the mobility of electrons is higher than that of holes, under the same electric field, the electrons are transmitted faster and can participate in the conduction process more effectively. However, if it is difficult for electrons to be transmitted to the electrode, the probability of contact between the electrons and the impurities or defects in the semiconductor layer will increase, thereby increasing the probability of electron scattering and recombination, making it difficult to effectively improve the conductivity of the solar cell.
[0074] Based on the above problems, the present application discloses a solar cell, which can improve the mobility of carriers and reduce recombination, thereby improving the photoelectric conversion efficiency of the solar cell.
[0075] The first aspect, such as Figures 1 to 3 As shown, the embodiment of the present application discloses a solar cell, the solar cell comprising:
[0076] Silicon substrate 1;
[0077] A first semiconductor layer 21 and a second semiconductor layer 22 are provided on the silicon substrate 1, wherein the first semiconductor layer 21 is doped with an N-type conductive element, and the second semiconductor layer 22 is doped with a P-type conductive element;
[0078] A first electrode 31, wherein the first electrode 31 is electrically connected to the first semiconductor layer 21 through a plurality of first conductive structures 41;
[0079] A second electrode 32 , the second electrode 32 is electrically connected to the second semiconductor layer 22 via a plurality of second conductive structures 42 ;
[0080] The density of the first conductive structure 41 is greater than the density of the second conductive structure 42 .
[0081] The present application increases the distribution density of the first conductive structure 41 by setting the density of the first conductive structure 41 higher than the density of the second conductive structure 42, provides multiple transmission channels for the transmission of carriers, helps to reduce contact resistance, reduces the transmission barrier of carriers between the first semiconductor layer 21 and the first electrode 31, improves the mobility of carriers, reduces the scattering of carriers, and also helps to reduce recombination and improve the photoelectric conversion efficiency of solar cells.
[0082] Furthermore, in solar cells, the doping concentration of the N-type conductive element in the first semiconductor layer is usually set higher than the doping concentration of the P-type conductive element in the second semiconductor layer. Due to the higher doping concentration of the N-type conductive element, the concentration of carriers is increased. However, at the same time, if the carriers are difficult to be effectively transmitted to the electrodes, the probability of carrier scattering and recombination will increase. Therefore, the present application sets the density of the first conductive structure to be higher than the density of the second conductive structure, so that the carriers can be effectively transmitted to the first electrode through the first conductive structure, reducing the recombination and scattering of the carriers and improving the photoelectric conversion efficiency of the solar cell.
[0083] In summary, the present application designs the density of the first conductive structure 41 and the second conductive structure 42, thereby further avoiding the influence of the high diffusion rate of carriers in the first semiconductor layer on the scattering and recombination of carriers, promoting the effective transmission of carriers to the electrodes, and improving the performance of solar cells. That is, under the mutual cooperation of the semiconductor layer and the conductive structure, it is helpful to improve the stability of the contact between the semiconductor layer and the electrode, reduce the contact resistance, increase the mobility of carriers, reduce recombination, and improve the conductivity, thereby improving the photoelectric conversion efficiency of the solar cell.
[0084] Among them, the carrier type that can be provided by the N-type conductive element is electron, and the N-type conductive element includes at least one of phosphorus and arsenic elements; the carrier type that can be provided by the P-type conductive element is hole, and the N-type conductive element includes at least one of boron and gallium elements.
[0085] Furthermore, in any 1 mm×1 mm region where the first electrode 31 contacts the first semiconductor layer 21, the number of the first conductive structures 41 is 1×10 5 ~1×106 In any 1 mm×1 mm area where the second electrode 32 contacts the second semiconductor layer 22, the number of the second conductive structures 42 is 5×10 4 ~5×10 5 indivual.
[0086] When the number of the first conductive structure 41 and the second conductive structure 42 meets the above range, the contact area between the electrode and the semiconductor layer is appropriate, which can effectively reduce the contact resistance and increase the transmission of carriers. It can not only avoid the problem that the number is small and it is difficult to effectively improve the transmission efficiency of carriers; it can also avoid the problem that the area of the contact area between the semiconductor layer and the electrode is too large when there are too many, and the damage range and serious pollution of the existing contact area, reduce the occurrence of recombination, and thus better optimize the performance of the solar cell.
[0087] For further information, see Figure 2 and Figure 3 The projection size of the first conductive structure 41 on the first semiconductor layer 21 is greater than or equal to the projection size of the second conductive structure 42 on the second semiconductor layer 22. The projection size of any first conductive structure 41 on the first semiconductor layer 21 is 100nm~2000nm, and the projection size of any second conductive structure 42 on the second semiconductor layer 22 is 100nm~1000nm.
[0088] It should be noted that, taking the first conductive structure 41 as an example, Figure 4 As shown, the projection size of the first conductive structure 41 refers to the width d between the two farthest points of the first conductive structure 41. Similarly, the projection size of the second conductive structure 42 refers to the width between the two farthest points of the second conductive structure 42.
[0089] Among them, when the projection size of the first conductive structure 41 and the second conductive structure 42 is within the above range, it can not only ensure that the carriers have good transport capabilities, but also reduce the damage range of the contact interface between the semiconductor layer and the electrode, reduce the occurrence of contact recombination, and better optimize the contact performance between the semiconductor layer and the electrode. In addition, since the doping content of the second semiconductor layer 22 is relatively low, preferably, when the projection size of the second conductive structure 42 is smaller than the first conductive structure 41, it helps to reduce the defects of the contact interface and further reduce the recombination of carriers. In addition, since the projection size of the first conductive structure 41 is relatively large, the transmission rate of carriers in the first semiconductor layer 21 is greatly improved, the scattering of carriers is reduced, the photoelectric conversion efficiency of the solar cell is improved, and the consumption of slurry can be reduced, thereby reducing the cost of using slurry.
[0090] Furthermore, any first conductive structure 41 and any second conductive structure 42 are in the shape of leaf veins.
[0091] In order to further improve the mobility of carriers, the first conductive structure 41 and the second conductive structure 42 of the present application are both in the shape of leaf veins. The use of such a structure not only helps to increase the contact area between any conductive structure and the semiconductor layer, but also provides carrier transmission paths in multiple directions, thereby not only ensuring the uniformity of carrier transmission, but also reducing resistance loss, thereby helping to improve the photoelectric conversion efficiency of solar cells. In addition, it helps to improve the stability of the contact between the electrode and the semiconductor layer, so that it can ensure good contact performance during the welding process and related battery or component stability experiments.
[0092] Furthermore, if Figure 5 As shown, any first conductive structure 41 includes a plurality of strip-shaped first structures 411 diverging toward the first electrode 31; any second conductive structure 42 includes a plurality of strip-shaped second structures diverging toward the second electrode 32. A large number of the first structures 411 and the second structures is conducive to ensuring that the first conductive structure 41 and the second conductive structure 42 can provide more carrier transport paths and improve the carrier mobility.
[0093] Furthermore, any first structure 411 includes a first crystalline main chain 4111 and a plurality of first crystalline side chains 4112 extending in a growth direction different from the first crystalline main chain 4111; any second structure includes a second crystalline main chain and a plurality of second crystalline side chains extending in a growth direction different from the second crystalline main chain. Since the number of first crystalline side chains 4112 and second crystalline side chains is large, it is beneficial to ensure that the first conductive structure 41 and the second conductive structure 42 can provide more carrier transport paths, improve the carrier mobility, and reduce recombination.
[0094] Specifically, taking the first conductive structure 41 as an example, the first conductive structure 41 includes a plurality of first structures 411, and any first structure 411 is composed of a first crystalline main chain 4111 and a plurality of first crystalline side chains 4112, so the carriers in the first semiconductor layer 21 can be transmitted not only along the first crystalline main chain 4111, but also along the first crystalline side chain 4112, and since the first conductive structure 41 has a large number of first crystalline main chains 4111 and first crystalline side chains 4112, it not only helps to ensure that the contact area between the first electrode 31 and the first semiconductor layer 21 is high, which helps to reduce the contact resistance, but also provides a variety of transmission channels, thereby improving the mobility of the carriers to a high degree, and ensuring the uniformity of the carrier transmission, and reducing the recombination. In addition, due to the structural characteristics of the first conductive structure 41, the first electrode 31 and the first semiconductor layer 21 have high bonding stability, which helps to stabilize the subsequent photovoltaic module welding and improve the performance of the solar cell to a high degree.
[0095] Furthermore, both the first structure 411 and the second structure are formed by crystallization and polymerization of a number of conductive particles, wherein the elements in the conductive particles include one or a combination of silver, aluminum, copper, and lead.
[0096] In addition, in order to ensure that the solar cell of the present application has good conductivity, the doping concentration of the N-type conductive element in the first semiconductor layer 21 is set to 1×10 20 atoms / cm 3 ~1×10 21 atoms / cm 3 The doping concentration of the P-type conductive element in the second semiconductor layer 22 is 1×10 18 atoms / cm 3 ~1×10 20 atoms / cm 3 When the doping concentration of the conductive element is controlled within the above range, the carrier content and the number of conductive structures are highly matched, thereby effectively improving the conductivity of the solar cell, avoiding the influence of high-concentration doping on carrier transport, improving the mobility of carriers, reducing recombination, and improving the photoelectric conversion efficiency of the solar cell.
[0097] In a first optional implementation, refer to Figure 1 The solar cell is a back contact cell, the first semiconductor layer 21 and the second semiconductor layer 22 are arranged on the backlight side of the silicon substrate 1, the first semiconductor layer 21 and the second semiconductor layer 22 are separated by an isolation region, and the first semiconductor layer 21 and the second semiconductor layer 22 are arranged in an interdigitated manner.
[0098] Among them, for back-contact cells, since the positive and negative electrodes of this type of solar cell are both on the backlight side, there is no metal grid blocking the light-receiving side, which avoids electrode shading losses and reduces recombination on the light-receiving side, thereby improving the photoelectric conversion efficiency of the solar cell.
[0099] In addition, in order to further improve the performance of the solar cell, a passivation contact structure can be set on the back of the solar cell, that is, the solar cell also includes a first dielectric layer 51 arranged between the first semiconductor layer 21 and the silicon substrate 1, and a second dielectric layer 52 arranged between the second semiconductor layer 22 and the silicon substrate 1.
[0100] Since the solar cell includes a dielectric layer and a semiconductor layer, the two together form a passivation contact structure, providing a good interface passivation effect for the backlight surface, wherein the material of the dielectric layer may include a variety of dielectric materials, such as at least one of silicon oxide, magnesium fluoride, amorphous silicon, polycrystalline silicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide or titanium oxide. Preferably, the dielectric layer is a silicon oxide layer formed by silicon oxide. This is because the silicon oxide layer has excellent passivation properties, can minimize the recombination loss of minority carriers on the surface of the silicon substrate, and is a thin film with excellent durability for subsequent high-temperature processes.
[0101] The dielectric layer, as a barrier for electrons and holes, can be combined with the semiconductor layer to form a passivation contact structure to prevent minority carriers from passing through; the dielectric layer can also function as a pinhole channel, allowing the carriers in the solar cell to move freely, and selectively passing through the heavily doped semiconductor layer for the majority carriers, which is beneficial to reducing the recombination loss of minority carriers; in addition, the dielectric layer can be used as a diffusion barrier to prevent the conductive elements of the semiconductor layer from diffusing to the silicon substrate. In addition, controlling the thickness of the dielectric layer to 0.5nm to 4nm is beneficial to reducing the transmission barrier of carriers and improving their transmission efficiency.
[0102] In addition, disposing a first functional layer 61 on the first semiconductor layer 21 and a second functional layer 62 on the second semiconductor layer 22 also helps to improve the performance of the solar cell. The first functional layer 61 is a first passivation layer and / or a first anti-reflection layer, and the second functional layer 62 is a second passivation layer and / or a second anti-reflection layer.
[0103] And because the first semiconductor layer 21 and the second semiconductor layer 22 are both located on the backlight side of the silicon substrate 1, that is, the first functional layer 61 and the second functional layer 62 are both located on the backlight side of the solar cell, at this time, the first functional layer 61 and the second functional layer 62 are prepared in the same step, and the two are the same film layer; in addition, in order to further improve the photoelectric conversion efficiency of the solar cell, the light-receiving surface of the silicon substrate 1 is also provided with a third functional layer 63.
[0104] In a second alternative implementation, if Figure 6 and Figure 7 As shown, the solar cell is a passivated contact cell, the silicon substrate 1 is N-type, the second semiconductor layer 22 is arranged on the light-receiving surface of the silicon substrate 1, the first semiconductor layer 21 is arranged on the backlight surface of the silicon substrate 1, and a first dielectric layer 51 is also arranged between the first semiconductor layer 21 and the silicon substrate 1.
[0105] See back Figure 7In order to further improve the passivation effect of the solar cell and improve the photoelectric conversion efficiency of the solar cell, the present application provides a plurality of first semiconductor layers 21 on the backlight surface, any one of the first semiconductor layers 21 is provided on a partial area of the backlight surface, and adjacent first semiconductor layers 21 are separated by a first separation area 7; and / or, a plurality of second semiconductor layers 22 are provided on the light-receiving surface, any one of the second semiconductor layers 22 is provided on a partial area of the light-receiving surface, and two adjacent second semiconductor layers 22 are separated by a second separation area 8, wherein a velvet structure is provided on the second separation area 8. When both the light-receiving surface and the backlight surface are provided with a local passivation structure, the passivation effect of the light-receiving surface is high, and the absorption of sunlight is less affected, and the local passivation structure provided on the backlight surface helps to reduce the production cost, reduce the damage of the contact between the semiconductor layer and the silicon substrate, and improve the photoelectric conversion efficiency of the solar cell.
[0106] In addition, in order to improve the passivation effect of the light-receiving surface, a second dielectric layer 52 may be disposed on the light-receiving surface. The second dielectric layer 52 is located between the second semiconductor layer 22 and the silicon substrate 1 .
[0107] In addition, a first functional layer 61 is prepared on the side of the first semiconductor layer 21 away from the silicon substrate 1, and a second functional layer 62 is prepared on the side of the second semiconductor layer 22 away from the silicon substrate 1; the first functional layer 61 is a first passivation layer and / or a first anti-reflection layer, and the second functional layer 62 is a second passivation layer and / or a second anti-reflection layer.
[0108] The provision of the passivation layer helps to reduce surface recombination and improve the photoelectric conversion efficiency of the solar cell; the presence of the anti-reflection layer can reduce the reflection of the incident light on the one hand, and on the other hand, can play a passivation role, further improving the photoelectric efficiency of the solar cell. Exemplarily, the first functional layer 61 is a first passivation layer, a first anti-reflection layer, or a first passivation layer and a first anti-reflection layer; the second functional layer 62 is a second anti-reflection layer, a second passivation layer, or a second passivation layer and a second anti-reflection layer.
[0109] When a functional layer is provided on the first semiconductor layer 21 and the second semiconductor layer 22, it is helpful to improve the photoelectric conversion efficiency of the solar cell, and the first electrode 31 needs to pass through the first functional layer 61 and be connected to the first semiconductor layer 21 through the first conductive structure 41, and the second electrode 32 needs to pass through the second functional layer 62 and be connected to the second semiconductor layer 22 through the second conductive structure 42. At this time, the second semiconductor layer 22 is located on the light-receiving surface of the solar cell, so the second functional layer 62 is located on the second semiconductor layer 22 and the exposed velvet structure, and the first functional layer 61 is located on the first semiconductor layer 21 and the exposed backlight surface.
[0110] The first functional layer 61 includes aluminum oxide and at least one of silicon oxide, silicon oxynitride, and silicon nitride; the second functional layer 62 includes aluminum oxide and at least one of silicon oxide, silicon oxynitride, and silicon nitride.
[0111] In a second aspect, the present application also discloses a method for preparing a solar cell, the method comprising the following steps:
[0112] Providing a silicon substrate, on which a first semiconductor layer and a second semiconductor layer are disposed;
[0113] Applying a slurry for making a first electrode on the first semiconductor layer, and applying a slurry for making a second electrode on the second semiconductor layer;
[0114] Thermal treatment is performed to form a first conductive precursor at the contact interface between the first electrode and the first semiconductor layer, and to form a second conductive precursor at the contact interface between the second electrode and the second semiconductor layer;
[0115] Light is injected to transform the first conductive precursor into a first conductive structure and the second conductive precursor into a second conductive structure, thereby manufacturing a solar cell.
[0116] The slurry may be printed into the semiconductor layer by screen printing.
[0117] It can be understood that the slurry includes conductive particles, glass, organic solvent and binder, wherein the conductive particles have good conductivity and can form good contact between the crystal and the semiconductor layer during the heat treatment process to ensure effective transmission of current. The glass can melt the conductive particles and the semiconductor layer during the heat treatment process and enable the conductive particles to pass through the functional layer and contact the semiconductor layer. The organic solvent and binder change the fluidity of the slurry, reduce the difficulty of printing, and improve the quality of printing.
[0118] In addition, any first conductive precursor includes a plurality of first crystalline main chains diverging toward the first electrode, and any second conductive precursor includes a plurality of second crystalline main chains diverging toward the second electrode.
[0119] Among them, Figure 8 As shown, during the heat treatment process, the organic solvent and binder in the slurry used to prepare the first electrode evaporate and release, leaving conductive particles, while some conductive particles will further crystallize and aggregate. After crystallization, these conductive particles form a first conductive precursor at the contact interface between the first electrode and the first semiconductor layer. The structure of the first conductive precursor is a number of first crystalline main chains that diverge toward the first electrode. Fig. 9 As shown, in the subsequent light injection process, some conductive particles aggregate and grow along a growth direction different from the first crystalline main chain under high temperature and strong photocatalytic reduction, forming multiple slender first crystalline side chains, thereby obtaining a vein-shaped first conductive structure.
[0120] like Fig.10As shown, during the heat treatment process, the organic solvent and binder in the slurry used to prepare the second electrode evaporate and release, leaving conductive particles, while some conductive particles will further crystallize and aggregate. After crystallization, these conductive particles form a second conductive precursor at the contact interface between the second electrode and the second semiconductor layer. The structure of the second conductive precursor is a number of second crystalline main chains that diverge toward the second electrode. Fig.11 As shown, in the subsequent light injection process, some conductive particles aggregate and grow along a growth direction different from the second crystalline main chain under high temperature and strong photocatalytic reduction, forming multiple slender second crystalline side chains, thereby obtaining a leaf-vein-shaped second conductive structure.
[0121] That is, the light injection step is to make some conductive particles aggregate and grow on the crystalline main chain, thereby forming a crystalline side chain, that is, to transform the first conductive precursor into a first conductive structure, and connect the first electrode to the first semiconductor layer, and transform the second conductive precursor into a second conductive structure, and connect the second electrode to the second semiconductor layer. And the preparation method of the present application ensures that the density of the prepared second microstructure is lower than that of the first microstructure, which is conducive to improving the carrier transmission capacity to a higher degree.
[0122] Further, the step of light injection includes:
[0123] A heating stage, heating the first conductive precursor and the second conductive precursor, wherein the peak temperature of the heating stage is 400° C. to 650° C.;
[0124] When the temperature in the heating stage drops from the peak temperature to the preset temperature, the solar cell is illuminated with light at a temperature of 50°C to 400°C and an energy density of 10kW / m 2 ~100kW / m 2 ;
[0125] Among them, the preset temperature is 320℃~360℃.
[0126] When the parameters of light injection are controlled within the above range, it is beneficial to the diffusion and crystal aggregation of the conductive particles, ensuring that the parameters of the formed first conductive structure and the second conductive structure are within the scope of the present application, which helps to reduce the contact resistance and improve the carrier transmission effect.
[0127] Furthermore, the heating stage includes the following processes: heating to a preset temperature; heating from the preset temperature to a peak temperature within a preset time, and then cooling to a preset temperature, wherein the preset time is 10s to 30s. Since the vitreous solvent is in a softened state during the heating stage, the conductive particles can be evenly distributed in the vitreous body, and when the preset time is controlled within the above range, the conductive particles have sufficient time to move, aggregate, and reduce to form a conductive structure, thereby ensuring that the first conductive structure and the second conductive structure obtained meet the scope of this application.
[0128] Furthermore, in the heat treatment step, the heat treatment temperature is 700°C to 900°C. When the heat treatment temperature is controlled within the above range, the diffusion and bonding of the conductive particles are promoted, thereby helping the formation of the conductive precursor and ensuring that the structure of the conductive precursor meets the requirements of this application.
[0129] Further, after the step of applying the first electrode slurry on the first semiconductor layer and before the step of applying the second electrode slurry on the second semiconductor layer, the preparation method further comprises: drying the first electrode slurry at a temperature of 100° C. to 300° C.; and / or,
[0130] After the step of applying the second electrode paste on the second semiconductor layer and before the step of heat treatment, the second electrode paste is dried at a temperature of 100° C. to 300° C.
[0131] Drying the slurry before the heat treatment step can volatilize part of the organic solvent in the slurry and reduce the humidity of the slurry, thereby avoiding the poor stability of the electrode structure caused by the rapid volatilization of the organic solvent during the heat treatment process, resulting in poor stability of the contact area between the electrode and the semiconductor layer, more defects in the contact area, and difficulty in effectively improving the photoelectric conversion performance of the solar cell.
[0132] In a first optional embodiment, the step of providing a silicon substrate comprises:
[0133] Depositing a second dielectric layer and a second semiconductor layer in sequence on the backlight surface of the silicon substrate;
[0134] Performing patterning on the second dielectric layer and the second semiconductor layer located on the backlight surface to expose a portion of the backlight surface;
[0135] Depositing a first dielectric layer and a first semiconductor layer in sequence on the exposed backlight surface and the second semiconductor layer;
[0136] The first semiconductor layer and the first dielectric layer located on the second semiconductor layer are removed, and an isolation region is formed between the adjacent second semiconductor layer and the first semiconductor layer.
[0137] The present application does not impose any limitation on the preparation process of the dielectric layer and the semiconductor layer, as long as the purpose of the present application can be achieved.
[0138] Optionally, a second dielectric layer and a second semiconductor layer are prepared on the backlight surface by chemical vapor deposition, firstly, high-purity oxygen is introduced at 400° C. to 650° C. to grow the second dielectric layer, then high-purity SiH4 is introduced at 450° C. to 700° C. to prepare a second amorphous silicon layer, and finally BCl3 is introduced at 750° C. to 1050° C. to diffuse boron, and the second amorphous silicon layer is crystallized and doped to form a second semiconductor layer;
[0139] The second semiconductor and the second dielectric layer are removed by laser and wet alkali polishing to expose a portion of the backlight surface;
[0140] A first dielectric layer and a first semiconductor layer are prepared on the backlight surface by chemical vapor deposition. High-purity oxygen is introduced to grow the first dielectric layer at 400°C to 650°C, and then high-purity SiH4 is introduced to prepare the first amorphous silicon layer at 450°C to 700°C. Then, POCl3 is introduced at 700°C to 950°C for phosphorus diffusion, so that the first amorphous silicon layer is crystallized and doped to form a first semiconductor layer.
[0141] The above-mentioned preparation process can ensure that the doping concentrations of the conductive elements in the first semiconductor layer and the second semiconductor layer of the present application are within the scope of the present application, and also ensure that the deposited film layer has high flatness and small interface defects, which helps to reduce recombination.
[0142] After the first semiconductor layer and the second semiconductor layer are prepared, the light-receiving surface of the silicon substrate is textured and cleaned. After the texture is formed, the entire light-receiving surface is formed with a velvet structure. The existence of the velvet structure helps to reduce the reflection of sunlight and improve the absorption rate of sunlight. In addition, since the first semiconductor layer and the second semiconductor layer are both located on the backlight side, that is, the first functional layer on the first semiconductor layer and the second functional layer on the second semiconductor layer are prepared at the same time, the first functional layer and the second functional layer on the backlight side of the solar cell belong to the same structure, and the second electrode passes through the second functional layer and is connected to the second semiconductor layer through the second conductive structure, and the first electrode passes through the first functional layer and is connected to the first semiconductor layer through the first conductive structure.
[0143] In a second optional embodiment, the step of providing a silicon substrate comprises:
[0144] Depositing a second dielectric layer and a second semiconductor layer in sequence on the light-receiving surface of the silicon substrate;
[0145] Removing the second dielectric layer and the second semiconductor layer on the light-receiving surface to expose a portion of the light-receiving surface;
[0146] Depositing a first dielectric layer and a first semiconductor layer in sequence on the backlight surface of the silicon substrate;
[0147] The first dielectric layer and the first semiconductor layer on the backlight surface are removed to expose a portion of the backlight surface.
[0148] After preparing the first semiconductor and the second semiconductor layer, the light-receiving surface of the silicon substrate is textured and cleaned, and the structure obtained after textured has a textured structure only on the exposed light-receiving surface, and then a passivation layer is deposited, and a second passivation layer is deposited on the textured structure on the light-receiving surface and the second semiconductor layer, and the first semiconductor layer and the exposed backlight surface have a first passivation layer, wherein the second electrode passes through the second functional layer and is connected to the second semiconductor layer through the second conductive structure, and the first electrode passes through the first functional layer and is connected to the first semiconductor layer through the first conductive structure.
[0149] Furthermore, the first functional layer may be prepared by atomic layer deposition and / or plasma enhanced vapor deposition, and the second functional layer may be prepared by a plasma enhanced vapor deposition process. Exemplarily, the first functional layer may be prepared by atomic layer deposition; or the first functional layer may be prepared by plasma enhanced vapor deposition; or when the first functional layer includes a two-layer structure, at least one layer may be prepared by plasma vapor deposition, and the other layer may be prepared by atomic layer deposition.
[0150] In addition, in order to ensure the flatness of the first dielectric layer and the second dielectric layer, the silicon substrate is polished and cleaned before depositing the first dielectric layer and the second dielectric layer to remove metal ions and damage on the surface of the silicon substrate, thereby helping to improve the photoelectric conversion efficiency of the solar cell.
[0151] In a third optional embodiment, the step of providing a silicon substrate comprises:
[0152] Depositing a second semiconductor layer on the light-receiving surface of the silicon substrate;
[0153] A first dielectric layer and a first semiconductor layer are sequentially deposited on the backlight surface of the silicon substrate.
[0154] Before the step of depositing the second semiconductor layer, the light-receiving surface of the silicon substrate is textured and cleaned, and the light-receiving surface after textured has a velvet structure; after the step of depositing the first dielectric layer and the first semiconductor layer on the backlight side, a second passivation layer is deposited on the second semiconductor layer on the light-receiving surface, and a first passivation layer is deposited on the first semiconductor layer, wherein the second electrode passes through the second functional layer and is connected to the second semiconductor layer through the second conductive structure, and the first electrode passes through the first functional layer and is connected to the first semiconductor layer through the first conductive structure.
[0155] The technical solution of the present application will be further explained below in conjunction with more specific embodiments and experimental test results.
[0156] Embodiment 1:
[0157] The present application provides a solar cell in which the doping concentration of the N-type conductive element in the first semiconductor layer is 5×10 20 atoms / cm 3 The doping concentration of the P-type conductive element in the second semiconductor layer is 5×10 19 atoms / cm 3 , in any 1mm×1mm area, the number of first conductive structures is 5×10 5 In any 1 mm×1 mm area in contact between the second electrode and the second semiconductor layer, the number of the second conductive structures is 1×10 5 The projected size of any first conductive structure on the first semiconductor layer is 1500 nm, and the projected size of any second conductive structure on the second semiconductor layer is 900 nm.
[0158] The present application also provides a method for preparing the solar cell:
[0159] The step of providing a silicon substrate comprises:
[0160] Polishing: Select N-type silicon wafer as the substrate, polish the surface of the N-type silicon wafer, remove damage, line marks, and oil stains to form a flat and clean silicon substrate;
[0161] Second dielectric layer and second semiconductor layer: The second dielectric layer and the second semiconductor layer are prepared on the backlight side by plasma vapor deposition method. First, high-purity oxygen is introduced at 400°C to 650°C to grow the second dielectric layer, and then high-purity SiH4 is introduced at 450°C to 700°C to prepare the second amorphous silicon layer. Finally, BCl3 is introduced at 750°C to 1050°C for boron diffusion. The second amorphous silicon layer is crystallized and doped to form the second semiconductor layer.
[0162] The second semiconductor and the second dielectric layer are removed by laser and wet alkali polishing to expose a portion of the backlight surface;
[0163] The first dielectric layer and the first semiconductor layer: The first dielectric layer and the first semiconductor layer are prepared on the backlight surface by chemical vapor deposition method, high-purity oxygen is introduced at 400℃~650℃ to grow the first dielectric layer, and then high-purity SiH4 is introduced at 450℃~700℃ to prepare the first amorphous silicon layer, and then POCl3 is introduced at 700℃~950℃ to diffuse phosphorus, so that the first amorphous silicon layer is crystallized and doped to form the first semiconductor layer.
[0164] For texturing and cleaning, a chain HF device is used to remove the borophosphosilicate glass on the light-receiving surface of the silicon substrate due to the boron / phosphorus expansion. In a trough device, sodium hydroxide with a volume ratio of 7:1 and an additive model TS40 are used. The temperature is maintained at 80°C for 7 minutes to form a velvet structure on the light-receiving surface of the silicon substrate, and the thinning amount of the silicon substrate is controlled at 5μm.
[0165] The first functional layer and the second functional layer are prepared on the backlight surface of the silicon substrate by using a plasma enhanced chemical vapor deposition method.
[0166] A paste for making a first electrode is printed on the first functional layer and dried at 200°C, and then a paste for making a second electrode is printed on the second functional layer and dried at 200°C.
[0167] The first conductive precursor is formed at the contact interface between the first electrode and the first semiconductor layer by heat treatment, and the second conductive precursor is formed at the contact interface between the second electrode and the second semiconductor layer by heat treatment, wherein the heat treatment temperature is 900°C.
[0168] Light injection: the first conductive precursor is transformed into a first conductive structure, the second conductive precursor is transformed into a second conductive structure, and the second electrode passes through the second functional layer and is connected to the second semiconductor layer through the second conductive structure, and the first electrode passes through the first functional layer and is connected to the first semiconductor layer through the first conductive structure. The light injection step includes:
[0169] In the heating stage, the first conductive precursor and the second conductive precursor are heated, specifically, first heated to 350° C.; then heated from 350° C. to 500° C. within 20 seconds, and then cooled to 350° C.;
[0170] When the temperature in the heating stage drops from 500°C to 350°C, the solar cell is illuminated at a temperature of 200°C and an energy density of 100kW / m 2 .
[0171] Embodiment 2:
[0172] The difference between this embodiment and the first embodiment is that the doping concentration of the N-type conductive element of the solar cell in the first semiconductor layer is 1×10 20 atoms / cm 3 , the doping concentration of the P-type conductive element in the second semiconductor layer is 9×10 19 atoms / cm 3 .
[0173] Embodiment three:
[0174] The only difference between this embodiment and the first embodiment is that the projection size of any first conductive structure on the first semiconductor layer is 500 nm, and the projection size of any second conductive structure on the second semiconductor layer is 1000 nm.
[0175] Embodiment 4:
[0176] The difference between this embodiment and the first embodiment is that the solar cell structure of this embodiment is a passivated contact solar cell. The light-receiving surface of the solar cell is partially provided with a second dielectric layer and a second semiconductor layer, and the backlight surface is partially provided with a first dielectric layer and a first semiconductor layer. The structural schematic diagram of the solar cell obtained is shown in FIG. Figure 7 .
[0177] Embodiment five:
[0178] The difference between this embodiment and the first embodiment is that the solar cell structure of this embodiment is a passivated contact solar cell. The light-receiving surface of the solar cell is provided with a second semiconductor layer, and the backlight surface is provided with a first dielectric layer and a first semiconductor layer. The structural schematic diagram of the solar cell is shown in FIG. Figure 6 .
[0179] Comparative Example 1:
[0180] The difference between this embodiment and the first embodiment is that, in any 1 mm×1 mm area, the number of the first conductive structures is 5×10 4 In any 1 mm×1 mm area in contact between the second electrode and the second semiconductor layer, the number of the second conductive structures is 5×10 4 indivual;
[0181] Comparative Example 2:
[0182] The only difference between this comparative example and the first embodiment is that the density of the first conductive structure is smaller than the density of the second conductive structure.
[0183] Performance Testing
[0184] The solar cells prepared in Examples 1 to 6 and Comparative Examples 1 to 2 were subjected to the following related tests:
[0185] The present application provides a solar cell, using the halm test sorting equipment to perform open circuit voltage, short circuit current and fill factor performance tests. The halm machine is a device that simulates sunlight, and is equipped with electronic loads, data acquisition and calculation equipment to test the electrical performance of photovoltaic devices (including solar cells). The silicon wafer of the solar cell under control is 182 in size, and the calibrated light intensity is 1000±5W / m 2 , test temperature 25℃±0.5℃, the experimental test results are as follows.
[0186] Table 1 Performance test results of solar cells
[0187]
[0188] By analyzing the data of Examples 1 to 3 and Comparative Examples 1 and 2, it can be seen that the performance of the examples is better than that of the comparative examples. This is because the density of the first conductive structure in the examples is greater than the density of the second conductive structure, and both are within the scope of the present application, so it helps to improve the diffusion capacity of carriers in the first semiconductor layer, thereby helping to reduce the probability of carrier scattering and recombination, and improving the photoelectric conversion efficiency of solar cells.
[0189] Analysis of the data of Example 1 and Example 2 shows that the performance of Example 1 is higher than that of Example 2. This is because the doping concentration of the N-type conductive element in the first semiconductor layer of Example 1 is higher, and the doping concentration of the P-type conductive element in the second semiconductor layer is lower, so the concentration of carriers in the first semiconductor layer is higher. In addition, the carrier concentration in the first semiconductor layer is highly matched with the density of the first conductive structure, which promotes the improvement of the carrier transmission rate, thereby helping to improve the conductivity of the solar cell, reduce the probability of carrier recombination and scattering, and improve the photoelectric conversion efficiency of the solar cell to a greater extent.
[0190] Analysis of the data of Example 1 and Example 3 shows that the performance of Example 1 is better than that of Example 3. This is because the projection size of the first conductive structure of Example 1 on the first semiconductor layer is larger than that of Example 3, and the projection size of the second conductive structure on the second semiconductor layer is smaller than that of Example 3. Therefore, any first conductive structure in Example 1 can transmit a higher content of carriers, so it can effectively improve the carrier transmission capacity in the first semiconductor layer, thereby effectively reducing the probability of scattering and recombination of carriers in the first semiconductor layer, and improving the performance of the solar cell.
[0191] From the analysis of the data of Implementation Example 1, Implementation Example 4 and Implementation Example 5, it can be known that whether it is a back-contact solar cell or a passivated contact solar cell (including a solar cell in which a passivation contact structure is partially provided on both the light-receiving surface and the backlight surface, or a solar cell in which a passivation contact structure is provided only on the backlight surface), as long as the density of the first conductive structure is controlled to be greater than the density of the second conductive structure, it will help to increase the carrier transmission rate and improve the performance of the solar cell.
[0192] The solar cells and their preparation methods, and photovoltaic modules disclosed in the embodiments of the present application are introduced in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions of the embodiments of the present application. At the same time, for those skilled in the art, according to the ideas of the present invention, there will be changes in the specific implementation methods and application scopes. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A solar cell, characterized in that: The solar cell comprises: Silicon substrate; A first semiconductor layer and a second semiconductor layer are disposed on the silicon substrate, wherein the first semiconductor layer is doped with an N-type conductive element, and the second semiconductor layer is doped with a P-type conductive element; a first electrode, the first electrode being electrically connected to the first semiconductor layer through a plurality of first conductive structures; a second electrode, the second electrode being electrically connected to the second semiconductor layer through a plurality of second conductive structures; Wherein, the density of the first conductive structure is greater than the density of the second conductive structure.
2. The solar cell according to claim 1, characterized in that: In any 1 mm×1 mm area where the first electrode contacts the first semiconductor layer, the number of the first conductive structures is 1×10 5 ~1×10 6 In any 1 mm×1 mm area where the second electrode contacts the second semiconductor layer, the number of the second conductive structures is 5×10 4 ~5×10 5 indivual.
3. The solar cell according to claim 1, characterized in that: The projection size of the first conductive structure on the first semiconductor layer is greater than or equal to the projection size of the second conductive structure on the second semiconductor layer. The projection size of any first conductive structure on the first semiconductor layer is 100nm to 2000nm, and the projection size of any second conductive structure on the second semiconductor layer is 100nm to 1000nm.
4. The solar cell according to claim 1, characterized in that: Any one of the first conductive structures and any one of the second conductive structures are in the shape of leaf veins.
5. The solar cell according to claim 4, characterized in that: Any of the first conductive structures includes a plurality of strip-shaped first structures diverging toward the first electrode; Any of the second conductive structures includes a plurality of strip-shaped second structures diverging toward the second electrode.
6. The solar cell according to claim 5, characterized in that: Any one of the first structures includes a first crystalline main chain and a plurality of first crystalline side chains extending in a growth direction different from that of the first crystalline main chain; Any one of the second structures includes a second crystalline main chain and a plurality of second crystalline side chains extending in a growth direction different from that of the second crystalline main chain.
7. The solar cell according to claim 6, characterized in that: The first structure and the second structure are both formed by crystallization and polymerization of a plurality of conductive particles.
8. The solar cell according to claim 7, characterized in that: The elements in the conductive particles include silver, aluminum, copper, and lead, or a combination of the two.
9. The solar cell according to claim 1, characterized in that: The doping concentration of the N-type conductive element in the first semiconductor layer is 1×10 20 atoms / cm 3 ~1×10 21 atoms / cm 3 , The doping concentration of the P-type conductive element in the second semiconductor layer is 1×10 18 atoms / cm 3 ~1×10 20 atoms / cm 3 .
10. The solar cell according to any one of claims 1 to 9, characterized in that: The first semiconductor layer and the second semiconductor layer are arranged on the backlight surface of the silicon substrate, the first semiconductor layer and the second semiconductor layer are separated by an isolation region, and the first semiconductor layer and the second semiconductor layer are arranged in an interdigitated manner.
11. The solar cell according to claim 10, characterized in that: The solar cell further includes a first dielectric layer disposed between the first semiconductor layer and the silicon substrate, and a second dielectric layer disposed between the second semiconductor layer and the silicon substrate.
12. The solar cell according to any one of claims 1 to 9, characterized in that: The silicon substrate is N-type, the second semiconductor layer is arranged on the light-receiving surface of the silicon substrate, the first semiconductor layer is arranged on the backlight surface of the silicon substrate, and a first dielectric layer is arranged between the first semiconductor layer and the silicon substrate.
13. The solar cell according to claim 12, characterized in that: A plurality of the first semiconductor layers are arranged on the backlight surface, any one of the first semiconductor layers is arranged on a partial area of the backlight surface, and adjacent first semiconductor layers are separated by a first separation area; and / or, A plurality of the second semiconductor layers are arranged on the light receiving surface, any one of the second semiconductor layers is arranged on a partial area of the light receiving surface, and two adjacent second semiconductor layers are separated by a second separation area, wherein a velvet structure is arranged on the second separation area.
14. A method for preparing a solar cell according to any one of claims 1 to 13, characterized in that: The preparation method comprises the following steps: Providing the silicon substrate, on which the first semiconductor layer and the second semiconductor layer are disposed; Applying a slurry for making the first electrode on the first semiconductor layer, and applying a slurry for making the second electrode on the second semiconductor layer; Thermal treatment to form a first conductive precursor at the contact interface between the first electrode and the first semiconductor layer, and to form a second conductive precursor at the contact interface between the second electrode and the second semiconductor layer; Light is injected to transform the first conductive precursor into a first conductive structure and the second conductive precursor into a second conductive structure, thereby manufacturing the solar cell.
15. The preparation method according to claim 14, characterized in that: The light injection step comprises: A heating stage, heating the first conductive precursor and the second conductive precursor, wherein the peak temperature of the heating stage is 400° C. to 650° C.; When the temperature in the heating stage drops from the peak temperature to the preset temperature, light is applied to the solar cell, the temperature of the light is 50°C to 400°C, and the energy density of the light is 10kW / m 2 ~100kW / m 2 ; Wherein, the preset temperature is 320°C to 360°C.
16. The preparation method according to claim 15, characterized in that: The heating stage includes the following processes: Heating to the preset temperature; After heating from the preset temperature to the peak temperature within a preset time, the temperature is then cooled to the preset temperature, wherein the preset time is 10s to 30s.
17. The preparation method according to claim 14, characterized in that: Any of the first conductive precursors includes a plurality of first crystalline main chains diverging toward the first electrode; Any of the second conductive precursors includes a plurality of second crystalline main chains diverging toward the second electrode.
18. The preparation method according to claim 14, characterized in that: In the heat treatment step, the heat treatment temperature is 700°C to 900°C.
19. The preparation method according to claim 14, characterized in that: The step of providing a silicon substrate comprises: Depositing a second dielectric layer and a second semiconductor layer in sequence on the backlight surface of the silicon substrate; Performing patterning on the second dielectric layer and the second semiconductor layer located on the backlight surface to expose a portion of the backlight surface; Depositing a first dielectric layer and the first semiconductor layer in sequence on the exposed backlight surface and the second semiconductor layer; The first semiconductor layer and the first dielectric layer located on the second semiconductor layer are removed, and an isolation region is formed between the adjacent second semiconductor layer and the first semiconductor layer.
20. The preparation method according to claim 14, characterized in that: The step of providing a silicon substrate comprises: depositing the second semiconductor layer on the light-receiving surface of the silicon substrate; A first dielectric layer and a first semiconductor layer are sequentially deposited on the backlight surface of the silicon substrate.
21. A photovoltaic module, characterized in that: include: The solar cell according to any one of claims 1 to 13, or the solar cell prepared by the preparation method according to any one of claims 14 to 20.
Citation Information
Patent Citations
Solar cell and preparation method thereof
CN103178135A
Solar cell, preparation method thereof and photovoltaic module
CN116759465A
photovoltaic device
JP3206839U
Sollar Cell And Fabrication Method Thereof
KR1020110008541A
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