Novel multi-CPU high-efficiency motor-driven frequency converter

Abstract

The invention discloses a novel multi-CPU high-efficiency motor-driven frequency converter, which comprises a circuit mainboard, and is characterized in that the circuit mainboard is provided with a main CPU, a second CPU, a third CPU, a fourth CPU, an IGBT inverter, an analysis and storage module, and a system parameter and operation real-time parameter module; the main CPU is electrically connected with the second CPU, the third CPU and the fourth CPU respectively; the second CPU is electrically connected with a man-machine interface, an LCD (Liquid Crystal Display), an LED (Light Emitting Diode) and a remote offline anti-interference interface; the invention relates to the technical field of frequency converters, in particular to a main CPU (central processing unit) module and main work of the main CPU module, the main CPU module systematically processes receipts such as voltage, current and rotating speed transmitted by a three-phase IGBT (insulated gate bipolar transistor) inverter bridge through an optical isolation interface, constructs an innovative driving modulation control self-adaptive mode, and then obtains a programmable logic chip to drive the three-phase IGBT inverter bridge to realize self-adaptive control of the three-phase IGBT inverter bridge. Therefore, a driving magnetic field (driving power supply) required for efficiently driving an induction motor or a synchronous motor is generated, and the work of converting electric energy or mechanical energy by the frequency converter is completed.

Description

Technical Field

[0001] The invention relates to the technical field of frequency converters, in particular to a novel multi-CPU high-efficiency motor drive frequency converter. Background Art

[0002] The various complex tasks of the current general frequency converter are completed by a module consisting of a CPU chip and its peripheral support devices. Its main tasks are as follows:

[0003] 1. Vector analysis and calculation of control mode. 2. Generation and optimization of three-phase modulated sine wave and trigger control. 3. Communication with the host computer to implement host computer control and feedback the status of this system. 4. Operation and control of the chain disk, LED and LCD human-machine interface and implementation of control of this system. 5. Management and operation of encryption devices to protect intellectual property rights, etc. In addition to the main CPU, each of the above tasks requires the support of a large number of peripheral chips and devices to achieve. This has led to the following situation: because there are too many and too complicated tasks to be completed and the CPU resources are too high, DSP or high-end 16-bit 32-bit machines must be used, and a large number of foreign components are required. The result is: the CPU is too busy, making it difficult to improve the function and performance of the entire system, and the overall circuit board components, chips, etc. are too many, which greatly reduces the stability and reliability of the product. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a novel multi-CPU high-efficiency motor drive inverter, which solves the problem that various complex tasks of the existing inverter are completed by a module consisting of a CPU chip and its peripheral support devices, resulting in: the CPU is too busy, making it difficult to improve the function and performance of the entire system, and the overall circuit board components, chips, etc. are too many, which greatly reduces the stability and reliability of the product.

[0005] To achieve the above objectives, the present invention is implemented through the following technical solutions: A novel multi-CPU high-efficiency motor drive inverter, including a circuit mainboard, on which a main CPU, a second CPU, a third CPU and a fourth CPU as well as an IGBT inverter, an analysis and storage module, and a system parameter and operation real-time parameter module are installed;

[0006] The main CPU is electrically connected to the second CPU, the third CPU and the fourth CPU respectively;

[0007] The second CPU is electrically connected to the human-machine interface, LCD and LED, and remote offline anti-interference interface;

[0008] The fourth CPU is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module.

[0009] Preferably, the main CPU is electrically connected to a logic interface device, the logic interface device is electrically connected to an IGBT inverter, the IGBT inverter is electrically connected to a power grid anti-interference device, a rectifier filter and a battery pack, the IGBT inverter is electrically connected to a MOTOR, and the MOTOR is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module.

[0010] Preferably, the remote offline anti-interference interface is electrically connected to a PLC and a wireless network port.

[0011] Preferably, the power grid anti-interference device is electrically connected to a power grid interface.

[0012] Beneficial Effects

[0013] The present invention discloses a novel multi-CPU high-efficiency motor drive inverter, which has the following beneficial effects: a main CPU module and its main work: systematically processing the voltage, current, rotation speed and other data transmitted by a three-phase IGBT inverter bridge through an optical isolation interface, constructing its own innovative drive modulation control adaptive mode, and then using a programmable logic chip to drive the three-phase IGBT inverter bridge to generate a driving magnetic field (driving power supply) required for efficiently driving an induction motor or a synchronous motor, thereby completing the work of the inverter converting electrical energy into mechanical energy.

[0014] The second CPU is a human-machine interface and a communication module with the host computer. This module is completed by a single CPU (or single-chip microcomputer) and then communicates with the main CPU module, which greatly reduces the work of the main CPU module and greatly optimizes the neutron circuit of the entire inverter (only 1 / 10 or less of conventional technology, but the performance is greatly improved. Encryption processing The third CPU, this module converts the stored program ciphertext and key data running in the main CPU module into the plaintext required by the main CPU through complex decryption operations, and calls it in through communication when the main CPU module needs it, which also improves the protection strength of intellectual property rights.

[0015] The fourth CPU is a CPU module for identifying and processing the dynamic parameters of the motor and load. It collects the three-phase dynamic operating parameters of the motor and load, the rotor position parameters, etc. through photoelectric isolation, processes them into the form of load system transfer functions, and transmits them to the main CPU module through the communication interface for further use by the main CPU module. This greatly improves the overall performance and functions of this inverter, thereby achieving high performance and high functions that can drive both asynchronous motors and synchronous motors, which are difficult to achieve with current inverters. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of the structure of the present invention.

[0017] Figure 2It is the operating principle diagram of the present invention.

[0018] In the figure: 1. Main CPU; 2. Second CPU; 3. Third CPU; 4. Fourth CPU; 5. IGBT inverter; 6. Analysis and storage module; 7. Electrical isolation interface and system parameters and real-time operation parameter module. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. Please refer to Figure 1-2 , a novel multi-CPU high-efficiency motor drive inverter, comprising a circuit mainboard, on which a main CPU 1, a second CPU 2, a third CPU 3 and a fourth CPU 4, an IGBT inverter 5, an analysis and storage module 6, and a system parameter and operation real-time parameter module 7 are installed;

[0020] The main CPU 1 is electrically connected to the second CPU 2 , the third CPU 3 and the fourth CPU 4 respectively;

[0021] The main CPU (1) is a high-performance 16-bit, 32-bit microcontroller or DSP processor;

[0022] The second CPU2 is a module that integrates the human-machine interface and the host computer communication. This is a module that uses a CPU or a single-chip microcomputer or a processor to complete these two tasks at the same time. This can use an 8-bit or 16-bit single-chip microcomputer;

[0023] The third CPU 3 is an encryption processing CPU module;

[0024] The fourth CPU4 is a system parameter identification and processing module. This module is a collection and processing module for the system parameters of the controlled motor and load, operating parameters (such as bus voltage, current, electrical parameters of each phase, and rotor speed and position, etc.);

[0025] The second CPU 2 is electrically connected to the human-machine interface, LCD and LED, and remote offline anti-interference interface;

[0026] The fourth CPU 4 is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module 7 .

[0027] Furthermore, the main CPU 1 is electrically connected to a logic interface device, the logic interface device is electrically connected to the IGBT inverter 5, the IGBT inverter 5 is electrically connected to a power grid anti-interference device, a rectifier filter and a battery pack, the IGBT inverter 5 is electrically connected to a MOTOR, and the MOTOR is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module 7.

[0028] Furthermore, the remote offline anti-interference interface is electrically connected to a PLC and a wireless network port.

[0029] Furthermore, the power grid anti-interference device is electrically connected to a power grid interface.

[0030] By those skilled in the art, the components in this case are connected in sequence. The specific connection and operation sequence should refer to the following working principle. The detailed connection means are well-known technologies in the field. The following mainly introduces the working principle and process.

[0031] Embodiment: When in use, the main CPU (1) is a CPU module. The CPU used is a high-performance 16-bit, 32-bit single-chip microcomputer or DSP processor. This is because there are many 32-bit single-chip microcomputers and DSP processors with very powerful functions. It is also very common to have more than a dozen communication ports and a high main frequency. In addition, they all support C language and assembly language. The versatility of C language is relatively strong, so they can all be used as the CPU of this module. The main CPU 1 models the mathematical model of the system parameters (focusing on the partial differential equation parameters) transmitted by the fourth CPU 4, and uses this as a basis to construct the self-innovative drive modulation control adaptive mode of the integration of the frequency converter and the load. If the asynchronous motor is driven, the modulation parameters can be determined according to the slip between the speed of the load and the set speed, and the IGBT inverter 5 is driven through the photoelectric interface to complete the drive of the asynchronous induction motor. If the synchronous motor is driven, the rotor position information transmitted by the fourth CPU 4 is also required to determine the modulation parameters to complete the synchronous tracking and the triggering of the inverter bridge.

[0032] The second CPU2 is a module that integrates the human-machine interface and the host computer communication. This is a module that uses a CPU or a single-chip microcomputer or a processor to complete these two tasks at the same time. This can use an 8-bit or 16-bit single-chip microcomputer, and only a small patch type with a 32-pin package. The characteristic of this module is that the inverter operation command transmitted from the host computer (PC or PLC) uses this module as a transfer. Its advantage is that it can share a communication port of the main CPU1 with the human-machine interface module, making the workload of the main CPU1 more reduced and the electronic circuit of the module more simple and optimized. Moreover, modern 8-bit or 16-bit single-chip microcomputers have strong encryption functions that can generate unique identification codes, making the intellectual property protection stronger.

[0033] The third CPU3 is an encryption processing CPU module. This module converts the stored ciphertext into the plain text of some programs and key data required for the operation of the main CPU1 through complex decryption operations, and calls it in through the communication port when the module needs it, which also greatly reduces the operator's burden on the main CPU1 and the strength of intellectual property protection.

[0034] The fourth CPU4 is a system parameter identification and processing module. This module is a collection and processing module for the system parameters of the controlled motor and load, the operating parameters (such as the voltage and current of the busbar, the electrical parameters of each phase, and the speed and position of the rotor, etc.), which collects the above information collected by the photoelectric interface through digital signal processing technologies such as Kalman filtering and system identification, and obtains some characteristic values ​​that characterize the system characteristics, such as transfer function, time-varying function, etc., and transmits them to the main CPU1 module, which greatly reduces the burden of the main CPU1 module to construct the adaptive control module, thereby greatly improving the dynamic performance, static performance and energy-saving indicators of the invented frequency converter, the robustness of tracking targets, etc. This module and this system can be both an excellent asynchronous motor frequency converter, suitable for small, medium and high power motor frequency converters used in industrial mining manufacturing plants, and also suitable for electric vehicles and ships. The shaft propulsion system can also be a synchronous motor frequency converter, suitable for aircraft, industry, national defense and other special fields, and can even be used for servo motor systems, and is suitable for the use of reducers for large, medium and small robots.

[0035] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions. The sentence "includes an element defined by ... does not exclude the existence of other identical elements in the process, method, article or device including the element".

[0036] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A novel multi-CPU high-efficiency motor drive inverter, including a circuit mainboard, characterized in that: The circuit main board is equipped with a main CPU (1), a second CPU (2), a third CPU (3) and a fourth CPU (4), an IGBT inverter (5), an analysis and storage module (6), and a system parameter and real-time operation parameter module (7); The main CPU (1) is electrically connected to the second CPU (2), the third CPU (3) and the fourth CPU (4) respectively; The second CPU (2) is electrically connected to a human-machine interface, an LCD and an LED, and a remote offline anti-interference interface; The fourth CPU (4) is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module (7).

2. A novel multi-CPU high-efficiency motor drive inverter according to claim 1, characterized in that: The main CPU (1) is electrically connected to a logic interface device, the logic interface device is electrically connected to an IGBT inverter (5), the IGBT inverter (5) is electrically connected to a power grid anti-interference device, a rectifier filter and a battery pack, the IGBT inverter (5) is electrically connected to a motor, and the motor is electrically connected to an electrical isolation interface and a system parameter and operation real-time parameter module (7).

3. The novel multi-CPU high-efficiency motor drive inverter according to claim 1 is characterized in that: The remote offline anti-interference interface is electrically connected to the PLC and the wireless network port.

4. A novel multi-CPU high-efficiency motor drive inverter according to claim 2, characterized in that: The power grid anti-interference device is electrically connected to a power grid interface.

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