Via hole impedance adjusting method and structure

Abstract

The invention relates to a via hole impedance adjustment method and structure, and the method comprises the steps: defining a basic via hole specification based on the board card information of a printed circuit board, obtaining the layer via hole impedance of each layer in a preset layer range, formulating an adjustment strategy according to the deviation value of the layer via hole impedance and the target via hole impedance, the specification of a basic via hole of the reference layer is adjusted; adjusting variables are set based on the adjusted basic via hole specification of the reference layer, variable parameter scanning is carried out on the adjusting variables, influence factors of all the adjusting variables are determined, and then the layers with the layer via hole impedance unequal to the target via hole impedance in the preset layer range are adjusted based on the influence factors and the deviation values. According to the method and the device, the layer via hole impedance of each layer is enabled to be equal to the target via hole impedance, the via hole impedance is rapidly adjusted through the influence factor and the deviation value, the requirement of rapid development of a system is met, the precision of adjusting the via hole impedance is considered, the dependence on a high-grade PCB is further reduced, and the PCB cost is reduced.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of via impedance adjustment for printed circuit boards, and in particular to a via impedance adjustment method and a via impedance adjustment structure. Background Art

[0002] In recent years, the bandwidth of communication server systems has become larger and larger, and the signal rate on printed circuit boards (PCBs) has become higher and higher. In order to solve the loss problem caused by the increase in signal rate, the PCB board grade has developed to M8 or even M9 level to keep up with the demand for high speed and high bandwidth as much as possible, which has caused a significant increase in PCB costs accordingly; the transmission quality of high-speed signals is directly related to factors such as signal insertion loss, return loss, crosstalk and radiation. The improvement of PCB material grade can reduce signal insertion loss, but there is almost no improvement in other aspects. In order to deal with the cost problem caused by material upgrades, it is necessary to consider improving signal quality from the perspective of improving return loss, thereby reducing dependence on materials and insertion loss and reducing material costs. Vias are an important part that affects return loss in high-speed signal transmission. The impedance continuity of vias is directly related to return loss. When the via impedance is consistent with the link transmission line impedance, the return loss of high-speed signal transmission is low and the signal transmission quality is high. On the contrary, when the via impedance is inconsistent with the link transmission line impedance, the return loss of high-speed signal transmission is high and the signal transmission quality is low.

[0003] The traditional method of adjusting via impedance is based on parameter calculation and simulation. However, parameter calculation can only use simple formulas to calculate low-bandwidth single-ended via losses, but cannot calculate high-bandwidth differential via losses. Simulation must use three-dimensional electromagnetic field modeling, which requires large amounts of calculation and long simulation time. This is not conducive to meeting the needs of rapid system development while taking into account the accuracy of adjusting via impedance, thereby reducing dependence on high-grade PCBs and reducing PCB costs. Summary of the invention

[0004] In view of the above problems, a method for adjusting via impedance and a structure for adjusting via impedance are proposed to overcome the above problems or at least partially solve the above problems.

[0005] According to a first aspect of the present invention, a method for adjusting via impedance is provided, the method comprising:

[0006] Defining basic via specifications based on board information of the printed circuit board;

[0007] Simulating the basic via specification within a preset level range, obtaining the level via impedance of each level within the preset level range, and formulating an adjustment strategy according to the deviation value between the level via impedance and the target via impedance;

[0008] Selecting a reference level within the preset level range, and adjusting the basic via specification of the reference level based on the adjustment strategy;

[0009] Setting adjustment variables based on the basic via specifications of the adjusted reference level, performing variable parameter scanning on the adjustment variables, and determining the influencing factors of each adjustment variable;

[0010] Based on the influencing factor and the deviation value, the layers within the preset layer range where the layer via impedance is not equal to the target via impedance are adjusted so that the layer via impedance of each layer is equal to the target via impedance.

[0011] Furthermore, the basic via specifications include: the drilling diameter of the differential vias and the ground vias in the printed circuit board, the drilling spacing of the differential vias, the anti-pad length, the anti-pad width, and the drilling spacing of the differential vias and the ground vias.

[0012] Further, a first deviation threshold and / or a second deviation threshold are preset based on a deviation value between the layer via impedance and the target via impedance;

[0013] The formulating of the adjustment strategy according to the layer via impedance and the target via impedance includes:

[0014] The adjustment strategy is formulated based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold.

[0015] Further, the adjustment strategy includes at least: coarse adjustment, medium adjustment and fine adjustment;

[0016] The coarse adjustment is to adjust the borehole diameter;

[0017] The medium adjustment is to adjust the width and / or length of the anti-pad;

[0018] The fine adjustment is to adjust the drilling spacing of the differential via holes and / or the drilling spacing of the differential via holes and the ground via holes.

[0019] Further, the adjustment strategy is formulated based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and a preset first deviation threshold and / or a second deviation threshold, including:

[0020] When the board information is an open area via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0021] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment and the fine adjustment in sequence, so that the layer via impedance is equal to the target via impedance;

[0022] When the deviation value between the layer via impedance and the target via impedance is greater than the second deviation threshold and less than the first deviation threshold, the layer is subjected to the medium adjustment; if the adjusted layer via impedance is not equal to the target via impedance, the layer is subjected to the fine adjustment so that the layer via impedance is equal to the target via impedance;

[0023] When the deviation value between the layer via impedance and the target via impedance is less than the second deviation threshold, the layer is finely adjusted to make the layer via impedance equal to the target via impedance.

[0024] Further, the formulating of the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold also includes:

[0025] When the board information is a ball grid array (BGA) via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0026] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment so that the layer via impedance is equal to the target via impedance;

[0027] When the deviation value between the layer via impedance and the target via impedance is less than the first deviation threshold, performing the medium adjustment on the layer so that the layer via impedance is equal to the target via impedance;

[0028] Further, the formulating of the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold also includes:

[0029] When the board information is a connector via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0030] The intermediate adjustment is performed on the layer so that the layer via impedance is equal to the target via impedance.

[0031] Furthermore, the step of selecting a reference level within the preset level range and adjusting the basic via specification of the reference level based on the adjustment strategy includes:

[0032] Selecting an intermediate level within the preset level range as a reference level;

[0033] The basic via specifications of the intermediate layers within the preset layer range are adjusted based on the adjustment strategy.

[0034] Furthermore, the adjusting variables are set based on the basic via specifications of the adjusted reference level, variable parameter scanning is performed on the adjusting variables, and the influencing factors of each adjusting variable are determined, including:

[0035] Based on the adjusted basic via specification, the parameters of the drill hole diameter, the drill hole spacing of the differential via hole, the anti-pad length, the anti-pad width, and the drill hole spacing of the differential via hole and the ground via hole are set as adjustment variables;

[0036] Perform variable parameter scanning on the adjustment variables within a preset range to obtain the corresponding influencing factors of each adjustment variable under different adjustment parameters;

[0037] An influence factor data table is established based on the influence factors corresponding to the adjustment variables under different adjustment parameters.

[0038] Further, the adjusting the layers in the preset layer range where the layer via impedance is not equal to the target via impedance based on the influencing factor and the deviation value so that the layer via impedance of each layer is equal to the target via impedance includes:

[0039] Establishing a target via impedance adjustment table based on the layer via impedance of each layer, the basic via specification, and the target via impedance;

[0040] Determine the parameters of the adjustment variables in the influencing factor data table based on the deviation values ​​at each level in the target via impedance adjustment table;

[0041] The adjustment variables of the layers are adjusted according to the parameters of the adjustment variables so that the layer via impedances of the layers are equal to the target via impedances.

[0042] According to a second aspect of the present invention, a structure for adjusting via impedance is provided, and the structure for adjusting via impedance includes: a differential via and a companion ground hole; wherein the differential via includes two vias, the via and the companion ground hole are composed of drill holes and pads, and there are anti-pads between the via network and the inner layer ground network; the companion ground holes are distributed around the vias to isolate the interference between the differential via and other signals.

[0043] The technical solution provided by the embodiments of the present invention may have the following beneficial effects:

[0044] The embodiment of the present invention discloses a method for adjusting via impedance, which includes: defining basic via specifications based on board information of a printed circuit board and obtaining the layer via impedance of each layer within a preset layer range, formulating an adjustment strategy according to the deviation value between the layer via impedance and the target via impedance, and adjusting the basic via specifications of the reference layer; setting adjustment variables based on the basic via specifications of the adjusted reference layer, performing variable parameter scanning on the adjustment variables, determining the influencing factors of each adjustment variable, and then adjusting the layers within the preset layer range where the layer via impedance is not equal to the target via impedance based on the influencing factors and the deviation values, so that the layer via impedance of each layer is equal to the target via impedance, and quickly adjusting the via impedance through the influencing factors and the deviation values, meeting the needs of rapid system development while taking into account the accuracy of adjusting the via impedance, thereby reducing the dependence on high-grade PCBs and reducing PCB costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application.

[0046] In order to more clearly illustrate the technical solution of the present application, the drawings required for use in the description of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0047] Figure 1 is a flowchart of the steps of a method for adjusting via impedance provided in an embodiment of the present invention;

[0048] Figure 2 is a structural block diagram of a via impedance adjustment structure provided in an embodiment of the present invention;

[0049] Figure 3 It is a schematic diagram of differential via specifications provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0050] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0051] In recent years, the bandwidth of communication server systems has become larger and larger, and the signal rate on printed circuit boards (PCBs) has become higher and higher. In order to solve the loss problem caused by the increase in signal rate, the PCB board grade has developed to M8 or even M9 level to keep up with the demand for high speed and high bandwidth as much as possible, which has caused a significant increase in PCB costs accordingly; the transmission quality of high-speed signals is directly related to factors such as signal insertion loss, return loss, crosstalk and radiation. The improvement of PCB material grade can reduce signal insertion loss, but there is almost no improvement in other aspects. In order to deal with the cost problem caused by material upgrades, it is necessary to consider improving signal quality from the perspective of improving return loss, thereby reducing dependence on materials and insertion loss and reducing material costs. Vias are an important part that affects return loss in high-speed signal transmission. The impedance continuity of vias is directly related to return loss. When the via impedance is consistent with the link transmission line impedance, the return loss of high-speed signal transmission is low and the signal transmission quality is high. On the contrary, when the via impedance is inconsistent with the link transmission line impedance, the return loss of high-speed signal transmission is high and the signal transmission quality is low.

[0052] The traditional method of adjusting via impedance is based on parameter calculation and simulation. However, parameter calculation can only use simple formulas to calculate low-bandwidth single-ended via losses, but cannot calculate high-bandwidth differential via losses. Simulation must use three-dimensional electromagnetic field modeling, which requires large amounts of calculation and long simulation time. This is not conducive to meeting the needs of rapid system development while taking into account the accuracy of adjusting via impedance, thereby reducing dependence on high-grade PCBs and reducing PCB costs.

[0053] In view of the problems existing in the prior art, we propose a method for adjusting via impedance, which includes: defining basic via specifications based on the board information of the printed circuit board; simulating the basic via specifications within a preset level range, obtaining the level via impedance of each level within the preset level range, and formulating an adjustment strategy according to the deviation value between the level via impedance and the target via impedance; selecting a reference level within the preset level range, and adjusting the basic via specifications of the reference level based on the adjustment strategy; setting adjustment variables based on the basic via specifications of the adjusted reference level, scanning the variable parameters of the adjustment variables, and determining the influencing factors of each adjustment variable; adjusting the levels within the preset level range where the level via impedance is not equal to the target via impedance based on the influencing factors and the deviation values, so that the level via impedance of each level is equal to the target via impedance. The embodiment of the present invention defines the basic via specifications and scans the parameters of the basic vias to establish an influencing factor data table and a target via impedance adjustment table, which are used to quickly adjust the via impedance, meet the needs of rapid system development, and take into account the accuracy of adjusting the via impedance, thereby reducing the dependence on high-level PCBs and reducing PCB costs.

[0054] Reference Figure 1 , shows a flowchart of a method for adjusting via impedance provided in an embodiment of the present invention, which may specifically include the following steps:

[0055] Step 101, defining basic via specifications based on the board information of the printed circuit board;

[0056] In an embodiment of the present invention, the board information may include: the high density of the board, i.e., the tightness of the layout space, the dielectric constant of the board material, and the target via impedance to define the basic via specifications. The basic via specifications can be defined based on the high density of the board, i.e., the tightness of the layout space, the dielectric constant of the board material, and the target via impedance.

[0057] In one embodiment of the present invention, the basic via specifications include: the drilling diameter of the differential vias and the ground vias in the printed circuit board, the drilling spacing of the differential vias, the anti-pad length, the anti-pad width, and the drilling spacing of the differential vias and the ground vias.

[0058] Reference Figure 2 , shows a structural block diagram of a via impedance adjustment structure provided in an embodiment of the present invention, which may specifically include:

[0059] The differential via includes two vias, namely via P and via N, which are used to transmit differential signals. Each via consists of a drill hole and a pad. There is an isolation pad, also known as an anti-pad, between the via network and the inner ground network to isolate the via and other networks to prevent short circuits. There are accompanying ground holes around the via to isolate the interference between the differential via and other signals.

[0060] Step 102: Simulate the basic via specification within a preset level range, obtain the level via impedance of each level within the preset level range, and formulate an adjustment strategy according to the deviation value between the level via impedance and the target via impedance;

[0061] By simulating the basic via specifications at different lengths or levels, the layer via impedance Z@Lx can be obtained, where Lx represents different levels, for example: L3 represents the L1-L3 layer via, which is a short hole, and L20 represents the L1-L20 layer via, which is a long hole; the via impedance is defined as Z, for example: Z@L1 can represent the via impedance at the L1 level.

[0062] Based on the deviation value between the layer via impedance Z@Lx and the target impedance Z, an adjustment strategy is formulated to make the layer via impedance Z@Lx of the layer equal to the target impedance Z.

[0063] Step 103, selecting a reference level within the preset level range, and adjusting the basic via specification of the reference level based on the adjustment strategy;

[0064] Step 104, setting adjustment variables based on the adjusted basic via specifications of the reference layer, performing variable parameter scanning on the adjustment variables, and determining the influencing factors of each adjustment variable;

[0065] In an embodiment of the present invention, the impedance of vias at different levels can be analyzed, and a certain level can be selected as a benchmark. The basic via specifications of the level can be adjusted using the above-mentioned adjustment strategy so that the via impedance Z@Lx of the level is equal to the target via impedance Z. The basic via specifications of the level are then updated, and adjustment variables are set based on the adjusted basic via specifications. The adjustment variables are then scanned for variable parameters to determine the influencing factors of each adjustment variable.

[0066] Parameter sweeping is a technique in scientific computing, engineering design, and data analysis that is used to explore the impact of one or more parameter changes on system behavior. By systematically changing the values ​​of input parameters and observing the corresponding output changes, it can help researchers understand the impact of parameters on system performance, find the optimal parameter combination, or discover interactions between parameters.

[0067] Variable parameter sweeps typically involve the following steps: 1) Define parameter range: Determine the parameters to be swept and their range of variation. For example, if you want to study the temperature effect of a physical model, you may need to define a temperature range from 20°C to 100°C; 2) Set step size: Determine the step size of the parameter change, that is, the increment of each parameter change. The size of the step size depends on the required accuracy and the limitations of computing resources; 3) Run simulation or calculation: Run the model or calculation under each parameter setting and record the output results. This may involve running complex simulation programs or numerical calculations multiple times; 4) Analyze results: Collect output data under all parameter settings, perform statistical analysis, visualization, or other types of data processing to identify patterns in the impact of parameter changes on system behavior 5) Optimization or decision-making: Based on the analysis results, it may be necessary to adjust the model, optimize parameter settings, or make data-based decisions.

[0068] Reference Figure 3 , shows a schematic diagram of differential via specifications provided in an embodiment of the present invention, which may specifically include:

[0069] In an embodiment of the present invention, the drilling diameter of the differential via and the ground hole is defined as R, the drilling spacing of the differential via is defined as S, the anti-pad length is defined as L, the anti-pad width is defined as W, and the drilling spacing of the differential via and the ground hole is defined as P.

[0070] In the embodiment of the present invention, it is assumed that the scanning range of the adjustment variable S, the adjustment variable W, the adjustment variable L, and the adjustment variable P is -10mil to +10mil, and the scanning range of the adjustment variable R is + / -2mil, with a step of 2mil. The scanning range can be defined according to actual needs. If the impedance requirements can be met by partial parameters or by reducing the scanning range, a full scan is not required. The impedance value under each parameter is defined as Z (variable-parameter). For example, the impedance after the adjustment variable R is reduced by 2mil is Z (R-2), and the influence factor z (variable-parameter) = ZZ (variable-parameter), where Z is the impedance of the layer via before adjustment of the layer, thereby determining the influence factor of the adjustment variable R, and the method for determining the influence factors of the remaining adjustment variables is similar.

[0071] Step 105: Based on the influencing factor and the deviation value, adjust the layers within the preset layer range where the layer via impedance is not equal to the target via impedance, so that the layer via impedance of each layer is equal to the target via impedance.

[0072] The via impedance of each layer is adjusted by using the influencing factor and the deviation value between the layer via impedance of each layer and the target via impedance. Assuming that the board layer is N, the target via impedance is Z, the basic impedance of each layer is Z@Lx, and the impedance after adjustment of each layer = Z@Lx+z(variable-parameter), so that the layer via impedance after adjustment Z@Lx+z(variable-parameter) of each layer = target via impedance Z.

[0073] The embodiment of the present invention defines the basic via specifications based on the board information of the printed circuit board; simulates the basic via specifications within the preset level range, obtains the level via impedance of each level within the preset level range, and formulates an adjustment strategy according to the deviation value between the level via impedance and the target via impedance; selects a reference level within the preset level range, and adjusts the basic via specifications of the reference level based on the adjustment strategy; sets adjustment variables based on the basic via specifications of the adjusted reference level, performs variable parameter scanning on the adjustment variables, and determines the influence factors of each adjustment variable; adjusts the levels within the preset level range where the level via impedance is not equal to the target via impedance based on the influence factor and the deviation value, so that the level via impedance of each level is equal to the target via impedance. The embodiment of the present invention defines the basic via specifications, and scans the parameters of the basic vias, establishes an influence factor data table and a target via impedance adjustment table, which are used to quickly adjust the via impedance, meet the needs of rapid system development, and take into account the accuracy of adjusting the via impedance, thereby reducing the dependence on high-level PCBs and reducing PCB costs.

[0074] In one embodiment of the present invention, a first deviation threshold and / or a second deviation threshold are preset based on a deviation value between the layer via impedance and the target via impedance;

[0075] The formulating of the adjustment strategy according to the layer via impedance and the target via impedance includes:

[0076] The adjustment strategy is formulated based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold.

[0077] In an embodiment of the present invention, the deviation value between the layer via impedance and the target via impedance is defined as X, the first deviation threshold is defined as X1, and the second deviation threshold is defined as X2, wherein X>X1. When there is a second deviation threshold defined as X2, X1>X>X2. By judging the size relationship among X, X1 and X2, the adjustment strategies are divided into coarse adjustment, medium adjustment, fine adjustment and auxiliary adjustment.

[0078] In one embodiment of the present invention, the adjustment strategy includes at least: coarse adjustment, medium adjustment and fine adjustment;

[0079] The coarse adjustment is to adjust the borehole diameter;

[0080] The medium adjustment is to adjust the width and / or length of the anti-pad;

[0081] The fine adjustment is to adjust the drilling spacing of the differential via holes and / or the drilling spacing of the differential via holes and the ground via holes.

[0082] By setting different thresholds to compare with the deviation values ​​of the layer via impedance and the target via impedance, an adjustment strategy can be formulated more accurately and effectively. Based on this adjustment strategy, the adjustment scheme can be divided into coarse adjustment, medium adjustment, fine adjustment and auxiliary adjustment, etc., so as to meet the needs of rapid system development while taking into account the adjustment accuracy of the layer via impedance.

[0083] In one embodiment of the present invention, the adjustment strategy is formulated based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and a preset first deviation threshold and / or a second deviation threshold, including:

[0084] When the board information is an open area via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0085] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment and the fine adjustment in sequence, so that the layer via impedance is equal to the target via impedance;

[0086] When the deviation value between the layer via impedance and the target via impedance is greater than the second deviation threshold and less than the first deviation threshold, the layer is subjected to the medium adjustment; if the adjusted layer via impedance is not equal to the target via impedance, the layer is subjected to the fine adjustment so that the layer via impedance is equal to the target via impedance;

[0087] When the deviation value between the layer via impedance and the target via impedance is less than the second deviation threshold, the layer is finely adjusted to make the layer via impedance equal to the target via impedance.

[0088] In actual applications, the development area vias: the adjustment variable drilling diameter R = 5, the adjustment variable differential via drilling spacing S = 35, the adjustment variable differential via and ground via drilling spacing P = 35, the adjustment variable anti-pad width W = 35, the adjustment variable anti-pad length L = S + W / 2 = 52.5, all the adjustment variable parameters can be adjusted. Therefore, when the board information is open area vias, the adjustment strategy is:

[0089] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, that is, when X>X1, the drilling diameter R of the layer is adjusted first for coarse adjustment. If the coarse adjustment does not meet the layer via impedance requirement, the anti-pad width W=35 and / or the anti-pad length L of the layer are adjusted for medium adjustment. If the layer via impedance requirement is still not met after the medium adjustment, the drilling spacing S of the differential vias of the layer and / or the drilling spacing P of the differential vias and the accompanying ground holes are finely adjusted to make the layer via impedance of the layer equal to the target via impedance.

[0090] When the deviation value between the layer via impedance and the target via impedance is greater than the second deviation threshold and less than the first deviation threshold, that is, X1>X>X2, the anti-pad width W=35 and / or the anti-pad length L of the layer are directly adjusted for medium adjustment. If the layer via impedance requirement is still not met after the medium adjustment, the drilling spacing S of the differential vias of the layer and / or the drilling spacing P of the differential vias and the accompanying ground vias are finely adjusted to make the layer via impedance of the layer equal to the target via impedance;

[0091] When the deviation value between the layer via impedance and the target via impedance is less than the second deviation threshold, that is, X2>X, the drilling spacing S of the differential vias at the layer and / or the drilling spacing P of the differential vias and the accompanying ground vias are directly fine-tuned to make the layer via impedance equal to the target via impedance.

[0092] Corresponding adjustment strategies are formulated based on the characteristics of the vias in the development area. The impedance of the vias at this level is adjusted based on the corresponding adjustment strategies. This can simplify the adjustment process when adjusting the impedance of the vias in the development area, so that parameter selection has methodological support and reduces the problem of using vias arbitrarily and without rules during the development process.

[0093] In one embodiment of the present invention, the step of formulating the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and a preset first deviation threshold and / or a second deviation threshold further includes:

[0094] When the board information is a ball grid array (BGA) via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0095] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment so that the layer via impedance is equal to the target via impedance;

[0096] When the deviation value between the layer via impedance and the target via impedance is less than the first deviation threshold, the intermediate adjustment is performed on the layer to make the layer via impedance equal to the target via impedance.

[0097] In practical applications, the pin pitch of the via area of ​​the ball grid array (BGA) is constant, so the adjustment variable S and the adjustment variable P cannot be adjusted, and only the adjustment variable R, the adjustment variable L and the adjustment variable W can be adjusted.

[0098] Therefore, when the board information is a ball grid array (BGA) via, the drilling spacing S of the differential via, the drilling spacing P of the differential via and the ground via, and the number of ground vias N are determined by the chip pin arrangement and spacing. At this time, the adjustment variables S, P, and N are not adjustable. The impedance of the layer via can only be adjusted by defining the drilling diameter of the differential via and the ground via as R, the anti-pad length as L, and the anti-pad width as W. The adjustment strategy is:

[0099] When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, that is, when X>X1, the drilling diameter R of the layer is adjusted first for coarse adjustment. If the coarse adjustment does not meet the layer via impedance requirement, the anti-pad width W=35 and / or the anti-pad length L of the layer are adjusted for medium adjustment, so that the layer via impedance of the layer is equal to the target via impedance;

[0100] When the deviation between the layer via impedance and the target via impedance is less than the second deviation threshold, that is, X1>X, the anti-pad width W=35 and / or the anti-pad length L of the layer are directly adjusted for medium adjustment to make the layer via impedance equal to the target via impedance.

[0101] Corresponding adjustment strategies are formulated based on the characteristics of ball grid array (BGA) vias. The impedance of the vias at this level is adjusted based on the corresponding adjustment strategies. This can simplify the adjustment process when adjusting the impedance of the ball grid array (BGA) vias, make parameter selection supported by methodology, and reduce the problem of using holes arbitrarily and without rules during the development process.

[0102] In one embodiment of the present invention, the step of formulating the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and a preset first deviation threshold and / or a second deviation threshold further includes:

[0103] When the board information is a connector via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes:

[0104] The intermediate adjustment is performed on the layer so that the layer via impedance is equal to the target via impedance.

[0105] In practical applications, since the pin hole diameter and pin pitch of the connector via area are fixed, the adjustment variables R, S, and P cannot be adjusted, and only the adjustment variables W and L can be adjusted.

[0106] Therefore, when the board information is a connector via, since the pin hole diameter and pin pitch of the connector via area are constant, the adjustment variables R, S, and P cannot be adjusted. Only the adjustment variables W and L can be adjusted. The adjustment strategy is: when there is a deviation between the layer via impedance and the target via impedance, the anti-pad width W=35 and / or the anti-pad length L are used for medium adjustment to make the layer via impedance equal to the target via impedance.

[0107] In an embodiment of the present invention, basic via specifications can be defined according to the high density of the board, that is, the tightness of the layout space, the dielectric constant of the board material, and the target via impedance, and the unit is mil. For example, a typical high-speed high-density board at least includes: development area vias, ball grid array BGA (Ball Grid Array) vias, and connector vias. Different adjustment strategies are used according to the type of vias to adjust the via impedance at that level. The adjustment process is simple, and the parameter selection is supported by methodology, which reduces the problem of using holes arbitrarily and without rules during the development process.

[0108] In an embodiment of the present invention, selecting a reference level within the preset level range and adjusting the basic via specification of the reference level based on the adjustment strategy include:

[0109] Selecting an intermediate level within the preset level range as a reference level;

[0110] The basic via specifications of the intermediate layers within the preset layer range are adjusted based on the adjustment strategy.

[0111] In order to achieve a moderate adjustment amount when adjusting the via impedance of the long hole and short hole layers to the target via impedance later, the middle layer within the preset layer range can be selected as the reference layer.

[0112] In an embodiment of the present invention, an intermediate layer within a preset layer range is selected as a reference layer, and the layer via impedance of the intermediate layer is defined as Z@Lmid. By determining a deviation value X between Z@Lmid and a target via impedance Z, and based on a magnitude relationship between the deviation value X and a first deviation threshold value defined as X1 and / or a second deviation threshold value defined as X2, an adjustment variable in the basic via specification is adjusted so that the layer via impedance Z@Lmid of the intermediate layer is equal to the target via impedance Z, and then the parameters of the adjusted adjustment variable are defined as updated basic via specifications.

[0113] In one embodiment of the present invention, the adjusting variables are set based on the basic via specifications of the adjusted reference level, variable parameter scanning is performed on the adjusting variables, and the influencing factors of each adjusting variable are determined, including:

[0114] Based on the adjusted basic via specification, the parameters of the drill hole diameter, the drill hole spacing of the differential via hole, the anti-pad length, the anti-pad width, and the drill hole spacing of the differential via hole and the ground via hole are set as adjustment variables;

[0115] Perform variable parameter scanning on the adjustment variables within a preset range to obtain the corresponding influencing factors of each adjustment variable under different adjustment parameters;

[0116] An influence factor data table is established based on the influence factors corresponding to the adjustment variables under different adjustment parameters.

[0117] In an embodiment of the present invention, the drilling diameter of the differential via and the companion ground hole is defined as R, the drilling spacing of the differential via is defined as S, the anti-pad length is defined as L, the anti-pad width is defined as W, and the drilling spacing of the differential via and the companion ground hole is defined as P, which are set as adjustment variables. The parameters of the adjustment variables adjusted based on the reference level within the preset level range are defined as updated basic via specifications, and the adjustment variables S, adjustment variables W, adjustment variables L, and adjustment variables P can be obtained.

[0118] The scanning range can be defined according to actual needs. For example, the scanning range of the adjustment variable S, adjustment variable W, adjustment variable L, and adjustment variable P is -10mil to +10mil, and the scanning range of the adjustment variable R is + / -2mil, with a step of 2mil. If some parameters or a narrowed scanning range can meet the impedance requirements, a full scan is not required.

[0119] The impedance value under different parameters of each adjustment variable is defined as Z (variable-parameter). For example, for the adjustment variable R, the impedance after reducing 2mil is Z (R-2), and the influencing factor z (variable-parameter) = ZZ (variable-parameter), wherein Z is the impedance of the layer via before adjustment of the layer, so as to determine the influencing factor of the adjustment variable R under different parameters. The influencing factor z (variable-parameter) and the influencing factor determination method of the other adjustment variables are similar. An influencing factor data table is established based on the influencing factors of all adjustment variables under different parameters, as shown in Table 1 below. In the embodiment of the present invention, only the influencing factors of the adjustment variables R and the adjustment variable S are listed by way of example, and the same is true for the other columns.

[0120] By establishing an influence factor data table based on the influence factors of all adjustment variables under different parameters, the influence factor data table can be used to form a specific method for adjusting the via impedance of various types of vias, so that the parameter selection of the adjustment variables is supported by methodology, reducing the problems of arbitrary and disorderly use of vias in the development process, and then through a small number of sample simulations and scans of the basic via specification model, the impedance of vias with different hole lengths can be inferred, reducing the full simulation time.

[0121] Impact Factor Data Table

[0122]

[0123] Table 1

[0124] In an embodiment of the present invention, the adjusting, based on the influencing factor and the deviation value, the layers in the preset layer range where the layer via impedance is not equal to the target via impedance so that the layer via impedance of each layer is equal to the target via impedance includes:

[0125] Establishing a target via impedance adjustment table based on the layer via impedance of each layer, the basic via specification, and the target via impedance;

[0126] Determine the parameters of the adjustment variables in the influencing factor data table based on the deviation values ​​at each level in the target via impedance adjustment table;

[0127] The adjustment variables of the layers are adjusted according to the parameters of the adjustment variables so that the layer via impedances of the layers are equal to the target via impedances.

[0128] After obtaining the influencing factors of each adjustment variable under different parameters, the influencing factors and the above adjustment strategy can be used to adjust the layer via impedance of each layer.

[0129] In the embodiment of the present invention, it is assumed that the board level is N, and after adjusting the adjustment variables in the basic via specifications of the middle level Lmid so that the target via impedance is Z = the via impedance Z@Lmid of the middle level, the basic via impedance of each level is Z@Lx, and the impedance of each level after adjustment = Z@Lx + z (variable-parameter) = target via impedance Z. It is defined that the via below Lmid is a long hole, and the via above Lmid is a short hole. The higher the material grade, the smaller the dielectric constant, and the smaller the parasitic capacitance, the higher the impedance as the hole length increases; the lower the material grade, the larger the dielectric constant, and the larger the parasitic capacitance, and the lower the impedance as the hole length increases. Substitute the values ​​in the above-mentioned influencing factor data table into the following Table 2 so that the via impedance of each layer after adjustment is equal to the target via impedance.

[0130] By using the influencing factor data table to adjust the impedance of various vias and forming a target via impedance adjustment table, the via impedance adjustment method is made more efficient and convenient, which meets the needs of rapid system development while also taking into account the accuracy of impedance adjustment.

[0131] Target via impedance adjustment table

[0132]

[0133] Table 2

[0134] In an embodiment of the present invention, a method for adjusting via impedance is proposed, and the method includes: defining basic via specifications based on the board information of a printed circuit board; simulating the basic via specifications within a preset level range, obtaining the level via impedance of each level within the preset level range, and formulating an adjustment strategy according to the deviation value between the level via impedance and the target via impedance; selecting a reference level within the preset level range, and adjusting the basic via specifications of the reference level based on the adjustment strategy; setting adjustment variables based on the basic via specifications of the adjusted reference level, scanning the variable parameters of the adjustment variables, and determining the influence factors of each adjustment variable; adjusting the level within the preset level range where the level via impedance is not equal to the target via impedance based on the influence factor and the deviation value, so that the level via impedance of each level is equal to the target via impedance. The embodiment of the present invention defines the basic via specifications, and scans the parameters of the basic vias, establishes an influence factor data table, and a target via impedance adjustment table, which is used to quickly adjust the via impedance, meet the needs of rapid system development, and take into account the accuracy of adjusting the via impedance, thereby reducing the dependence on high-level PCBs and reducing PCB costs.

[0135] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0136] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for adjusting via impedance, characterized in that: Applied to a printed circuit board, the method comprises: Defining basic via specifications based on board information of the printed circuit board; Simulating the basic via specification within a preset level range, obtaining the level via impedance of each level within the preset level range, and formulating an adjustment strategy according to the deviation value between the level via impedance and the target via impedance; Selecting a reference level within the preset level range, and adjusting the basic via specification of the reference level based on the adjustment strategy; Setting adjustment variables based on the basic via specifications of the adjusted reference level, performing variable parameter scanning on the adjustment variables, and determining the influencing factors of each adjustment variable; Based on the influencing factor and the deviation value, the layers within the preset layer range where the layer via impedance is not equal to the target via impedance are adjusted so that the layer via impedance of each layer is equal to the target via impedance.

2. The method according to claim 1, characterized in that The basic via specifications include: the drilling diameter of the differential via and the ground via in the printed circuit board, the drilling spacing of the differential via, the anti-pad length, the anti-pad width, and the drilling spacing of the differential via and the ground via.

3. The method according to claim 2, characterized in that Presetting a first deviation threshold and / or a second deviation threshold based on a deviation value between the layer via impedance and the target via impedance; The formulating of the adjustment strategy according to the layer via impedance and the target via impedance includes: The adjustment strategy is formulated based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold.

4. The method according to claim 3, characterized in that The adjustment strategy at least includes: coarse adjustment, medium adjustment and fine adjustment; The coarse adjustment is to adjust the borehole diameter; The medium adjustment is to adjust the width and / or length of the anti-pad; The fine adjustment is to adjust the drilling spacing of the differential via holes and / or the drilling spacing of the differential via holes and the ground via holes.

5. The method according to claim 4, characterized in that The formulating the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold includes: When the board information is an open area via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes: When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment and the fine adjustment in sequence, so that the layer via impedance is equal to the target via impedance; When the deviation value between the layer via impedance and the target via impedance is greater than the second deviation threshold and less than the first deviation threshold, the layer is subjected to the medium adjustment; if the adjusted layer via impedance is not equal to the target via impedance, the layer is subjected to the fine adjustment so that the layer via impedance is equal to the target via impedance; When the deviation value between the layer via impedance and the target via impedance is less than the second deviation threshold, the layer is finely adjusted to make the layer via impedance equal to the target via impedance.

6. The method according to claim 4, characterized in that The step of formulating the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold further includes: When the board information is a ball grid array (BGA) via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes: When the deviation value between the layer via impedance and the target via impedance is greater than the first deviation threshold, the layer is subjected to the coarse adjustment, and if the layer via impedance and the target via impedance after adjustment are not equal, the layer is subjected to the medium adjustment so that the layer via impedance is equal to the target via impedance; When the deviation value between the layer via impedance and the target via impedance is less than the first deviation threshold, the intermediate adjustment is performed on the layer to make the layer via impedance equal to the target via impedance.

7. The method according to claim 4, characterized in that The step of formulating the adjustment strategy based on the comparison relationship between the deviation value of the layer via impedance and the target via impedance and the preset first deviation threshold and / or second deviation threshold further includes: When the board information is a connector via, formulating an adjustment strategy according to the layer via impedance and the target via impedance includes: The intermediate adjustment is performed on the layer so that the layer via impedance is equal to the target via impedance.

8. The method according to claim 1, characterized in that The selecting a reference level within the preset level range, and adjusting the basic via specification of the reference level based on the adjustment strategy, comprises: Selecting an intermediate level within the preset level range as a reference level; The basic via specifications of the intermediate layers within the preset layer range are adjusted based on the adjustment strategy.

9. The method according to claim 2, characterized in that: The step of setting adjustment variables based on the basic via specifications of the adjusted reference level, performing variable parameter scanning on the adjustment variables, and determining the influencing factors of each adjustment variable includes: Based on the adjusted basic via specification, the parameters of the drill hole diameter, the drill hole spacing of the differential via hole, the anti-pad length, the anti-pad width, and the drill hole spacing of the differential via hole and the ground via hole are set as adjustment variables; Perform variable parameter scanning on the adjustment variables within a preset range to obtain the corresponding influencing factors of each adjustment variable under different adjustment parameters; An influence factor data table is established based on the influence factors corresponding to the adjustment variables under different adjustment parameters.

10. The method according to claim 9, characterized in that The adjusting, based on the influencing factor and the deviation value, the layers within the preset layer range where the layer via impedance is not equal to the target via impedance, so that the layer via impedance of each layer is equal to the target via impedance, comprises: Establishing a target via impedance adjustment table based on the layer via impedance of each layer, the basic via specification, and the target via impedance; Determine the parameters of the adjustment variables in the influencing factor data table based on the deviation values ​​at each level in the target via impedance adjustment table; The adjustment variables of the layers are adjusted according to the parameters of the adjustment variables so that the layer via impedances of the layers are equal to the target via impedances.

11. A structure for adjusting via impedance, characterized in that: Used to implement the method according to any one of claims 1 to 10; The via impedance adjustment structure includes: a differential via and a ground via; wherein the differential via includes two vias, the via and the ground via are composed of drill holes and pads, and there is an anti-pad between the via network and the inner layer ground network; the ground vias are distributed around the vias to isolate the interference between the differential via and other signals.

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