Manufacturing method of wireless bonding piezoelectric TOF sensor

By etching and covering the silicon wafer, growing the molybdenum layer and piezoelectric layer on the silicon substrate, using gold-gold bonding to connect the PMUT and ASIC, the problem of sensor reliability and volume reduction is solved, achieving higher temperature tolerance and performance promote.

CN119143075APending Publication Date: 2024-12-17CETC CHIPS TECH GRP CO LTD
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Patent Information

Application Number
CN202411290840.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-14
Publication Date
2024-12-17

AI Technical Summary

Technical Problem

The existing piezoelectric TOF sensors have poor reliability in tin sealing and wire bonding, and the parasitic parameters caused by wire bonding affect performance and cannot further reduce the volume.

Method used

The silicon-silicon bonding method is used to etch the circular small holes and cavity on the silicon substrate, cover the silicon wafer, and grow the molybdenum layer and piezoelectric layer on it. The PMUT and ASIC are connected through gold-gold bonding, and wire bonding is eliminated to form Wireless bonded piezoelectric TOF sensor.

Benefits of technology

Improves the temperature tolerance of the sensor, eliminates the parasitic parameters brought by wire bonding, reduces the space size of the sensor, and enhances reliability and performance.

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Abstract

The invention belongs to the field of sensors, and particularly relates to a manufacturing method of a wireless bonding piezoelectric TOF sensor, which comprises the following steps: etching a circular small hole in the bottom of a silicon substrate; a circular cavity is etched on the front surface of the silicon substrate with the small circular hole, and the circle center of the circular cavity is coaxial with the circle center of the small circular hole; a silicon wafer is bonded and covered behind the circular cavity in a silicon-silicon bonding mode; carrying out thinning and polishing treatment on the newly bonded silicon wafer; sequentially growing a first molybdenum layer, a piezoelectric layer and a second molybdenum layer on the thinned and polished silicon wafer; a pattern is arranged on the silicon wafer; leading out an upper electrode and a lower electrode of the piezoelectric layer on the setting pattern, and growing a gold ball on the lower electrode; building an ASIC circuit, and connecting the ASIC circuit with the upper electrode and the lower electrode of the piezoelectric layer through gold balls to form a wireless bonding piezoelectric TOF sensor; the invention solves the problem of poor reliability of the existing tin sealing technology and the like.
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Description

Technical Field

[0001] The invention belongs to the field of sensors, and in particular relates to a method for manufacturing a wireless bonded piezoelectric TOF sensor. Background Art

[0002] Traditional piezoelectric TOF sensors, such as reversing radars, use piezoelectric block ultrasonic transducers, which are large in size and consume a lot of power. With the development of semiconductor technology, TOF sensors made of piezoelectric micromechanical ultrasonic transducers (PMUT) have appeared on the market. The PMUT is prepared using MEMS technology, which is small in size, low in power consumption, good in consistency, and low in cost. In recent years, TOF sensor chips that package PMUT and ASIC chips together have also appeared, further reducing the size and cost of the sensor.

[0003] However, even the most advanced piezoelectric TOF sensors today use tin sealing, wire bonding and other methods to simply combine PMUT and ASIC, and do not truly achieve wire-free bonding and integrated packaging. The problems this brings are: poor tin sealing reliability, and sensor disintegration due to excessively high temperatures or long welding times during sensor welding; parasitic parameters caused by wire bonding will affect the transceiver performance of the ultrasonic transducer; and wire bonding will take up a relatively large space, making it impossible to further reduce the size of the TOF sensor chip, and therefore unable to reflect more volume advantages (compared to TOF sensors based on other principles such as optics). Summary of the invention

[0004] In order to solve the problems existing in the above prior art, the present invention proposes a method for manufacturing a wireless bonded piezoelectric TOF sensor, which comprises:

[0005] S1, etching a small circular hole at the bottom of the silicon substrate;

[0006] S2, etching a circular cavity on the front side of the silicon substrate having the circular small hole, wherein the center of the circular cavity is coaxial with the center of the circular small hole;

[0007] S3, using silicon-silicon bonding to bond a silicon wafer behind the circular cavity;

[0008] S4, thinning and polishing the newly bonded silicon wafer;

[0009] S5, sequentially growing a first molybdenum layer, a piezoelectric layer, and a second molybdenum layer on the thinned and polished silicon wafer;

[0010] S6, setting patterns on the silicon wafer of the generated first molybdenum layer, the piezoelectric layer and the second molybdenum layer;

[0011] S7, drawing out the upper electrode and the lower electrode of the piezoelectric layer on the set pattern, and growing a gold ball on the lower electrode;

[0012] S8. Build an ASIC circuit, and connect the ASIC circuit to the upper electrode and the lower electrode of the piezoelectric layer through the gold ball to form a wireless bonded piezoelectric TOF sensor.

[0013] Beneficial effects of the present invention:

[0014] The present invention adopts gold-gold bonding connection between PMUT and AISC, and the withstanding temperature can reach above 350°C, which solves the problems of poor reliability of existing tin sealing technology and too high temperature or too long welding time during sensor welding, which will cause the sensor to disintegrate and fail; the entire package of the present invention does not adopt wire bonding process, eliminating the parasitic parameters caused by wire bonding; the spatial size of the sensor chip of the present invention is further reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is the overall process flow chart of the present invention;

[0016] Figure 2 is a cross-sectional view of a PMUT in a TOF sensor of the present invention;

[0017] Figure 3 is a cross-sectional view of the overall structure of the TOF sensor of the present invention;

[0018] Figure 4 This is the electrical schematic diagram of the TOF sensor of the present invention. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] A method for manufacturing a wireless bonded piezoelectric TOF sensor, such as Figure 1 As shown, including:

[0021] S1, etching a circular hole at the bottom of the silicon substrate, the circular hole serving as a vent hole;

[0022] S2, etching a circular cavity on the front side of the silicon substrate with the circular small hole, and the center of the circular cavity is coaxial with the center of the circular small hole; the circular cavity serves as the back cavity of the bending vibration of the PMUT;

[0023] S3, using silicon-silicon bonding to bond a silicon wafer behind the circular cavity as a vibration structure substrate;

[0024] S4, thinning and polishing the newly bonded silicon wafer;

[0025] S5, sequentially growing a first molybdenum layer, a piezoelectric layer, and a second molybdenum layer on the thinned and polished silicon wafer, wherein the molybdenum layer is used to improve the electromechanical coupling coefficient of the device and conduct electricity simultaneously; the piezoelectric layer is the main functional layer, which is used to complete the conversion of mechanical energy into electrical energy;

[0026] S6, setting patterns on the silicon wafer of the generated first molybdenum layer, the piezoelectric layer and the second molybdenum layer to improve the chip transmission and receiving performance and simultaneously reduce mechanical stress;

[0027] S7, drawing out the upper electrode and the lower electrode of the piezoelectric layer on the set pattern, and growing a gold ball on the lower electrode;

[0028] S8. Build an ASIC circuit, and connect the ASIC circuit to the upper electrode and the lower electrode of the piezoelectric layer through the gold ball to form a wireless bonded piezoelectric TOF sensor.

[0029] In the above process, the back cavity size is directly related to the operating frequency and the transceiver performance, and simulation design is required. Generally, the back cavity diameter is between 1.0mm-1.5mm and the depth is 0.3-0.5mm. In addition, the piezoelectric layer of the PMUT and the entire package together form a resonant structure. The cavity size (height, diameter) between the ASIC and the PMUT is directly related to the resonant state, which will ultimately affect the performance of the TOF sensor.

[0030] In this embodiment, the piezoelectric layer of the PMUT includes two structures, specifically: Figure 2 As shown, they are BB type or AA type respectively; the BB type is that the piezoelectric layer and the second Mo layer are sequentially arranged in a partial area of ​​the first Mo layer; the AA type is that the piezoelectric layer and the second Mo layer are partially covered on the first Mo layer on the left, and the piezoelectric layer and the second Mo layer are completely covered on the right.

[0031] In this embodiment, a circular hole (vent hole) is etched at the bottom of the silicon substrate. The silicon substrate is a high-resistance silicon wafer with a thickness of 300-600 μm. The diameter of the circular hole is 40-100 μm and the depth is 100-200 μm.

[0032] A circular cavity (back cavity) is etched on the front side of the silicon wafer. The centers of the circular holes and the circular cavity are coaxial. The diameter of the back cavity is 500 to 1500 μm.

[0033] Silicon-silicon bonding is adopted to bond and cover a silicon wafer on the back cavity side. The silicon wafer is made of high-resistance silicon with a thickness of 10 to 20 μm.

[0034] The newly bonded silicon wafer is polished and thinned to a thickness of 5 to 10 μm.

[0035] A molybdenum layer (thickness 200-400nm), a piezoelectric layer (ALN, PZT, AlScN, KNN, etc.) (thickness 1-3μm), and a molybdenum layer (200-400nm) are grown (sputtered, spin-coated) on the thinned silicon substrate in sequence.

[0036] In this embodiment, the molybdenum layer, the piezoelectric layer, and the molybdenum layer are patterned by photolithography and etching.

[0037] A circular hole is etched on a silicon wafer having a first molybdenum layer, a piezoelectric layer and a second molybdenum layer, and the hole is communicated with a circular cavity of the silicon substrate.

[0038] In this embodiment, if Figure 3 As shown, the upper and lower electrodes (molybdenum) of the piezoelectric layer are led out, and gold balls are grown on the molybdenum electrodes; the ASIC circuit and the PMUT are flip-chip bonded together using the gold balls.

[0039] The process of growing gold balls on molybdenum electrodes is to form the balls by high voltage sintering at 1600°C on the gold pads through ultrasonic hot pressing.

[0040] In this embodiment, the ASIC circuit is an Application Specific Integrated Circuit, which is an integrated circuit designed specifically for a specific application. Compared with general-purpose integrated circuits (such as CPU, GPU, etc.), ASIC has higher performance and lower power consumption, and can meet the unique needs of specific application scenarios.

[0041] The characteristics of ASIC circuit are:

[0042] Customized design: The design of ASIC circuits is completely based on the needs of specific applications, which can achieve a high degree of functional integration and optimization;

[0043] High performance: Since they are optimized for specific applications, ASIC circuits often show higher performance when processing specific tasks;

[0044] Low power consumption: Customized design enables ASIC circuits to have more precise power consumption control, which helps to reduce the energy consumption of the overall system;

[0045] High reliability: ASIC circuits undergo strict quality control and testing during the design and manufacturing process and have high reliability;

[0046] Cost-effectiveness: Although the design and production costs of ASIC circuits are high, their unit costs can be significantly reduced when produced in large quantities, making them more cost-effective.

[0047] In this embodiment, if Figure 4As shown, the sensor includes a piezoelectric micromechanical ultrasonic transducer PMUT and an ASIC circuit, the ASIC circuit includes an analog-to-digital converter ADC, a digital signal processing circuit DSP, a controller chip Controller, a memory Memory, a bidirectional two-wire synchronous serial bus I2C, a buffer and two switches TX and RX; one end of the piezoelectric micromechanical ultrasonic transducer PMUT is grounded, and the other end is respectively connected to one end of the switch TX and the switch RX; the other end of RX is connected to the input end of the analog-to-digital converter ADC, the output end of the analog-to-digital converter ADC is connected to the input end of the digital signal processing circuit DSP, and the output end of the digital signal processing circuit DSP is connected to the input end of the controller chip Controller; the output end of the controller chip Controller is connected to the input end of the buffer, and the output end of the buffer is connected to the other end of the switch TX; the control end of the controller chip Controller is connected to the memory Memory, for obtaining the signal stored in the memory Memory; the bias end of the controller chip Controller is connected to the bidirectional two-wire synchronous serial bus I2C.

[0048] The analog-to-digital converter ADC is a circuit that converts analog signals (continuously changing electrical signals such as temperature, pressure, sound, etc.) into digital signals (discrete signals composed of binary numbers 0 and 1); its circuit includes sensors, signal conditioning circuits, sample / hold circuits, quantizers, and encoders; the sensors are used to convert physical quantities (such as temperature, pressure, etc.) into electrical signals (such as voltage, current, etc.); the signal conditioning circuits are used to amplify, filter, and process the electrical signals output by the sensors to meet the input requirements of the ADC circuits; the sample / hold circuits are used to sample the analog signals at a specific time point and keep the sampled values ​​unchanged until the analog-to-digital conversion is completed; the quantizers are used to convert the sampled analog signals into the closest discrete level values; the encoders are used to convert the quantized discrete level values ​​into binary codes.

[0049] The principle of analog-to-digital converter (ADC) is to sample the analog signal at a specific time point to obtain a series of discrete analog signal values. The sampling frequency should satisfy the Nyquist sampling theorem, that is, the sampling frequency should be greater than or equal to twice the highest frequency of the analog signal; the sampled analog signal value is held in the sample / hold circuit for subsequent analog-to-digital conversion; the sampled and held analog signal value is converted to the closest discrete level value. Quantization error will occur during the quantization process, which is inevitable for the ADC circuit; the quantized discrete level value is converted into binary code to complete the analog-to-digital conversion.

[0050] In this embodiment, the digital signal processing circuit is a circuit system specifically used to process digital signals. The DSP circuit processes, transforms, filters, detects, estimates, enhances, compresses, and identifies the input digital signal by executing various digital signal processing algorithms to obtain the required signal form. Its circuit structure includes an input interface, a DSP processor, a memory, and an output interface; the input interface receives an external analog signal and converts it into a digital signal; the DSP processor is responsible for executing various digital signal processing algorithms; the memory is used to store programs and data; and the output interface converts the processed digital signal into an analog signal or other forms of output signal.

[0051] In this embodiment, the working principle of the memory circuit can be summarized as charging and discharging the charge to the storage unit through the control circuit, so as to realize the storage and reading of data. Specifically, when data needs to be written, the control circuit sends a control signal to the specified storage unit to charge or discharge the capacitor to represent different data bits (0 or 1). When data needs to be read, the control circuit detects the voltage state of the storage unit and determines the stored data bit according to the voltage level.

[0052] The above embodiments further illustrate the purpose, technical solutions and advantages of the present invention in detail. It should be understood that the above embodiments are only preferred implementation modes of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made to the present invention within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for manufacturing a wireless bonded piezoelectric TOF sensor, characterized in that: include: S1, etching a small circular hole at the bottom of the silicon substrate; S2, etching a circular cavity on the front side of the silicon substrate having the circular small hole, wherein the center of the circular cavity is coaxial with the center of the circular small hole; S3, using silicon-silicon bonding to bond a silicon wafer behind the circular cavity; S4, thinning and polishing the newly bonded silicon wafer; S5, sequentially growing a first molybdenum layer, a piezoelectric layer, and a second molybdenum layer on the thinned and polished silicon wafer; S6, setting patterns on the silicon wafer of the generated first molybdenum layer, the piezoelectric layer and the second molybdenum layer; S7, drawing out the upper electrode and the lower electrode of the piezoelectric layer on the set pattern, and growing a gold ball on the lower electrode; S8. Build an ASIC circuit, and connect the ASIC circuit to the upper electrode and the lower electrode of the piezoelectric layer through the gold ball to form a wireless bonded piezoelectric TOF sensor.

2. The method for manufacturing a wireless bonded piezoelectric TOF sensor according to claim 1, characterized in that: The silicon substrate adopts high-resistance silicon wafer with a thickness of 300 to 600 μm.

3. The method for manufacturing a wireless bonded piezoelectric TOF sensor according to claim 2, characterized in that: The diameter of the circular hole etched in the silicon substrate is 40 to 100 μm and the depth is 100 to 200 μm.

4. The method for manufacturing a wireless bonded piezoelectric TOF sensor according to claim 1, characterized in that: The diameter of the circular cavity is 500 to 1500 μm.

5. The method for manufacturing a wireless bonded piezoelectric TOF sensor according to claim 1, characterized in that: The bonded silicon wafer is a high-resistance silicon wafer, and the thickness of the silicon wafer after thinning and polishing is 5 to 10 μm.

6. The method for manufacturing a wireless bonded piezoelectric TOF sensor according to claim 1, characterized in that: The thickness of the first molybdenum layer is 200-400 nm, the thickness of the piezoelectric layer is 1-3 μm, and the thickness of the second layer is 200-400 nm.