High-speed terahertz signal position super-resolution acquisition method and system

By using the synchronous counting technology of clock sources and counters in terahertz devices, the position measurement accuracy of the rotation delay line is improved, and the problem of insufficient encoder sensor accuracy is solved, and higher measurement accuracy and lower cost is achieved.

CN119146894AActive Publication Date: 2024-12-17ZHONGSHAN INST OF CHANGCHUN UNIV OF SCI & TECH
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Patent Information

Application Number
CN202411298340.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-18
Publication Date
2024-12-17
Estimated Expiration
2044-09-18

AI Technical Summary

Technical Problem

The accuracy of the encoder sensor limits the performance improvement of terahertz devices and cannot effectively improve the position measurement accuracy of the rotation delay line.

Method used

The clock generator is driven by the clock source to generate three clock signals with the same frequency and phase synchronized phase. Combined with the pulse encoder, the same-direction counter and the digital comparator, the synchronous counting of the pulse counter and the same-direction counter are realized, and the acquisition accuracy of the terahertz signal is improved. .

Benefits of technology

It effectively improves the position measurement accuracy and phase performance of terahertz equipment, reduces the cost requirements of the encoder, breaks through the performance limits of the encoder sensor, and improves the ultimate ability of the equipment.

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Abstract

The invention discloses a high-speed terahertz signal position super-resolution acquisition method and system, and belongs to the technical field of instruments and meters, and the method can effectively improve the position measurement precision measured by a terahertz rotation delay line, and finally improves the phase performance of the relative position of a terahertz analog signal. On the basis of improving the position phase of the terahertz signal, more nondestructive detection and intelligent analysis become possible, and a new and reliable technical means is provided for the manufacturing industry, agriculture and the like; and the capability of the encoder in the aspect of position measurement can be greatly improved, and higher effective resolution can be obtained, so that the encoder with lower resolution can be used for realizing measurement with better precision, expensive encoder equipment with higher specification is not needed, and the cost is reduced.
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Description

Technical Field

[0001] The present invention belongs to the technical field of instruments and meters, and in particular relates to a high-speed terahertz signal position super-resolution acquisition method and system. Background Art

[0002] The rotating delay line is a key component in the terahertz device, and its position measurement accuracy directly affects the measurement performance of the terahertz device; generally, the position of the rotating delay line can be obtained using an encoder sensor.

[0003] However, due to factors such as encoder sensor technology solutions, process capabilities, and costs, the accuracy of encoder sensors cannot be continuously improved, which ultimately limits the performance improvement of terahertz equipment. Summary of the invention

[0004] In view of the above problems existing in the prior art, the present invention provides a high-speed terahertz signal position super-resolution acquisition method and system, which can improve the position measurement accuracy while maintaining the performance of the encoder sensor, and ultimately improve the accuracy of the high-speed terahertz phase.

[0005] The present invention is achieved through the following technical solutions:

[0006] A high-speed terahertz signal position super-resolution acquisition method specifically comprises the following steps:

[0007] Step 1: The clock source 2 drives the clock generator 3 to generate three clock signals CLK with the same frequency and synchronous phase, and transmits them to the analog-to-digital converter 5, the inverse counter 8, and the digital comparator 9 respectively;

[0008] Step 2: The count value P of the pulse counter 10 continues to count upward under the position pulse drive of the pulse encoder 1, that is, the count value P of the pulse counter 10 is increased by 1 when each pulse edge of the pulse encoder 1 arrives, and the count value is updated in real time and transmitted to the digital comparator 9;

[0009] Step 3: When the count value P transmitted by the pulse counter 10 to the digital comparator 9 matches the position matching value P preset in the digital comparator 9 c When they are equal, a pre-trigger signal t is generated;

[0010] Step 4: When the pre-trigger signal t appears, the same direction counter 8 starts and continues to count upwards under the drive of the clock signal CLK, that is, when each rising edge of the clock signal CLK arrives, the count value Q of the same direction counter 8 increases by 1;

[0011] Step 5: When the count value Q of the same direction counter 8 is equal to the internal preset subdivision compensation value Q c When they are equal, a trigger signal T is generated and the count value of the same direction counter 8 is set to 0;

[0012] Step 6: When the trigger signal T appears, the data transceiver controller 6 starts the analog-to-digital converter 5, and the analog-to-digital converter 5 starts to continuously collect the analog signal output by the terahertz signal source 4 under the drive of the clock signal CLK, and synchronously outputs it to the subsequent receiving device 7 through the data transceiver controller 6;

[0013] Step 7: When the analog signal quantity value f collected by the analog-to-digital converter 5 reaches the preset value F of the frame data quantity, the data transceiver controller 6 controls the analog-to-digital converter 5 to stop collecting, completing the complete collection of a data frame;

[0014] Step 8: Repeat steps 3 to 6 to collect multiple data frames until you want to stop collecting.

[0015] Furthermore, in step 2, when the origin signal of the pulse encoder 1 appears, the count value P of the pulse counter 10 is reset to 0.

[0016] Furthermore, in step 3, the position matching value P c It is the measured value corresponding to the position that the pulse encoder (1) can measure, and the position should be the first encoder scale moved along the angular movement direction at the position where accurate alignment is expected.

[0017] Furthermore, in step 5, the subdivision compensation value Q c is the fixed number of pulses of the clock signal CLK, specifically, the position matching value P c The number of clock signal CLK pulses that occur during the time required to move to the desired accurate alignment position.

[0018] Furthermore, in step seven, the frame data amount preset value F is obtained by the following formula:

[0019] F=SPR*R / v

[0020] Wherein, SPR is the sampling rate of the analog-to-digital converter 5 , R is the distance range of the desired acquisition signal, and v is the rotation speed of the pulse encoder 1 .

[0021] On the other hand, the present invention also provides a high-speed terahertz signal position super-resolution acquisition system for implementing the above method, wherein the acquisition system comprises: a pulse encoder 1, a clock source 2, a clock generator 3, a terahertz signal source 4, an analog-to-digital converter 5, a data transceiver controller 6, a subsequent receiving device 7, a co-directional counter 8, a digital comparator 9 and a pulse counter 10; wherein the clock source 2 is connected to the clock generator 3, and the signal is transmitted from the clock source 2 to the clock generator 3; the clock CLK signal output by the clock generator 3 is transmitted to the analog-to-digital converter 5, the co-directional counter 8 and the digital comparator 9 respectively; the terahertz signal source 4, the analog-to-digital converter 5, the data transceiver controller 6 and the subsequent receiving device 7 are connected in sequence, and the signal transmission is carried out in this order; the pulse encoder 1, the pulse counter 10, the digital comparator 9, the co-directional counter 8 and the data transceiver controller 6 are connected in sequence, and the signal transmission is carried out in this order.

[0022] Furthermore, the pulse encoder 1 is used to obtain the angle position information and send it to the pulse counter 10. The pulse counter 10 is used to count the position pulse signal of the encoder 1 to obtain the count value P, and finally update the count value data P representing the position in real time and pass it to the digital comparator 9; the digital comparator 9 is used to compare the count value P sent by the pulse counter 10, that is, the real-time position data and the position matching value P preset inside it. c ; The clock source 2 is used to generate a fixed digital clock signal and send it to the clock generator 3. The clock generator 3 generates three clock signals CLK with the same frequency and synchronized phase, and transmits them to the analog-to-digital converter 5, the same-direction counter 8, and the digital comparator 9 respectively; the analog-to-digital converter 5 converts the analog signal into a digital signal by voltage successive approximation or capacitor array comparison, and then sends the obtained digital signal to the data transceiver controller 6; the same-direction counter 8 counts under the drive of the clock generator 3, and transmits the count value trigger signal T to the data transceiver controller 6; the data transceiver controller 6 receives the digital signal data output by the analog-to-digital converter 5, and then sends it to the subsequent receiving device 7; the subsequent device 7 displays the data transmitted by the data transceiver controller 6 to obtain the target terahertz signal waveform.

[0023] Further, the pulse encoder 1 is an orthogonal, pulse incremental rotary encoder with zero position output;

[0024] The clock source 2 is a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature compensated oscillator or a furnace controlled oscillator;

[0025] The clock generator 3 is a phase-locked loop clock generator;

[0026] The data transceiver controller 6, the same direction counter 8, the digital comparator 9, and the pulse counter 10 are all implemented by a digital programmable gate array FPGA;

[0027] The subsequent receiving device 7 is implemented using various types of electronic computers with display functions.

[0028] Compared with the prior art, the advantages of the present invention are as follows:

[0029] 1. A high-speed terahertz signal position super-resolution acquisition method and system of the present invention can effectively improve the position measurement accuracy measured by the terahertz rotation delay line, and ultimately improve the phase performance of the relative position of the terahertz analog signal;

[0030] 2. On the basis of improving the position and phase of terahertz signals, more non-destructive testing and intelligent analysis become possible, providing new and reliable technical means for manufacturing, agriculture, etc.;

[0031] 3. It can greatly improve the encoder's ability to measure position and obtain a higher effective resolution. Therefore, a lower-resolution encoder can be used to achieve better measurement accuracy without the need for expensive higher-specification encoder equipment, thus reducing costs.

[0032] 4. Break through the limitations of existing encoder sensor capabilities, so that the ultimate capabilities of terahertz devices can be further improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following is a brief introduction to the drawings required for the specific embodiments or the description of the prior art. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn according to the actual scale.

[0034] Figure 1 A schematic diagram of a process of a high-speed terahertz signal position super-resolution acquisition method of the present invention;

[0035] Figure 2 This is a structural diagram of a high-speed terahertz signal position super-resolution acquisition system of the present invention;

[0036] Figure 3 This is a diagram illustrating the position super-resolution acquisition parameters and operation information;

[0037] Figure 4 It is a diagram illustrating the parameters and operation information with super-resolution segmentation;

[0038] Figure 5 This is a schematic diagram of the timing process of the high-speed terahertz signal position super-resolution acquisition method;

[0039] In the figure: pulse encoder 1, clock source 2, clock generator 3, terahertz signal source 4, analog-to-digital converter 5, data transceiver controller 6, subsequent receiving device 7, same-direction counter 8, digital comparator 9, pulse counter 10, encoder concentric circle 21, encoder scale 22, target position 23, front approximate position 24, rear approximate position 25, movement direction indication line 26, sampling position imaginary trajectory 27, sampling position imaginary point 28, clock signal waveform 31, analog acquisition action waveform 32, position matching value amplitude 33, same-direction counter count value 34, correction compensation value amplitude 35, digital comparator input value 36, pre-trigger signal t indication line 37, trigger signal T indication line 38, analog signal acquisition action time 39, clock beat time 40. DETAILED DESCRIPTION

[0040] In order to clearly and completely describe the technical solution and its specific working process of the present invention, the specific implementation methods of the present invention are as follows in conjunction with the accompanying drawings of the specification:

[0041] Example 1

[0042] like Figure 1 FIG. 1 is a flow chart of a high-speed terahertz signal position super-resolution acquisition method of this embodiment, wherein the acquisition method specifically comprises the following steps:

[0043] Step 1: The clock source 2 drives the clock generator 3 to generate three clock signals CLK with the same frequency and synchronous phase, and transmits them to the analog-to-digital converter 5, the inverse counter 8, and the digital comparator 9 respectively;

[0044] Wherein, the frequency of the clock signal CLK is consistent with the driving clock signal required by the analog-to-digital converter 5;

[0045] Step 2: The count value P of the pulse counter 10 continues to count upward under the drive of the position pulse of the pulse encoder 1, that is, the count value P of the pulse counter 10 is increased by 1 when each pulse edge of the pulse encoder 1 arrives, and the count value is updated in real time and transmitted to the digital comparator 9; when the origin signal of the pulse encoder 1 appears, the count value P of the pulse counter 10 is reset to 0.

[0046] Step 3: When the count value P transmitted by the pulse counter 10 to the digital comparator 9 matches the preset position matching value P c When they are equal, a pre-trigger signal t is generated;

[0047] In this embodiment, if Figure 3 As shown, the motion direction indicator line 26 is the angular motion direction, the encoder scale 22 is the angular position that the pulse encoder 1 can distinguish; the target position 23 is the position x that is expected to be accurately aligned; the front approximate position 24 is the first encoder scale in front of the motion along x, such as Figure 3 The middle position A is the matching value P of the above position c The value of .

[0048] Step 4: When the pre-trigger signal t appears, the same direction counter 8 starts and continues to count upwards under the drive of the clock signal CLK, that is, when each rising edge of the clock signal CLK arrives, the count value Q of the same direction counter 8 increases by 1;

[0049] Step 5: When the count value Q of the same direction counter 8 is equal to the subdivision compensation value Q c When they are equal, a trigger signal T is generated and the count value of the same direction counter 8 is set to 0;

[0050] In this embodiment, if Figure 4 As shown, the sampling position imaginary point 28 on the sampling position imaginary trajectory 27 is the position corresponding to each acquisition of the analog converter 5 during the working process; there are N sampling position imaginary points 28 in the area between position A and position x, which are the subdivision compensation values ​​Q c The number N is the number of sampling position imaginary points 28 between the two sampling position imaginary points 28 of C and D (including C and D), while C', D' and other sampling position imaginary points 28 outside position A and position x are not included.

[0051] Step 6: When the trigger signal T appears, the data transceiver controller 6 starts the analog-to-digital converter 5, and the analog-to-digital converter 5 starts to continuously collect the analog signal output by the terahertz signal source 4 under the drive of the clock signal CLK, and synchronously outputs it to the subsequent receiving device 7 through the data transceiver controller 6;

[0052] Step 7: When the analog signal quantity value f collected by the analog-to-digital converter 5 reaches the preset value F of the frame data quantity, the data transceiver controller 6 controls the analog-to-digital converter 5 to stop collecting, completing the complete collection of a data frame;

[0053] The frame data volume preset value F is a value set according to the expected frame acquisition range and needs to satisfy:

[0054] F=SPR*R / v

[0055] Wherein, SPR is the sampling rate of the analog-to-digital converter 5 , R is the distance range of the desired signal acquisition, and v is the rotation speed of the pulse encoder 1 .

[0056] Step 8: Repeat steps 3 to 6 to collect multiple data frames until you want to stop collecting.

[0057] The relationship between the signals of this embodiment is described in detail below with reference to the accompanying drawings:

[0058] like Figure 5As shown, the clock signal CLK runs continuously and stably during the acquisition process, as shown in the clock signal waveform 31.

[0059] The digital comparator 9 is configured to generate a voltage when the input value P is equal to the target value P. C When the current or next clock signal CLK is used, a pre-trigger signal t is generated, such as Figure 5 As shown in the figure, the digital comparator input value 36, the pre-trigger signal t indicator line 37, and the trigger signal T indicator line 38;

[0060] The counting of the same direction counter 8 should start immediately at the edge of the current clock signal CLK or the next clock signal edge when the pre-trigger signal t arrives, and its counting driving clock is a fixed clock signal CLK, and the counting plus 1 operation is performed under the driving of each clock signal CLK beat, such as Figure 5 As shown in the middle position matching value amplitude 33, the same direction counter count value 34, the pre-trigger signal t indicator line 37, the clock signal waveform 31, and the clock beat time 40;

[0061] The same direction counter 8 has a count value Q and a preset value Q c When they are equal, under the same clock signal CLK, the same direction counter 8 needs to complete two operations: counting value 0 and generating trigger signal T. Figure 5 The middle position matching value amplitude 33, the same direction counter count value 34, and the trigger signal T indication line 38 are shown.

[0062] When the trigger signal T arrives, the data transceiver controller 6 needs to start the acquisition work of the analog-to-digital converter 5 at the next clock signal CLK, and drive the analog-to-digital converter 5 to perform continuous analog-to-digital conversion according to the beat of the clock signal CLK; Figure 5 The trigger signal T indicator line 38, the analog signal acquisition action time 39, and the clock beat time 40 are shown.

[0063] Combination Figure 5 The timing diagram is described as follows:

[0064] The clock signal waveform 31 and the analog acquisition action waveform 32 are respectively indications of the clock signal CLK and the analog-to-digital converter 5 acquisition action signal; the analog signal acquisition action moment 39 and the clock beat moment 40 refer to the moment when the clock signal CLK and the analog-to-digital converter 5 acquisition action signal appear or occur; at the same time, the arrow of the clock signal waveform 31 indicates Figure 4 The time direction of advancement;

[0065] The position matching value amplitude 33 and the correction compensation value amplitude 35 are the position matching value P c , Subdivision compensation value Q c In the figure, it is used as an indication of the amplitude;

[0066] The count value 34 of the same direction counter and the input value 36 of the digital comparator indicate the count value Q of the same direction counter 8 and the position data signal sent by the pulse counter 10 to the digital comparator 9 .

[0067] The pre-trigger signal t indication line 37 and the trigger signal T indication line 38 correspond to the occurrence moments of the pre-trigger signal t and the trigger signal T respectively.

[0068] Signal acquisition was performed on four terahertz signal acquisition devices using the traditional method and the method described in this embodiment, and other conditions were kept unchanged in the experiment. The experimental results show that when the traditional method is used, the average time domain jitter of the acquired signal is 31.3ps, and the maximum is 47ps; while the average jitter when this method is used is 1.7ps, and the maximum is 4ps; it can be seen that this counting method can effectively reduce the bad jitter of the acquired signal. In addition, when using the counting scheme described in the present invention, the jitter level can be further reduced by increasing the sampling speed. The average result and the worst result that can be measured in the experiment are 0.085ps and the maximum is 0.13ps, respectively, which is greatly improved. However, no matter how the sampling speed is changed in the traditional technical solution, the jitter level cannot be improved.

[0069] Example 2

[0070] like Figure 2 As shown, this embodiment provides a high-speed terahertz signal position super-resolution acquisition system, which is used to implement the acquisition method described in Example 1. The acquisition system includes: a pulse encoder 1, a clock source 2, a clock generator 3, a terahertz signal source 4, an analog-to-digital converter 5, a data transceiver controller 6, a subsequent receiving device 7, a co-directional counter 8, a digital comparator 9 and a pulse counter 10; wherein the clock source 2 is connected to the clock generator 3, and the signal is transmitted from the clock source 2 to the clock generator 3; the clock CLK signal output by the clock generator 3 is transmitted to the analog-to-digital converter 5, the co-directional counter 8, and the digital comparator 9 respectively; the terahertz signal source 4, the analog-to-digital converter 5, the data transceiver controller 6, and the subsequent receiving device 7 are connected in sequence, and the signal is transmitted in this order; the pulse encoder 1, the pulse counter 10, the digital comparator 9, the co-directional counter 8, and the data transceiver controller 6 are connected in sequence, and the signal is transmitted in this order.

[0071] The pulse encoder 1 is used to obtain the angle position information and send it to the pulse counter 10. The pulse counter 10 is used to count the position pulse signal of the encoder 1 to obtain the count value P, and finally update the count value data P representing the position in real time and pass it to the digital comparator 9; the digital comparator 9 is used to compare the count value P sent by the pulse counter 10, that is, the real-time position data and the position matching value P preset inside it. c; The clock source 2 is used to generate a fixed digital clock signal and send it to the clock generator 3. The clock generator 3 generates three clock signals CLK with the same frequency and synchronized phase, and transmits them to the analog-to-digital converter 5, the same-direction counter 8, and the digital comparator 9 respectively; the analog-to-digital converter 5 converts the analog signal into a digital signal by voltage successive approximation or capacitor array comparison, and then sends the obtained digital signal to the data transceiver controller 6; the same-direction counter 8 counts under the drive of the clock generator 3, and transmits the count value trigger signal T to the data transceiver controller 6; the data transceiver controller 6 receives the digital signal data output by the analog-to-digital converter 5, and then sends it to the subsequent receiving device 7; the subsequent device 7 displays the data transmitted by the data transceiver controller 6 to obtain the target terahertz signal waveform.

[0072] In this embodiment, the terahertz signal source 4 is a device for generating the measured terahertz signal and is the measurement target of this method; the subsequent receiving device 7 is the destination for outputting data after the acquisition is completed using this method and is the result of the method in practical application.

[0073] The pulse encoder 1 is a sensor for obtaining angular position information, and requires an orthogonal, pulse incremental rotary encoder with zero position output.

[0074] The clock source 2 is a device that generates a fixed digital clock signal output, and is implemented using a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature compensated oscillator, and a furnace controlled oscillator.

[0075] The clock generator 3 is a phase-locked loop clock generator, which is a device that can convert a fixed digital clock signal into a certain other fixed frequency, high-quality digital clock after receiving it, and has the ability to reliably distribute multiple digital clock signals.

[0076] The same-direction counter 8 and pulse counter 10 are counter components that can perform digital counting; the same-direction counter 8 counts upward under the clock drive until the count value reaches a preset value, at which time the count value returns to zero, stops counting, and outputs a trigger signal; the pulse counter 10 can obtain the position pulse signal of the pulse encoder 1 and convert it into position data output.

[0077] The digital comparator 9 is a component for comparing the values ​​of two digital signals, and outputs a trigger signal when the two input values ​​are equal.

[0078] The data transceiver controller 6 is a device that can control the analog-to-digital converter to collect and output data when a specific trigger input arrives.

[0079] The data transceiver controller 6, the same direction counter 8, the digital comparator 9, and the pulse counter 10 need to be implemented using FPGA (digital programmable gate array).

[0080] The preferred embodiments of the present invention are described in detail above in conjunction with the accompanying drawings. However, the present invention is not limited to the specific details in the above embodiments. Within the technical concept of the present invention, a variety of simple modifications can be made to the technical solution of the present invention, and these simple modifications all belong to the protection scope of the present invention.

[0081] It should also be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present invention will not further describe various possible combinations.

[0082] In addition, various embodiments of the present invention may be arbitrarily combined, and as long as they do not violate the concept of the present invention, they should also be regarded as the contents disclosed by the present invention.

Claims

1. A high-speed terahertz signal position super-resolution acquisition method, characterized in that: The specific steps include: Step 1: The clock source (2) drives the clock generator (3) to generate three clock signals CLK with the same frequency and synchronized phase, and transmits them to the analog-to-digital converter (5), the inverse counter (8), and the digital comparator (9) respectively; Step 2: The count value P of the pulse counter (10) continues to count upward under the drive of the position pulse of the pulse encoder (1), that is, the count value P of the pulse counter (10) is increased by 1 when each pulse edge of the pulse encoder (1) arrives, and the count value is updated in real time and transmitted to the digital comparator (9); Step 3: When the count value P transmitted by the pulse counter (10) to the digital comparator (9) matches the position matching value P preset in the digital comparator (9), c When they are equal, a pre-trigger signal t is generated; Step 4: When the pre-trigger signal t appears, the same direction counter (8) starts and continues to count upwards under the drive of the clock signal CLK, that is, when each rising edge of the clock signal CLK arrives, the count value Q of the same direction counter (8) increases by 1; Step 5: When the count value Q of the same direction counter (8) is equal to the internal preset subdivision compensation value Q c When they are equal, a trigger signal T is generated and the count value of the same direction counter (8) is set to 0; Step 6: When the trigger signal T appears, the data transceiver controller (6) starts the analog-to-digital converter (5), and the analog-to-digital converter (5) starts to continuously collect the analog signal output by the terahertz signal source (4) under the drive of the clock signal CLK, and synchronously outputs it to the subsequent receiving device (7) through the data transceiver controller (6); Step 7: When the analog signal quantity value f collected by the analog-to-digital converter (5) reaches the preset frame data quantity value F, the data transceiver controller (6) controls the analog-to-digital converter (5) to stop collecting, thus completing the complete collection of a data frame; Step 8: Repeat steps 3 to 6 to collect multiple data frames until you want to stop collecting.

2. A high-speed terahertz signal position super-resolution acquisition method as claimed in claim 1, characterized in that: In step 2, when the origin signal of the pulse encoder (1) appears, the count value P of the pulse counter (10) is reset to 0.

3. A high-speed terahertz signal position super-resolution acquisition method as claimed in claim 1, characterized in that: In step 3, the position matching value P c It is the measured value corresponding to the position that the pulse encoder (1) can measure, and the position should be the first encoder scale moved along the angular movement direction at the position where accurate alignment is expected.

4. A high-speed terahertz signal position super-resolution acquisition method as claimed in claim 1, characterized in that: In step 5, the subdivision compensation value Q c is the fixed number of pulses of the clock signal CLK, specifically, the position matching value P c The number of clock signal CLK pulses that occur during the time required to move to the desired accurate alignment position.

5. The high-speed terahertz signal position super-resolution acquisition method according to claim 1, characterized in that: In step 7, the frame data amount preset value F is obtained by the following formula: F=SPR*R / v Wherein, SPR is the sampling rate of the analog-to-digital converter (5), R is the distance range of the desired acquisition signal, and v is the rotation speed of the pulse encoder (1).

6. A high-speed terahertz signal position super-resolution acquisition system, used to implement the method according to any one of claims 1 to 5, characterized in that: The acquisition system comprises: a pulse encoder (1), a clock source (2), a clock generator (3), a terahertz signal source (4), an analog-to-digital converter (5), a data transceiver controller (6), a subsequent receiving device (7), a co-directional counter (8), a digital comparator (9) and a pulse counter (10); wherein the clock source (2) is connected to the clock generator (3), and a signal is transmitted from the clock source (2) to the clock generator (3); the clock CLK signal output by the clock generator (3) is transmitted to the analog-to-digital converter (5), the co-directional counter (8) and the digital comparator (9) respectively; the terahertz signal source (4), the analog-to-digital converter (5), the data transceiver controller (6) and the subsequent receiving device (7) are connected in sequence, and signal transmission is performed in this order; the pulse encoder (1), the pulse counter (10), the digital comparator (9), the co-directional counter (8) and the data transceiver controller (6) are connected in sequence, and signal transmission is performed in this order.

7. A high-speed terahertz signal position super-resolution acquisition system as claimed in claim 6, characterized in that: The pulse encoder (1) is used to obtain angle position information and send it to the pulse counter (10); the pulse counter (10) is used to count the position pulse signal of the encoder (1) to obtain a count value P, and finally update the count value data P representing the position in real time and transmit it to the digital comparator (9); the digital comparator (9) is used to compare the count value P sent by the pulse counter (10), that is, the real-time position data and the position matching value P preset inside it. c The clock source (2) is used to generate a fixed digital clock signal and send it to a clock generator (3); the clock generator (3) generates three clock signals CLK with the same frequency and synchronous phase, and transmits them to an analog-to-digital converter (5), a unidirectional counter (8), and a digital comparator (9) respectively; the analog-to-digital converter (5) converts the analog signal into a digital signal by voltage successive approximation or capacitor array comparison, and then sends the obtained digital signal to a data transceiver controller (6); the unidirectional counter (8) counts under the drive of the clock generator (3), and transmits the count value trigger signal T to the data transceiver controller (6); the data transceiver controller (6) receives the digital signal data output by the analog-to-digital converter (5), and then sends it to a subsequent receiving device (7); the subsequent device (7) displays the data transmitted by the data transceiver controller (6) to obtain a target terahertz signal waveform.

8. A high-speed terahertz signal position super-resolution acquisition system as claimed in claim 6, characterized in that: The pulse encoder (1) is an orthogonal, pulse incremental rotary encoder with a zero position output; The clock source (2) is a crystal oscillator, including a passive piezoelectric crystal oscillator, a common active crystal oscillator, a temperature compensated oscillator or a furnace controlled oscillator; The clock generator (3) is a phase-locked loop clock generator; The data transceiver controller (6), the same direction counter (8), the digital comparator (9), and the pulse counter (10) are all implemented by a digital programmable gate array (FPGA); The subsequent receiving device (7) is implemented using various types of electronic computers with display functions.

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