Liquid crystal display panel

Abstract

According to the liquid crystal display panel, a plurality of switching holes are formed in a substrate, a film layer where a third metal wire is located is arranged on the back side of the substrate, and a second metal wire is arranged to be electrically connected with a first metal wire through a first via hole penetrating through a film layer between the film layer where the second metal wire is located and the film layer where the first metal wire is located. The second metal wire is electrically connected with the third metal wire through a second via hole and a transfer hole which penetrate through the film layer between the film layer where the second metal wire is located and the substrate, so that the third metal wire can play a role in transmitting signals, and meanwhile, the film layer where the third metal wire is located is arranged on the back side of the substrate; the distance between the film layer where the third metal wire is located and the film layer where the first metal wire is located and the distance between the film layer where the second metal wire is located are increased, stray capacitance is reduced, and therefore the problem of signal transmission delay generated by the liquid crystal display panel is solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a liquid crystal display panel. Background Art

[0002] refer to Figure 1 and Figure 2 The display area of ​​a conventional liquid crystal display panel using LTPS (Low-Temperature Polycrystalline Silicon) technology includes a substrate, a metal light shielding layer disposed on the substrate, a first metal layer disposed on a side of the metal light shielding layer away from the substrate, and a second metal layer disposed on a side of the first metal layer away from the substrate. The second metal layer is electrically connected to the first metal layer through a via passing through the second metal layer and the first metal layer. The metal light shielding layer is used for light shielding to reduce the leakage current of the liquid crystal display panel. At the same time, the metal light shielding layer is also used as a part of the peripheral wiring for signal transmission. However, the distance between the metal light shielding layer and the first metal layer and the second metal layer is too small, resulting in excessive parasitic capacitance in the non-display area of ​​the liquid crystal display panel, causing the problem of signal transmission delay in the liquid crystal display panel. Summary of the invention

[0003] The embodiments of the present application provide a liquid crystal display panel to improve the problem of signal transmission delay generated by the liquid crystal display panel.

[0004] An embodiment of the present application provides a liquid crystal display panel, comprising a display area and a non-display area, wherein the non-display area comprises a fan-out area;

[0005] The liquid crystal display panel comprises:

[0006] A substrate, wherein the substrate is provided with a plurality of transfer holes, and the transfer holes are located in the fan-out area;

[0007] A plurality of first metal routing lines, wherein the first metal routing lines are located in the fan-out region, and a film layer where the first metal routing lines are located is disposed on a front side of the substrate;

[0008] A plurality of second metal routing lines, wherein the second metal routing lines are located in the fan-out region, the film layer where the second metal routing lines are located is arranged on the front side of the substrate, and the film layer where the second metal routing lines are located is located above the film layer where the first metal routing lines are located;

[0009] A plurality of third metal wirings, wherein the third metal wirings are located in the fan-out area, and the film layer where the third metal wirings are located is arranged on the back side of the substrate;

[0010] Among them, the second metal routing is electrically connected to the first metal routing through a first via hole penetrating through a film layer between a film layer where the second metal routing is located and a film layer where the first metal routing is located, and the second metal routing is electrically connected to the third metal routing through a second via hole penetrating through a film layer between a film layer where the second metal routing is located and the substrate and the transfer hole.

[0011] Furthermore, a portion of the third metal routing fills the transfer hole and extends to the front side of the substrate, and the second metal routing is electrically connected to a portion of the third metal routing located on the front side of the substrate through the second via hole that passes through the film layer between the film layer where the second metal routing is located and the substrate.

[0012] Furthermore, the liquid crystal display panel further includes a fourth metal wiring, and the film layer where the fourth metal wiring is located is located between the substrate and the film layer where the third metal wiring is located.

[0013] Furthermore, in the top view of the liquid crystal display panel, the third metal wiring overlaps with the fourth metal wiring.

[0014] Furthermore, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal wiring is located is greater than the thickness of the film layer where the fourth metal wiring is located.

[0015] Furthermore, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the fourth metal routing is located is less than the thickness of the film layer where the first metal routing is located, and the thickness of the film layer where the fourth metal routing is located is less than the thickness of the film layer where the second metal routing is located.

[0016] Furthermore, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal routing is located is greater than the thickness of the film layer where the first metal routing is located, and the thickness of the film layer where the third metal routing is located is greater than the thickness of the film layer where the second metal routing is located.

[0017] Furthermore, the thickness of the film layer where the third metal wiring is located on the back side of the substrate is

[0018] Furthermore, in the top view of the liquid crystal display panel, a portion of the third metal routing overlaps with a portion of the first metal routing, and the overlapping area between the third metal routing and the first metal routing is not greater than 80%, and a portion of the third metal routing overlaps with a portion of the second metal routing, and the overlapping area between the third metal routing and the second metal routing is not greater than 80%.

[0019] Furthermore, the liquid crystal display panel also includes a protective layer, which is disposed on the back side of the substrate and covers the third metal wiring.

[0020] Beneficial effects of this application:

[0021] The present application provides a liquid crystal display panel, wherein a plurality of transfer holes are arranged on the substrate, the film layer where the third metal routing is located is arranged on the back side of the substrate, the second metal routing is arranged to be electrically connected to the first metal routing through a first via hole penetrating through a film layer between the film layer where the second metal routing is located and the film layer where the first metal routing is located, and the second metal routing is electrically connected to the third metal routing through a second via hole penetrating through a film layer between the film layer where the second metal routing is located and the substrate and the transfer hole, so that the third metal routing can play a role in transmitting signals, and at the same time, because the film layer where the third metal routing is located is arranged on the back side of the substrate, the distance between the film layer where the third metal routing is located and the film layer where the first metal routing is located and the film layer where the second metal routing is located is increased, the parasitic capacitance between the film layer where the third metal routing is located and the film layer where the first metal routing is located and the film layer where the second metal routing is located is reduced, the problem of signal transmission delay generated by the liquid crystal display panel is improved, and the driving stability of the liquid crystal display panel is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 is a schematic diagram of the film layer structure of the fan-out region of the conventional liquid crystal display panel;

[0023] Figure 2 yes Figure 1 A schematic diagram showing the connection between the first metal layer, the second metal layer and the metal light shielding layer in the fan-out region of the liquid crystal display panel;

[0024] Figure 3 is a schematic diagram of a liquid crystal display panel of the present application;

[0025] Figure 4 yes Figure 3 A cross-sectional view of a liquid crystal display panel shown;

[0026] Figure 5 yes Figure 3 An enlarged view of the CC region of the liquid crystal display panel shown;

[0027] Figure 6 yes Figure 5 A cross-sectional view of the liquid crystal display panel taken at DD′ shown;

[0028] Figure 7 yes Figure 6 A schematic diagram showing the connection of a first metal routing line, a second metal routing line and a third metal routing line in a fan-out region of a liquid crystal display panel;

[0029] Figure 8a-8j It is a schematic diagram of the manufacturing process of the liquid crystal display panel of the present application.

[0030] 100 - substrate, 110 - transfer hole; 200 - first metal routing; 300 - second metal routing; 400 - third metal routing; 500 - first via hole; 600 - second via hole; 700 - fourth metal routing.

[0031] 10 - metal light-shielding layer; 20 - buffer layer; 30 - semiconductor layer; 40 - second insulating layer; 50 - gate metal layer, first metal layer; 60 - first insulating layer; 70 - source and drain metal layer, second metal layer; 80 - third metal layer; 90 - fourth metal layer; 91 - passivation layer.

[0032] 01-substrate; 02-metal light-shielding layer; 03-first metal layer; 04-second metal layer. DETAILED DESCRIPTION

[0033] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0034] In addition, the terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0035] refer to Figure 1 and Figure 2 The display area of ​​a conventional liquid crystal display panel using LTPS (Low-Temperature Polycrystalline Silicon) technology includes a substrate 01, a metal light shielding layer 02 disposed on the substrate 01, a first metal layer 03 disposed on the side of the metal light shielding layer 02 away from the substrate, and a second metal layer 04 disposed on the side of the first metal layer 03 away from the substrate. The second metal layer 04 is electrically connected to the first metal layer 03 through a via hole passing through the film layer between the second metal layer 04 and the first metal layer 03. The metal light shielding layer is used for light shielding to reduce the leakage current of the liquid crystal display panel. At the same time, the metal light shielding layer 02 is also used as a part of the peripheral wiring for signal transmission. However, the distance between the metal light shielding layer 02 and the first metal layer 03 and the second metal layer 04 is too small, resulting in excessive parasitic capacitance in the non-display area of ​​the liquid crystal display panel, causing the problem of signal transmission delay in the liquid crystal display panel.

[0036] The first embodiment of the present application provides a liquid crystal display panel, referring to Figure 3-Figure 7 The liquid crystal display panel includes a display area AA and a non-display area BB, and the non-display area BB includes a fan-out area CC; the liquid crystal display panel includes a substrate 100, a plurality of first metal wirings 200, a plurality of second metal wirings 300 and a plurality of third metal wirings 400.

[0037] Specifically, the substrate 100 is provided with a plurality of transfer holes 110, and the transfer holes 110 are located in the fan-out area CC; the first metal wiring 200 is located in the fan-out area CC, and the film layer where the first metal wiring 200 is located is arranged on the front side of the substrate 100; the second metal wiring 300 is located in the fan-out area CC, the film layer where the second metal wiring 300 is located is arranged on the front side of the substrate 100, and the film layer where the second metal wiring 300 is located is located on the film layer where the first metal wiring 200 is located; the third metal wiring 400 is located in the fan-out area CC, the film layer where the third metal routing 400 is located is arranged on the back side of the substrate 100; wherein, the second metal routing 300 is electrically connected to the first metal routing 200 through a first via 500 that penetrates the film layer between the film layer where the second metal routing 300 is located and the film layer where the first metal routing 200 is located, and the second metal routing 300 is electrically connected to the third metal routing 400 through a second via 600 that penetrates the film layer between the film layer where the second metal routing 300 is located and the substrate 100 and the transfer hole 110.

[0038] By providing a plurality of transfer holes 110 on the substrate 100, the film layer where the third metal trace 400 is located is provided on the back side of the substrate 100, and the second metal trace 300 is provided to be electrically connected to the first metal trace 200 through a first via hole 500 penetrating through a film layer between the film layer where the second metal trace 300 is located and the film layer where the first metal trace 200 is located, and the second metal trace 300 is electrically connected to the third metal trace 400 through a second via hole 600 penetrating through a film layer between the film layer where the second metal trace 300 is located and the substrate 100 and the transfer hole 110, so that the third metal trace Line 400 can play the role of transmitting signals. At the same time, since the film layer where the third metal wiring 400 is located is arranged on the back side of the substrate 100, the distance between the film layer where the third metal wiring 400 is located and the film layer where the first metal wiring 200 is located and the film layer where the second metal wiring 300 is located is increased, and the parasitic capacitance between the film layer where the third metal wiring 400 is located and the film layer where the first metal wiring 200 is located and the film layer where the second metal wiring 300 is located is reduced, thereby improving the problem of signal transmission delay generated by the liquid crystal display panel and improving the driving stability of the liquid crystal display panel.

[0039] In this embodiment, a portion of the third metal trace 400 fills the transfer hole 110 and extends to the front side of the substrate 100, and the second metal trace 300 is electrically connected to the portion of the third metal trace 400 located on the front side of the substrate 100 through the second via 600 that penetrates the film layer between the film layer where the second metal trace 300 is located and the substrate 100. By setting a portion of the third metal trace 400 to fill the transfer hole 110 and extend to the front side of the substrate 100, the second metal trace 300 is electrically connected to the portion of the third metal trace 400 located on the front side of the substrate 100 through the second via 600 that penetrates the film layer between the film layer where the second metal trace 300 is located and the substrate 100, ensuring that the third metal trace 400 can be electrically connected to the first metal trace 200, thereby ensuring that the third metal trace 400 can transmit signals.

[0040] It should be noted that the third metal routing 400 is located on the back side of the substrate 100, and the portion of the third metal routing 400 extending to the front side of the substrate 100 is a very small part of the third metal routing 400, and the portion of the third metal routing 400 extending to the front side of the substrate 100 is used to electrically connect the third metal routing 400 on the back side of the substrate 100 with the second metal routing 300, which does not mean that the third metal routing 400 is located on the front side of the substrate 100 as a whole.

[0041] In this embodiment, the substrate 100 is a glass substrate 100 .

[0042] In this embodiment, the material of the third metal trace 400 includes Cu, Al or Mo.

[0043] In the present embodiment, the liquid crystal display panel further includes a fourth metal wiring 700, and the film layer where the fourth metal wiring 700 is located is located between the substrate 100 and the film layer where the third metal wiring 400 is located. By setting the liquid crystal display panel to also include the fourth metal wiring 700, and the film layer where the fourth metal wiring 700 is located is located between the substrate 100 and the film layer where the third metal wiring 400 is located, on the one hand, the film layer where the fourth metal wiring 700 is located can play a guiding role, so that the film layer where the third metal wiring 400 is located can be more conveniently made on the substrate 100, and on the other hand, the film layer where the fourth metal wiring 700 is located can increase the adhesion between the film layer where the third metal wiring 400 is located and the substrate 100, thereby improving the stability of the connection between the third metal wiring 400 and the substrate 100; at the same time, due to the provision of the fourth metal wiring 700, the overall thickness of the third metal wiring 400 and the fourth metal wiring 700 is increased, and the impedance is reduced, thereby reducing the delay of the signal transmission of the liquid crystal display panel, further improving the stability of the signal transmission of the liquid crystal display panel, and reducing the risk of abnormal display of the liquid crystal display panel.

[0044] It should be noted that a portion of the fourth metal routing 700 is located on the back side of the substrate 100, the portion of the fourth metal routing 700 formed on the front side of the substrate 100 is a very small portion of the fourth metal routing 700, and the portion of the fourth metal routing 700 extending to the front side of the substrate 100 is to make a portion of the third metal routing 400 located on the front side of the substrate 100 thereon, which does not mean that the fourth metal routing 700 as a whole is located on the front side of the substrate 100.

[0045] In this embodiment, the material of the fourth metal trace 700 is Ti, Ni, Cu, Cr, Mo, Al or W.

[0046] In this embodiment, the film layer where the fourth metal wiring 700 is located is formed on the back side of the substrate 100 by PVD (Physical Vapor Deposition) deposition, and the film layer where the third metal wiring 400 is located is formed on the surface of the film layer where the third metal wiring 400 is located away from the substrate 100 by electroplating. That is, the fourth metal wiring 700 is formed on the back side of the substrate 100 by PVD deposition, and the third metal wiring 400 is formed on the surface of the film layer where the fourth metal wiring 700 is located away from the substrate 100 by electroplating.

[0047] In this embodiment, in the top view of the liquid crystal display panel, the third metal trace 400 overlaps with the fourth metal trace 700. By arranging the third metal trace 400 to overlap with the fourth metal trace 700, the third metal trace 400 can be completely fixed to the back of the substrate 100 through the metal trace, thereby avoiding the reduction of the stability of the connection between the third metal trace 400 and the substrate 100 due to the small area of ​​the fourth metal trace 700.

[0048] In this embodiment, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal wiring 400 is located is greater than the thickness of the film layer where the fourth metal wiring 700 is located.

[0049] In this embodiment, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the fourth metal routing 700 is located is less than the thickness of the film layer where the first metal routing 200 is located, and the thickness of the film layer where the fourth metal routing 700 is located is less than the thickness of the film layer where the second metal routing 300 is located.

[0050] In this embodiment, in the conventional solution, the metal light shielding layer of the display area of ​​the liquid crystal display panel is arranged on the front side of the substrate and is located below the semiconductor layer for light shielding. When preparing the liquid crystal display panel, the metal light shielding layer is first made on the substrate, and it is necessary to climb the slope when making the semiconductor layer in the subsequent process. When the thickness of the metal light shielding layer located on the front side of the substrate is too thick, it will cause the problem of broken wires and poor crystallization in the production of the semiconductor layer. When the thickness of the metal light shielding layer located on the front side of the substrate is too thin, the impedance of the metal light shielding will increase, resulting in reduced stability of signal transmission of the liquid crystal display panel. Therefore, in the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal wiring 400 is located is greater than the thickness of the film layer where the first metal wiring 200 is located, and the thickness of the film layer where the third metal wiring 400 is located is greater than the thickness of the film layer where the second metal wiring 300 is located. By setting the thickness of the film layer where the third metal routing 400 is located to be greater than the thickness of the film layer where the first metal routing 200 is located, and the thickness of the film layer where the third metal routing 400 is located to be greater than the thickness of the film layer where the second metal routing 300 is located, compared with the traditional solution, the thickness of the third metal routing 400 is increased, and the impedance of the third metal routing 400 is reduced, thereby reducing the delay of the signal transmission of the liquid crystal display panel, and further improving the stability of the signal transmission of the liquid crystal display panel, and reducing the risk of display abnormalities of the liquid crystal display panel.

[0051] In this embodiment, the thickness of the film layer where the third metal trace 400 is located on the back side of the substrate 100 is By setting the thickness of the film layer where the third metal wiring 400 is located on the back side of the substrate 100 to On the one hand, it can avoid the problem that the thickness of the film layer where the third metal trace 400 is located on the back side of the substrate 100 is too thin, resulting in the inability to reduce impedance. On the other hand, it can avoid the problem that the thickness of the film layer where the third metal trace 400 is located on the back side of the substrate 100 is too thick, resulting in the quality of the film layer where the third metal trace 400 is located on the back side of the substrate 100 being deteriorated, causing the stability of the signal transmission of the third metal trace 400 to be reduced, resulting in abnormal display of the liquid crystal display panel. Preferably, the thickness of the film layer where the third metal trace 400 is located on the back side of the substrate 100 is or

[0052] In this embodiment, the thickness of the film layer where the first metal wiring 200 is located is Preferably, the thickness of the film layer where the first metal wiring 200 is located is or

[0053] In this embodiment, the thickness of the film layer where the second metal wiring 300 is located is Preferably, the thickness of the film layer where the second metal wiring 300 is located is or

[0054] It should be noted that, in the above embodiment, the thickness of the film layer where the third metal routing 400 is located on the back side of the substrate 100 is the thickness of the third metal routing 400 on the back side of the substrate 100; the thickness of the film layer where the first metal routing 200 is located is the thickness of the first metal routing 200, and the thickness of the film layer where the second metal routing 300 is located is the thickness of the second metal routing 300.

[0055] In this embodiment, in the top view of the liquid crystal display panel, a portion of the third metal wiring 400 overlaps with a portion of the first metal wiring 200, and the overlapping area between the third metal wiring 400 and the first metal wiring 200 is not greater than 80%, and a portion of the third metal wiring 400 overlaps with a portion of the second metal wiring 300, and the overlapping area between the third metal wiring 400 and the second metal wiring 300 is not greater than 80%. By setting a portion of the third metal wiring 400 to overlap with a portion of the first metal wiring 200, and the overlapping area between the third metal wiring 400 and the first metal wiring 200 is not greater than 80%, and a portion of the third metal wiring 400 to overlap with a portion of the second metal wiring 300, and the overlapping area between the third metal wiring 400 and the second metal wiring 300 is not greater than 80%, the storage capacitance between the third metal wiring 400 and the first metal wiring 200 and the second metal wiring 300 can be reduced to the maximum extent.

[0056] In this embodiment, in the top view of the liquid crystal display panel, the overlapping area between the third metal wiring 400 and the first metal wiring 200 is not less than 10%, and the overlapping area between the third metal wiring 400 and the second metal wiring 300 is not less than 10%.

[0057] In this embodiment, the liquid crystal display panel further includes a protective layer, which is disposed on the back of the substrate 100, and the protective layer covers the third metal wiring 400. By configuring the liquid crystal display panel to further include a protective layer, which is disposed on the back of the substrate 100, and the protective layer covers the third metal wiring 400, the protective layer can protect the third metal wiring 400, thereby improving the stability of the third metal wiring 400 in transmitting signals.

[0058] In this embodiment, the liquid crystal display panel further includes a buffer layer 20 , and the buffer layer 20 is disposed on the substrate 100 .

[0059] In the present embodiment, the liquid crystal display panel further includes a first insulating layer 60 . The first insulating layer 60 is disposed on the buffer layer 20 , and the first insulating layer 60 covers the first metal trace 200 .

[0060] In the present embodiment, the liquid crystal display panel further includes a passivation layer 91 . The passivation layer 91 is disposed on the first insulating layer 60 , and the passivation layer 91 covers the second metal wiring 300 .

[0061] In the present embodiment, the liquid crystal display panel further includes a metal shading layer 10, a semiconductor layer 30, a second insulating layer 40, a gate metal layer 50 and a source-drain metal layer 70, wherein the metal shading layer 10 is disposed on the substrate 100, and the buffer layer 20 covers the metal shading layer 10, the semiconductor layer 30 is disposed on a surface of the buffer layer 20 away from the substrate 100, the second insulating layer 40 is disposed on a surface of the buffer layer 20 away from the substrate 100, and the second insulating layer 40 covers the semiconductor layer 30, the gate metal layer 50 is disposed on a surface of the second insulating layer 40 away from the substrate 100, and the first insulating layer 60 covers the gate metal layer 50, and the source-drain metal layer 70 is disposed on a surface of the first insulating layer 60 away from the substrate 100; wherein the metal shading layer 10, the semiconductor layer 30, the gate metal layer 50, and the source-drain metal layer 70 are located in the display area AA, and the gate metal layer 50 and the film layer where the first metal wiring 200 is located share the same layer, and the source-drain metal layer 70 and the film layer where the second metal wiring 300 is located share the same layer.

[0062] In this embodiment, the thickness of the gate metal layer 50 is the same as the thickness of the film layer where the second metal wiring 300 is located.

[0063] In this embodiment, the thickness of the metal light shielding layer 10 is smaller than the thickness of the gate metal layer 50 .

[0064] In this embodiment, the thickness of the metal light shielding layer 10 is not greater than

[0065] The second embodiment of the present application provides a method for manufacturing a liquid crystal display panel, referring to Figure 8a-8j , a method for manufacturing a liquid crystal display panel comprises the following steps:

[0066] S100 : providing a substrate 100 , and forming a transfer hole 110 on the substrate 100 .

[0067] Specifically, an etching solution is used to corrode the substrate 100 to obtain the transfer hole 110 .

[0068] S200 : forming a fourth metal layer 90 on the back surface of the substrate 100 and the hole wall of the via hole 110 , and forming a portion of the fourth metal layer 90 on the front side of the substrate 100 .

[0069] Specifically, the fourth metal layer 90 is formed on the back side of the substrate 100 by PVD etching.

[0070] S300 : forming a third metal layer 80 on a surface of the fourth metal layer 90 away from the substrate 100 , and allowing a portion of the third metal layer 80 to fill the transfer hole 110 and extend to the front side of the substrate 100 to cover a portion of the fourth metal layer 90 on the front side of the substrate 100 .

[0071] Specifically, the third metal layer 80 is formed on a surface of the fourth metal layer 90 away from the substrate 100 by electroplating.

[0072] S400 : forming a third metal wiring 400 and a fourth metal wiring 700 on the substrate 100 .

[0073] S500 : forming a buffer layer 20 on the substrate 100 , and making the buffer layer 20 cover a portion of the third metal wiring 400 located on the front side of the substrate 100 .

[0074] S600 : manufacturing a first metal layer 50 on the buffer layer 20 , and forming spaced first metal traces 200 .

[0075] S700 : forming a first insulating layer 60 on the buffer layer 20 , and making the first insulating layer 60 cover the first metal wiring 200 .

[0076] S800 : manufacturing a second metal layer 70 on the first insulating layer 60 , and forming spaced second metal traces 300 .

[0077] S900 : forming a passivation layer 91 on the first insulating layer 60 , and making the passivation layer 91 cover the second metal wiring 300 .

[0078] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A liquid crystal display panel, characterized in that: It includes a display area and a non-display area, wherein the non-display area includes a fan-out area; The liquid crystal display panel comprises: A substrate, wherein the substrate is provided with a plurality of transfer holes, and the transfer holes are located in the fan-out area; A plurality of first metal routing lines, wherein the first metal routing lines are located in the fan-out region, and a film layer where the first metal routing lines are located is disposed on a front side of the substrate; A plurality of second metal routing lines, wherein the second metal routing lines are located in the fan-out region, the film layer where the second metal routing lines are located is arranged on the front side of the substrate, and the film layer where the second metal routing lines are located is located above the film layer where the first metal routing lines are located; A plurality of third metal wirings, wherein the third metal wirings are located in the fan-out area, and the film layer where the third metal wirings are located is arranged on the back side of the substrate; Among them, the second metal routing is electrically connected to the first metal routing through a first via hole penetrating through a film layer between a film layer where the second metal routing is located and a film layer where the first metal routing is located, and the second metal routing is electrically connected to the third metal routing through a second via hole penetrating through a film layer between a film layer where the second metal routing is located and the substrate and the transfer hole.

2. The liquid crystal display panel according to claim 1, characterized in that: A portion of the third metal routing fills the transfer hole and extends to the front side of the substrate, and the second metal routing is electrically connected to a portion of the third metal routing located on the front side of the substrate through the second via hole penetrating the film layer between the film layer where the second metal routing is located and the substrate.

3. The liquid crystal display panel according to claim 1 or 2, characterized in that: The liquid crystal display panel further includes a fourth metal wiring, and the film layer where the fourth metal wiring is located is located between the substrate and the film layer where the third metal wiring is located.

4. The liquid crystal display panel according to claim 3, characterized in that: In a top view of the liquid crystal display panel, the third metal wiring overlaps with the fourth metal wiring.

5. The liquid crystal display panel according to claim 3, characterized in that: In the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal wiring is located is greater than the thickness of the film layer where the fourth metal wiring is located.

6. The liquid crystal display panel according to claim 3, characterized in that: In the thickness direction of the liquid crystal display panel, the thickness of the film layer where the fourth metal routing is located is smaller than the thickness of the film layer where the first metal routing is located, and the thickness of the film layer where the fourth metal routing is located is smaller than the thickness of the film layer where the second metal routing is located.

7. The liquid crystal display panel according to claim 1, characterized in that: In the thickness direction of the liquid crystal display panel, the thickness of the film layer where the third metal routing is located is greater than the thickness of the film layer where the first metal routing is located, and the thickness of the film layer where the third metal routing is located is greater than the thickness of the film layer where the second metal routing is located.

8. The liquid crystal display panel according to claim 1, characterized in that: The thickness of the film layer where the third metal wiring is located on the back side of the substrate is 9. The liquid crystal display panel according to claim 1, characterized in that: In the top view of the liquid crystal display panel, a portion of the third metal routing overlaps with a portion of the first metal routing, and the overlapping area between the third metal routing and the first metal routing is no more than 80%, and a portion of the third metal routing overlaps with a portion of the second metal routing, and the overlapping area between the third metal routing and the second metal routing is no more than 80%.

10. The liquid crystal display panel according to claim 1, characterized in that: The liquid crystal display panel further includes a protection layer, which is disposed on the back side of the substrate and covers the third metal wiring.

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