Circuit for controlling low-power-consumption system
Through the load power management technology combined with isolated and non-isolated control circuits, the problem of high cost and insufficient stability in the existing low-power system circuit control method is solved, and the low power consumption and stable standby state of the system is achieved, and the simple The low-cost devices enable bidirectional system communication and power control.
Patent Information
- Application Number
- CN202411288316.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-14
- Publication Date
- 2024-12-17
AI Technical Summary
The existing low-power system circuit control methods have problems of high cost, high power consumption and insufficient stability, especially during the process of cutting off the high-voltage terminal power supply and chip sleep wake-up.
The load power control circuit consisting of isolated control circuit, non-isolated control circuit and switch circuit is adopted to achieve low power power management through anti-interference resistor, NPN transistor, transistor output optocoupler, filter capacitor and MBPOWER power supply to ensure that the system is in standby It consumes no power in the state and runs stably when wake up.
The power consumption of less than 1 milliwatt during static standby is achieved, the system stability is ensured, and the overall cost is greatly reduced through simple low-cost devices, realizing bidirectional system MCU and power control of a single communication line.
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Figure CN119154634A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of frequency conversion series products, and in particular relates to a low-power consumption control system circuit. Background Art
[0002] At present, conventional low-power system circuit control includes the following methods: 1. Cut off the high-voltage power supply by using a relay, for example, to cut off the high-voltage voltage. The disadvantages of this method are: high-cost relays and an additional AD-DC circuit with variable frequency power supply; 2. Let the chip sleep and wake up the chip externally. The disadvantages of this method are: the MCU needs to be powered, and there is extra loss in the LDO / DC-DC power conversion process; 3. Forcibly cut off the MCU power supply through a low-voltage MOS. The disadvantage of this method is: insufficient system stability. In order to solve the above high power consumption problem, a control low-power system circuit is proposed. Summary of the invention
[0003] The purpose of the present invention is to provide a low power consumption control system circuit to solve the existing problems.
[0004] In order to solve the above technical problems, the present invention is achieved through the following technical solutions:
[0005] The present invention is a control low power consumption system circuit, comprising a communication line circuit, an isolation communication circuit and a load power supply control circuit, wherein the load power supply control circuit is composed of an isolation control circuit, a non-isolation control circuit and a switch circuit;
[0006] The isolation control circuit is composed of an anti-interference resistor, an NPN transistor, a transistor output optocoupler, a current limiting resistor, an MBPOWER power supply and a ground GND3, the isolation output emitter is connected to PGND, and the collector is connected to the gate of the P-type MOSFET;
[0007] The non-isolated control circuit is composed of an anti-interference resistor, a filter capacitor, an NPN transistor, a control signal BP_POWER and a PGND terminal;
[0008] The switch circuit is composed of a filter capacitor, a filter capacitor, a P-type MOSFET, a pull-up resistor, a BYQPOWER power input terminal PGND and a BPPOWER power output terminal;
[0009] The communication line circuit is composed of a 3PIN female socket, a current limiting anti-interference resistor, a filter capacitor, an MBPOWER power line, a GND3 ground line and a D data transmission line;
[0010] The isolated communication circuit is composed of a current limiting resistor, an anti-interference resistor, a transistor output optical coupler, a TX transmission port, and an RX reception port.
[0011] The current-limiting resistor is connected to the anti-interference resistor, the anti-interference resistor is connected to the current-limiting anti-interference resistor, and the current-limiting anti-interference resistor is connected to the data transmission line; the current-limiting resistor is connected to the transistor output optocoupler, the transistor output optocoupler is connected to the anti-interference resistor, the anti-interference resistor is connected to the current-limiting anti-interference resistor, the base of the NPN transistor is connected to the current-limiting anti-interference resistor, the NPN transistor is connected to the transistor output optocoupler, the NPN transistor is connected in parallel with the filter capacitor to the anti-interference resistor, the anti-interference resistor is connected to BP_POWER, BYQPOWER is connected to the source of the P-type MOSEFT, the shunt resistor is connected to the source and gate of the P-type MOSEFT, and the filter capacitor is connected to the 3PIN female socket.
[0012] In one embodiment, when BPBPOWER is turned off, the PGND power output process is as follows: when the data signal of the D data transmission line is set low, one path of MBPOWER flows through the current-limiting resistor, then to the anti-interference resistor and then to the current-limiting resistor to the D data transmission line; another path of MBPOWER flows to the current-limiting resistor, then to the anode of the light-emitting diode of the transistor output optocoupler and then to the cathode, then from the cathode to the anti-interference resistor, then the anti-interference resistor to the current-limiting resistor, and reaches the D data transmission line through the current-limiting resistor; the base of the NPN transistor is connected to the current-limiting resistor, and after passing through the current-limiting resistor to the D data transmission line, the voltage from the base to the emitter of the NPN transistor is less than 0.7V, 102CE is cut off, resulting in the cut-off of the light-emitting diode of the transistor output optocoupler, and when the light-emitting diode is cut off, the output triode of the optocoupler is cut off; when BP_POWER is set low, the voltage of the base of the NPN transistor and the filter capacitor passes through the anti-interference resistor to BP_POWER, resulting in the voltage from the base to the emitter of the NPN transistor connected to PGND being less than 0.7, causing the NPN transistor CE to be cut off; BYQPOWER is connected to the source of the P-type MOSEFT, the shunt resistor is connected to the source and gate of the P-type MOSEFT, at this time Vsg<Vth, so the P-type MOSEFT is cut off and there is no BPBPOWER power output.
[0013] In one of the embodiments, when BPBPOWER is turned on, the PGND power supply output process is: when the data signal of the D data transmission line is set high, the data signal reaches the anti-interference resistor through the current limiting resistor, and then reaches the base of the NPN transistor. At this time, the base-to-emitter voltage is greater than 0.7V, and the CE of the NPN transistor is turned on. MBPOWER flows through the current limiting resistor to the anode of the transistor output optocoupler light-emitting diode and flows to the cathode, and then flows to the collector of the NPN transistor and flows through the emitter to GND3. In this process, the light-emitting diode of the transistor output optocoupler is turned on, causing the collector of the transistor output optocoupler transistor to flow to the emitter to PGND. ND, in this process BYQPOWER is connected to the source of P-type MOSFET, and the shunt resistor is connected to the source and gate of P-type MOSFET. At this time, Vsg>Vth, so the P-type MOSFET turns on the BPBPOWER power supply output, and then BP_POWER is set high to flow through the anti-interference resistor to reach the filter capacitor, and then reaches the base of the NPN transistor. At this time, the voltage from the base to the emitter is greater than 0.7V, and the CE of the NPN transistor is turned on and keeps BP_POWER high to maintain the P-type MOSFET turned on. The BPBPOWER power supply output is no longer affected by whether the transistor output optocoupler is turned on or off.
[0014] In one of the embodiments, the TX working process is turned on: when TX receives a high level, the voltage difference between the anode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by MUCPOWER and the cathode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by TX is less than the forward bias voltage, resulting in the output transistor CE of the transistor output optocoupler being cut off, and MBPOWER passes through the current limiting resistor and the anti-interference resistor and reaches the D data transmission line, at which time the D data transmission line outputs a high level signal;
[0015] When TX receives a low level, the voltage difference between the anode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by MUCPOWER and the cathode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by TX is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to GND3. At this time, the D data transmission line passes through the current limiting anti-interference resistor, passes through the anti-interference resistor, and then to the collector of the transistor output optocoupler transistor is also set to a low level.
[0016] In one of the embodiments, the RX working process is turned on: when the anti-interference resistor receives a high level, the high-level signal of the anti-interference resistor passes through the current-limiting anti-interference resistor and reaches the cathode of the transistor output optocoupler light-emitting diode, and MBPOWER passes through the current-limiting resistor to reach the anode of the transistor output optocoupler light-emitting diode. At this time, the voltage difference of the cathode terminal of the transistor output optocoupler light-emitting diode is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to be cut off, and the voltage of MUCPOWER to the RX line end after passing through the current-limiting resistor outputs a high-level signal;
[0017] When the anti-interference resistor receives a low level, MBPOWER reaches the anode of the light-emitting diode of the transistor output optocoupler through the current limiting resistor, and the anti-interference resistor is connected to the cathode end of the light-emitting diode of the transistor output optocoupler. At this time, the voltage difference between the anode and the cathode is greater than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to be turned on and the E pole to be connected to PGND, then MUCPOWER is also set to a low level after passing through the current limiting resistor, and the RX end outputs a low level.
[0018] The present invention has the following beneficial effects:
[0019] 1. The static standby part needs to be less than 1 milliwatt, or consume no power;
[0020] 2. Before entering standby mode, communicate with each other to confirm instead of hard power off to effectively ensure system stability;
[0021] 3. Only a few simple low-cost components are needed, which greatly saves costs;
[0022] 4. A single communication line enables the two system MCUs to communicate with each other and turn the power system on / off.
[0023] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0025] Figure 1 A circuit diagram for controlling a low power consumption system circuit;
[0026] Figure 2 A system block diagram for controlling a low power consumption system circuit;
[0027] Figure 3 This is a circuit diagram of the first alternative of the present invention;
[0028] Figure 4 A second alternative circuit diagram of the present invention;
[0029] Figure 5 A third alternative circuit diagram of the present invention;
[0030] Figure 6 A fourth alternative circuit diagram of the present invention;
[0031] Figure 7 This is a circuit diagram of a fifth alternative solution of the present invention.
[0032] In the accompanying drawings, the components represented by the reference numerals are listed as follows:
[0033] 100, 134: P-type MOSFET; 101, 102, 135: NPN transistor; 103, 104, 105: transistor output optocoupler; 106, 107, 108, 109: filter capacitor; 110: pull-up resistor; 111, 113, 118, 120: anti-interference resistor; 112, 114, 115, 116, 117, 119: current limiting resistor; 121, 130: current limiting anti-interference resistor; 122: 3PIN female socket; 123: load power control circuit; 124: isolated communication circuit; 125: communication line circuit; 126: switch circuit; 127: non-isolated control circuit; 128: isolated control circuit; 131: D data transmission line; 132, voltage divider resistor; 133: anti-reverse diode; 200: low power system circuit; 201: control panel; 202: AC-DC power supply module; 203: EMI circuit; 204: frequency conversion system; 205: three-phase motor; 206: load. DETAILED DESCRIPTION
[0034] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0035] In the description of the present invention, it should be understood that the terms "upper", "middle", "outer", "inner" and the like indicating directions or positional relationships are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the components or elements referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as limiting the present invention.
[0036] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0037] See also Figure 1 As shown, the control low power consumption system circuit of this embodiment includes a communication line circuit 125, an isolated communication circuit 124 and a load power supply control circuit 123, and the load power supply control circuit 123 is composed of an isolated control circuit 128, a non-isolated control circuit 127 and a switch circuit 126;
[0038] The isolation control circuit 128 is composed of an anti-interference resistor 113, an NPN transistor 102, a transistor output optical coupler 103, a current limiting resistor 112, an MBPOWER power supply and a ground GND3, and the isolation output emitter is connected to PGND, and the collector is connected to the gate of the P-type MOS EFT 100;
[0039] The non-isolated control circuit 127 is composed of an anti-interference resistor 111, a filter capacitor 108, an NPN transistor 101, a control signal BP_POWER and a PGND terminal;
[0040] The switch circuit 126 is composed of a filter capacitor 106, a filter capacitor 107, a P-type MOSFET 100, a pull-up resistor 110, a BYQPOWER power input terminal PGND and a BPBPOWER power output terminal;
[0041] The communication line circuit 125 is composed of a 3PIN female socket 122, a current limiting anti-interference resistor 121, a filter capacitor 109, an MBPOWER power line, a GND3 ground line and a D data transmission line 131;
[0042] The isolated communication circuit 124 is composed of current limiting resistors 114 / 115 / 116 / 117 / 119, anti-interference resistors 118 / 120, transistor output optical couplers 104 / 105, TX transmission ports, and RX reception ports;
[0043] The current-limiting resistor is connected to the anti-interference resistor, the anti-interference resistor 120 is connected to the current-limiting anti-interference resistor 121, and the current-limiting anti-interference resistor 121 is connected to the data transmission line 131; the current-limiting resistor 119 is connected to the transistor output optocoupler 105, the transistor output optocoupler 105 is connected to the anti-interference resistor 118, the anti-interference resistor 118 is connected to the current-limiting anti-interference resistor 121, the base of the NPN transistor 102 is connected to the current-limiting anti-interference resistor 121, the NPN transistor 102 is connected to the transistor output optocoupler 103, the NPN transistor 101 is connected in parallel with the filter capacitor 108 to the anti-interference resistor 111, the anti-interference resistor 111 is connected to BP_POWER, BYQPOWER is connected to the source of the P-type MOSEFT 100, the pull-up resistor 110 is connected to the source and gate of the P-type MOSEFT 100, and the filter capacitor 109 is connected to the 3PIN female socket 122.
[0044] In the control low-power system circuit of this embodiment, when BPBPOWER is turned off, the PGND power supply output process is as follows: when the data signal of the D data transmission line 131 is set low, one path of MBPOWER flows through the current-limiting resistor 117, then to the anti-interference resistor 120 and then to the current-limiting resistor 121 to the D data transmission line 131; the other path of MBPOWER flows to the current-limiting resistor 119, then to the anode of the light-emitting diode of the transistor output optocoupler 105 and then to the cathode, and then from the cathode to the anti-interference resistor 118, and then the anti-interference resistor 118 flows to the current-limiting resistor 121 and reaches the D data transmission line 131 through the current-limiting resistor 121; the base of the NPN transistor 102 is connected to the current-limiting resistor 121, and after passing through the current-limiting resistor 121 to the D data transmission line 131, the voltage from the base to the emitter of the NPN transistor 102 is less than 0.7V, and the NPN transistor 102 CE is cut off, resulting in the cut-off of the light-emitting diode of the transistor output optocoupler 103, and the cut-off of the light-emitting diode results in the cut-off of the output triode of the optocoupler; when BP_POWER is also set low, the voltage of the base of the NPN transistor 101 and the filter capacitor 108 passes through the anti-interference resistor 111 to BP_POWER, resulting in the voltage from the base to the emitter of the NPN transistor 101 connected to PGND being less than 0.7, resulting in the cut-off of the NPN transistor 101 CE; BYQPOWER is connected to the source of the P-type MOSEFT 100, the pull-up resistor 110 is connected to the source and gate of the P-type MOSEFT 100, at this time Vsg < Vth, so the P-type MOSEFT 100 is cut off and there is no BPBPOWER power supply output.
[0045] In the control low power consumption system circuit of this embodiment, when BPBPOWER is turned on, the PGND power supply output process is as follows: When the data signal of the D data transmission line 131 is set high, the data signal reaches the anti-interference resistor 113 through the current limiting resistor 121, and then reaches the base of the NPN transistor 102. At this time, the base-to-emitter voltage is greater than 0.7V, and the CE of the NPN transistor 102 is turned on. MBPOWER flows through the current limiting resistor 112 to the anode of the light-emitting diode of the transistor output optocoupler 103 and flows to the cathode, and then flows to the collector of the NPN transistor 102 and flows through the emitter to GND3. In this process, the light-emitting diode of the transistor output optocoupler 103 is turned on, resulting in the collector of the transistor output optocoupler 103 flowing to the emitter to PGND, in this process BYQPOWER is connected to the source of P-type MOS EFT 100, and the pull-up resistor 110 is connected to the source and gate of P-type MOS EFT 100. At this time, Vsg>Vth, so P-type MOS EFT 100 turns on BPBPOWER power output, and then BP_POWER is set high to flow through the anti-interference resistor 111 to the filter capacitor 108, and then reaches the base of the NPN transistor 101. At this time, the voltage from the base to the emitter is greater than 0.7V, and the CE of the NPN transistor 101 is turned on and keeps BP_POWER set high to maintain the P-type MOS EFT 100 turned on. BPBPOWER power output is no longer affected by whether the transistor output optocoupler 103 is turned on or off.
[0046] The control low power consumption system circuit of this embodiment opens the TX working process: when TX receives a high level, the voltage difference between the anode terminal voltage of the light emitting diode of the MUCPOWER connection current limiting resistor 114 to the transistor output optocoupler 104 and the cathode terminal voltage of the light emitting diode of the TX connection current limiting resistor 115 to the transistor output optocoupler 104 is less than the forward bias voltage, resulting in the output transistor CE of the transistor output optocoupler 104 being cut off, and the MBPOWER passes through the current limiting resistor 117, the anti-interference resistor 120, the current limiting anti-interference resistor 121, and reaches the D data transmission line 131. At this time, the D data transmission line 131 outputs a high level signal;
[0047] When TX receives a low level, the voltage difference between the anode terminal voltage of the light-emitting diode of the transistor output optocoupler 104 connected by MUCPOWER and the cathode terminal voltage of the light-emitting diode of the transistor output optocoupler 104 connected by TX and the current limiting resistor 115 is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler 104 to GND3. At this time, the D data transmission line 131 passes through the current limiting anti-interference resistor 121, the anti-interference resistor 120 and then to the collector of the transistor output optocoupler 104, which is also set to a low level.
[0048] The control low power consumption system circuit of this embodiment opens the RX working process: when the anti-interference resistor 113 receives a high level, the high level signal of the anti-interference resistor 113 passes through the current limiting anti-interference resistor 121 and the anti-interference resistor 118 to reach the cathode of the light emitting diode of the transistor output optocoupler 105, and MBPOWER passes through the current limiting resistor 119 to reach the anode of the light emitting diode of the transistor output optocoupler 105. At this time, the voltage difference of the cathode terminal of the light emitting diode of the transistor output optocoupler 105 is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler 105 to be cut off, and the voltage of MUCPOWER to the RX line end after passing through the current limiting resistor 116 outputs a high level signal;
[0049] When the anti-interference resistor 113 receives a low level, MBPOWER reaches the anode of the light-emitting diode of the transistor output optocoupler 105 through the current limiting resistor 119, the anti-interference resistor 113 is connected to the current limiting anti-interference resistor 121 and the anti-interference resistor 118 to the cathode end of the light-emitting diode of the transistor output optocoupler 105. At this time, the voltage difference between the anode and the cathode is greater than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler 105 to be turned on and the E pole to be connected to PGND, then MUCPOWER is also set to a low level after passing through the current limiting resistor 116, and the RX end outputs a low level.
[0050] See also Figure 2 As shown, this embodiment is a load working process of controlling a low-power system circuit: the AC power outputs a high-voltage DC power supply through the EMI circuit 203, one path flows to the frequency conversion system 204 to provide it with a high-voltage DC power supply, and the other path flows to the AC-DC power supply module 202 to provide a high-voltage DC power supply for AC-DC conversion, and then the BYQPOWER, PGND and MBPOWER, GND3 generated by the AC-DC conversion of the AC-DC power supply module 202 flow to the control low-power system circuit 200, and the MBPOWER and GND3 of the control low-power system circuit 200 flow to the control panel 201 to power it.
[0051] When the control panel 201 needs to control the frequency conversion system 204 to work, the control panel 201 will be connected to the control low power system circuit 200 through the data line D for control, and the BPBPOWER and PGND output by the control low power system circuit 200 are connected to the frequency conversion system 204 to provide it with a low voltage power supply;
[0052] When the low-voltage power supply of the frequency conversion system 204 is working normally, the frequency conversion system 204 maintains the control low-power system circuit 200 by connecting to the BP_POWER of the control low-power system circuit 200 to continuously provide the frequency conversion system 204 with BPBPOWER and PGND low-voltage power supplies. Then the frequency conversion system 204 is connected to the control low-power system circuit 200 through TX, and sends data to the control low-power system circuit 200. The control low-power system circuit 200 outputs the received data to the data line D and transmits it to the control panel 201. After the control panel 201 confirms that the frequency conversion system 204 is normal, the output data line D is connected to the frequency conversion system 204 through the control low-power system circuit 200 output RX, and sends control UVW205 to the frequency conversion system 204, which is connected to the load 206 through UVW205, and the load 206 is controlled to work through UVW205.
[0053] When the load 206 is turned off, the frequency conversion system 204 enters the standby process: the control panel 201 outputs a shutdown signal and transmits it to the control low power system circuit 200 through the data line D. The control low power system circuit 200 outputs a shutdown signal and transmits it to the frequency conversion system 204 through RX. The frequency conversion system 204 self-checks and confirms that the system can be shut down normally. The frequency conversion system 204 replies to the control panel 201 by outputting TX and connecting to the control low power system circuit 200. The control low power system circuit 200 outputs a signal to the data line D and connects to the control panel 201. The control panel 201 receives the correct reply from the frequency conversion system 204, and then sends a shutdown command output signal to the control low power system circuit 200 through the data line D. The control low power system circuit 200 outputs TX and transmits it to the control low power system circuit 200. To the frequency conversion system 204, the frequency conversion system 204 controls the load 206 to shut down through UVW205. After the frequency conversion system 204 confirms the shutdown, it outputs a shutdown confirmation signal and transmits it to the control low-power system circuit 200 through TX. The control low-power system circuit 200 transmits it back to the control panel 201 through the data line D. After receiving the command, the control panel 201 outputs a shutdown signal and transmits it to the control low-power system circuit 200 through the data line D. Then, after a certain delay, the frequency conversion system 204 outputs a shutdown signal and connects to the control low-power system circuit 200 through BP_POWER. The control low-power system circuit 200 outputs a shutdown BPBPOWER and PGND low-voltage power supply signal to the frequency conversion system 204. At this time, the frequency conversion system 204 completes the standby process.
[0054] This embodiment is an alternative solution for controlling a low-power system circuit:
[0055] Alternative solution 1: Figure 2 and Figure 3 As shown, Figure 3 The circuit ratio Figure 2The circuit lacks the anti-interference resistor 113 and the NPN transistor 102. The control difference between this alternative solution and the original solution is that the logic of the D data transmission line 131 setting high / low to control the on / off of the transistor output optocoupler 103 is opposite.
[0056] Alternative 2: If Figure 2 and Figure 4 As shown, Figure 4 The circuit ratio Figure 2 The circuit lacks the filter capacitor 108 and the NPN transistor 101. The control difference between this alternative scheme and the original scheme is that the BP_POWER signal controls the on / off of the P-type MOSFET 100, and the BP_POWER control logic is opposite; Figure 4 The circuit ratio Figure 2 The circuit lacks the anti-interference resistor 113 and the NPN transistor 102. The control difference between this alternative solution and the original solution is that the logic of the D data transmission line 131 setting high / low to control the on / off of the transistor output optocoupler 103 is opposite.
[0057] Alternative 3: If Figure 2 and Figure 5 As shown, Figure 5 The circuit Figure 2 The anti-interference resistor 113 and the NPN transistor 102 in the circuit are replaced by a voltage dividing resistor 132, a current limiting anti-interference resistor 130 and a PNP transistor 135. The control difference between this alternative scheme and the original scheme is that the logic of the D data transmission line 131 setting high / low to control the on / off of the transistor output optocoupler 103 is opposite.
[0058] Alternative 4: If Figure 2 and Figure 6 As shown, Figure 6 The circuit ratio Figure 2 The circuit has an additional reverse flow protection diode 133. The control difference between this alternative scheme and the original scheme is that when controlling the on / off of the P-type MOSFET 100, it prevents the voltage at the BPBPOWER end from being greater than the voltage at the BYQPOWER end and flowing back to the BYQPOWER.
[0059] Alternative 5: If Figure 2 , Figure 6 and Figure 7 As shown, Figure 7 The circuit ratio Figure 2 The circuit has an additional P-type MOSFET134. The difference between this alternative and the original control scheme is that when controlling the on / off of the P-type MOSFET100, if the voltage at the BPBPOWER end is greater than the voltage at the BYQPOWER and reversely flows to the BYQPOWER, the P-type MOSFET134 is used instead. Figure 6 The anti-reverse connection diode 133 in the circuit can withstand a larger load, but the cost is also increased.
[0060] In the description of this specification, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.
[0061] The preferred embodiments of the present invention disclosed above are only used to help explain the present invention. The preferred embodiments do not describe all the details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.
Claims
1. A control low power consumption system circuit, comprising a communication line circuit, an isolation communication circuit and a load power supply control circuit, characterized in that: The load power supply control circuit is composed of an isolation control circuit, a non-isolation control circuit and a switch circuit; The isolation control circuit is composed of an anti-interference resistor, an NPN transistor, a transistor output optocoupler, a current limiting resistor, an MBPOWER power supply and a ground GND3, the isolation output emitter is connected to PGND, and the collector is connected to the gate of the P-type MOSFET; The non-isolated control circuit is composed of an anti-interference resistor, a filter capacitor, an NPN transistor, a control signal BP_POWER and a PGND terminal; The switch circuit is composed of a filter capacitor, a filter capacitor, a P-type MOSFET, a pull-up resistor, a BYQPOWER power input terminal PGND and a BPPOWER power output terminal; The communication line circuit is composed of a 3PIN female socket, a current limiting anti-interference resistor, a filter capacitor, an MBPOWER power line, a GND3 ground line and a D data transmission line; The isolated communication circuit is composed of a current limiting resistor, an anti-interference resistor, a transistor output optical coupler, a TX transmission port, and an RX receiving port; The current limiting resistor is connected to the anti-interference resistor, the anti-interference resistor is connected to the current limiting anti-interference resistor, and the current limiting anti-interference resistor is connected to the data transmission line; the current limiting resistor is connected to the transistor output optocoupler, the transistor output optocoupler is connected to the anti-interference resistor, the anti-interference resistor is connected to the current limiting anti-interference resistor, the base of the NPN transistor is connected to the current limiting anti-interference resistor, the NPN transistor is connected to the transistor output optocoupler, the NPN transistor and the filter capacitor are connected to the anti-interference resistor in parallel, the anti-interference resistor is connected to BP_POWER, BYQPOWER is connected to the source of P-type MOSFET, the shunt resistor is connected to the source and gate of P-type MOSFET, and the filter capacitor is connected to the 3PIN female socket.
2. A low power consumption control system circuit according to claim 1, characterized in that: When BPBPOWER is turned off, the PGND power supply output process is as follows: when the data signal on the D data transmission line is set low, one path of MBPOWER flows through the current-limiting resistor, then to the anti-interference resistor and then to the current-limiting resistor to the D data transmission line; the other path of MBPOWER flows to the current-limiting resistor, then to the anode of the light-emitting diode of the transistor output optocoupler and then to the cathode, and then from the cathode to the anti-interference resistor, and then the anti-interference resistor flows to the current-limiting resistor and reaches the D data transmission line 131 through the current-limiting resistor; the base of the NPN transistor is connected to the current-limiting resistor, and after passing through the current-limiting resistor to the D data transmission line, the voltage from the base to the emitter of the NPN transistor is less than 0.7V, and the CE of the NPN transistor is cut off, resulting in the cut-off of the light-emitting diode of the transistor output optocoupler, and when the light-emitting diode is cut off, the output triode of the optocoupler is cut off; when BP_POWER is set low, the voltage of the base of the NPN transistor and the filter capacitor passes through the anti-interference resistor to BP_POWER, resulting in the voltage from the base to the emitter of the NPN transistor connected to PGND being less than 0.7, causing the CE of the NPN transistor to be cut off; BYQPOWER is connected to the source of the P-type MOSEFT, and the shunt resistor is connected to the source and gate of the P-type MOSEFT. At this time, Vsg<Vth, so the P-type MOSEFT is cut off and there is no BPBPOWER power supply output.
3. A low power consumption control system circuit according to claim 1, characterized in that: When BPBPOWER is turned on, the PGND power supply output process: when the data signal on the D data transmission line is set high, the data signal reaches the anti-interference resistor through the current-limiting resistor, and then reaches the base of the NPN transistor. At this time, the voltage from the base to the emitter is greater than 0.7V, and the CE of the NPN transistor conducts. MBPOWER flows through the current-limiting resistor to the anode of the light-emitting diode of the transistor output optocoupler and flows to the cathode, and then to the collector of the NPN transistor and flows through the emitter to GND3. In this process, the conduction of the light-emitting diode of the transistor output optocoupler causes the collector of the transistor output optocoupler triode to flow to the emitter to PGND. In this process, BYQPOWER is connected to the source of the P-type MOSEFT, and the shunt resistor is connected to the source and gate of the P-type MOSEFT. At this time, Vsg>Vth, so the P-type MOSEFT conducts and BPBPOWER power supply is output. Then BP_POWER is set high and flows through the anti-interference resistor to the filter capacitor, and then reaches the base of the NPN transistor. At this time, the voltage from the base to the emitter is greater than 0.7V, and the CE of the NPN transistor conducts and maintains BP_POWER set high to maintain the conduction of the P-type MOSEFT and the BPBPOWER power supply output is no longer affected by whether the transistor output optocoupler is conducting or off.
4. A low power consumption control system circuit according to claim 1, characterized in that: Turn on TX working process: When TX receives a high level, the voltage difference between the anode terminal voltage of the light-emitting diode of the MUCPOWER connected current-limiting resistor to the transistor output optocoupler and the cathode terminal voltage of the light-emitting diode of the TX connected current-limiting resistor to the transistor output optocoupler is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to be cut off, and MBPOWER passes through the current-limiting resistor and the anti-interference resistor to reach the data transmission line. At this time, the D data transmission line outputs a high level signal; When TX receives a low level, the voltage difference between the anode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by MUCPOWER and the cathode terminal voltage of the light-emitting diode of the transistor output optocoupler connected by TX is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to GND3. At this time, the D data transmission line passes through the current limiting anti-interference resistor, passes through the anti-interference resistor, and then to the collector of the transistor output optocoupler transistor is also set to a low level.
5. The low power consumption control system circuit according to claim 1, characterized in that: Open RX working process: when the anti-interference resistor receives a high level, the high-level signal of the anti-interference resistor passes through the current-limiting anti-interference resistor and reaches the cathode of the transistor output optocoupler light-emitting diode, and MBPOWER passes through the current-limiting resistor to reach the anode of the transistor output optocoupler light-emitting diode. At this time, the voltage difference of the cathode terminal of the transistor output optocoupler light-emitting diode is less than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to be cut off, and the voltage of MUCPOWER to the RX line end after passing through the current-limiting resistor outputs a high-level signal; When the anti-interference resistor receives a low level, MBPOWER reaches the anode of the light-emitting diode of the transistor output optocoupler through the current limiting resistor, and the anti-interference resistor is connected to the cathode end of the light-emitting diode of the transistor output optocoupler. At this time, the voltage difference between the anode and the cathode is greater than the forward bias voltage, causing the output transistor CE of the transistor output optocoupler to be turned on and the E pole to be connected to PGND, then MUCPOWER is also set to a low level after passing through the current limiting resistor, and the RX end outputs a low level.
