High-density memory chip packaging structure design method, device and equipment

Abstract

The present invention relates to a method, device and equipment for designing a high-density memory chip packaging structure. The method: based on the current packaging structure parameter combination, a multi-chip stacking structure of a high-density memory chip is three-dimensionally modeled to obtain a packaging structure model; a finite element analysis is performed to obtain stress distribution data and a stress-strain curve; feature extraction and feature fusion are performed to obtain a fused feature vector; a structure optimization model is obtained based on multi-layer feedforward neural network training; dependency analysis is performed to construct a parameter tree structure and assign corresponding priority values; multiple packaging structure parameters are sorted and optimized one by one using the parameter tree structure and the priority value, and an adaptive penalty function method is used to process constraint conditions to obtain a target packaging structure parameter combination. The implementation of the present invention improves the design efficiency and performance of the high-density memory chip packaging structure.

Description

Technical Field

[0001] The present invention relates to the technical field of memory chip packaging, and in particular to a method, device and equipment for designing a high-density memory chip packaging structure. Background Art

[0002] The design of the packaging structure of high-density memory chips directly affects the performance, reliability and service life of the chips. With the continuous increase in storage capacity and the continuous reduction in chip size, multi-chip stacking structure has become the mainstream solution for high-density memory chip packaging. However, this tightly stacked structure often faces failure problems such as package cracks in reliability tests such as temperature cycle tests, which seriously affects the yield and reliability of the product.

[0003] Traditional packaging structure design methods mainly rely on engineering experience and trial and error, and it is difficult to find the optimal solution in a complex multi-parameter space. Although finite element analysis can simulate the stress distribution of chip packaging under different conditions, optimization based solely on finite element analysis is time-consuming and inefficient, and it is difficult to meet the needs of rapid iteration. In addition, the complex interactions between packaging structure parameters make the optimization process more difficult, and conventional optimization algorithms are difficult to effectively handle such high-dimensional nonlinear problems. Summary of the invention

[0004] The main purpose of the present invention is to provide a method, device and equipment for designing a high-density memory chip packaging structure. The present invention fully utilizes the accuracy of finite element analysis while overcoming its disadvantage of time-consuming calculation; it can capture the complex dependencies between packaging structure parameters and achieve global optimization; it also has adaptive capabilities and can flexibly adjust the optimization strategy according to different constraints, thereby improving the design efficiency and performance of the high-density memory chip packaging structure.

[0005] To achieve the above object, the present invention provides a method for designing a high-density memory chip packaging structure, comprising the following steps:

[0006] Based on the current combination of packaging structure parameters, a three-dimensional modeling of a multi-chip stacking structure of a high-density memory chip is performed to obtain a packaging structure model;

[0007] Based on the preset temperature cycle test conditions, a finite element analysis is performed on the packaging structure model to obtain stress distribution data and a stress-strain curve;

[0008] Performing feature extraction and feature fusion on the stress distribution data and the stress-strain curve to obtain a fused feature vector;

[0009] Combining the fused feature vector and the current packaging structure parameters into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training;

[0010] Based on the structure optimization model, a dependency analysis is performed on a plurality of packaging structure parameters, a parameter tree structure is constructed, and a corresponding priority value is assigned according to the influence of each packaging structure parameter on the high-density storage chip;

[0011] The parameter tree structure and the priority value are used to sort and optimize the multiple packaging structure parameters one by one, and the constraint conditions are processed by an adaptive penalty function method to obtain a target packaging structure parameter combination.

[0012] The present invention also provides a high-density memory chip packaging structure design device, comprising:

[0013] A modeling module, used for performing three-dimensional modeling of a multi-chip stacking structure of a high-density memory chip based on a current combination of packaging structure parameters to obtain a packaging structure model;

[0014] An analysis module, used to perform finite element analysis on the packaging structure model based on preset temperature cycle test conditions to obtain stress distribution data and stress-strain curve;

[0015] A fusion module, used for extracting and fusing features of the stress distribution data and the stress-strain curve to obtain a fused feature vector;

[0016] A training module, used for inputting the fused feature vector and the current package structure parameter combination into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training;

[0017] An allocation module, configured to perform dependency analysis on a plurality of packaging structure parameters based on the structure optimization model, construct a parameter tree structure, and allocate a corresponding priority value according to the degree of influence of each packaging structure parameter on the high-density storage chip;

[0018] The optimization module is used to sort and optimize the multiple packaging structure parameters one by one by using the parameter tree structure and the priority value, and at the same time use an adaptive penalty function method to process constraint conditions to obtain a target packaging structure parameter combination.

[0019] The present invention also provides a computer device, comprising a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of any one of the above methods when executing the computer program.

[0020] The present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned methods are implemented.

[0021] In summary, the technical solution provided by the present invention combines three-dimensional modeling and finite element analysis to achieve high-precision stress distribution and stress-strain curve prediction. By extracting and fusing features of stress distribution data and stress-strain curves, the data dimension is effectively reduced, the most representative features are extracted, and a multi-layer feedforward neural network is used to construct a structural optimization model, which realizes the rapid mapping between packaging structure parameters and performance indicators, and greatly reduces the calculation time in the optimization process. The parameter tree structure and priority value are introduced to effectively capture the complex dependencies between the packaging structure parameters, making the optimization process more efficient and targeted. The adaptive penalty function method is used to handle the constraints, so that the optimization algorithm can flexibly respond to different constraints, and improves the applicability and robustness of the algorithm. By combining optimization one by one with global verification, while ensuring the local optimum, it also avoids the risk of falling into the local optimal solution, and increases the probability of obtaining the global optimal solution. The present invention makes full use of the accuracy of finite element analysis, while overcoming its time-consuming calculation shortcomings; it can capture the complex dependencies between the packaging structure parameters and achieve global optimization; it also has adaptive capabilities, and can flexibly adjust the optimization strategy according to different constraints, thereby improving the design efficiency and performance of the high-density memory chip packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a schematic diagram of the steps of a method for designing a high-density memory chip packaging structure in one embodiment of the present invention;

[0023] Figure 2 It is a structural block diagram of a high-density memory chip packaging structure design device in one embodiment of the present invention;

[0024] Figure 3 It is a schematic block diagram of the structure of a computer device according to an embodiment of the present invention.

[0025] The realization of the purpose, functional features and advantages of the present invention will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0027] Reference Figure 1 This embodiment provides a method for designing a high-density memory chip packaging structure, comprising the following steps:

[0028] S1, performing three-dimensional modeling of a multi-chip stacking structure of a high-density memory chip based on a current combination of packaging structure parameters to obtain a packaging structure model;

[0029] Among them, the parameter combination of the current packaging structure is analyzed, and key parameter information including the number of chips, thickness of each layer of chips, chip area, substrate thickness, substrate area, thickness of interlayer adhesive, and thickness of epoxy molding compound packaging is extracted to form a complete structural parameter vector. Based on the structural parameter vector, a geometric model of multi-layer chip stacking is constructed, and the three-dimensional coordinates of each layer of chips in space and their corresponding spatial orientation are determined to obtain the initial stacking structure model. The initial stacking structure is adaptively meshed to more accurately simulate the stress distribution and thermodynamic response of the chip during actual use. In the meshing process, special treatment is performed on the edge, interface transition zone, and stress concentration zone of the chip, and the tetrahedral mesh is refined to have a higher resolution in the key area, so as to accurately capture the detailed features of stress and deformation and form a multi-resolution meshed stacking model. In order to accurately simulate the physical response of various materials in the packaging structure under temperature and stress, the physical and thermodynamic property data of various materials such as chips, substrates, adhesives, and epoxy molding compounds are extracted from the preset material database, including parameters such as Young's modulus, Poisson's ratio, thermal expansion coefficient, and thermal conductivity. These data constitute a multidimensional material property tensor that describes the physical behavior and thermodynamic properties of different materials. The multidimensional material property tensor is mapped to each grid cell of the multi-resolution grid stacking model, and the transition zone between different materials is processed by the interpolation algorithm to ensure that the material properties can be smoothly transitioned in the interface transition area to obtain an attributed stacking model. Based on the attributed stacking model, the boundary conditions of the temperature cycle test are set, including parameters such as temperature range, heating and cooling rate, dwell time, and number of cycles. At the same time, the initial conditions of gravity and prestress are applied to simulate the stress and deformation of the chip in the actual working environment, and a boundary stacking model containing real working condition boundary conditions is obtained. In order to simplify the complexity of the model and improve the analysis efficiency, the boundary stacking model is geometrically simplified and topologically optimized. In the process of geometric simplification, geometric features less than the preset threshold are removed to reduce the complexity and calculation amount of the model. At the same time, by merging grid cells with similar properties, the topological structure of the model is simplified, and finally the packaging structure model is obtained.

[0030] S2, based on the preset temperature cycle test conditions, perform finite element analysis on the packaging structure model to obtain stress distribution data and stress-strain curve;

[0031] Specifically, a global stiffness matrix and a mass matrix are constructed based on the package structure model. The thermal-mechanical coupling matrix is ​​calculated by combining the multi-dimensional material property tensor to obtain a global system matrix related to temperature. The global system matrix can simultaneously reflect the physical properties of the material and the influence of temperature on these properties. The preset temperature cycle test conditions are converted into a piecewise linear time-varying temperature load function and applied to the temperature-related global system matrix. At the same time, thermal stress boundary conditions and thermal strain initial conditions are applied to obtain a finite element equation group for thermal-mechanical coupling. This equation group reflects the thermal stress and corresponding strain changes of the entire package structure model during the temperature change process. In order to solve the coupled system, numerical solution technology is used. When solving the thermal-mechanical coupling finite element equation group, the Newton-Raphson iteration method is used, and the line search technology is combined to ensure the convergence of the iteration process. The Newton-Raphson iteration method is a nonlinear equation solving method that gradually approaches the exact solution of the equation group through continuous approximation and correction. The introduction of the line search technology is to appropriately adjust the step size during the iteration process to ensure the convergence speed and stability of the solution. At each time step, the temperature field and displacement field of each node in the packaging structure are obtained by iterative solution, and the transient temperature-displacement coupling data in the entire temperature cycle process are obtained. Based on the transient temperature-displacement coupling data, the strain tensor of each unit is calculated using the thermal-mechanical coupling strain-displacement relationship. The strain tensor is a key parameter to describe the deformation of the material. By calculating it, the deformation of the material under temperature cycle conditions can be clarified. The stress tensor is solved by the thermoelastic constitutive equation to obtain the thermal stress field data, which reflects the internal stress distribution of the material under different temperatures and stresses. The thermal stress field data is statistically analyzed and processed by cubic spline interpolation. Statistical analysis helps to identify the change law of stress in the entire temperature cycle process, while cubic spline interpolation smoothes the stress data to obtain a more accurate stress change trend. Based on these processes, the maximum principal stress, von Mises stress and Tresca stress of each grid node in the entire temperature cycle process are calculated. These stress indicators are key data for evaluating whether the material undergoes plastic deformation or failure, and finally form the stress distribution data of the packaging structure. Select representative key points such as the chip edge, interface transition zone, and epoxy molding compound surface center in the model. By extracting the stress and strain values ​​of the key points during the entire temperature cycle, the behavior changes of the structure in the high stress concentration area are reflected. The stress and strain data of the key points are fitted using the nonlinear least squares method to obtain the stress-strain curve of the key points.

[0032] S3, extracting and fusing features of stress distribution data and stress-strain curve to obtain fused feature vectors;

[0033] It should be noted that the stress distribution data is statistically analyzed to calculate the maximum stress value, minimum stress value, average stress value and standard deviation of each grid node. The statistical characteristics reflect the extreme conditions of stress on the packaging structure at different positions, and provide the overall fluctuation of stress distribution. The statistical feature set of stress is obtained by analysis, which is used to quantitatively evaluate the stress characteristics of different grid nodes. Based on the stress-strain curve obtained in the packaging structure model, the elastic modulus, yield strength, tensile strength and fracture strain parameters are calculated. These parameters describe the deformation characteristics and limit performance of the material under different stress states, such as the elastic modulus reflects the deformation resistance of the material in the elastic zone, the yield strength describes the stress value at which the material begins to undergo plastic deformation, and the tensile strength and fracture strain parameters respectively represent the ultimate bearing capacity of the material and the maximum strain that can be borne before fracture. These mechanical parameters constitute the stress-strain feature set. The stress statistical feature set and the stress-strain feature set are merged to construct an initial feature matrix. The initial feature matrix is ​​standardized. The mean of each feature is subtracted and then divided by its standard deviation to obtain a standardized feature matrix, so that all features are concentrated in a similar numerical range, which is convenient for subsequent calculation and analysis. Based on the standardized feature matrix, the correlation coefficients between features are calculated, and the feature correlation matrix is ​​constructed to evaluate the mutual dependence between different features. By analyzing the correlation coefficients between features, highly correlated features are identified. In order to reduce the redundancy of features and improve the computational efficiency of the model, a feature subset with a correlation coefficient lower than a preset threshold is selected to obtain a low-correlation feature set. By selecting a low-correlation feature set, the features retained in the subsequent analysis are ensured to be as independent as possible, the impact of collinearity between features on the model is reduced, and the characterization ability of the feature set is improved. The low-correlation feature set is subjected to feature dimensionality reduction. By using methods such as principal component analysis, the original high-dimensional feature set is compressed into a low-dimensional feature vector containing the main information, thereby reducing the complexity of the model and improving the efficiency and stability of the calculation. Through feature dimensionality reduction, a reduced-dimensional feature vector is obtained to effectively describe the main feature information in the packaging structure. The reduced-dimensional feature vector is spliced ​​with the original stress statistical feature set and the stress-strain feature set, and the final fused feature vector is obtained by weighted combination. In the process of weighted combination, weights are assigned according to the relative importance of different features to ensure that features that have a significant impact on the performance of the packaging structure receive more attention during the fusion process.

[0034] S4, inputting the fusion feature vector and the current package structure parameter combination into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training;

[0035] Specifically, the fused feature vector is combined with the current package structure parameters for splicing operation to obtain an input feature vector. The dimension of the input feature vector is equal to the sum of the dimension of the fused feature vector and the number of current package structure parameters. A five-layer feedforward neural network structure is constructed, including an input layer, three hidden layers and an output layer, wherein the number of neurons in the input layer is the same as the dimension of the input feature vector to ensure that all input information can be received. The first hidden layer is set to 128 neurons, the second hidden layer contains 64 neurons, and the third hidden layer contains 32 neurons. By reducing the number of neurons layer by layer, the high-level features of the input data are effectively extracted and gradually aggregated. The number of neurons in the output layer is the same as the number of package structure parameters to be optimized to ensure that the required optimization parameter values ​​can be output. The data of the input layer is batch normalized. By calculating the mean and standard deviation of each feature, and using the method of subtracting the mean and then dividing by the standard deviation to standardize the data, the dimensional differences between the features are eliminated, so that each feature has a similar numerical range, which helps to improve the convergence speed of the network and stabilize the training process. After the standardization process is completed, standardized input data is obtained, which is passed to the first hidden layer. For the first hidden layer, the standardized input data is multiplied by the weight matrix of the first hidden layer, and the corresponding bias vector is added, and then the result is nonlinearly transformed by the ReLU activation function. The ReLU activation function can effectively introduce nonlinearity, so that the neural network has stronger fitting ability. In order to prevent the overfitting problem, Dropout regularization is applied to the output of the first hidden layer. By randomly setting 50% of the neuron outputs to zero, it is ensured that the network will not rely too much on certain specific neurons during the training process, thereby improving the generalization ability of the model. After Dropout processing, the first regularized output is obtained. The first regularized output is input to the second hidden layer, and matrix multiplication, bias addition and ReLU activation operations are performed to obtain the output of the second hidden layer. L2 regularization is applied to the output of the second hidden layer. By adding the weight square sum term to the loss function to suppress the excessive weight value, the complexity of the model is effectively controlled, and the risk of overfitting is reduced to obtain the second regularized output. The second regularized output is passed to the third hidden layer, and the matrix multiplication, bias addition and ReLU activation operations are repeated to obtain the output of the third hidden layer. The output of the third hidden layer is input to the output layer and the last linear transformation is performed. In the output layer, the output value is compressed to between 0 and 1 through the Sigmoid activation function to ensure that the output result is within a reasonable range and the predicted optimized parameter value is obtained. In order to train the entire neural network, a mean square error loss function is defined, which is used to measure the error between the predicted value and the true optimized parameter value. The performance of the model is evaluated by calculating the average of their squared differences.The Adam optimizer is used to perform back-propagation training on the neural network. The Adam optimizer is an optimization algorithm with an adaptive learning rate. It accelerates the training process of the model by dynamically adjusting the learning rate. The initial learning rate is set to 0.001, and the learning rate is reduced by 10% after every 1,000 iterations, so that the parameters can be finely optimized with a smaller step size in the later stage of training. The entire training process is repeated for at least 10,000 times, and an early stopping condition is set. That is, when the change in the loss function is less than 0.000001 for 100 consecutive iterations, the model is considered to have converged and training is stopped. This setting can ensure that the training ends in time after reaching a certain convergence accuracy, avoiding unnecessary waste of computing resources. Through the training process, a structural optimization model is obtained, which can effectively optimize and predict the packaging structure and improve the design efficiency and performance of the packaging structure.

[0036] S5, based on the structure optimization model, performing dependency analysis on multiple package structure parameters, building a parameter tree structure, and assigning a corresponding priority value according to the degree of influence of each package structure parameter on the high-density memory chip;

[0037] Among them, a large amount of sample data is generated by using a structural optimization model. By making a small perturbation to each package structure parameter in the sample data, observing and recording the changes in the model output, a parameter sensitivity data set is obtained. This data set reflects the sensitivity of each parameter to the model output when it is perturbed. Based on the parameter sensitivity data set, the Pearson correlation coefficient between each pair of package structure parameters is calculated to construct a parameter correlation matrix. The Pearson correlation coefficient is used to measure the linear correlation between two parameters. By constructing a parameter correlation matrix, the relationship between different package structure parameters is clarified, and on this basis, the parameters are hierarchically clustered to form a parameter hierarchy. The hierarchical clustering method groups similar parameters into a group so that parameters with similar influences are analyzed and optimized together. The local importance score of each parameter node is calculated based on the parameter hierarchy. By analyzing the direct influence of each parameter on the objective function, the local importance of each node is accumulated and calculated using a tree structure traversal algorithm to obtain a global importance score. In this way, a parameter importance vector is obtained, which contains the global influence information of all parameters. The parameter hierarchy is pruned using the parameter importance vector to simplify the parameter tree structure. During the pruning process, the leaf nodes with global importance scores lower than the preset threshold are removed. The parameters corresponding to these nodes have little impact on the overall design and are appropriately simplified during the optimization process. Based on the parameter tree structure, each parameter node is evaluated. The depth of each node in the tree structure, the size of the subtree, and the degree of the node are calculated. These attributes reflect the relative position and influence range of the parameter in the entire structure. Combined with the parameter importance scores calculated previously, a parameter priority evaluation standard is constructed. This evaluation standard comprehensively considers the relative importance of each parameter, including its direct impact on the objective function, its position in the parameter tree structure, and its impact on other parameters. The parameter priority evaluation standard is used to score each package structure parameter in multiple dimensions. During the scoring process, the information of each dimension is comprehensively considered, and the scores of each dimension are integrated by weighted summation to obtain a comprehensive score. The comprehensive score is normalized to obtain the priority value corresponding to each package structure parameter. The priority value reflects the importance of the parameter in the optimization process and provides a clear direction for subsequent structural optimization.

[0038] S6, using the parameter tree structure and priority value, sorting and optimizing multiple package structure parameters one by one, and using the adaptive penalty function method to process the constraint conditions to obtain the target package structure parameter combination.

[0039] Specifically, the parameter tree structure is traversed in depth first. During the traversal process, the priority value of each node is weightedly combined with its depth in the tree to generate an optimization order list of the package structure parameters. This list takes into account the priority value of the parameter itself and combines its hierarchical relationship in the tree structure to ensure that the optimization order of the parameters can be arranged more scientifically during optimization and improve the overall optimization efficiency. Based on the generated optimization order list, the initial search step and search range are set for each package structure parameter to build a parameter optimization configuration table. The parameter optimization configuration table defines the adjustment range and initial state of each parameter during the optimization process, providing a basic framework and boundary for subsequent optimization searches. In the initial stage of parameter optimization, the Latin hypercube sampling algorithm is used to generate 100 groups of initial package structure parameter combinations in the parameter space defined in the parameter optimization configuration table. These combinations can cover the entire parameter space and ensure the diversity and representativeness of the initial parameters. For each group of initial parameter combinations, the corresponding objective function value is calculated through the structural optimization model, and the parameter combination with the smallest objective function value is selected as the initial optimal solution. Based on the initial optimal solution, an adaptive penalty function is constructed, and the M constraints are converted into penalty terms. The initial penalty factor λ1 is set to 1 to obtain the augmented objective function. The introduction of the augmented objective function transforms the optimization problem originally subject to constraints into an unconstrained optimization problem. By penalizing the degree of constraint violation, the final solution is ensured to meet all constraints. According to the optimization order list, a local search is performed on the first package structure parameter. Ten candidate values ​​are uniformly generated within the search range corresponding to the parameter to explore the impact of parameter changes on the objective function in the local range. The package structure parameter combination containing each candidate value is input into the structural optimization model, and the objective function value and constraint violation degree corresponding to each combination are calculated. These values ​​are substituted into the augmented objective function to calculate the comprehensive evaluation index. By comparing the comprehensive evaluation index of all candidate values, the candidate value with the smallest index is selected to update the current parameter, thereby continuously improving the quality of the solution. If all candidate values ​​fail to improve the current solution, the search step size of the parameter is halved to explore the local area more finely to ensure that the optimal parameter combination is found. During the entire optimization process, an acceptance rate R is calculated based on the number of times the new solution is accepted divided by the total number of iterations, and the penalty factor λ2 is dynamically adjusted according to the acceptance rate. If the acceptance rate R is less than 0.2, it means that the constraints in the optimization process are difficult to meet and a stronger penalty is required, so the penalty factor λ2 is set to 1.5 times λ1; on the contrary, if the acceptance rate R is greater than 0.8, it means that the impact of the constraints is small, and the penalty is appropriately weakened, and λ2 is set to 1 / 1.5 of λ1. The adaptive adjustment of the penalty factor can make the optimization process more flexible in handling changes in constraints and increase the possibility of finding the optimal solution.Repeat the local search step and the step of dynamically adjusting the penalty factor until all package structure parameters are optimized or the maximum number of iterations is 1000, and the local optimal package structure parameter combination is obtained. In order to ensure the global feasibility of the local optimal solution, the local optimal package structure parameter combination is globally verified, and the corresponding objective function value and constraint violation degree are calculated. If the obtained combination does not meet the convergence conditions, return to the previous step, start again from Latin hypercube sampling, and perform re-exploration and optimization of the parameter space until the target package structure parameter combination that meets all constraints is obtained.

[0040] In one example, a multi-chip stacking structure of a high-density memory chip is three-dimensionally modeled based on a current combination of packaging structure parameters to obtain a packaging structure model, including: performing parameter analysis on the current combination of packaging structure parameters, extracting the number of chips, thickness of each layer of chips, chip area, substrate thickness, substrate area, thickness of interlayer adhesive, and thickness of epoxy molding compound packaging to obtain a structural parameter vector; constructing a multi-layer chip stacking geometric model based on the structural parameter vector, and determining the three-dimensional coordinates and spatial orientation of each layer of chips to obtain an initial stacking structure; performing adaptive meshing on the initial stacking structure, performing tetrahedral mesh refinement processing on chip edges, interface transition zones, and stress concentration zones to obtain a multi-resolution meshed stacking model; and selecting a preset material vector from a plurality of preset material vectors. The physical and thermodynamic property data of Young's modulus, Poisson's ratio, thermal expansion coefficient and thermal conductivity of chips, substrates, adhesives and epoxy molding compounds are extracted from the database to establish a multi-dimensional material property tensor; the multi-dimensional material property tensor is mapped to each grid unit of the multi-resolution gridded stacking model, and the material transition zone is processed by an interpolation algorithm to obtain an attributed stacking model; based on the attributed stacking model, the temperature cycle test boundary conditions are set, including temperature range, heating and cooling rates, dwell time and number of cycles, and gravity and prestress initial conditions are applied to obtain a boundary stacking model; geometric simplification and topological optimization are performed on the boundary stacking model to remove geometric features less than a preset threshold, merge grid units with similar properties, and obtain a packaging structure model.

[0041] In this example, the current package structure parameter combination is analyzed to extract key geometric features, including the number of chips, the thickness of each chip layer, the area of ​​the chip, the thickness and area of ​​the substrate, the thickness of the interlayer adhesive, and the thickness of the epoxy molding compound package. By analyzing these parameters, a structural parameter vector is formed. ,in Indicates the number of chips, is the thickness vector of each layer of chip, is the area vector of the chip, and represent the thickness and area of ​​the substrate, respectively. is the thickness of the interlayer adhesive, is the thickness of the epoxy molding compound package. Based on the structural parameter vector, a geometric model of multi-layer chip stacking is constructed. Each layer of chips is stacked layer by layer, and the coordinate position and orientation of each layer of chips in three-dimensional space are determined. Assuming that the coordinate origin of the chip is at the center of the substrate, the three-dimensional coordinates of each layer of chips are defined as ,in Determines the location of the chip on the substrate, and The orientation of each layer of chips is represented by a rotation matrix , which describes the rotation of the chip relative to the reference direction. In this way, the entire stacking structure is determined layer by layer to obtain the initial geometric model. The initial stacking structure is adaptively meshed. Taking into account that the edges of the chip, the interface transition zone, and the stress concentration area require special attention, the tetrahedral mesh is refined to have a higher resolution in these areas. The goal of mesh refinement is to accurately capture the stress changes in stress concentration areas (such as the interface area between the adhesive and the chip), while coarser meshes are used in other areas to reduce computational complexity. After obtaining the multi-resolution meshed stacking model, the physical and thermodynamic properties of the relevant materials are extracted from the preset material database, including Young's modulus. , Poisson's ratio , thermal expansion coefficient And thermal conductivity Extract data for each material separately and build a multi-dimensional material property tensor ,in Describing Materials In Location By constructing tensors, multiple materials can be described in a unified manner. The multidimensional material property tensor is mapped to each grid unit of the multi-resolution grid stacking model. Since there is a gradual change in material properties in the interface area of ​​the material, the interpolation algorithm is used to process the material transition area to obtain the accurate material properties of each grid unit. Assuming that the transition of material properties is represented by linear interpolation, and materials The transition zone between The formula is:

[0042] ;

[0043] in, and Materials and materials The attribute value of is the relative distance of the transition zone, It is a linear function of distance, which is used to represent the changing trend of properties in the transition zone. Through interpolation, the transition of material properties between different materials is smoother, and an attributed stacking model is obtained. Based on the attributed stacking model, the boundary conditions of the temperature cycle test are set, including the temperature range. arrive , heating and cooling rate , Dwell time and the number of temperature cycles Apply gravity As well as prestressed initial conditions, to simulate the stress and deformation of the chip in the actual working environment. The boundary conditions define the stress and strain response of the chip package in different working environments, so that the model can more realistically reflect the working state of the chip and obtain a boundary stacking model. In order to simplify the model and improve the efficiency of the calculation, the boundary stacking model is geometrically simplified and topologically optimized. The goal of geometric simplification is to remove geometric features whose size is less than the preset threshold, such as very small corners and grooves. At the same time, the mesh units with similar properties are merged to simplify the topological structure, reduce the calculation complexity, and obtain the packaging structure model.

[0044] In one example, based on preset temperature cycle test conditions, a finite element analysis is performed on a packaging structure model to obtain stress distribution data and stress-strain curves, including: constructing a global stiffness matrix and a mass matrix based on the packaging structure model, and calculating a thermal-mechanical coupling matrix in combination with a multi-dimensional material property tensor to obtain a temperature-dependent global system matrix; converting the preset temperature cycle test conditions into a piecewise linear time-varying temperature load function, applying thermal stress boundary conditions and thermal strain initial conditions to the temperature-dependent global system matrix to obtain a thermal-mechanical coupling finite element equation group; using a Newton-Raphson iteration method combined with a line search technique to solve the thermal-mechanical coupling finite element equation group, calculating the node temperature field and displacement field at each time step, and obtaining transient temperature-displacement coupling data; based on the transient temperature-displacement coupling data, using the thermal-mechanical coupling strain-displacement relationship to calculate the strain tensor of each unit, and solving the stress tensor through a thermoelastic constitutive equation to obtain thermal stress field data; performing statistical analysis and cubic spline interpolation processing on the thermal stress field data to calculate the maximum principal stress, von Mises stress and Tresca stress are calculated, and stress distribution data is generated. The key points of the chip edge, interface transition zone and epoxy molding compound surface center in the packaging structure model are selected, and the stress and strain values ​​of the key points in the entire temperature cycle process are extracted. The stress-strain curve is obtained by nonlinear least squares fitting.

[0045] In this example, a global stiffness matrix is ​​constructed based on the package structure model. and the mass matrix . Global stiffness matrix Describes the deformation stiffness of the package structure under external force, and represents the relationship between units when they are subjected to force at the nodes; the mass matrix It is used to describe the response of the structure under the action of inertial force. For the packaging structure of multi-layer chips, due to the different properties of each layer of material, the material properties are expressed through the multi-dimensional material property tensor To indicate that Indicates the physical properties of the material in various directions (such as Young's modulus , Poisson's ratio , thermal expansion coefficient Based on these properties, combined with the geometric characteristics of the package, the thermal-mechanical coupling matrix is ​​calculated. , describing the interaction between thermal and mechanical stresses. After obtaining the stiffness matrix, mass matrix, and thermal-mechanical coupling matrix, the temperature-dependent global system matrix is ​​formed:

[0046] ;

[0047] in, Indicates temperature, It is a global system matrix that combines the mechanical properties of the structure and the thermal-mechanical coupling effect. This matrix can accurately describe the overall mechanical response of the chip packaging structure under temperature changes. After obtaining the global system matrix, the preset temperature cycle test conditions are converted into a piecewise linear time-varying temperature load function. Assume that the temperature range is arrive The heating and cooling rate is , the residence time is , then the temperature variation with time can be expressed piecewise as a linear function , which is used to simulate the temperature cycle in actual work. By applying the temperature load function to the temperature-dependent global system matrix, and applying thermal stress boundary conditions and thermal strain initial conditions, the finite element equations for thermal-mechanical coupling are obtained:

[0048] ;

[0049] in, represents the displacement vector of the node, is the applied external force load vector, and the equation describes the response of the package structure under the action of thermal-mechanical coupling. The Newton-Raphson iteration method combined with line search technology is used to solve the thermal-mechanical coupling equations. The Newton-Raphson iteration method is a numerical method for solving nonlinear equations. It gradually approaches the exact solution by linearizing the nonlinear equations. The line search technology is used to dynamically adjust the step size during the iteration process to ensure the convergence and stability of the iteration process. In this way, the temperature field and displacement field of the node are calculated at each time step to obtain the transient temperature-displacement coupling data. , describing the thermodynamic behavior of the package structure during the entire temperature cycle. Based on the transient temperature-displacement coupling data, the strain-displacement relationship of the thermal-mechanical coupling is used to calculate the strain tensor of each unit. The relationship between the strain tensor and the displacement is expressed by the following formula:

[0050] ;

[0051] in, is the strain tensor, is the displacement-strain matrix, which is used to transform the displacement of the node Converted to strain. This relationship describes the deformation of each unit under the action of external force. The stress tensor of each unit is solved by the thermoelastic constitutive equation , the constitutive equation is expressed as:

[0052] ;

[0053] in, is the stress tensor, is the material stiffness matrix, is the coefficient of thermal expansion, is the temperature change. This equation describes the stress response of the material under temperature change and is the basis for calculating the thermal stress field data. The thermal stress field data is statistically analyzed and processed by cubic spline interpolation to obtain the stress characteristics of each grid node during the entire temperature cycle. By statistically analyzing the stress data of the node, the maximum principal stress, von Mises stress and Tresca stress are calculated. These stress metrics represent different failure criteria and can be used to evaluate the reliability of the structure under complex stress conditions. In order to better describe the change of stress over time, cubic spline interpolation is used to smooth the stress data to obtain a continuous change curve of stress. Representative key points such as the chip edge, interface transition zone and epoxy molding compound surface center are selected to extract the stress and strain values ​​of these key points during the entire temperature cycle. The stress-strain curve is obtained by fitting the data of the key points using the nonlinear least squares method. The stress-strain curve is a key tool for evaluating the elasticity, plastic deformation and fracture performance of the packaging structure under temperature cycling. For example, in a packaging structure, if the stress-strain curve at a key point shows obvious nonlinearity, it indicates that plastic deformation exists in this area, which requires special attention and improvement in the design.

[0054] In one example, feature extraction and feature fusion are performed on stress distribution data and stress-strain curves to obtain a fused feature vector, including: performing statistical analysis on stress distribution data, calculating the maximum, minimum, average stress values ​​and their standard deviations of each grid node, and obtaining a stress statistical feature set; calculating elastic modulus, yield strength, tensile strength and fracture strain parameters based on the stress-strain curve to obtain a stress-strain feature set; merging the stress statistical feature set and the stress-strain feature set to construct an initial feature matrix, and standardizing the initial feature matrix to obtain a standardized feature matrix; calculating correlation coefficients between features based on the standardized feature matrix to construct a feature correlation matrix, and selecting a feature subset with a correlation coefficient lower than a preset threshold according to the feature correlation matrix to obtain a low-correlation feature set; performing feature dimensionality reduction on the low-correlation feature set to obtain a reduced-dimensional feature vector, and concatenating the reduced-dimensional feature vector with the stress statistical feature set and the stress-strain feature set to obtain a fused feature vector through weighted combination.

[0055] In this example, the stress distribution data is statistically analyzed to obtain the mechanical characteristics of each mesh node during the entire temperature cycle. For each mesh node, the maximum stress value is calculated. , minimum stress value , average stress value and standard deviation These statistical characteristics describe the extreme values, overall distribution and fluctuation of each grid node under stress loading, and constitute the stress statistical characteristic set. The statistical characteristics of stress are expressed as:

[0056] ;

[0057] in, represents the mean stress, is the total number of data points, The stress value for each data point. At the same time, the material mechanical characteristic parameters, such as elastic modulus, are calculated based on the stress-strain curve. , yield strength ,tensile strength and fracture strain . Elastic modulus It is the ratio of stress to strain of the material in the elastic deformation stage, expressed as:

[0058] ;

[0059] in, represents the change of stress, Indicates the change in strain. This parameter reflects the material's ability to resist deformation in the elastic stage. Yield strength The stress value representing the plastic deformation of the material, the tensile strength The maximum stress that a material can withstand before it breaks, and the fracture strain represents the strain of the material at fracture. Through these features, the mechanical properties of the material at different stress stages are effectively described. These parameters together constitute the stress-strain feature set. The stress statistical feature set is integrated with the stress-strain feature set to construct the initial feature matrix The initial feature matrix Contains multiple mechanical features that describe the packaging structure, and the initial feature matrix is ​​standardized. By subtracting the mean of each feature and dividing it by the standard deviation, the mean of all features is zero and the standard deviation is one, so that each feature has the same scale, which is conducive to subsequent feature analysis and machine learning modeling. The standardized feature matrix is ​​expressed as:

[0060] ;

[0061] in, is the standardized feature matrix, and The feature matrices are The mean and standard deviation of . Based on the standardized feature matrix, the correlation coefficient between features is calculated and the feature correlation matrix is ​​constructed. The feature correlation matrix is ​​used to describe the degree of linear correlation between different features. By analyzing the correlation between the features, the features with strong correlation can be identified to avoid information redundancy. The correlation coefficient is calculated using the Pearson correlation coefficient:

[0062] ;

[0063] in, Representation characteristics and Features The correlation coefficient between and Characteristics and Features No. Sample values, and Characteristics and Features The mean of . By constructing a feature correlation matrix, the relationship between different features is clarified, so as to select a feature subset with a correlation coefficient lower than a preset threshold and obtain a low-correlation feature set. The low-correlation feature set is subjected to feature dimensionality reduction to reduce feature redundancy, improve computational efficiency and the generalization ability of the model. Feature dimensionality reduction is performed through methods such as principal component analysis. The original high-dimensional feature space is projected onto a low-dimensional space through linear transformation to extract the most representative features. The feature vector z after dimensionality reduction is expressed as:

[0064] ;

[0065] in, is the dimension reduction transformation matrix, is the standardized feature matrix. Through dimensionality reduction transformation, a low-dimensional feature vector containing the main information is obtained. The reduced-dimensional feature vector is concatenated with the original stress statistical feature set and stress-strain feature set, and a fused feature vector is obtained through weighted combination. The weighted combination process is to assign appropriate weights to each feature to reflect its importance to the performance of the packaging structure. Assume that the fused feature vector is , then it is expressed as:

[0066] ;

[0067] in, are the weights of dimensionality reduction features, stress statistical features, and stress-strain features, respectively. and They are stress statistical feature set and stress-strain feature set respectively. The fused feature vector obtained by weighted combination describes the mechanical behavior of the packaging structure in a complex environment.

[0068] In one example, a fused feature vector and a current package structure parameter combination are input into a multi-layer feedforward neural network, and a structural optimization model is obtained through back propagation training, including: performing a splicing operation on the fused feature vector and the current package structure parameter combination to obtain an input feature vector, wherein the dimension of the input feature vector is the sum of the dimension of the fused feature vector and the number of current package structure parameters; constructing a five-layer feedforward neural network structure, including an input layer, three hidden layers, and an output layer, wherein the number of neurons in the input layer is the same as the dimension of the input feature vector, the first hidden layer contains 128 neurons, the second hidden layer contains 64 neurons, the third hidden layer contains 32 neurons, and the number of neurons in the output layer is the same as the number of package structure parameters to be optimized; performing batch normalization on the input layer data, calculating the mean and standard deviation of each feature, and standardizing by subtracting the mean and dividing by the standard deviation to obtain standardized input data; multiplying the standardized input data by the weight matrix of the first hidden layer, adding a bias vector, and then performing a nonlinear transformation through a ReLU activation function to obtain the output of the first hidden layer, and applying Dropout to the output of the first hidden layer Regularization, randomly set 50% of the neuron outputs to zero to obtain the first regularized output; input the first regularized output to the second hidden layer, perform matrix multiplication, bias addition and ReLU activation operations to obtain the second hidden layer output, and apply L2 regularization to the second hidden layer output, add the weight square sum term to the loss function to suppress excessive weights, and obtain the second regularized output; input the second regularized output to the third hidden layer, repeat the matrix multiplication, bias addition and ReLU activation process to obtain the third hidden layer output, and input the third hidden layer output to the output layer for the final After a linear transformation, the output value is compressed to between 0 and 1 through the Sigmoid activation function to obtain the predicted optimization parameter value; the mean square error loss function is defined, the average of the square difference between the predicted value and the true optimization parameter value is calculated, and back-propagation training is performed in combination with the Adam optimizer. The initial learning rate is set to 0.001, and the learning rate is reduced by 10% after every 1000 iterations. The network parameters are optimized through at least 10,000 iterations. When the loss function changes less than 0.000001 for 100 consecutive iterations, the training is stopped to obtain the structural optimization model.

[0069] In this example, the fused feature vector is concatenated with the current encapsulation structure parameters to obtain a complete input feature vector. Assume that the fused feature vector is , the current package structure parameters are , input feature vector The concatenation operation is expressed as:

[0070] ;

[0071] in, represents the dimension of the fused feature vector, Represents the number of encapsulation structure parameters, and the dimension of the concatenated input feature vector is . Construct a five-layer feedforward neural network structure, including an input layer, three hidden layers, and an output layer. The number of neurons in the input layer is equal to the dimension of the input feature vector , to ensure that all input features can be received. The first hidden layer contains 128 neurons for extracting high-order features; the second hidden layer contains 64 neurons, gradually reducing the number of features to extract more aggregated feature information; the third hidden layer contains 32 neurons to condense the information flow. The number of neurons in the output layer is the same as the number of package structure parameters to be optimized, ensuring that all parameter values ​​to be optimized can be output. Before the input data is passed to the neural network, the data in the input layer is batch normalized. By calculating the mean of each feature and standard deviation , and standardize the data by subtracting the mean and dividing by the standard deviation to obtain the standardized input data:

[0072] ;

[0073] in, represents the normalized input data, is the mean of the input features, is the standard deviation of the input features. Standardization helps eliminate scale differences between features and ensures that the training process of the neural network is more stable and converges quickly. Compare the standardized input data with the weight matrix of the first hidden layer Multiply and add the bias vector , and then a nonlinear transformation is performed through the ReLU activation function to introduce nonlinear features:

[0074] ;

[0075] in, is the weight matrix of the first hidden layer, is the bias vector, is the ReLU activation function. The ReLU function sets the input less than zero to zero, thereby introducing nonlinearity, which helps the model learn complex patterns. Dropout regularization is applied to the output of the first hidden layer, randomly setting 50% of the neuron outputs to zero to prevent overfitting:

[0076] ;

[0077] in, is the retention probability of Dropout, which is set to 0.5, meaning that each neuron has a 50% probability of being set to zero. Input to the second hidden layer, similar operations are performed, namely matrix multiplication, bias addition and ReLU activation function transformation:

[0078] ;

[0079] in, is the weight matrix of the second hidden layer, is the bias vector. L2 regularization is applied to the output of the second hidden layer, that is, adding a weight square sum term to the loss function to suppress excessive increase in weight and prevent overfitting of the model:

[0080] ;

[0081] in, is the loss function after regularization, is the original loss function, is the regularization coefficient, which is used to control the strength of the weight penalty. The second regularized output is input to the third hidden layer, and the matrix multiplication, bias addition and ReLU activation process are performed to obtain the output of the third hidden layer:

[0082] ;

[0083] in, is the weight matrix of the third hidden layer, is the bias vector. The output of the third hidden layer is input to the output layer, and the final linear transformation is performed to obtain the output value:

[0084] ;

[0085] in, is the weight matrix of the output layer, is the bias vector of the output layer, is the Sigmoid activation function, which compresses the output value to between 0 and 1 to obtain the predicted optimized parameter value. The Sigmoid activation function is defined as:

[0086] ;

[0087] This function maps the input value to the interval [0, 1] to ensure that the output value is within a reasonable range and is suitable for parameter optimization. In order to train the neural network, the mean square error loss function is defined to measure the predicted value. With the true value The error between:

[0088] ;

[0089] in, is the sample size, It is The predicted value of samples, It is The true value of each sample. Back-propagation training is performed using the Adam optimizer, which is an optimization algorithm that combines momentum and adaptive learning rate to quickly converge to the optimal solution. The initial learning rate is set to 0.001, and the learning rate is reduced by 10% after every 1,000 iterations to ensure that the network parameters can be optimized more finely in the later stages of training. The entire training process is performed for at least 10,000 iterations, and an early stopping condition is set. When the change in the loss function is less than 0.0000001 for 100 consecutive iterations, the training is stopped to ensure that the model converges and avoids overfitting.

[0090] In one example, based on a structural optimization model, a dependency analysis is performed on multiple package structure parameters, a parameter tree structure is constructed, and a corresponding priority value is assigned according to the degree of influence of each package structure parameter on a high-density storage chip, including: using the structural optimization model to generate sample data, and performing a small perturbation on each package structure parameter according to the sample data, recording the output change, and obtaining a parameter sensitivity data set; based on the parameter sensitivity data set, calculating the Pearson correlation coefficient between each pair of package structure parameters, constructing a parameter correlation matrix, and performing hierarchical clustering on the parameter correlation matrix to construct a parameter hierarchy; based on the parameter hierarchy , calculate the local importance score of each parameter node, and use the tree structure traversal algorithm to accumulate and calculate the global importance score to obtain the parameter importance vector; use the parameter importance vector to prune the parameter hierarchy and remove the leaf nodes whose importance scores are lower than the preset threshold to obtain the parameter tree structure; based on the parameter tree structure, calculate the depth, subtree size and node degree of each parameter node, and construct the parameter priority evaluation standard in combination with the parameter importance score; use the parameter priority evaluation standard to perform multi-dimensional scoring on each package structure parameter, use the weighted summation method to comprehensively calculate the scores of each dimension, and perform normalization to obtain the corresponding priority value.

[0091] In this example, a large amount of sample data is generated using the structural optimization model. In order to obtain the sensitivity information of each package structure parameter to the objective function, a small perturbation is made to each package structure parameter, and its change in the model output is recorded to obtain the parameter sensitivity data set. Assume that the parameter vector is , for each parameter Perturb to get new parameters ,in It is a small disturbance. By comparing the difference between the original output and the output after disturbance, the sensitivity of each parameter is calculated to reflect the influence of each parameter on the packaging performance. Based on the parameter sensitivity data set, the Pearson correlation coefficient between each pair of packaging structure parameters is calculated to measure the degree of linear correlation between the parameters. Pearson correlation coefficient It is expressed as:

[0092] ;

[0093] in, and The parameters are and No. Sample values, and The parameters are and The mean of Represents the number of samples. By calculating the correlation between various parameters, a parameter correlation matrix is ​​constructed. . Based on the parameter correlation matrix, the hierarchical clustering method is used to group parameters with high correlation into a group to form a parameter hierarchy. Hierarchical clustering is an iterative method that continuously merges parameters with high correlation to form a tree-like hierarchy that can reveal the dependencies and influence chains between parameters. The local importance score of each parameter node is calculated based on the parameter hierarchy. The local importance score is determined by analyzing the sensitivity data based on the degree of direct influence of each parameter on the objective function. In order to obtain the global importance score of each parameter, a tree structure traversal algorithm is used for cumulative calculation. Assume that the node set in the tree structure is , each node The global importance score of It is calculated by recursively accumulating the importance of its child nodes:

[0094] ;

[0095] in, For Node The local importance score of Representation Node The set of all child nodes of . By traversing the tree structure, the global importance scores of all parameters are obtained and a parameter importance vector is formed. Using the parameter importance vector, the parameter hierarchy is pruned to simplify the model and improve computational efficiency. The pruning process is based on the importance score, and leaf nodes with importance scores below the preset threshold are removed. The pruned structure forms a simplified parameter tree structure, in which only parameters that have a significant impact on the target performance are retained, thereby focusing on key variables and reducing the complexity of optimization. Based on the parameter tree structure, the depth, subtree size and node degree of each parameter node are calculated to construct a comprehensive parameter priority evaluation standard in combination with the importance score of the parameter. The depth of the node indicates the hierarchical position of the parameter in the hierarchy, the subtree size indicates the number of nodes contained in the subtree with the node as the root node, and the node degree reflects the number of direct child nodes of the node. Combining this information with the global importance score, a parameter priority evaluation standard is constructed to comprehensively evaluate the importance of the parameters through multiple dimensions. Using this parameter priority evaluation standard, each package structure parameter is scored in multiple dimensions. Each dimension of the score reflects the impact of the parameter on different aspects of the structural performance, such as its importance score, position in the hierarchy, etc. The scores of each dimension are combined by weighted summation to obtain the overall score of the parameter:

[0096] ;

[0097] in, For parameters The priority score of is the node depth, is the subtree size, is the global importance score, are the weights of the corresponding dimensions, which are used to adjust the contribution of each dimension to the final score. The obtained priority scores are normalized to ensure that the priority values ​​of all parameters are within the range of [0, 1] to obtain the corresponding priority values.

[0098] In one example, a plurality of package structure parameters are sorted and optimized one by one by using a parameter tree structure and a priority value, and an adaptive penalty function method is used to process constraints to obtain a target package structure parameter combination, including: B1: depth-first traversal of the parameter tree structure is performed, and the priority value of each node is weightedly combined with its depth in the tree to generate an optimization sequence list of the package structure parameters; B2: based on the optimization sequence list, an initial search step and a search range are set for each package structure parameter to construct a parameter optimization configuration table; B3: a Latin hypercube sampling algorithm is used to generate 100 groups of initial package structure parameter combinations in the parameter space defined in the parameter optimization configuration table, and the objective function value of each group of parameters is calculated through a structural optimization model, and the combination with the smallest objective function value is selected as the initial optimal solution; B4: an adaptive penalty function is constructed based on the initial optimal solution, M constraints are converted into penalty items, and an initial penalty factor λ1=1 is set to obtain an augmented objective function; B5: a local search is performed on the first package structure parameter in the optimization sequence list, and uniformly generated within the corresponding search range. 10 candidate values; B6: Input the package structure parameter combination containing each candidate value into the structural optimization model, calculate the corresponding objective function value and constraint violation degree, and substitute them into the augmented objective function to calculate the comprehensive evaluation index; B7: Compare the comprehensive evaluation index of all candidate values, select the candidate value with the smallest index to update the current parameter, and if all candidate values ​​are not improved, halve the search step size; B8: Calculate the acceptance rate based on the number of times the new solution is accepted divided by the total number of iterations, and dynamically adjust the penalty factor λ2 according to the acceptance rate R: When R<0.2, λ 2=λ1*1.5; when R>0.8, λ2=λ1 / 1.5; B9: Repeat steps B5-B8 until the optimization of all package structure parameters is completed or the maximum number of iterations is 1000, and the local optimal package structure parameter combination is obtained; B10: Perform global verification on the local optimal package structure parameter combination, calculate the corresponding objective function value and constraint violation degree, if the convergence condition is not met, return to step B3, and repeat steps B3-B9 until the target package structure parameter combination that meets all constraints is obtained.

[0099] In this example, a depth-first traversal is performed on the parameter tree structure to generate an optimization order list. During the traversal, the priority value of each node is weighted and combined with its depth in the tree to determine the importance and priority order of each package parameter. Assume that the priority value of a parameter is , the depth is , then the weighted score of each parameter is expressed as:

[0100] ;

[0101] in, is the weighted score of the parameter, and The priority value and depth weights are used to adjust the impact of the two on the final score. By performing a depth-first traversal of the parameter tree structure and combining it with the calculation of the weighted score, the optimization order list of the package structure parameters is obtained. Based on the optimization order list, the initial search step and search range are set for each package structure parameter to build a parameter optimization configuration table. The parameter optimization configuration table is used to define the adjustment range and initial step of each parameter during the optimization process, so as to control the granularity and direction of the search process. Initial step of the parameter It is set to a moderate value to ensure that the parameter space can be fully explored in the initial stage, and the search range is limited according to the physical meaning of the parameters and engineering constraints. The Latin hypercube sampling algorithm is used to generate 100 sets of initial packaging structure parameter combinations in the parameter space defined in the parameter optimization configuration table. The Latin hypercube sampling algorithm is an efficient sampling method that can ensure that samples are selected in a uniform distribution in the multi-dimensional parameter space to obtain good coverage of the entire parameter space. The objective function value of each set of parameters is calculated through the structural optimization model, and the parameter combination with the smallest objective function value is selected as the initial optimal solution. The smaller the objective function value, the better the performance of the packaging structure and the lower the loss. Based on the initial optimal solution, an adaptive penalty function is constructed. The constraints are transformed into penalty terms so that both the optimization objectives and constraints can be considered in the objective function. The augmented objective function is expressed as:

[0102] ;

[0103] in, is the augmented objective function, is the original objective function, is the initial penalty factor, Indicates constraints. In this way, the augmented objective function can simultaneously optimize the performance of the package structure and meet the engineering constraints. Based on the optimization order list, a local search is performed on the first package structure parameter, and 10 candidate values ​​are evenly generated within its corresponding search range. The local search is to conduct a detailed exploration based on the initial optimal solution to find the possibility of improvement. The package structure parameter combination containing each candidate value is input into the structural optimization model, the corresponding objective function value and constraint violation degree are calculated, and substituted into the augmented objective function to calculate the comprehensive evaluation index:

[0104] ;

[0105] in, Represents a comprehensive evaluation index, which is used to measure the overall quality of each candidate parameter combination, including the comprehensive performance of the objective function and constraints. By comparing the comprehensive evaluation indexes of all candidate values, the candidate value with the smallest comprehensive evaluation index is selected as the optimal solution for updating the current parameter. If all candidate values ​​fail to improve the current solution, the search step size of the parameter is halved to facilitate more detailed exploration in the local range. During the entire optimization process, the acceptance rate is calculated based on the number of times the new solution is accepted divided by the total number of iterations. Acceptance rate Used to dynamically adjust the penalty factor , so that the penalty factor is adaptable in different optimization stages. When , it means that the acceptance rate of new solutions is low. At this time, it is necessary to increase the penalty intensity of the constraints. Therefore, set ;when When , it means that the acceptance rate of new solutions is high, which means that the penalty of the constraint condition is too large and needs to be reduced. Therefore, set Repeat the above steps of local search and dynamic adjustment of penalty factors until all package structure parameters are optimized or the maximum number of iterations (usually set to 1000) is reached to obtain the local optimal package structure parameter combination. Perform global verification on the local optimal package structure parameter combination. Evaluate whether the local optimal solution meets the global convergence conditions by recalculating the objective function value and the degree of constraint violation. If not, return to the previous step and start again from Latin hypercube sampling to perform re-exploration and optimization of the parameter space, repeating steps B3 to B9 until the target package structure parameter combination that meets all constraints is found.

[0106] Reference Figure 2 This embodiment provides a high-density memory chip packaging structure design device, including:

[0107] Modeling module 1, used for performing three-dimensional modeling of a multi-chip stacking structure of a high-density memory chip based on a current combination of packaging structure parameters to obtain a packaging structure model;

[0108] Analysis module 2, used to perform finite element analysis on the packaging structure model based on preset temperature cycle test conditions to obtain stress distribution data and stress-strain curve;

[0109] Fusion module 3, used for extracting and fusing features of stress distribution data and stress-strain curves to obtain fused feature vectors;

[0110] Training module 4, used for inputting the fusion feature vector and the current package structure parameter combination into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training;

[0111] An allocation module 5 is used to perform dependency analysis on multiple package structure parameters based on the structure optimization model, construct a parameter tree structure, and allocate a corresponding priority value according to the influence of each package structure parameter on the high-density memory chip;

[0112] The optimization module 6 is used to sort and optimize multiple package structure parameters one by one by using the parameter tree structure and priority value, and at the same time use the adaptive penalty function method to process the constraint conditions to obtain the target package structure parameter combination.

[0113] In this embodiment, for the specific implementation of each unit in the above device embodiment, please refer to the above method embodiment, which will not be repeated here.

[0114] Reference Figure 3 In an embodiment of the present invention, a computer device is also provided. The computer device may be a server, and its internal structure may be as follows: Figure 3 As shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface and a database connected through a system bus. Among them, the processor designed by the computer is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.

[0115] Those skilled in the art will understand that Figure 3 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.

[0116] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the above method is implemented. It can be understood that the computer-readable storage medium in this embodiment can be a volatile readable storage medium or a non-volatile readable storage medium.

[0117] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media provided by the present invention and used in the embodiments may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double-speed data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM.

[0118] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, device, article or method including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, device, article or method. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the presence of other identical elements in the process, device, article or method including the element.

[0119] The above description is only a preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A method for designing a high-density memory chip packaging structure, characterized in that: The following steps are involved: Based on the current packaging structure parameter combination, a multi-chip stacking structure of a high-density storage chip is three-dimensionally modeled to obtain a packaging structure model; specifically, the method comprises: performing parameter analysis on the current packaging structure parameter combination, extracting the number of chips, the thickness of each layer of chips, the chip area, the substrate thickness, the substrate area, the thickness of the interlayer adhesive and the packaging thickness of the epoxy molding compound, and obtaining a structural parameter vector; constructing a multi-layer chip stacking geometric model based on the structural parameter vector, and determining the three-dimensional coordinates and spatial orientation of each layer of chips to obtain an initial stacking structure; performing adaptive meshing on the initial stacking structure, performing tetrahedral mesh refinement processing on the chip edge, the interface transition zone and the stress concentration zone to obtain a multi-resolution meshed stacking model; and selecting a material from a preset material database. Extract the physical and thermodynamic property data of Young's modulus, Poisson's ratio, thermal expansion coefficient and thermal conductivity of chips, substrates, adhesives and epoxy molding compounds, and establish a multidimensional material property tensor; map the multidimensional material property tensor to each grid unit of the multi-resolution gridded stacking model, process the material transition zone through an interpolation algorithm, and obtain an attributed stacking model; set the temperature cycle test boundary conditions based on the attributed stacking model, including temperature range, heating and cooling rate, dwell time and number of cycles, and apply gravity and prestress initial conditions to obtain a boundary stacking model; perform geometric simplification and topological optimization on the boundary stacking model, remove geometric features less than a preset threshold, merge grid units with similar properties, and obtain a packaging structure model; Based on the preset temperature cycle test conditions, the packaging structure model is subjected to finite element analysis to obtain stress distribution data and stress-strain curves; specifically comprising: constructing a global stiffness matrix and a mass matrix based on the packaging structure model, and calculating a thermal-mechanical coupling matrix in combination with a multi-dimensional material property tensor to obtain a temperature-related global system matrix; converting the preset temperature cycle test conditions into a piecewise linear time-varying temperature load function, applying thermal stress boundary conditions and thermal strain initial conditions to the temperature-related global system matrix to obtain a thermal-mechanical coupling finite element equation group; using the Newton-Raphson iteration method combined with the line search technology to solve the thermal-mechanical coupling finite element equation group, calculating the node temperature field and displacement field at each time step, and obtaining transient temperature-displacement coupling data; based on the transient temperature-displacement coupling data, calculating the strain tensor of each unit using the thermal-mechanical coupling strain-displacement relationship, and solving the stress tensor through the thermoelastic constitutive equation to obtain thermal stress field data; performing statistical analysis and cubic spline interpolation processing on the thermal stress field data to calculate the maximum principal stress, von Mises stress and Tresca stress, and generate stress distribution data; select key points of the chip edge, interface transition zone and epoxy molding compound surface center in the packaging structure model, extract the stress and strain values ​​of the key points during the entire temperature cycle, and obtain the stress-strain curve by nonlinear least squares fitting; Performing feature extraction and feature fusion on the stress distribution data and the stress-strain curve to obtain a fused feature vector; Combining the fused feature vector and the current packaging structure parameters into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training; Based on the structure optimization model, a dependency analysis is performed on a plurality of packaging structure parameters, a parameter tree structure is constructed, and a corresponding priority value is assigned according to the influence of each packaging structure parameter on the high-density storage chip; The parameter tree structure and the priority value are used to sort and optimize the multiple packaging structure parameters one by one, and the constraint conditions are processed by an adaptive penalty function method to obtain a target packaging structure parameter combination.

2. The high-density memory chip packaging structure design method according to claim 1, characterized in that: The extracting and fusing the stress distribution data and the stress-strain curve to obtain a fused feature vector includes: Performing statistical analysis on the stress distribution data, calculating the maximum, minimum, average stress values ​​and standard deviations of each grid node, and obtaining a stress statistical feature set; Calculating elastic modulus, yield strength, tensile strength and fracture strain parameters based on the stress-strain curve to obtain a stress-strain feature set; The stress statistical feature set and the stress-strain feature set are combined to construct an initial feature matrix, and the initial feature matrix is ​​standardized to obtain a standardized feature matrix; Calculate the correlation coefficients between features based on the standardized feature matrix, construct a feature correlation matrix, and select a feature subset whose correlation coefficient is lower than a preset threshold according to the feature correlation matrix to obtain a low-correlation feature set; The low-correlation feature set is subjected to feature dimensionality reduction to obtain a reduced-dimensional feature vector, and the reduced-dimensional feature vector is concatenated with the stress statistical feature set and the stress-strain feature set to obtain a fused feature vector through weighted combination.

3. The high-density memory chip packaging structure design method according to claim 2, characterized in that: The step of combining the fused feature vector and the current packaging structure parameters and inputting them into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training, comprises: The fused feature vector and the current package structure parameter are combined and spliced ​​to obtain an input feature vector, wherein the dimension of the input feature vector is the sum of the dimension of the fused feature vector and the number of current package structure parameters; Construct a five-layer feedforward neural network structure, including an input layer, three hidden layers and an output layer, wherein the number of neurons in the input layer is the same as the dimension of the input feature vector, the first hidden layer contains 128 neurons, the second hidden layer contains 64 neurons, the third hidden layer contains 32 neurons, and the number of neurons in the output layer is the same as the number of package structure parameters to be optimized; Perform batch normalization on the input layer data, calculate the mean and standard deviation of each feature, and standardize it by subtracting the mean and dividing it by the standard deviation to obtain standardized input data; Multiply the standardized input data with the weight matrix of the first hidden layer, add the bias vector, and then perform a nonlinear transformation through the ReLU activation function to obtain the first hidden layer output. Apply Dropout regularization to the first hidden layer output, randomly set 50% of the neuron outputs to zero, and obtain the first regularized output. The first regularized output is input into the second hidden layer, matrix multiplication, bias addition and ReLU activation operations are performed to obtain the second hidden layer output, and L2 regularization is applied to the second hidden layer output, and a weight square sum term is added to the loss function to suppress excessive weights to obtain the second regularized output; The second regularized output is input into the third hidden layer, and the matrix multiplication, bias addition and ReLU activation process are repeated to obtain the third hidden layer output. The third hidden layer output is input into the output layer, and the last linear transformation is performed. Then, the output value is compressed to between 0 and 1 through the Sigmoid activation function to obtain the predicted optimized parameter value. The mean square error loss function was defined, and the average of the squared difference between the predicted value and the actual optimized parameter value was calculated. Back-propagation training was performed in combination with the Adam optimizer. The initial learning rate was set to 0.001, and the learning rate was reduced by 10% after every 1000 iterations. The network parameters were optimized through at least 10,000 iterations. The training was stopped when the loss function changed less than 0.000001 for 100 consecutive iterations, and the structural optimization model was obtained.

4. The high-density memory chip packaging structure design method according to claim 3, characterized in that: The method of performing dependency analysis on a plurality of packaging structure parameters based on the structure optimization model, constructing a parameter tree structure, and assigning a corresponding priority value according to the degree of influence of each packaging structure parameter on the high-density storage chip includes: Generate sample data using the structural optimization model, perform a small perturbation on each package structure parameter according to the sample data, record the output change, and obtain a parameter sensitivity data set; Based on the parameter sensitivity data set, the Pearson correlation coefficient between each pair of packaging structure parameters is calculated to construct a parameter correlation matrix, and the parameter correlation matrix is ​​hierarchically clustered to construct a parameter hierarchy; Based on the parameter hierarchy, the local importance score of each parameter node is calculated, and the global importance score is accumulated and calculated using a tree structure traversal algorithm to obtain a parameter importance vector; Using the parameter importance vector, pruning the parameter hierarchy structure, removing leaf nodes whose importance scores are lower than a preset threshold, and obtaining a parameter tree structure; Based on the parameter tree structure, the depth, subtree size and node degree of each parameter node are calculated, and a parameter priority evaluation standard is constructed in combination with the parameter importance score; The parameter priority evaluation standard is used to perform multi-dimensional scoring on each packaging structure parameter, and the scores of each dimension are comprehensively calculated using a weighted summation method, and then normalized to obtain a corresponding priority value.

5. The high-density memory chip packaging structure design method according to claim 4, characterized in that: The method of using the parameter tree structure and the priority value to sort and optimize the multiple package structure parameters one by one, and using an adaptive penalty function method to process constraint conditions to obtain a target package structure parameter combination includes: B1: Performing a depth-first traversal on the parameter tree structure, performing a weighted combination of the priority value of each node and its depth in the tree, and generating an optimized order list of package structure parameters; B2: Based on the optimization sequence list, an initial search step and a search range are set for each package structure parameter to construct a parameter optimization configuration table; B3: Using the Latin hypercube sampling algorithm, 100 groups of initial package structure parameter combinations are generated in the parameter space defined in the parameter optimization configuration table, and the objective function value of each group of parameters is calculated through the structure optimization model, and the combination with the smallest objective function value is selected as the initial optimal solution; B4: construct an adaptive penalty function based on the initial optimal solution, convert the M constraints into penalty terms, set the initial penalty factor λ1=1, and obtain the augmented objective function; B5: Perform a local search on the first package structure parameter in the optimization sequence list, and evenly generate 10 candidate values ​​within the corresponding search range; B6: Input the package structure parameter combination containing each candidate value into the structure optimization model, calculate the corresponding objective function value and constraint violation degree, and substitute them into the augmented objective function to calculate the comprehensive evaluation index; B7: Compare the comprehensive evaluation indexes of all candidate values, select the candidate value with the smallest index to update the current parameter, and if all candidate values ​​have not improved, halve the search step size; B8: The acceptance rate is calculated based on the number of times the new solution is accepted divided by the total number of iterations, and the penalty factor λ2 is dynamically adjusted according to the acceptance rate R: when R<0.2, λ2=λ1*1.5; when R>0.8, λ2=λ1 / 1.5; B9: Repeat steps B5-B8 until all package structure parameters are optimized or the maximum number of iterations is 1000, and a local optimal package structure parameter combination is obtained; B10: Perform global verification on the locally optimal packaging structure parameter combination, calculate the corresponding objective function value and constraint violation degree, and if the convergence condition is not met, return to step B3 and repeat steps B3-B9 until the target packaging structure parameter combination that meets all constraint conditions is obtained.

6. A high-density memory chip packaging structure design device, characterized in that: For implementing the steps of the method according to any one of claims 1 to 5, the device comprises: A modeling module, used for performing three-dimensional modeling of a multi-chip stacking structure of a high-density memory chip based on a current combination of packaging structure parameters to obtain a packaging structure model; An analysis module, used to perform finite element analysis on the packaging structure model based on preset temperature cycle test conditions to obtain stress distribution data and stress-strain curve; A fusion module, used for extracting and fusing features of the stress distribution data and the stress-strain curve to obtain a fused feature vector; A training module, used for inputting the fused feature vector and the current package structure parameter combination into a multi-layer feedforward neural network, and obtaining a structure optimization model through back propagation training; An allocation module, configured to perform dependency analysis on a plurality of packaging structure parameters based on the structure optimization model, construct a parameter tree structure, and allocate a corresponding priority value according to the degree of influence of each packaging structure parameter on the high-density storage chip; The optimization module is used to sort and optimize the multiple packaging structure parameters one by one by using the parameter tree structure and the priority value, and at the same time use an adaptive penalty function method to process constraint conditions to obtain a target packaging structure parameter combination.

7. A computer device comprising a memory and a processor, wherein a computer program is stored in the memory, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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