Circuit board and preparation method thereof

Abstract

The invention provides a preparation method of a circuit board, comprising the following steps: providing a substrate comprising a base material layer and a conductive layer, the conductive layer comprising a first surface and a second surface; cutting the conductive layer to form a plurality of first openings which at least penetrate through the second surface and are arranged at intervals, wherein the cross section of each first opening is an inverted trapezoid or an inverted triangle; forming a first filling layer in each first opening; removing the base material layer and forming a pattern film with a plurality of windows on the first surface, wherein part of the first surface is exposed out of the windows; the exposed first surface is etched to form a second opening communicated with the first opening, so that the conductive layer is divided into a plurality of conductors arranged at intervals, part of the first opening and the second opening jointly form a first hole part, the remaining first opening forms a second hole part, and the cross section of the second hole part is in an inverted trapezoid shape; the first hole part and the second hole part jointly form a through hole; and removing the pattern film. The preparation method provided by the invention is beneficial to improving the processing efficiency. The invention further provides a circuit board.

Description

Technical Field

[0001] The present application relates to the field of circuit board processing, and in particular to a circuit board and a method for preparing the same. Background Art

[0002] In the preparation of circuit boards, a horizontal spray etching method is usually used to etch a conductive layer (such as a copper layer) to prepare a conductive circuit layer. After the etching solution reacts with the top layer of the conductive layer, it can quickly flow out of the board, and the etching solution has a fast update speed, which will not cause side etching of the conductive circuit layer. However, as the etching depth increases, the etching solution will stagnate in the conductive layer, causing the etching solution to update more slowly, thereby affecting the longitudinal etching speed of the etching solution. Therefore, the above preparation method has the disadvantage of low processing efficiency. Summary of the invention

[0003] In view of this, the present application provides a method for preparing a circuit board that is beneficial for improving processing efficiency.

[0004] In addition, the present application also provides a circuit board.

[0005] The present application provides a method for preparing a circuit board, comprising the following steps: providing a substrate, wherein the substrate comprises a base material layer and a conductive layer stacked along a first direction, wherein the conductive layer comprises a first surface connected to the base material layer and a second surface arranged away from the first surface; cutting the conductive layer to form a plurality of first openings at least penetrating the second surface, wherein the plurality of first openings are arranged at intervals along a second direction perpendicular to the first direction, and each of the first openings has a cross section parallel to the first direction and the second direction that is an inverted trapezoid or an inverted triangle; forming a first filling layer in each of the first openings; removing the base material layer and forming a graphic film on the first surface, wherein the graphic film has a plurality of cross sections along the second direction; Windows are arranged at intervals in two directions, one of the windows corresponds to the first opening, and a portion of the first surface is exposed from the window; the exposed first surface is etched to form a second opening connected to the first opening along the first direction, so that the conductive layer is divided into a plurality of conductors arranged at intervals along the second direction, and the plurality of conductors form a conductive circuit layer, a portion of the first opening and the second opening adjacent to the second opening in the first direction jointly form a first hole portion, and the remaining first opening forms a second hole portion, the cross section of the second hole portion along the cross section parallel to the first direction is an inverted trapezoid, and the first hole portion and the second hole portion jointly form a through hole; and removing the graphic film.

[0006] In some possible implementations, the conductor includes a third surface obtained by dividing the first surface, and after removing the graphic film, the preparation method further includes the step of: forming a second filling layer in the first hole portion, and the second filling layer also covers the third surface.

[0007] In some possible embodiments, the conductor also includes a fourth surface obtained by dividing the second surface, and the first filling layer also covers the fourth surface. The preparation method also includes: forming a first protective layer on the first filling layer; and forming a second protective layer on the second filling layer.

[0008] In some possible implementations, a cross section of the first hole portion parallel to the first direction and the second direction is square.

[0009] In some possible implementations, a cross section of the second hole portion along the direction parallel to the first direction and the second direction is an inverted isosceles trapezoid.

[0010] The present application also provides a circuit board, the circuit board comprising a conductive circuit layer and a first filling layer stacked along a first direction. The conductive circuit layer comprises a plurality of conductors arranged at intervals along a second direction perpendicular to the first direction. A through hole is formed between two adjacent conductors. The through hole comprises a first hole portion and a second hole portion connected along the first direction. The cross section of the second hole portion parallel to the first direction is an inverted trapezoid. The first filling layer is arranged in the second hole portion. Part of the first filling layer also extends into the first hole portion.

[0011] In some possible implementations, the conductor includes a third surface disposed away from the first filling layer, and the circuit board further includes a second filling layer, which is disposed in the first hole portion and also covers the third surface.

[0012] In some possible embodiments, the conductor also includes a fourth surface disposed away from the third surface, the first filling layer also covers the fourth surface, and the circuit board also includes a first protective layer and a second protective layer, the first protective layer is disposed on a surface of the first filling layer away from the fourth surface, and the second protective layer is disposed on a surface of the second filling layer away from the third surface.

[0013] In some possible implementations, a cross section of the first hole portion parallel to the first direction and the second direction is square.

[0014] In some possible implementations, a cross section of the second hole portion along the direction parallel to the first direction and the second direction is an inverted isosceles trapezoid.

[0015] In the present application, a first opening is first formed by cutting, and then a second opening connected to the first opening along a first direction is formed by etching. The etching liquid only needs to etch a portion of the thickness (along the first direction) of the conductive layer to form a conductor. Therefore, the preparation method of the present application can reduce the etching depth so as to increase the updating speed of the etching liquid, thereby increasing the etching speed of the etching liquid in the first direction. Thus, the preparation method provided by the present application can improve the processing efficiency of the circuit board. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A cross-sectional view of a substrate provided in one embodiment of the present application;

[0017] Figure 2 For Figure 1 A cross-sectional view showing a first opening formed in a conductive layer of a substrate;

[0018] Figure 3 For Figure 2 A cross-sectional view showing a first filling layer formed in the first opening and a first protective layer formed on the first filling layer;

[0019] Figure 4 To remove Figure 3 A cross-sectional view of a base material layer of a substrate shown, in which a dry film layer is formed on a first filling layer and a conductive layer;

[0020] Figure 5 for selectively exposing the dry film layer to form a cross-sectional view of the exposed area;

[0021] Figure 6 To remove Figure 5 The exposed area shown forms a window to obtain a cross-sectional view of the graphic film;

[0022] Figure 7 For etching exposed Figure 6 A cross-sectional view of a first surface of a conductive layer with windows opened to form a through hole;

[0023] Figure 8 To remove Figure 7 Cross-sectional views of the graphic film and dry film layers shown;

[0024] Fig. 9 For Figure 8 The cross-sectional view shows a second filling layer formed in the through hole and a second protective layer formed on the second filling layer.

[0025] Main component symbols

[0026] Circuit board 100 Conductive circuit layer 10

[0027] First hole portion 101 Second hole portion 102

[0028] Through hole 103 First opening 104

[0029] Second opening 105 Conductive layer 106

[0030] First surface 107 Second surface 108

[0031] Base material layer 109 Substrate 110

[0032] Conductor 11 Third surface 111

[0033] Fourth surface 112 First filling layer 20

[0034] Second filling layer 30 First protective layer 40

[0035] Second protective layer 50 opening window 71

[0036] Dry film layer 60 First direction X

[0037] Second direction Y exposure area 61

[0038] Graphic film 70

[0039] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0040] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0041] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. When an element is considered to be "set on" another element, it may be directly set on the other element or there may be a central element at the same time.

[0042] Embodiment 1:

[0043] The present application provides a method for preparing a circuit board. According to different requirements, the order of the steps of the preparation method can be changed, and some steps can be omitted or combined. The preparation method comprises the following steps:

[0044] Step 1: Reference Figure 1, providing a substrate 110. The thickness direction of the substrate 110 is defined as a first direction X, and the extension direction of the substrate 110 is defined as a second direction Y. The substrate 110 includes a substrate layer 109 and a conductive layer 106 stacked along the first direction X. In the present embodiment, a conductive layer 106 is provided on one surface of the substrate layer 109. In another embodiment, a conductive layer 106 may be provided on two opposite surfaces of the substrate layer 109, respectively. Exemplarily, the material of the substrate layer 109 may be one of polyimide, liquid crystal polymer or polyethylene terephthalate. Exemplarily, the material of the conductive layer 106 may be one of copper or copper alloy. The conductive layer 106 includes a first surface 107 connected to the substrate layer 109 and a second surface 108 disposed away from the first surface 107. In some embodiments, the spacing between the first surface 107 and the second surface 108 may be greater than or equal to 35 μm.

[0045] Step 2: Reference Figure 2 , cutting the conductive layer 106 to form a plurality of first openings 104 that at least penetrate the second surface 108. Exemplarily, the conductive layer 106 can be cut by a cutter to form the first openings 104. The plurality of first openings 104 are arranged at intervals along the second direction Y. The cross section of each first opening 104 parallel to the first direction X and the second direction Y is an inverted trapezoid or an inverted triangle. In this embodiment, the cross section of the first opening 104 is an inverted triangle. Optionally, the cross section of the first opening 104 is an inverted isosceles triangle. The first opening 104 only penetrates the second surface 108.

[0046] In another embodiment, the first opening 104 may penetrate the first surface 107 and the second surface 108 at the same time, so as to facilitate the positioning and window opening of the graphic film in subsequent steps.

[0047] Step 3: Form a first filling layer 20 in each first opening 104. Optionally, the first filling layer 20 also covers the second surface 108 without the first opening 104. Exemplarily, the first filling layer 20 can be an insulating glue or insulating ink. Exemplarily, the first filling layer 20 can be formed by lamination or printing.

[0048] In some embodiments, the first protective layer 40 is formed on the first filling layer 20 so that the first protective layer 40 is disposed away from the substrate layer 109. Exemplarily, the material of the first protective layer 40 can be one of polyimide or polyethylene terephthalate. The first filling layer 20 and the first protective layer 40 can be formed in steps or simultaneously.

[0049] Step 4: Reference Figure 3 and Figure 4 , remove the substrate layer 109. Form a dry film layer 60 on the first surface 107 and the first protective layer 40 respectively.

[0050] Step 5: Reference Figure 5 The dry film layer 60 disposed on the first surface 107 is selectively exposed, so that the dry film layer 60 disposed on the first surface 107 forms a plurality of exposure regions 61 arranged at intervals along the second direction Y. An exposure region 61 of the dry film layer 60 is disposed corresponding to the first opening 104 .

[0051] Step 6: Reference Figure 5 and Figure 6 , the plurality of exposure areas 61 are removed by development to form a plurality of windows 71 arranged at intervals along the second direction, so that the dry film layer 60 disposed on the first surface 107 forms a pattern film 70. One window 71 is disposed corresponding to one first opening 104. A portion of the first surface 107 is exposed in the window 71. Optionally, the cross section of the window 71 parallel to the first direction X and the second direction Y is square.

[0052] In another embodiment, steps 4 to 6 may be omitted, and after removing the substrate layer 109 , a graphic film 70 having a plurality of windows 71 arranged at intervals along the second direction Y may be formed on the first surface 107 by screen printing. And one window 71 is provided corresponding to one first opening 104 . Part of the first surface 107 is exposed at the window 71 .

[0053] Step 7: Reference Figure 6 and Figure 7 , the first surface 107 exposed by the window 71 is etched to form a second opening 105 connected to the first opening 104 along the first direction, and the first opening 104 and the second opening 105 together divide the conductive layer 106 into a plurality of conductors 11 arranged at intervals along the second direction Y. The plurality of conductors 11 form the conductive circuit layer 10. Exemplarily, the second opening 105 can be formed by etching with an acidic etching solution (e.g., a mixture of cupric chloride and hydrochloric acid) or an alkaline etching solution (a mixture of cupric chloride and ammonia water). After the conductive layer 106 is divided, the first surface 107 and the second surface 108 of the conductive layer 106 are also divided into a plurality of third surfaces 111 and a plurality of fourth surfaces 112, respectively. Each conductor 11 includes a third surface 111 obtained by dividing the first surface 107 and a fourth surface 112 obtained by dividing the second surface 108. The first filling layer 20 also covers the fourth surface 112. The first protective layer 40 is disposed away from the fourth surface 112. Part of the first opening 104 and the second opening 105 disposed adjacent to the second opening 105 in the first direction X together form a first hole portion 101, and the part of the first opening 104 is surrounded by the second opening 105. The remaining first opening 104 forms a second hole portion 102. The first hole portion 101 and the second hole portion 102 together form a through hole 103. The cross section of the second hole portion 102 parallel to the first direction X and the second direction Y is an inverted trapezoidal structure.

[0054] In some embodiments, the cross section of the second hole portion 102 parallel to the first direction X and the second direction Y is an inverted isosceles trapezoid, so as to increase the distribution density of the conductor 11 .

[0055] In some embodiments, the cross section of the first hole portion 101 parallel to the first direction X and the second direction Y is square. The symmetrically arranged first hole portions 101 also facilitate increasing the distribution density of the conductor 11. The shape of the first hole portion 101 can be controlled by controlling the spacing between two adjacent third surfaces 111 in the second direction Y. Specifically, refer to Figure 7 , when the distance between two adjacent third surfaces 111 in the second direction Y is smaller, the etching depth required to form the second opening 105 is smaller, thereby facilitating the rapid renewal and replacement of the etching solution during etching. The rapid renewal and replacement of the etching solution can avoid the side corrosion of the conductor 11, so that the cross section of the first hole portion 101 parallel to the first direction X and the second direction Y can be square. The preparation method provided by the present application is convenient for forming a circuit board with thick copper and fine line spacing, and can reduce the side corrosion of the conductor 11 by controlling the range of the line spacing.

[0056] Step 8: Reference Figure 7 and Figure 8 , remove the graphic film 70 and the dry film layer 60. Exemplarily, the graphic film 70 and the dry film layer 60 can be removed by an alkaline cleaning solution (such as a sodium carbonate solution) or an acidic cleaning solution (such as a nitric acid solution).

[0057] Step 9: Reference Fig. 9 , a second filling layer 30 is formed in the first hole portion 101. The second filling layer 30 also covers the third surface 111 and is connected to the first filling layer 20 disposed in the second hole portion 102. Exemplarily, the second filling layer 30 may be an insulating adhesive layer or insulating ink. The second filling layer 30 may be formed by lamination or printing.

[0058] In some embodiments, a second protective layer 50 is formed on the second filling layer 30 to obtain a circuit board 100. The second protective layer 50 is arranged away from the third surface 111. Exemplarily, the material of the second protective layer 50 can be one of polyimide or polyethylene terephthalate. The second protective layer 50 and the second filling layer 30 can be formed simultaneously or in steps.

[0059] In another embodiment, step nine may be omitted.

[0060] In the present application, the first opening 104 is first formed by cutting, and then the second opening 105 connected to the first opening 104 along the first direction X is formed by etching. The etching liquid only needs to etch a portion of the thickness (along the first direction X) of the conductive layer 106 to form the conductive body 11 from the conductive layer 106. Therefore, the preparation method of the present application can reduce the etching depth so as to increase the renewal speed of the etching liquid, thereby increasing the etching speed of the etching liquid in the first direction X. Therefore, the preparation method provided by the present application can improve the processing efficiency of the circuit board 100.

[0061] Embodiment 2:

[0062] Reference Fig. 9 , an embodiment of the present application provides a circuit board 100. The circuit board 100 can be prepared by the method of Example 1. The circuit board 100 includes a conductive circuit layer 10 and a first filling layer 20 stacked along a first direction X. The conductive circuit layer 10 includes a plurality of conductors 11 arranged at intervals along a second direction Y perpendicular to the first direction X. A through hole 103 is formed between two adjacent conductors 11. The through hole 103 includes a first hole portion 101 and a second hole portion 102 connected along the first direction X. Exemplarily, the first hole portion 101 is formed by etching. The second hole portion 102 is formed by cutting. The cross section of the second hole portion 102 parallel to the first direction X is an inverted trapezoid. The first filling layer 20 is disposed in the second hole portion 102. Part of the first filling layer 20 also extends into the first hole portion 101.

[0063] In some embodiments, the cross section of the first hole portion 101 parallel to the first direction X and the second direction Y is square, so as to improve the distribution density of the conductor 11 .

[0064] In some embodiments, the cross section of the second hole portion 102 parallel to the first direction X and the second direction Y is an inverted isosceles trapezoid, which also facilitates improving the distribution density of the conductors 11 .

[0065] The conductor 11 includes a third surface 111 disposed away from the first filling layer 20 and a fourth surface 112 disposed away from the third surface 111. In some embodiments, the first filling layer 20 also covers the fourth surface 112. In some embodiments, the circuit board 100 also includes a second filling layer 30. The second filling layer 30 is fixed in the first hole portion 101 and also covers the third surface 111 and is connected to the first filling layer 20 located in the second hole portion 102. The arrangement that the first filling layer 20 also covers the fourth surface 112 and the second filling layer 30 also covers the third surface 111 is conducive to protecting the conductor 11 and stabilizing the line spacing of the conductor 11.

[0066] In some embodiments, the circuit board 100 further includes a first protective layer 40 and a second protective layer 50. The first protective layer 40 is disposed on a surface of the first filling layer 20 away from the fourth surface 112. The second protective layer 50 is disposed on a surface of the second filling layer 30 away from the third surface 111. The provision of the first protective layer 40 and the second protective layer 50 can protect the first filling layer 20 and the second filling layer 30.

[0067] The materials of the components in this embodiment are the same as those of the corresponding components in Embodiment 1, and thus they will not be described in detail.

[0068] The above description is only an optimized specific implementation of the present application, but it cannot be limited to this implementation in the actual application process. For ordinary technicians in this field, other variations and changes made according to the technical concept of the present application should all fall within the protection scope of the present application.

Claims

1. A method for preparing a circuit board, characterized in that: The steps include: Providing a substrate, the substrate comprising a base material layer and a conductive layer stacked along a first direction, the conductive layer comprising a first surface connected to the base material layer and a second surface disposed away from the first surface; Cutting the conductive layer to form a plurality of first openings penetrating at least the second surface, wherein the plurality of first openings are arranged at intervals along a second direction perpendicular to the first direction, and each of the first openings has a cross section parallel to the first direction and the second direction that is an inverted trapezoid or an inverted triangle; forming a first filling layer in each of the first openings; The substrate layer is removed and a graphic film is formed on the first surface, wherein the graphic film is provided with a plurality of windows arranged at intervals along the second direction, one of the windows is provided corresponding to one of the first openings, and a portion of the first surface is exposed from the window; Etching the exposed first surface to form a second opening connected to the first opening along the first direction, so that the conductive layer is divided into a plurality of conductive bodies arranged at intervals along the second direction, the plurality of conductive bodies form a conductive circuit layer, the first opening and the second opening in a portion adjacent to the second opening in the first direction jointly form a first hole portion, the remaining first opening forms a second hole portion, the cross section of the second hole portion along the first direction parallel to the first direction is an inverted trapezoid, and the first hole portion and the second hole portion jointly form a through hole; and The graphic film is removed.

2. The preparation method according to claim 1, characterized in that The conductor includes a third surface obtained by dividing the first surface. After removing the graphic film, the preparation method further includes the steps of: A second filling layer is formed in the first hole portion, and the second filling layer also covers the third surface.

3. The preparation method according to claim 2, characterized in that: The conductor further includes a fourth surface obtained by dividing the second surface, the first filling layer further covers the fourth surface, and the preparation method further includes: forming a first protective layer on the first filling layer; A second protective layer is formed on the second filling layer.

4. The preparation method according to claim 1, characterized in that: A cross section of the first hole portion along the direction parallel to the first direction and the second direction is square.

5. The preparation method according to claim 4, characterized in that: A cross section of the second hole portion along the direction parallel to the first direction and the second direction is an inverted isosceles trapezoid.

6. A circuit board, comprising a conductive circuit layer and a first filling layer stacked along a first direction, wherein the conductive circuit layer comprises a plurality of conductors arranged at intervals along a second direction perpendicular to the first direction, and a through hole is formed between two adjacent conductors, characterized in that: The through hole includes a first hole portion and a second hole portion connected along the first direction, the second hole portion has an inverted trapezoidal cross section along a direction parallel to the first direction, the first filling layer is arranged in the second hole portion, and part of the first filling layer also extends into the first hole portion.

7. The circuit board according to claim 6, characterized in that: The conductor includes a third surface disposed away from the first filling layer, and the circuit board further includes a second filling layer, which is disposed in the first hole portion and also covers the third surface.

8. The circuit board according to claim 7, characterized in that: The conductor also includes a fourth surface arranged away from the third surface, the first filling layer also covers the fourth surface, and the circuit board also includes a first protective layer and a second protective layer, the first protective layer is arranged on the surface of the first filling layer away from the fourth surface, and the second protective layer is arranged on the surface of the second filling layer away from the third surface.

9. The circuit board according to claim 6, characterized in that: A cross section of the first hole portion along the direction parallel to the first direction and the second direction is square.

10. The circuit board according to claim 6 or 9, characterized in that: A cross section of the second hole portion along the direction parallel to the first direction and the second direction is an inverted isosceles trapezoid.

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