Database-based insertion loss estimation method
By establishing an insertion loss database and using the database to estimate the insertion loss value of the PCB superstructure, the problems of large deviations in the insertion loss estimation and high costs in the prior art are solved, and fast and accurate insertion loss estimation and material selection are achieved, reducing production costs.
Patent Information
- Application Number
- CN202411237360.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-05
- Publication Date
- 2024-12-27
AI Technical Summary
In the 5G network era, the analog estimates of PCB insertion loss are large, the existing software is expensive and has poor accuracy, making it difficult to meet customer requirements quickly and accurately.
By testing the insertion loss values under typical superpositions of high-speed materials, an insertion loss database is established, the change pattern is summarized, and the insertion loss values under other superpositions are estimated based on the database. The product of the standard superposition and the rate of change of influencing factors is estimated. Adjust factors until customer requirements are met.
It realizes fast and accurate insertion loss estimation, reduces costs, improves estimation accuracy and efficiency, and provides a reference for selecting the best cost-effective materials and stacks.
Smart Images
Figure CN119203916A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of printed circuit board production, and in particular to an insertion loss estimation method based on a database. Background Art
[0002] In the 5G (fifth generation mobile communication technology, 5G for short) network era, PCB (printed circuit board) boards used in servers, AI (artificial intelligence) accelerator cards, CPU (central processing unit) / GPU (graphics processing unit), optical modules and other fields all require signals to have the characteristics of high integrity, high speed, low heat generation and low loss. In order to meet product requirements, in the PCB manufacturing process, how to match high-speed materials, copper foil, lamination and manufacturing process to achieve the best performance at the lowest cost has become the research content of various PCB manufacturers. Rapidly and accurately estimating the PCB insertion loss under a specific configuration is the premise of determining whether a PCB design can meet customer requirements, but how to achieve rapid and accurate estimation is a difficult problem.
[0003] The simulation and estimation of insertion loss are currently mainly based on the theoretical calculation formulas of microstrip lines and strip lines. However, in fact, there are many factors affecting insertion loss, and the theoretical calculation formula is difficult to cover all the influencing factors, so the simulation estimation value has a large deviation.
[0004] The current insertion loss simulation software in the PCB field has the following main disadvantages:
[0005] 1. Because the technical threshold is high and the software cost is expensive (millions of RMB level);
[0006] 2. The simulation calculation accuracy is poor (the insertion loss estimation value deviation is about 10% to 30%). For PCB manufacturers, the investment is huge but the return is not proportional; but if the simulation estimation link is missing, blind production will cause the PCB finished product to fail to meet the customer's insertion loss requirements, which is fatal to PCB products. Summary of the invention
[0007] The invention provides an insertion loss estimation method based on a database, the purpose of which is to solve the technical problems of large insertion loss value estimation deviation and high estimation cost in the background technology.
[0008] In order to achieve the above object, the present invention provides a method for estimating insertion loss based on a database, comprising the following steps:
[0009] Step S1, testing the insertion loss value of each typical stacking structure of the high-speed material;
[0010] Step S2, forming an insertion loss database with the tested insertion loss values and summarizing the changing rules;
[0011] Step S3: Estimate the insertion loss values of other stacking structures based on the values and variation patterns in the database.
[0012] Preferably, step S1 specifically includes the following steps:
[0013] Step S11, setting the common stacking structure as the standard stacking structure;
[0014] Step S12, setting the single factor change of each influencing factor as a test stack;
[0015] Step S13, testing the insertion loss value of the finished PCB under each stacking structure.
[0016] Preferably, in step S11, the common stacking structure is: the copper foil type is HTE, the solder resist ink type is common ink, and the dielectric thickness is H1=2.7mil.
[0017] Preferably, the single factor changes of the influencing factors in step S12 include changes in the copper foil type, changes in the solder resist ink type and changes in the dielectric thickness.
[0018] Preferably, in step S12, the copper foil type is specifically changed to RTF, the solder resist ink type is specifically changed to low-loss ink, and the dielectric thickness is specifically changed to H1=3.0mil.
[0019] Preferably, testing the insertion loss value of the finished PCB under each stacking structure in step S13 specifically includes: testing the insertion loss value of the finished PCB under each stacking structure at different frequencies.
[0020] Preferably, the different frequencies in step S13 include 4Ghz, 8Ghz, 12.89Ghz, and 16Ghz.
[0021] Preferably, step S2 specifically includes summarizing the insertion loss values under different stacking structures, and summarizing the change rules of the single factors of each influencing factor, including the insertion loss change rate of the copper foil type change, the insertion loss change rate of the solder mask ink type change, and the insertion loss change rate of the dielectric thickness change.
[0022] Preferably, the insertion loss in step S3 is estimated as the product of the insertion loss value of the standard stack and the single factor change rate of the influencing factor.
[0023] Preferably, the method further comprises the following steps:
[0024] Step S4: If the estimation result can meet the customer's requirements, it means that the copy can be produced at present;
[0025] If the estimate cannot meet the customer's requirements, one or more of the influencing factors must be adjusted until the insertion loss estimate meets the customer's requirements.
[0026] The insertion loss estimation method based on a database of the present invention has the following beneficial effects:
[0027] The insertion loss database is established by testing the insertion loss of high-speed materials, and then the insertion loss value variation rules of high-speed materials of different levels and different stacking structures are summarized based on the database to estimate the insertion loss values of other PCB stacking structures, which has the characteristics of simple operation, low cost, accuracy and high efficiency. The present invention can quickly and accurately estimate the PCB insertion loss value under specific materials and specific stacking structures based on the insertion loss database, providing a reference for selecting the most cost-effective materials and stacking structures. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 The present invention is a flowchart of a preferred embodiment of a method for estimating insertion loss based on a database. DETAILED DESCRIPTION
[0029] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.
[0030] In view of the existing problems, the present invention provides an insertion loss estimation method based on a database.
[0031] In one embodiment, taking a microstrip line of a certain ultra-low loss first-level material as an example, a database-based insertion loss estimation method is provided. Figure 1 As shown, the following steps are included:
[0032] Step S1, testing the insertion loss value of each typical stacking structure of the high-speed material;
[0033] Step S1 specifically includes the following steps:
[0034] Step S11, setting a common stacking structure as a standard stacking structure; the common stacking structure includes stacking structures set for copper foil type, solder mask ink type and dielectric thickness.
[0035] The common stacking structure is: the copper foil type is HTE, the solder mask ink type is ordinary ink, and the dielectric thickness is H1=2.7mil.
[0036] Step S12, setting the single factor change of each influencing factor as a test stack;
[0037] Testing the stackup means changing the stackup under the single factor state. The single factor changes of each influencing factor include copper foil type change, solder mask ink type change and dielectric thickness change.
[0038] The copper foil type change is specifically changed to RTF, the solder mask ink type is specifically changed to low-loss ink, and the dielectric thickness change is specifically changed to H1=3.0mil.
[0039] Step S13, testing the insertion loss value of the finished PCB under each stacking structure.
[0040] Specifically, the insertion loss values of the finished PCBs under each stacking structure at different frequencies are tested, including the insertion loss values at 4Ghz, 8Ghz, 12.89Ghz, and 16Ghz frequencies in this embodiment.
[0041] In this embodiment, the test results are shown in the following table:
[0042]
[0043]
[0044] Step S2, forming an insertion loss database with the tested insertion loss values and summarizing the changing rules;
[0045] Step S2 specifically summarizes the insertion loss values under different stacking structures, and summarizes the change rules of the single factors of each influencing factor, including the insertion loss change rate of copper foil type change, the insertion loss change rate of solder mask ink type change, and the insertion loss change rate of dielectric thickness change.
[0046] In this embodiment, the change rules are shown in the following table:
[0047]
[0048] Step S3: Estimate the insertion loss values of other stacking structures based on the values and variation patterns in the database.
[0049] In step S3, the insertion loss is estimated as the product of the insertion loss value of the standard stack and the single factor change rate of the influencing factor.
[0050] In this embodiment, the estimated insertion loss value of RTF copper foil + low loss ink + dielectric 3mil stacking is shown in the following table:
[0051]
[0052]
[0053] If the estimated results can meet the customer's requirements, it means that the stacked structure can be manufactured at present;
[0054] If the estimate does not meet customer requirements, one or more of the influencing factors must be adjusted until the insertion loss estimate meets customer requirements.
[0055] The losses at other stacking structures and frequencies can also be estimated based on the tested variation patterns.
[0056] The insertion loss estimation method based on a database of the present invention has the following beneficial effects:
[0057] The insertion loss database is established by testing the insertion loss of high-speed materials, and then the insertion loss value variation rules of high-speed materials of different levels and different stacking structures are summarized based on the database to estimate the insertion loss values of other PCB stacking structures, which has the characteristics of simple operation, low cost, accuracy and high efficiency. The present invention can quickly and accurately estimate the PCB insertion loss value under specific materials and specific stacking structures based on the insertion loss database, providing a reference for selecting the most cost-effective materials and stacking structures.
[0058] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.
Claims
1. A method for estimating insertion loss based on a database, characterized in that: The steps include: Step S1, testing the insertion loss value of each typical stacking structure of the high-speed material; Step S2, forming an insertion loss database with the tested insertion loss values and summarizing the changing rules; Step S3: Estimate the insertion loss values of other stacking structures based on the values and variation patterns in the database.
2. The insertion loss estimation method based on a database according to claim 1, characterized in that: Step S1 specifically includes the following steps: Step S11, setting the common stacking structure as the standard stacking structure; Step S12, setting the single factor change of each influencing factor as a test stack; Step S13, testing the insertion loss value of the finished PCB under each stacking structure.
3. The insertion loss estimation method based on a database according to claim 2, characterized in that: In step S11 , a common stacking structure is: the copper foil type is HTE, the solder mask ink type is common ink, and the dielectric thickness is H1=2.7 mil.
4. The insertion loss estimation method based on a database according to claim 2, characterized in that: The single factor changes of the influencing factors in step S12 include changes in the copper foil type, solder mask ink type and dielectric thickness.
5. The insertion loss estimation method based on a database according to claim 4, characterized in that: In step S12, the copper foil type is specifically changed to RTF, the solder mask ink type is specifically changed to low-loss ink, and the dielectric thickness is specifically changed to H1=3.0 mil.
6. The insertion loss estimation method based on a database according to claim 2, characterized in that: Testing the insertion loss value of the finished PCB under each stacking structure in step S13 specifically includes: testing the insertion loss value of the finished PCB under each stacking structure at different frequencies.
7. The insertion loss estimation method based on a database according to claim 6, characterized in that: The different frequencies in step S13 include 4Ghz, 8Ghz, 12.89Ghz, and 16Ghz.
8. The insertion loss estimation method based on a database according to claim 4, characterized in that: Step S2 specifically summarizes the insertion loss values under different stacking structures, and summarizes the change rules of the single factors of each influencing factor, including the insertion loss change rate of copper foil type change, the insertion loss change rate of solder mask ink type change, and the insertion loss change rate of dielectric thickness change.
9. The insertion loss estimation method based on a database according to claim 8, characterized in that: In step S3, the insertion loss is estimated as the product of the insertion loss value of the standard stack and the single factor change rate of the influencing factor.
10. The insertion loss estimation method based on a database according to claim 8, characterized in that: The following steps are also included: Step S4: If the estimation result can meet the customer's requirements, it means that the copy can be produced at present; If the estimate cannot meet the customer's requirements, one or more of the influencing factors must be adjusted until the insertion loss estimate meets the customer's requirements.