Mine lamp charging circuit with abnormal fault protection function

Abstract

The invention discloses a mine lamp charging circuit with an abnormal fault protection function. The mine lamp charging circuit comprises a BUCK charging circuit, a capacitor charging and discharging circuit and an abnormal fault protection circuit, the BUCK charging circuit is used for converting an input voltage into an output voltage with a high-low level signal with a set duty ratio and supplying the output voltage to the capacitor charging and discharging circuit and the abnormal fault protection circuit; the capacitor charging and discharging circuit is used for doubling an output voltage under the action of high and low level signals output by the BUCK charging circuit and then sending the doubled output voltage to the abnormal fault protection circuit; when the BUCK charging circuit only outputs a single high level or low level signal, the capacitor charging and discharging circuit is used for outputting the output voltage to the abnormal fault protection circuit; and the abnormal fault protection circuit is conducted under the action of the doubled output voltage and outputs a signal to the battery module assembly at the rear end. According to the invention, the post-stage circuit can be protected when the charging circuit fails, so that the battery module assembly is prevented from being damaged by high voltage and large current, and the use safety performance is improved.

Description

Technical Field

[0001] The invention relates to the field of measurement and control technology, and in particular to a mining lamp charging circuit with an abnormal fault protection function. Background Art

[0002] When working underground in coal mines, workers need to wear mining lamps for lighting. The good performance of mining lamps plays a vital role in production safety. Therefore, the safety and reliability of mining lamps must be strictly required.

[0003] When the mining lamp is working, it is powered by the rechargeable battery module assembly. When the battery module assembly is low or out of power, it is necessary to use a charging rack (the charging rack is on the mine. When the operator completes the work underground, he needs to connect the mining lamp to the charging rack to charge the battery when he returns to the ground. The charging assembly and the battery module assembly are integrated) to charge the battery. There are currently two popular charging methods on the market: The first is a charging method that uses linear constant current charging + PMOS to prevent battery backflow. This method has low efficiency and a narrow input voltage range (linear constant current cannot have a wide input voltage range. The larger the input-output voltage difference, the lower the efficiency, the greater the device heat, and the lower the reliability). At the same time, the on-resistance of PMOS is large, so the voltage applied to the battery module assembly is low, and therefore the charging efficiency is low.

[0004] The second is the charging method of switching constant current charging + PMOS to prevent battery backflow. This method has a wide input voltage range, but the on-resistance of PMOS is large, so the voltage applied to the battery module is low, so the charging efficiency is low. At the same time, since the switch circuit generally uses a BUCK charging circuit, this circuit has the following risks when used in this safety occasion: 1. As attached Figure 1 As shown, when the D and S poles of QbuckMOS are turned on, the input voltage will be directly added to both ends of the battery module assembly. At this time, the battery module assembly will be subjected to high voltage and high current. The battery module assembly may be damaged or even dangerous, and cannot meet the safety requirements.

[0005] 2. If the BUCK duty cycle D used cannot reach 100%, when the input voltage is too low due to line loss, the output voltage is also low (Vout=Vin*D), and the voltage of the battery module assembly will not be fully charged, which will cause the battery module assembly to lose power. Summary of the invention

[0006] In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is: how to provide a mining lamp charging circuit with abnormal fault protection function that can protect the subsequent circuit when the BUCK charging circuit fails, so as to avoid damage to the battery module components caused by high voltage and high current, and improve the safety performance of use.

[0007] In order to solve the above technical problems, the present invention adopts the following technical solutions: A mining lamp charging circuit with abnormal fault protection function, comprising a BUCK charging circuit, a capacitor charging and discharging circuit and an abnormal fault protection circuit; The BUCK charging circuit is connected to the capacitor charging and discharging circuit and the abnormal fault protection circuit, and the BUCK charging circuit is used to convert the input voltage into an output voltage with a high and low level signal with a set duty cycle to the capacitor charging and discharging circuit and the abnormal fault protection circuit; The capacitor charging and discharging circuit is connected to the abnormal fault protection circuit, and the capacitor charging and discharging circuit doubles the output voltage under the action of the high and low level signals output by the BUCK charging circuit and then supplies it to the abnormal fault protection circuit, and the capacitor charging and discharging circuit supplies the output voltage to the abnormal fault protection circuit when the BUCK charging circuit only outputs a single high level or low level signal; The abnormal fault protection circuit is connected to the battery module assembly at the rear end. The abnormal fault protection circuit is turned on and outputs a signal to the battery module assembly at the rear end under the action of the doubled output voltage.

[0008] The working principle of the present invention is as follows: the input voltage is converted into an output voltage with a high and low level signal having a set duty cycle after passing through the BUCK charging circuit, and the output voltage is output to the capacitor charging and discharging circuit and the abnormal fault protection circuit respectively. When the BUCK charging circuit works normally, since it outputs a signal with a high level and a low level, the capacitor charging and discharging circuit doubles the output voltage and further outputs it to the abnormal fault protection circuit. A voltage difference that can turn on the abnormal fault protection circuit is formed between the doubled output voltage obtained from the capacitor charging and discharging circuit and the output voltage obtained from the BUCK charging circuit. At this time, the abnormal fault protection circuit is turned on and outputs a signal to the battery module assembly at the rear end, and when the B When a fault occurs in the UCK charging circuit, the BUCK charging circuit will continue to output a high level or a low level. At this time, the capacitor charging and discharging circuit will output a voltage to the abnormal fault protection circuit. The voltage obtained by the abnormal fault protection circuit from the capacitor charging and discharging circuit and the voltage obtained from the BUCK charging circuit cannot form a voltage difference that turns on the abnormal fault protection circuit. Therefore, the abnormal fault protection circuit will be disconnected at this time, and the battery module assembly cannot be charged. The high voltage generated by the BUCK charging circuit fault cannot be directly loaded on both ends of the battery module assembly. Therefore, this solution can protect the subsequent circuit when the BUCK charging circuit fails, so as to avoid damage to the battery module assembly caused by high voltage and high current, thereby improving the safety performance of use.

[0009] Preferably, it also includes an overvoltage protection circuit, which is connected to the BUCK charging circuit and the abnormal fault protection circuit at the same time, and the overvoltage protection circuit disconnects the abnormal fault protection circuit when the output voltage of the BUCK charging circuit exceeds a set value.

[0010] In this way, the overvoltage protection circuit can disconnect the abnormal fault protection circuit when the output voltage exceeds the set value, thereby protecting the battery module assembly.

[0011] Preferably, the BUCK charging circuit includes a PMOS tube Q6, an NMOS tube Q7 and an inductor L1, the drain of the PMOS tube Q6 is connected to an external input voltage, the source of the PMOS tube Q6 is connected to the capacitor charging and discharging circuit through a diode D1, the source of the NMOS tube Q7 is grounded, the drain of the NMOS tube Q7 is connected to the capacitor charging and discharging circuit through a diode D1, and the source of the PMOS tube Q6 and the drain of the NMOS tube Q7 are both connected to the cathode of the diode D1, one end of the inductor L1 is connected to the cathode of the diode D1, and the other end of the inductor L1 serves as the output voltage end of the BUCK charging circuit.

[0012] In this way, in the BUCK charging circuit of this solution, by using the PMOS tube Q6, when driving the PMOS tube Q6, as long as the gate (G pole) voltage of the PMOS tube Q6 is lower than the source (S pole) voltage to reach the conduction threshold voltage Vth, the overall driving is very simple. If the gate voltage of the PMOS tube is always low, the PMOS tube can maintain a normally on state, so that the duty cycle reaches 100%.

[0013] Preferably, the capacitor charging and discharging circuit includes a capacitor C8 and a capacitor C9, and the capacitor C9 is connected to the abnormal fault protection circuit. When the BUCK charging circuit outputs a low-level signal, the capacitor C8 and the capacitor C9 are charged until the terminal voltage is close to the output voltage of the BUCK charging circuit. When the BUCK charging circuit outputs a high-level signal, the capacitor C8 and the capacitor C9 are continuously charged until the terminal voltage is close to twice the output voltage of the BUCK charging circuit.

[0014] Preferably, the capacitor charging and discharging circuit also includes a PNP transistor Q1, an NPN transistor Q2, a diode D2, a diode D3 and a resistor R6, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 are both connected to the anode of the diode D1, the collector of the PNP transistor Q1 is grounded, the emitter of the PNP transistor Q1 is simultaneously connected to one end of the capacitor C8 and the emitter of the NPN transistor Q2, the other end of the capacitor C8 is simultaneously connected to the cathode of the diode D2 and the anode of the diode D3, the collector of the NPN transistor Q2 is simultaneously connected to one end of the resistor R6 and the anode of the diode D2, the other end of the resistor R6 is connected to the BUCK charging circuit through an inductor L, the cathode of the diode D3 is simultaneously connected to one end of the capacitor C9 and one end of the resistor R7, the other end of the capacitor C9 is grounded, and the other end of the resistor R7 is connected to the abnormal fault protection circuit.

[0015] In this way, when the BUCK charging circuit outputs a low level, the PNP transistor Q1 is turned on, and the output voltage charges the capacitor C8 through the resistor R6 and the diode D2. At this time, the end of the capacitor C8 connected to the cathode of the diode D2 is positive, and the capacitor C8 stores energy. The voltage across the capacitor is close to the output voltage, which is only lower than the output voltage by a voltage drop of a diode D2. At the same time, the output voltage also charges the capacitor C9 through the resistor R6, the diode D2 and the diode D3, and the terminal voltage of the capacitor C9 is also close to the output voltage.

[0016] When the BUCK charging circuit outputs a high level, the PNP transistor Q1 is turned off and the NPN transistor Q2 is turned on. At this time, the voltage at one end of the capacitor C8 connected to the emitter of the NPN transistor Q2 is close to the output voltage. Since the voltage difference across the capacitor C8 is close to the output voltage, the voltage at the end of the capacitor C8 connected to the cathode of the diode D2 is close to twice the output voltage. At this time, the capacitor C8 charges the capacitor C9 through the diode D3, so that the voltage at one end of the capacitor C9 connected to the abnormal fault protection circuit is close to twice the output voltage, thereby turning on the abnormal fault protection circuit and charging the battery module assembly normally.

[0017] Preferably, the abnormal fault protection circuit includes an NMOS tube Q5, the source of the NMOS tube Q5 is used to be connected to the output voltage end of the BUCK charging circuit, the drain of the NMOS tube Q5 is used to be connected to the rear-end battery module component, and the gate of the NMOS tube Q5 is connected to the capacitor C9 through a resistor R7.

[0018] In this way, when the PMOS tube Q6 as Qbuck is broken down, the output voltage end is always high. At this time, the voltage at the end where the capacitor charging and discharging circuit is connected to the abnormal fault protection circuit cannot reach 2 times the output voltage, the gate voltage of the NMOS tube Q5 is low, the NMOS tube Q5 cannot be turned on, and the abnormal fault protection circuit is in a disconnected state, so that the high voltage at the input end cannot reach the battery module component at the rear end, thereby achieving the purpose of abnormal fault protection. When the NMOS tube Q7 as Qsyn is broken down, the output voltage end is always low. At this time, the voltage at the end where the capacitor charging and discharging circuit is connected to the abnormal fault protection circuit cannot reach 2 times the output voltage, the gate voltage of the NMOS tube Q5 is low, the NMOS tube Q5 cannot be turned on, and the abnormal fault protection circuit is in a disconnected state, thereby achieving the purpose of abnormal fault protection.

[0019] Preferably, the abnormal fault protection circuit also includes an NMOS tube Q3, the source of the NMOS tube Q3 is connected to the source of the NMOS tube Q5, the drain of the NMOS tube Q3 is connected to the output voltage end of the BUCK charging circuit, and the gate of the NMOS tube Q3 is connected to the capacitor C9 through a resistor R7.

[0020] In this way, the NMOS tube Q3 can prevent the battery module assembly from flowing back to the BUCK charging circuit end, thereby achieving the purpose of preventing current backflow.

[0021] Preferably, the overvoltage protection circuit includes a Zener diode D4 and an NPN transistor Q4, the cathode of the Zener diode D4 is connected to the output voltage end of the BUCK charging circuit, the anode of the Zener diode D4 is grounded through resistors R10 and R9 in sequence, the emitter of the NPN transistor Q4 is grounded, the base of the NPN transistor Q4 is connected between the resistor R10 and the resistor R9, and the collector of the NPN transistor Q4 is connected to the gate of the NMOS tube Q5.

[0022] Preferably, the breakdown voltage of the voltage stabilizing diode D4 is 5V.

[0023] Compared with the prior art, the present invention has the following advantages: 1. The mining lamp charging circuit of the present invention has the function of providing safety protection for the subsequent output when the charging circuit fails.

[0024] 2. The mining lamp charging circuit of the present invention has the function of preventing battery backflow and reducing battery leakage current.

[0025] 3. The mining lamp charging circuit of the present invention has the function of preventing the charging voltage from getting out of control due to poor soldering of components.

[0026] 4. This solution uses NMOS tube Q5 to replace the diode in the prior art to prevent battery voltage backflow, reducing losses. When charging, NMOS tube Q5 is turned on, and the internal resistance of NMOS tube Q5 is 6.8 milliohms. If the charging current is 1.2A, then the loss is 1.2A*1.2A*6.8mΩ=9.79mW; if a diode is used to prevent battery backflow, the tube voltage drop of the diode is calculated as 0.3V (Schottky diode), then the loss is: 1.2A*0.3V=0.36W. In low-power applications, the loss of 0.36W is quite large. Therefore, the mining lamp charging circuit of the present invention has the characteristics of extremely high efficiency and low loss.

[0027] 5. The mining lamp charging circuit of the present invention has low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Attached Figure 1 It is a circuit diagram of a BUCK charging circuit in the prior art; Attached Figure 2 The circuit diagram of the charging circuit of the mining lamp with abnormal fault protection function of the present invention; Attached Figure 3 The circuit diagram of a specific embodiment of the mining lamp charging circuit with abnormal fault protection function of the present invention. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the present invention.

[0030] It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. In the description of the present invention, it should be noted that the orientation or position relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or position relationship shown in the drawings, or the orientation or position relationship in which the invention product is usually placed when used, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present invention. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance. In addition, the terms "horizontal", "vertical", etc. do not mean that the components are absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted. In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] As attached Figure 2As shown, a mining lamp charging circuit with abnormal fault protection function includes a BUCK charging circuit, a capacitor charging and discharging circuit, an abnormal fault protection circuit and an overvoltage protection circuit. The BUCK charging circuit is connected to the capacitor charging and discharging circuit and the abnormal fault protection circuit. The BUCK charging circuit is used to convert the input voltage into an output voltage with a set duty cycle high and low level signal to the capacitor charging and discharging circuit and the abnormal fault protection circuit; the capacitor charging and discharging circuit is connected to the abnormal fault protection circuit, and the capacitor charging and discharging circuit doubles the output voltage under the action of the high and low level signals output by the BUCK charging circuit and then gives it to the abnormal fault protection circuit, and the capacitor charging and discharging circuit gives the output voltage to the abnormal fault protection circuit when the BUCK charging circuit only outputs a single high level or low level signal; the abnormal fault protection circuit is connected to the battery module assembly at the rear end, and the abnormal fault protection circuit is turned on and outputs a signal to the battery module assembly at the rear end under the action of the doubled output voltage. The overvoltage protection circuit is connected to the BUCK charging circuit and the abnormal fault protection circuit at the same time, and the overvoltage protection circuit disconnects the abnormal fault protection circuit when the output voltage of the BUCK charging circuit exceeds the set value.

[0032] Specifically, in the present embodiment, the BUCK charging circuit includes a PMOS tube Q6, an NMOS tube Q7 and an inductor L1, the drain of the PMOS tube Q6 is connected to an external input voltage, the source of the PMOS tube Q6 (i.e., the SW end) is connected to a capacitor charging and discharging circuit through a diode D1, the source of the NMOS tube Q7 is grounded, the drain of the NMOS tube Q7 (i.e., the SW end) is connected to the capacitor charging and discharging circuit through a diode D1, and the source of the PMOS tube Q6 and the drain of the NMOS tube Q7 are both connected to a cathode of the diode D1, one end of the inductor L1 is connected to the cathode of the diode D1, and the other end of the inductor L1 serves as an output voltage end of the BUCK charging circuit.

[0033] In this embodiment, the capacitor charging and discharging circuit includes a capacitor C8, a capacitor C9, a PNP transistor Q1, an NPN transistor Q2, a diode D2, a diode D3 and a resistor R6, the base of the PNP transistor Q1 and the base of the NPN transistor Q2 are both connected to the anode of the diode D1, the collector of the PNP transistor Q1 is grounded, the emitter of the PNP transistor Q1 is simultaneously connected to one end of the capacitor C8 and the emitter of the NPN transistor Q2, the other end of the capacitor C8 is simultaneously connected to the cathode of the diode D2 and the anode of the diode D3, the collector of the NPN transistor Q2 is simultaneously connected to one end of the resistor R6 and the anode of the diode D2, the other end of the resistor R6 is connected to the BUCK charging circuit through the inductor L, the cathode of the diode D3 is simultaneously connected to one end of the capacitor C9 and one end of the resistor R7, the other end of the capacitor C9 is grounded, and the other end of the resistor R7 is connected to the abnormal fault protection circuit. When the BUCK charging circuit outputs a low-level signal (i.e., when the SW terminal is at a low level), capacitors C8 and C9 are charged until the terminal voltage is close to the output voltage of the BUCK charging circuit. When the BUCK charging circuit outputs a high-level signal (i.e., when the SW terminal is at a high level), capacitors C8 and C9 are continuously charged until the terminal voltage is close to twice the output voltage of the BUCK charging circuit.

[0034] In this way, when the SW terminal is at a low level, the PNP transistor Q1 is turned on, and the output voltage charges the capacitor C8 through the resistor R6 and the diode D2. At this time, the end of the capacitor C8 connected to the cathode of the diode D2 is positive (i.e., the A end). The capacitor C8 stores energy, and the voltage across it is close to the output voltage, which is only lower than the output voltage by a voltage drop of a diode D2. At the same time, the output voltage also charges the capacitor C9 through the resistor R6, the diode D2, and the diode D3, and the terminal voltage of the capacitor C9 is also close to the output voltage.

[0035] When the SW terminal is at a high level, the PNP transistor Q1 is cut off and the NPN transistor Q2 is turned on. At this time, the voltage at the end of the capacitor C8 connected to the emitter of the NPN transistor Q2 (i.e., the B end) is close to the output voltage. Since the voltage difference between the two ends of the capacitor C8 was close to the output voltage, the voltage at the end of the capacitor C8 connected to the cathode of the diode D2 (i.e., the A end) is close to 2 times the output voltage. At this time, the capacitor C8 charges the capacitor C9 through the diode D3, so that the voltage at the end of the capacitor C9 connected to the abnormal fault protection circuit is close to 2 times the output voltage, thereby turning on the abnormal fault protection circuit and charging the battery module assembly normally.

[0036] In this embodiment, the abnormal fault protection circuit includes an NMOS tube Q5 and an NMOS tube Q3. The drain of the NMOS tube Q5 is used to connect to the battery module assembly at the rear end, and the gate of the NMOS tube Q5 is connected to the capacitor C9 through the resistor R7. The source of the NMOS tube Q3 is connected to the source of the NMOS tube Q5, the drain of the NMOS tube Q3 is connected to the output voltage end (VOUT) of the BUCK charging circuit, and the gate of the NMOS tube Q3 is connected to the capacitor C9 through the resistor R7.

[0037] In this way, when the PMOS tube Q6 serving as Qbuck is broken down, the SW terminal is always high. At this time, the capacitor C8 cannot be charged, and the gate voltages of the NMOS tubes Q5 and Q3 are low and cannot be turned on. In this way, the high voltage at the input end cannot reach the battery module assembly at the rear end. At the same time, the NMOS tube Q3 prevents the battery module assembly from flowing back to the charging end, thereby achieving the purpose of abnormal fault protection.

[0038] When the NMOS tube Q7 serving as Qsyn is broken down, the SW terminal is always low, and the capacitor C8 can only be charged once. At the same time, because the NPN transistor Q2 is always in the cut-off state in this case, the voltage at the A terminal of the capacitor C8 cannot be raised, so the NMOS tubes Q5 and Q3 cannot be turned on, thereby achieving the purpose of fault protection.

[0039] In this embodiment, the overvoltage protection circuit includes a voltage regulator diode D4 and an NPN transistor Q4. The breakdown voltage of the voltage regulator diode D4 is 5V. The cathode of the voltage regulator diode D4 is connected to the output voltage end of the BUCK charging circuit. The anode of the voltage regulator diode D4 is grounded through resistors R10 and R9 in sequence. The emitter of the NPN transistor Q4 is grounded. The base of the NPN transistor Q4 is connected between the resistor R10 and the resistor R9. The collector of the NPN transistor Q4 is connected to the gate of the NMOS tube Q5.

[0040] In this way, when the high-end resistor of the sampling resistor at the FB end of the charging module is poorly soldered, since the IC1 chip detects that the voltage at the FB end is low, it will gradually increase from the normal duty cycle to the maximum duty cycle, which will cause the output voltage to exceed 5V (according to national safety standards, the maximum charging output voltage is 5V and cannot exceed 5V). In order to prevent this fault from occurring, an overvoltage protection circuit consisting of a Zener diode D4 and an NPN transistor Q4 is added. Once the output voltage exceeds 5V, the Zener diode D4 is broken down, and the NPN transistor Q4, so that the gate voltage of the NMOS tube Q5 and the NMOS tube Q3 is pulled down and cannot be turned on, thereby achieving the purpose of fault protection.

[0041] The working principle of the present invention is as follows: the input voltage is converted into an output voltage with high and low level signals of a set duty cycle after passing through the BUCK charging circuit, and the output voltage is output to the capacitor charging and discharging circuit and the abnormal fault protection circuit respectively. When the BUCK charging circuit works normally, when the SW terminal is at a low level, the PNP transistor Q1 is turned on, and the output voltage charges the capacitor C8 through the resistor R6 and the diode D2. At this time, the end of the capacitor C8 connected to the cathode of the diode D2 is positive (i.e., the A terminal), and the capacitor C8 stores energy. The voltage across the two ends is close to the output voltage, which is only lower than the output voltage by a voltage drop of a diode D2. At the same time, the output voltage also charges the capacitor C9 through the resistor R6, the diode D2 and the diode D3, and the terminal voltage of the capacitor C9 is also close to the output voltage. When the SW terminal is at a high level, the PNP transistor Q1 is turned off and the NPN transistor Q2 is turned on. At this time, the voltage at the end of the capacitor C8 connected to the emitter of the NPN transistor Q2 (i.e., the B end) is close to the output voltage. Since the voltage difference between the two ends of the capacitor C8 is close to the output voltage, the voltage at the end of the capacitor C8 connected to the cathode of the diode D2 (i.e., the A end) is close to 2 times the output voltage. At this time, the capacitor C8 charges the capacitor C9 through the diode D3, so that the voltage at the end of the capacitor C9 connected to the abnormal fault protection circuit is close to 2 times the output voltage, thereby turning on the abnormal fault protection circuit and charging the battery module assembly normally. In this way, when the BUCK charging circuit works normally, the demand for normal charging of the battery module assembly can be met.

[0042] When the BUCK charging circuit fails, if the PMOS tube Q6 as Qbuck is broken down, the SW terminal is always high, and the capacitor C8 cannot be charged at this time. The gate voltage of the NMOS tubes Q5 and Q3 is low and cannot be opened. In this way, the high voltage at the input end cannot reach the battery module components at the rear end. At the same time, the NMOS tube Q3 prevents the battery module components from flowing back to the charging end, thereby achieving the purpose of abnormal fault protection. If the NMOS tube Q7 as Qsyn is broken down, the SW terminal is always low, and the capacitor C8 can only be charged once. At the same time, because the NPN transistor Q2 is always in the off state in this case, the voltage at the A terminal of the capacitor C8 cannot be raised, so the NMOS tubes Q5 and Q3 cannot be opened, thereby achieving the purpose of fault protection. If the high-end resistor of the sampling resistor at the FB end of the charging module is poorly soldered, since the IC1 chip detects that the voltage at the FB end is low, it will gradually increase from the normal duty cycle to the maximum duty cycle, which will cause the output voltage to exceed 5V. In order to prevent this fault from occurring, an overvoltage protection circuit consisting of a Zener diode D4 and an NPN transistor Q4 is added. Once the output voltage exceeds 5V, the Zener diode D4 is broken down, and the NPN transistor Q4, so that the gate voltage of the NMOS tube Q5 and the NMOS tube Q3 is pulled down and cannot be turned on, thereby achieving the purpose of fault protection.

[0043] As attached Figure 3 The figure shows a specific embodiment of the present invention. The IC1 chip and the inductor L1 form a BUCK charging circuit. The IC1 chip adopts the TMI2284Q chip. The maximum duty cycle D of IC1 is 100%. Under normal working conditions, the waveform of its SW end is a waveform with high and low changes. In this way, the voltage doubling circuit composed of C8, D2, D3, and C9 works to provide driving voltage for Q3 and Q5. Therefore, the charging module can provide safe energy to the battery module assembly through Q3 and Q5.

[0044] When an abnormal fault occurs, there is no high-low waveform at the SW end, and the voltage doubler circuit composed of C8, D2, D3, and C9 cannot work. The negative terminal voltage of D3 cannot be raised, so Q3 and Q5 cannot work because the voltage is too low and are in the cut-off state. Therefore, the front-end fault cannot pass through Q3 and Q5 and cannot reach the battery module end, thus protecting the battery module, extending the service life of the module, making the system safer and more robust, and greatly improving the safety of the system. Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit the technical solution. Those skilled in the art should understand that those modifications or equivalent substitutions of the technical solution of the present invention that do not depart from the purpose and scope of the technical solution should be included in the scope of the claims of the present invention.

Claims

1. A mining lamp charging circuit with abnormal fault protection function, characterized in that: Including BUCK charging circuit, capacitor charging and discharging circuit and abnormal fault protection circuit; The BUCK charging circuit is connected to the capacitor charging and discharging circuit and the abnormal fault protection circuit, and the BUCK charging circuit is used to convert the input voltage into an output voltage with a high and low level signal with a set duty cycle to the capacitor charging and discharging circuit and the abnormal fault protection circuit; The capacitor charging and discharging circuit is connected to the abnormal fault protection circuit, and the capacitor charging and discharging circuit doubles the output voltage under the action of the high and low level signals output by the BUCK charging circuit and then supplies it to the abnormal fault protection circuit, and the capacitor charging and discharging circuit supplies the output voltage to the abnormal fault protection circuit when the BUCK charging circuit only outputs a single high level or low level signal; The abnormal fault protection circuit is connected to the battery module assembly at the rear end. The abnormal fault protection circuit is turned on and outputs a signal to the battery module assembly at the rear end under the action of the doubled output voltage.

2. The mining lamp charging circuit with abnormal fault protection function according to claim 1 is characterized in that: It also includes an overvoltage protection circuit, which is connected to the BUCK charging circuit and the abnormal fault protection circuit at the same time. When the output voltage of the BUCK charging circuit exceeds a set value, the overvoltage protection circuit disconnects the abnormal fault protection circuit.

3. The mining lamp charging circuit with abnormal fault protection function according to claim 1 is characterized in that: The BUCK charging circuit includes a PMOS tube Q6, an NMOS tube Q7 and an inductor L1, the drain of the PMOS tube Q6 is connected to an external input voltage, the source of the PMOS tube Q6 is connected to the capacitor charging and discharging circuit through a diode D1, the source of the NMOS tube Q7 is grounded, the drain of the NMOS tube Q7 is connected to the capacitor charging and discharging circuit through a diode D1, and the source of the PMOS tube Q6 and the drain of the NMOS tube Q7 are both connected to the cathode of the diode D1, one end of the inductor L1 is connected to the cathode of the diode D1, and the other end of the inductor L1 serves as an output voltage end of the BUCK charging circuit.

4. The mining lamp charging circuit with abnormal fault protection function according to claim 2 is characterized in that: The capacitor charging and discharging circuit includes a capacitor C8 and a capacitor C9, and the capacitor C9 is connected to the abnormal fault protection circuit. When the BUCK charging circuit outputs a low-level signal, the capacitor C8 and the capacitor C9 are charged until the terminal voltage is close to the output voltage of the BUCK charging circuit. When the BUCK charging circuit outputs a high-level signal, the capacitor C8 and the capacitor C9 are continuously charged until the terminal voltage is close to twice the output voltage of the BUCK charging circuit.

5. The mining lamp charging circuit with abnormal fault protection function according to claim 4 is characterized in that: The capacitor charging and discharging circuit also includes a PNP transistor Q1, an NPN transistor Q2, a diode D2, a diode D3 and a resistor R6. The base of the PNP transistor Q1 and the base of the NPN transistor Q2 are both connected to the anode of the diode D1, the collector of the PNP transistor Q1 is grounded, the emitter of the PNP transistor Q1 is simultaneously connected to one end of the capacitor C8 and the emitter of the NPN transistor Q2, the other end of the capacitor C8 is simultaneously connected to the cathode of the diode D2 and the anode of the diode D3, the collector of the NPN transistor Q2 is simultaneously connected to one end of the resistor R6 and the anode of the diode D2, the other end of the resistor R6 is connected to the BUCK charging circuit through an inductor L, the cathode of the diode D3 is simultaneously connected to one end of the capacitor C9 and one end of the resistor R7, the other end of the capacitor C9 is grounded, and the other end of the resistor R7 is connected to the abnormal fault protection circuit.

6. The mining lamp charging circuit with abnormal fault protection function according to claim 1 is characterized in that: The abnormal fault protection circuit includes an NMOS tube Q5, a source of the NMOS tube Q5 is used to be connected to the output voltage end of the BUCK charging circuit, a drain of the NMOS tube Q5 is used to be connected to the rear-end battery module assembly, and a gate of the NMOS tube Q5 is connected to the capacitor C9 through a resistor R7.

7. The mining lamp charging circuit with abnormal fault protection function according to claim 6 is characterized in that: The abnormal fault protection circuit also includes an NMOS tube Q3, the source of the NMOS tube Q3 is connected to the source of the NMOS tube Q5, the drain of the NMOS tube Q3 is connected to the output voltage end of the BUCK charging circuit, and the gate of the NMOS tube Q3 is connected to the capacitor C9 through a resistor R7.

8. The mining lamp charging circuit with abnormal fault protection function according to claim 2 is characterized in that: The overvoltage protection circuit includes a voltage stabilizing diode D4 and an NPN transistor Q4, the cathode of the voltage stabilizing diode D4 is connected to the output voltage end of the BUCK charging circuit, the anode of the voltage stabilizing diode D4 is grounded through resistors R10 and R9 in sequence, the emitter of the NPN transistor Q4 is grounded, the base of the NPN transistor Q4 is connected between the resistor R10 and the resistor R9, and the collector of the NPN transistor Q4 is connected to the gate of the NMOS tube Q5.

9. The mining lamp charging circuit with abnormal fault protection function according to claim 8, characterized in that: The breakdown voltage of the voltage stabilizing diode D4 is 5V.

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