Control systems for processing semiconductor wafers

Abstract

The invention discloses a control system for processing semiconductor wafers, which relates to the technical field of semiconductor wafers, and includes a temperature analysis module, including a temperature acquisition unit and a temperature early warning unit, which collects the operating temperature and ambient temperature of the semiconductor wafer and analyzes to obtain the temperature anomaly coefficient; a signal analysis module, which is used to monitor the waveform of the wafer during operation, analyze the rise time, the fall time, the number of overcharges per unit time, the number of undercharges per unit time, the overcharge peak value average and the undercharge valley value average, calculate the jump anomaly coefficient and the steady-state anomaly coefficient of the semiconductor wafer, and calculate the operation evaluation index of the semiconductor wafer; a reliability analysis module, which obtains the temperature anomaly coefficient and the operation evaluation index of the semiconductor wafer, calculates the comprehensive evaluation index of the semiconductor wafer, combines the limit comprehensive evaluation index and, calculates the reliability of the semiconductor wafer, and issues a maintenance early warning. It is helpful to avoid equipment failures caused by performance problems of the wafer.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor wafers, and in particular to a control system for processing semiconductor wafers. Background Art

[0002] In the semiconductor manufacturing industry, the stability and reliability of chips are key factors in ensuring the quality of the final product. With the continuous advancement of technology, the complexity of semiconductor chips is increasing, and the various parameters and states during their operation have become more difficult to predict and control. In addition, semiconductor chips may be affected by a variety of factors during manufacturing, transportation, and use, such as physical damage, environmental stress, electrical overload, etc. These factors may not only cause the performance of semiconductor chips to degrade or fail, but may also cause failures in the entire electronic equipment, and even cause data loss or system crashes. Although the current semiconductor chip maintenance early warning technology plays an important role in improving equipment stability and reliability, there are still many challenges and shortcomings.

[0003] In the Chinese invention application with application publication number CN114265793A, a semiconductor device and a chip control method are disclosed, including a data chip having a first chip, a plurality of second chips, and a plurality of first signal lines. The first chip is electrically connected to a terminal group to which a first signal is input from a host. The second chip is electrically connected to the first chip and can output a ready / busy signal respectively. The plurality of first signal lines can transmit the ready / busy signal. The plurality of second chips are independently connected to the first chip through any first signal line among the plurality of first signal lines.

[0004] In the above invention application, access from the host to multiple memory chips is performed via a bridge chip, which improves the efficiency of data transmission between the host and the multiple memory chips, but the introduction of the bridge chip increases the complexity of the system, including the complexity of hardware design and software management. This may increase the difficulty of system debugging and maintenance, and the requirements for technical personnel are also increased accordingly. In addition, the bridge chip itself and the hardware and software development costs associated with it may lead to an increase in the overall cost of the system. This may be a disadvantage for cost-sensitive application scenarios. And although the bridge chip can improve the efficiency of data transmission, in some cases, it may also become a bottleneck for system performance. For example, if the processing speed of the bridge chip cannot keep up with the speed of the host or memory chip, it may cause delays or blockages in data transmission.

[0005] To this end, the present invention provides a control system for processing semiconductor wafers. Summary of the invention

[0006] 1. Technical issues to be resolved

[0007] In view of the deficiencies in the prior art, the present invention provides a control system for processing semiconductor chips. The present invention calculates the comprehensive evaluation index Zp of the semiconductor chip by analyzing the temperature anomaly coefficient Wy and the operation evaluation index Ypg of the semiconductor chip, and calculates the reliability Ka of the semiconductor chip by combining the limit comprehensive evaluation indexes max(Zp) and min(Zp). A maintenance warning is issued to the outside, so that potential problems or performance degradation of the semiconductor chip can be discovered in time, and the operator or maintenance personnel can be reminded to inspect, repair or replace the chip, which helps to avoid equipment failure, production interruption or safety accident caused by performance problems of the chip, thereby reducing maintenance costs, improving production efficiency and ensuring personnel safety, thereby solving the technical problems recorded in the background technology.

[0008] (II) Technical solution

[0009] To achieve the above objectives, the present invention is implemented through the following technical solutions: A control system for processing semiconductor wafers, comprising:

[0010] The temperature analysis module includes a temperature acquisition unit and a temperature early warning unit. The temperature acquisition unit uses a temperature sensor to collect the operating temperature and ambient temperature of the semiconductor wafer. The temperature early warning unit analyzes the operating temperature and ambient temperature to obtain a temperature anomaly coefficient Wy.

[0011] The signal analysis module is used to monitor the waveform of the chip during operation, analyze the rise time Se, the fall time Xj, the number of overshoots per unit time Gs, the number of undershoots per unit time Xc, the average value of the overshoot peak value Gj and the average value of the undershoot valley value Fj, calculate the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt of the semiconductor chip, and calculate the operation evaluation index Ypg of the semiconductor chip based on the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt;

[0012] The reliability analysis module obtains the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor chip, calculates the comprehensive evaluation index Zp of the semiconductor chip, combines the maximum comprehensive evaluation index max(Zp) and the minimum comprehensive evaluation index min(Zp), calculates the reliability Ka of the semiconductor chip, and issues a maintenance warning.

[0013] Furthermore, a temperature sensor is used to periodically collect the operating temperature of the semiconductor wafer. and ambient temperature , calculate the average ambient temperature Hw, and extract the maximum operating temperature of the semiconductor chip, recorded as the maximum operating temperature max( ), and obtain the time Sc to reach the maximum operating temperature according to the timestamp.

[0014] Further, the average ambient temperature Hw and the maximum operating temperature max( ) and the time Sc to reach the maximum operating temperature, calculate the temperature anomaly coefficient Wy:

[0015]

[0016] in, is the standard ambient temperature, The standard maximum operating temperature of a semiconductor wafer when it is operated at a standard ambient temperature. It is the time it takes for a semiconductor wafer to reach the standard maximum operating temperature when operating at a standard ambient temperature.

[0017] Furthermore, an oscilloscope is connected to the semiconductor chip under test to monitor the waveform of the chip during operation, and the waveform data is analyzed and processed using the oscilloscope supporting software to obtain the rise time Se, fall time Xj, number of overshoots per unit time Gs, number of undershoots per unit time Xc, overshoot peak mean Gj and undershoot valley mean Fj.

[0018] Rise time refers to the time required for a pulse signal to jump from a low level to a high level, and is usually measured as the duration of the rising edge between 10% and 90% of the voltage amplitude. In the field of signal integrity, rise time is an important parameter because it directly affects the bandwidth of the signal and the effect of the transmission line. A shorter rise time means that the signal has a higher frequency component, which may cause more serious transmission line effects, such as reflections and crosstalk.

[0019] Corresponding to the rise time, the fall time refers to the time required for the pulse signal to jump from a high level to a low level, usually measuring the duration of the falling edge between 90% and 10% of the voltage amplitude. The fall time also affects the bandwidth and transmission line effect of the signal. A shorter fall time may also lead to more serious signal integrity problems.

[0020] Overshoot refers to the phenomenon that the instantaneous value of a signal exceeds the final stable value during the rising or falling edge. Overshoot usually appears as a sharp pulse and may be caused by factors such as too fast circuit switching speed, impedance mismatch or reflection. Overshoot may not only cause the failure of circuit components, but also cause problems such as electromagnetic interference (EMI) and power supply noise.

[0021] Undershoot refers to the phenomenon that the instantaneous value of a signal is lower than the final stable value during the rising or falling edge. Undershoot usually occurs immediately after overshoot, and the signal will drop below the steady-state value, and then may rebound to above the steady state. This process may last for a period of time until it stabilizes close to the steady state. Excessive undershoot can cause false clock or data errors, which will have an adverse effect on signal transmission and system stability.

[0022] Furthermore, the rise time Se and fall time Xj of the semiconductor chip are obtained, and the jump abnormality coefficient Tb of the semiconductor chip is calculated:

[0023]

[0024] in, is the standard rise time of a semiconductor chip, is the standard fall time of semiconductor wafers.

[0025] Furthermore, the number of overshoots Gs per unit time, the number of undershoots Xc per unit time, the mean overshoot peak value Gj and the mean undershoot valley value Fj of the semiconductor wafer are obtained, and the steady-state abnormal coefficient Wt of the semiconductor wafer is calculated:

[0026]

[0027] in, is the final stable value of the signal.

[0028] Furthermore, the jump abnormal coefficient Tb and the steady-state abnormal coefficient Wt of the semiconductor wafer are obtained, and the operation evaluation index Ypg of the semiconductor wafer is calculated:

[0029]

[0030] in, Indicates the maximum value of the jump abnormality coefficient Tb of all semiconductor chips, Indicates the minimum value of the jump abnormality coefficient Tb of all semiconductor chips, represents the maximum value of the steady-state abnormal coefficient Wt of all semiconductor wafers, Indicates the minimum value of the steady-state abnormal coefficient Wt of all semiconductor wafers.

[0031] Furthermore, the temperature anomaly coefficient Wy and the operation evaluation index Ypg of the semiconductor wafer are obtained, and the comprehensive evaluation index Zp of the semiconductor wafer is calculated:

[0032]

[0033] in, is the average of the temperature anomaly coefficients of all historical semiconductor wafers, is the average of the operational evaluation indexes of all historical semiconductor wafers;

[0034] Functional testing is performed on the chip to verify that it can execute instructions as expected and output correct results with a maximum comprehensive evaluation index Zp and a minimum comprehensive evaluation index Zp, which are denoted as max(Zp) and min(Zp), respectively.

[0035] Furthermore, the comprehensive evaluation index Zp, the maximum comprehensive evaluation index max(Zp) and the minimum comprehensive evaluation index min(Zp) of the semiconductor wafer are obtained, and the reliability Ka of the semiconductor wafer is calculated:

[0036]

[0037] If the reliability Ka of the semiconductor chip is less than 20%, it means that the reliability of the current semiconductor chip is low, and a maintenance warning is issued.

[0038] (III) Beneficial effects

[0039] The present invention provides a control system for processing semiconductor wafers, which has the following beneficial effects:

[0040] 1. Collect the average ambient temperature Hw and maximum operating temperature max of semiconductor wafers ( ) and the time Sc to reach the maximum operating temperature, and calculate the temperature anomaly coefficient Wy, potential thermal problems can be discovered and resolved in a timely manner, thereby improving the overall reliability and stability of semiconductor chips and the electronic devices in which they are located.

[0041] 2. Monitor the waveform of the chip during operation, analyze the rise time Se, fall time Xj, overshoot times Gs per unit time, undershoot times Xc per unit time, overshoot peak value Gj and undershoot valley value Fj, calculate the jump abnormality coefficient Tb and steady-state abnormality coefficient Wt of the semiconductor chip, and calculate the operation evaluation index Ypg of the semiconductor chip based on the jump abnormality coefficient Tb and steady-state abnormality coefficient Wt, which comprehensively reflects the stability of the chip during signal transmission, can intuitively understand the overall operation performance level of the chip, and provides a quantitative standard for evaluating the performance of the chip.

[0042] 3. Obtain the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor chip, calculate the comprehensive evaluation index Zp of the semiconductor chip, combine the maximum comprehensive evaluation index max(Zp) and the minimum comprehensive evaluation index min(Zp), calculate the reliability Ka of the semiconductor chip, and issue a maintenance warning to the outside, so as to timely discover potential problems or performance degradation of the semiconductor chip, and remind the operator or maintenance personnel to check, repair or replace the chip, which helps to avoid equipment failure, production interruption or safety accidents caused by performance problems of the chip, thereby reducing maintenance costs, improving production efficiency and ensuring personnel safety. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a schematic diagram of the structure of a control system for processing semiconductor wafers according to the present invention. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0045] See also Figure 1 The present invention provides a control system for processing semiconductor wafers, comprising:

[0046] The temperature analysis module includes a temperature acquisition unit and a temperature early warning unit. The temperature acquisition unit uses a temperature sensor to collect the operating temperature and ambient temperature of the semiconductor wafer. The temperature early warning unit analyzes the operating temperature and ambient temperature to obtain a temperature anomaly coefficient Wy.

[0047] Use temperature sensors to periodically collect the operating temperature of semiconductor chips and ambient temperature , calculate the average ambient temperature Hw, and extract the maximum operating temperature of the semiconductor chip, recorded as the maximum operating temperature max( ), and obtain the time Sc to reach the maximum operating temperature according to the timestamp.

[0048] Get the average ambient temperature Hw, the maximum operating temperature max( ) and the time Sc to reach the maximum operating temperature, calculate the temperature anomaly coefficient Wy:

[0049]

[0050] in, is the standard ambient temperature, The standard maximum operating temperature of a semiconductor wafer when it is operated at a standard ambient temperature. It is the time it takes for a semiconductor wafer to reach the standard maximum operating temperature when operating at a standard ambient temperature.

[0051] Collect the average ambient temperature Hw and the maximum operating temperature max of the semiconductor wafer ) and the time Sc to reach the maximum operating temperature, and calculate the temperature anomaly coefficient Wy, potential thermal problems can be discovered and resolved in a timely manner, thereby improving the overall reliability and stability of semiconductor chips and the electronic devices in which they are located.

[0052] The signal analysis module is used to monitor the waveform of the chip during operation, analyze the rise time Se, the fall time Xj, the number of overshoots per unit time Gs, the number of undershoots per unit time Xc, the average overshoot peak value Gj and the average undershoot valley value Fj, calculate the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt of the semiconductor chip, and calculate the operation evaluation index Ypg of the semiconductor chip based on the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt.

[0053] Connect the oscilloscope to the semiconductor chip under test, monitor the waveform of the chip during operation, and use the oscilloscope supporting software to analyze and process the waveform data to obtain the rise time Se, fall time Xj, number of overshoots per unit time Gs, number of undershoots per unit time Xc, overshoot peak mean Gj and undershoot valley mean Fj.

[0054] Rise time refers to the time required for a pulse signal to jump from a low level to a high level, and is usually measured as the duration of the rising edge between 10% and 90% of the voltage amplitude. In the field of signal integrity, rise time is an important parameter because it directly affects the bandwidth of the signal and the effect of the transmission line. A shorter rise time means that the signal has a higher frequency component, which may cause more serious transmission line effects, such as reflections and crosstalk.

[0055] Corresponding to the rise time, the fall time refers to the time required for the pulse signal to jump from a high level to a low level, usually measuring the duration of the falling edge between 90% and 10% of the voltage amplitude. The fall time also affects the bandwidth and transmission line effect of the signal. A shorter fall time may also lead to more serious signal integrity problems.

[0056] Overshoot refers to the phenomenon that the instantaneous value of a signal exceeds the final stable value during the rising or falling edge. Overshoot usually appears as a sharp pulse and may be caused by factors such as too fast circuit switching speed, impedance mismatch or reflection. Overshoot may not only cause the failure of circuit components, but also cause problems such as electromagnetic interference (EMI) and power supply noise.

[0057] Undershoot refers to the phenomenon that the instantaneous value of a signal is lower than the final stable value during the rising or falling edge. Undershoot usually occurs immediately after overshoot, and the signal will drop below the steady-state value, and then may rebound to above the steady state. This process may last for a period of time until it stabilizes close to the steady state. Excessive undershoot can cause false clock or data errors, which will have an adverse effect on signal transmission and system stability.

[0058] Get the rise time Se and fall time Xj of the semiconductor chip, and calculate the jump abnormality coefficient Tb of the semiconductor chip:

[0059]

[0060] in, is the standard rise time of a semiconductor chip, is the standard fall time of semiconductor wafers.

[0061] Obtain the number of overshoots Gs per unit time, the number of undershoots Xc per unit time, the mean overshoot peak value Gj and the mean undershoot valley value Fj of the semiconductor chip, and calculate the steady-state abnormal coefficient Wt of the semiconductor chip:

[0062]

[0063] in, is the final stable value of the signal.

[0064] Obtain the jump abnormal coefficient Tb and steady-state abnormal coefficient Wt of the semiconductor wafer, and calculate the operation evaluation index Ypg of the semiconductor wafer:

[0065]

[0066] in, Indicates the maximum value of the jump abnormality coefficient Tb of all semiconductor chips, Indicates the minimum value of the jump abnormality coefficient Tb of all semiconductor chips, represents the maximum value of the steady-state abnormal coefficient Wt of all semiconductor wafers, Indicates the minimum value of the steady-state abnormal coefficient Wt of all semiconductor wafers.

[0067] Monitor the waveform of the chip during operation, analyze the rise time Se, fall time Xj, overshoot times Gs per unit time, undershoot times Xc per unit time, overshoot peak mean Gj and undershoot valley mean Fj, calculate the jump abnormality coefficient Tb and steady-state abnormality coefficient Wt of the semiconductor chip, and calculate the operation evaluation index Ypg of the semiconductor chip based on the jump abnormality coefficient Tb and steady-state abnormality coefficient Wt. It comprehensively reflects the stability of the chip during signal transmission, can intuitively understand the overall operation performance level of the chip, and provides a quantitative standard for evaluating the performance of the chip.

[0068] The reliability analysis module obtains the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor chip, calculates the comprehensive evaluation index Zp of the semiconductor chip, combines the maximum comprehensive evaluation index max(Zp) and the minimum comprehensive evaluation index min(Zp), calculates the reliability Ka of the semiconductor chip, and issues a maintenance warning.

[0069] Obtain the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor wafer, and calculate the comprehensive evaluation index Zp of the semiconductor wafer:

[0070]

[0071] in, is the average of the temperature anomaly coefficients of all historical semiconductor wafers, is the average of the operational evaluation indexes of all historical semiconductor wafers;

[0072] Functional testing is performed on the chip to verify that it can execute instructions as expected and output correct results with a maximum comprehensive evaluation index Zp and a minimum comprehensive evaluation index Zp, which are denoted as max(Zp) and min(Zp), respectively.

[0073] Obtain the comprehensive evaluation index Zp, the maximum comprehensive evaluation index max(Zp) and the minimum comprehensive evaluation index min(Zp) of the semiconductor wafer, and calculate the reliability Ka of the semiconductor wafer:

[0074]

[0075] If the reliability Ka of the semiconductor chip is less than 20%, it means that the reliability of the current semiconductor chip is low, and a maintenance warning is issued.

[0076] The temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor chip are obtained, the comprehensive evaluation index Zp of the semiconductor chip is calculated, and the reliability Ka of the semiconductor chip is calculated by combining the limit comprehensive evaluation index max(Zp) and min(Zp). Maintenance warnings are issued to the outside, which can timely discover potential problems or performance degradation of semiconductor chips and remind operators or maintenance personnel to check, repair or replace chips, which helps to avoid equipment failures, production interruptions or safety accidents caused by chip performance problems, thereby reducing maintenance costs, improving production efficiency and ensuring personnel safety.

[0077] The above embodiments may be implemented in whole or in part by software, hardware, firmware or any other combination thereof. When implemented using software, the above embodiments may be implemented in whole or in part in the form of a computer program product. A person of ordinary skill in the art may appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein may be implemented in electronic hardware, or in a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution.

[0078] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0079] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A control system for processing semiconductor wafers, characterized in that: include: The temperature analysis module includes a temperature acquisition unit and a temperature early warning unit. The temperature acquisition unit uses a temperature sensor to collect the operating temperature and ambient temperature of the semiconductor wafer. The temperature anomaly unit analyzes the operating temperature and ambient temperature to obtain a temperature anomaly coefficient Wy. Use temperature sensors to periodically collect the operating temperature of semiconductor chips and ambient temperature , calculate the average ambient temperature Hw, and extract the maximum operating temperature of the semiconductor chip, recorded as the maximum operating temperature max( ), obtain the time Sc to reach the maximum operating temperature according to the timestamp; Get the average ambient temperature Hw, the maximum operating temperature max( ) and the time Sc to reach the maximum operating temperature, calculate the temperature anomaly coefficient Wy: ； in, is the standard ambient temperature, The standard maximum operating temperature of a semiconductor wafer when it is operated at a standard ambient temperature. It is the time it takes for a semiconductor chip to reach the standard maximum operating temperature when operating at a standard ambient temperature; The signal analysis module is used to monitor the waveform of the chip during operation, analyze the rise time Se, the fall time Xj, the number of overshoots per unit time Gs, the number of undershoots per unit time Xc, the average value of the overshoot peak value Gj and the average value of the undershoot valley value Fj, calculate the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt of the semiconductor chip, and calculate the operation evaluation index Ypg of the semiconductor chip based on the jump abnormality coefficient Tb and the steady-state abnormality coefficient Wt; Get the rise time Se and fall time Xj of the semiconductor chip, and calculate the jump abnormality coefficient Tb of the semiconductor chip: ； in, is the standard rise time of a semiconductor chip, is the standard fall time of semiconductor wafers; Obtain the number of overshoots Gs per unit time, the number of undershoots Xc per unit time, the mean overshoot peak value Gj and the mean undershoot valley value Fj of the semiconductor chip, and calculate the steady-state abnormal coefficient Wt of the semiconductor chip: ； in, is the final stable value of the signal; The reliability analysis module obtains the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor chip, calculates the comprehensive evaluation index Zp of the semiconductor chip, combines the limit comprehensive evaluation index max(Zp) and min(Zp), calculates the reliability Ka of the semiconductor chip, and issues a maintenance warning.

2. The control system for processing semiconductor wafers according to claim 1, characterized in that: Obtain the jump abnormal coefficient Tb and steady-state abnormal coefficient Wt of the semiconductor wafer, and calculate the operation evaluation index Ypg of the semiconductor wafer: ； in, Indicates the maximum value of the jump abnormality coefficient Tb of all semiconductor chips, Indicates the minimum value of the jump abnormality coefficient Tb of all semiconductor chips, represents the maximum value of the steady-state abnormal coefficient Wt of all semiconductor wafers, Indicates the minimum value of the steady-state abnormal coefficient Wt of all semiconductor wafers.

3. The control system for processing semiconductor wafers according to claim 2, characterized in that: Obtain the temperature anomaly coefficient Wy and operation evaluation index Ypg of the semiconductor wafer, and calculate the comprehensive evaluation index Zp of the semiconductor wafer: ； Functional testing is performed on the chip to verify that it can execute instructions as expected and output correct results with a maximum comprehensive evaluation index Zp and a minimum comprehensive evaluation index Zp, which are recorded as limit comprehensive evaluation indexes max(Zp) and min(Zp).

4. The control system for processing semiconductor wafers according to claim 3, characterized in that: Obtain the comprehensive evaluation index Zp, the limit comprehensive evaluation index max(Zp) and min(Zp) of the semiconductor wafer, and calculate the reliability Ka of the semiconductor wafer: ； If the reliability Ka of the semiconductor chip is less than 20%, a maintenance warning is issued.

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