Power device and preparation method thereof

Abstract

The invention discloses a power device and a preparation method thereof. The power device comprises a substrate; the epitaxial layer of the first conduction type is arranged on the substrate, and an active region and a terminal region arranged on the periphery of the active region are arranged on the epitaxial layer; the first injection region of the second conduction type comprises a main junction, and the main junction is arranged at the position, close to the active region, of the terminal region; the first anti-breakdown structure comprises a voltage-dividing deep groove and a field oxide layer; the voltage-dividing deep groove is arranged in a terminal area outside the main junction, and the depth of the voltage-dividing deep groove is greater than the junction depth of the main junction; and the field oxide layer is filled in the partial pressure deep groove and extends out of the partial pressure protection region to cover the surface of the partial pressure deep groove. The power device has the advantages that the anti-breakdown effect is guaranteed, the preparation process is simple, and the cost is relatively low.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor devices, and in particular to a power device and a preparation method thereof. Background Art

[0002] Power devices are generally composed of multiple cells connected in parallel. For example, power devices such as insulated gate bipolar transistors (IGBTs) and vertical double diffused metal oxide semiconductor field effect transistors (VDMOS) are composed of thousands of cells connected in parallel. The potentials on the surface of the cells are basically the same, so there is no breakdown problem between the cells. However, there is a high voltage between the cells and the substrate outside the power device. For example, an electric field is formed between the main junction and the epitaxial layer of different conductivity types, which is easy to break down the power device. In order to ensure the breakdown characteristics and reliability of the power device, a terminal structure needs to be set in the power device, including but not limited to field limiting rings (FLR), metal field plates (FP), resistive field plates (SIPOS), field ring field plates (FR&FLR), junction terminal extensions (JTE), lateral variable doping (VLD) and bevel terminals (Bevel). The terminal structure of existing power devices has the problems of limited anti-breakdown effect, complex preparation process and high cost. Summary of the invention

[0003] The embodiment of the present invention provides a power device and a method for manufacturing the same, so as to solve the problems that the terminal structure of the existing power device has limited anti-breakdown effect, complex manufacturing process and high cost.

[0004] A power device, comprising:

[0005] substrate;

[0006] An epitaxial layer of the first conductivity type is arranged on the substrate, and an active area and a terminal area arranged at the periphery of the active area are provided on the epitaxial layer;

[0007] A first injection region of a second conductivity type, the first injection region comprising a main junction, the main junction being disposed on the terminal region near the active region;

[0008] The first anti-breakdown structure includes a voltage-dividing deep groove and a field oxide layer; the voltage-dividing deep groove is arranged in a terminal region outside the main junction, and the groove depth of the voltage-dividing deep groove is greater than the junction depth of the main junction; the field oxide layer is filled in the voltage-dividing deep groove and extends to the outside of the terminal region to cover the surface of the voltage-dividing deep groove.

[0009] Preferably, the first injection region further comprises a field limiting ring, and the field limiting ring is arranged in a terminal region outside the main junction;

[0010] The depth of the voltage-dividing deep groove is greater than the junction depth of the field limiting ring.

[0011] Preferably, at least three field limiting rings are arranged at intervals on the terminal region, and a distance between two adjacent field limiting rings gradually increases in a direction from the active region to the terminal region.

[0012] Preferably, at least two first anti-breakdown structures are provided on the terminal region between the main junction and the field limiting ring.

[0013] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two first anti-breakdown structures are arranged on the terminal region between the main junction and the field limiting ring close to the main junction.

[0014] Preferably, at least two first anti-breakdown structures are provided on the terminal area outside the field limiting ring.

[0015] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two first anti-breakdown structures are arranged on the terminal region outside the outermost field limiting ring.

[0016] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two first anti-breakdown structures are arranged on the terminal region between two adjacent field limiting rings.

[0017] Preferably, at least two of the voltage-dividing deep grooves are arranged at intervals in the terminal region outside the main junction; and the depths of the at least two voltage-dividing deep grooves gradually increase in a direction from the active region to the terminal region.

[0018] Preferably, the pressure-dividing deep groove is an inverted stepped groove.

[0019] Preferably, the terminal region includes a voltage division protection region arranged at the periphery of the active region and a cut-off protection region arranged at the periphery of the voltage division protection region;

[0020] A cut-off ring of a first conductive type, arranged in the cut-off protection zone;

[0021] The main junction is arranged in a voltage division protection zone close to the active region;

[0022] The voltage-dividing deep groove is arranged in a voltage-dividing protection zone between the main junction and the cut-off ring.

[0023] Preferably, the power device further comprises a second anti-breakdown structure;

[0024] The second anti-breakdown structure includes a first shallow groove, a first insulating oxide layer filled in the first shallow groove, and a conductive semiconductor filled in the first insulating oxide layer;

[0025] The first shallow groove is arranged in the field limiting ring, and a groove depth of the first shallow groove is smaller than a junction depth of the field limiting ring.

[0026] Preferably, at least two second anti-breakdown structures are provided in the field limiting ring.

[0027] Preferably, the power device further comprises a gate breakdown prevention structure;

[0028] The gate anti-breakdown structure comprises a second shallow groove, a first insulating oxide layer filled in the second shallow groove, and a conductive semiconductor filled in the first insulating oxide layer;

[0029] The second shallow groove is arranged in the active area, and the groove depth of the second shallow groove is consistent with the groove depth of the first shallow groove.

[0030] Preferably, the thickness of the first insulating oxide layer is smaller than the thickness of the field oxide layer, and the compactness of the first insulating oxide layer is greater than the compactness of the field oxide layer.

[0031] Preferably, the power device further includes:

[0032] A second implantation region of a second conductivity type is disposed in the active region between the second shallow recess and the main junction and is connected to the main junction;

[0033] A source region of the first conductivity type is arranged in the second implantation region.

[0034] Preferably, the depth of the second implantation region is smaller than the depth of the second shallow groove.

[0035] Preferably, the doping concentration of the second implantation region is less than the doping concentration of the first implantation region.

[0036] Preferably, the doping concentration of the second implantation region is 1-2 orders of magnitude smaller than the doping depth of the first implantation region.

[0037] Preferably, the power device further includes:

[0038] A second insulating oxide layer is disposed on the epitaxial layer and the field oxide layer, and a contact hole is provided on the second insulating oxide layer;

[0039] The front metal is arranged on the second insulating oxide layer, and includes an electrode metal and a cut-off ring metal. The electrode metal is connected to the source region and the main junction through the contact hole, and the cut-off ring metal is connected to the cut-off ring through the contact hole.

[0040] Preferably, the first injection region further comprises a field limiting ring, and the field limiting ring is arranged in a voltage dividing protection area between the main junction and the cut-off ring;

[0041] The front metal further includes a field plate metal, and the field plate metal is connected to the field limiting ring through the contact hole.

[0042] Preferably, the active region is a trench IGBT structure or a trench VDMOS structure.

[0043] A method for preparing a power device, comprising:

[0044] epitaxially forming an epitaxial layer of a first conductivity type on a substrate, wherein the epitaxial layer comprises an active region and a terminal region disposed at the periphery of the active region;

[0045] Etching a voltage-dividing deep groove on the terminal region of the epitaxial layer, and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer;

[0046] An injection gap is etched on the field oxide layer in the terminal region, and a first injection region of a second conductivity type is formed in the terminal region through the injection gap. The first injection region includes a main junction, and the main junction is arranged at a position in the terminal region close to the active region. The voltage divider deep groove is arranged in the terminal region outside the main junction, and the groove depth of the voltage divider deep groove is greater than the junction depth of the main junction.

[0047] Preferably, the terminal region includes a voltage division protection region arranged at the periphery of the active region and a cut-off protection region arranged at the periphery of the voltage division protection region;

[0048] The step of etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap comprises:

[0049] A first implantation gap is etched on the field oxide layer of the voltage division protection zone, and a first implantation zone of a second conductivity type is formed in the voltage division protection zone through the first implantation gap.

[0050] Preferably, after etching a voltage-dividing deep groove on the terminal region of the epitaxial layer and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing the power device further comprises:

[0051] A second implantation gap is etched on the field oxide layer in the cut-off protection zone, and a cut-off ring of the first conductivity type is formed in the cut-off protection zone through the second implantation gap.

[0052] Preferably, the first injection region further comprises a field limiting ring, and the field limiting ring is arranged in a terminal region outside the main junction; the depth of the voltage dividing deep groove is greater than the junction depth of the field limiting ring.

[0053] Preferably, at least three field limiting rings are arranged at intervals on the terminal region, and a distance between two adjacent field limiting rings gradually increases in a direction from the active region to the terminal region.

[0054] Preferably, at least two of the voltage-dividing deep grooves are arranged at intervals in the terminal region outside the main junction; and the depths of the at least two voltage-dividing deep grooves gradually increase in a direction from the active region to the terminal region.

[0055] Preferably, at least two of the voltage-dividing deep grooves are arranged on the terminal region between the main junction and the field limiting ring.

[0056] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves are arranged on the terminal region between the main junction and the field limiting ring close to the main junction.

[0057] Preferably, at least two of the voltage-dividing deep grooves are arranged on a terminal region outside the field limiting ring.

[0058] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two of the voltage dividing deep grooves are arranged on the terminal region outside the outermost field limiting ring.

[0059] Preferably, at least two field limiting rings are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves are arranged on the terminal region between two adjacent field limiting rings.

[0060] Preferably, the pressure-dividing deep groove is an inverted stepped groove.

[0061] Preferably, after etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing the power device further comprises:

[0062] Etching a first shallow groove on the field limiting ring, depositing a first insulating oxide layer in the first shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a second anti-breakdown structure;

[0063] Wherein, the groove depth of the first shallow groove is smaller than the junction depth of the field limiting ring.

[0064] Preferably, after etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing the power device further comprises:

[0065] Etching the field oxide layer of the active area, etching a second shallow groove in the active area, depositing a first insulating oxide layer in the second shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a gate anti-breakdown structure;

[0066] The groove depth of the second shallow groove is consistent with the groove depth of the first shallow groove.

[0067] Preferably, after forming the gate anti-breakdown structure, the method for preparing the power device further comprises:

[0068] forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region;

[0069] The second injection region is arranged in the active region between the second shallow groove and the main junction and is connected to the main junction; the source region is arranged in the second injection region.

[0070] Preferably, the depth of the second implantation region is smaller than the depth of the second shallow groove.

[0071] Preferably, the doping concentration of the second implantation region is less than the doping concentration of the first implantation region.

[0072] Preferably, the doping concentration of the second implantation region is 1-2 orders of magnitude smaller than the doping depth of the first implantation region.

[0073] Preferably, after forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region, the method for preparing the power device further comprises:

[0074] Depositing a second insulating oxide layer on the epitaxial layer and the field oxide layer, and etching a contact hole on the second insulating oxide layer;

[0075] A front metal is deposited on the second insulating oxide layer, including an electrode metal and a cut-off ring metal. The electrode metal is connected to the source region and the main junction through the contact hole, and the cut-off ring metal is connected to the cut-off ring through the contact hole.

[0076] Preferably, after a voltage-dividing deep groove is formed by etching on the terminal region of the epitaxial layer, and a field oxide layer is formed in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing the power device further comprises:

[0077] The field oxide layer is polished.

[0078] In the above-mentioned power device and its preparation method, the power device is provided with a first anti-breakdown structure, which includes a voltage-dividing deep groove and a field oxide layer. The voltage-dividing deep groove is arranged in a terminal region outside the main junction, and the groove depth of the voltage-dividing deep groove is greater than the junction depth of the main junction, so that the highest point of the electric field is transferred from the vicinity of the main junction to the bottom of the voltage-dividing deep groove, thereby ensuring that the terminal is not easily broken down, thereby ensuring its withstand voltage performance; the field oxide layer is filled in the voltage-dividing deep groove and extends to the outside of the terminal region to cover the surface of the voltage-dividing deep groove. Since the voltage-dividing deep groove belongs to a truncated terminal, and the field oxide layer filled in the truncated terminal belongs to an insulating medium, there are almost no mobile ions in it, so that The deep voltage-dividing groove cannot form an electric field with the external body area, which can play an anti-breakdown effect and improve its voltage-resistant reliability; the field oxide layer extends to the terminal area to cover the surface of the deep voltage-dividing groove, so that the field oxide layer area on the surface of the deep voltage-dividing groove is larger, so as to evenly distribute the high electric field on the surface of the deep voltage-dividing groove on the surface outside the terminal area covering the deep voltage-dividing groove, which can avoid surface breakdown of the power device and ensure its voltage-resistant reliability; and the field oxide layer is filled in the deep voltage-dividing groove and extends to the surface of the deep voltage-dividing groove outside the terminal area to cover the surface of the deep voltage-dividing groove. The process only needs to be filled once, and there is no need to introduce additional filling process. The preparation process is simple, which saves costs while ensuring voltage-resistant reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0080] Figure 1 is a cross-sectional schematic diagram of a power device in one embodiment of the present invention;

[0081] Figure 2 is another cross-sectional schematic diagram of a power device in one embodiment of the present invention;

[0082] Figure 3 is another cross-sectional schematic diagram of a power device in one embodiment of the present invention;

[0083] Figure 4 is another cross-sectional schematic diagram of a power device in one embodiment of the present invention;

[0084] Figure 5 It is a flow chart of a method for preparing a power device in one embodiment of the present invention.

[0085] In the figure: 1. substrate; 2. epitaxial layer; 3. deep voltage divider groove; 4. field oxide layer; 5. first injection region; 5a. main junction; 5b. field limiting ring; 6. cut-off ring; 7a. second shallow groove; 7b. first shallow groove; 8. first insulating oxide layer; 9. conductive semiconductor; 10. second injection region; 11. source region; 12. second insulating oxide layer; 13. contact hole; 14. electrode metal; 15a / 15b. field plate metal 15a / 15b; 16. cut-off ring metal 16; 17. back metal 17. DETAILED DESCRIPTION

[0086] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0087] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0088] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0089] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that the spatially relative terms are intended to include different orientations of the device in use and operation in addition to the orientations shown in the figures. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0090] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0091] In order to fully understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0092] An embodiment of the present invention provides a power device, such as Figure 1-Figure 4 As shown, the power devices include:

[0093] Substrate 1;

[0094] An epitaxial layer 2 of a first conductivity type is disposed on the substrate 1, and the epitaxial layer 2 includes an active region and a terminal region disposed at the periphery of the active region;

[0095] A first injection region 5 of a second conductivity type, the first injection region 5 comprising a main junction 5a, the main junction 5a being arranged at a position close to the active region in the terminal region;

[0096] The first anti-breakdown structure includes a voltage-dividing deep groove 3 and a field oxide layer 4; the voltage-dividing deep groove 3 is arranged in the terminal area outside the main junction 5a, and the groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the main junction 5a; the field oxide layer 4 is filled in the voltage-dividing deep groove 3 and extends to the outside of the terminal area to cover the surface of the voltage-dividing deep groove 3.

[0097] The first conductivity type and the second conductivity type are two types with different conductivity types. For example, when the first conductivity type is P type, the second conductivity type is N type; conversely, when the first conductivity type is N type, the second conductivity type is P type. The first anti-breakdown structure is a structure arranged in the semiconductor body region for preventing body breakdown.

[0098] As an example, the power device includes a substrate 1 and an epitaxial layer 2 of a first conductivity type disposed on the substrate 1, wherein the epitaxial layer 2 includes an active region and a terminal region disposed outside the active region. In this example, the epitaxial layer 2 of the first conductivity type can be formed epitaxially on the substrate 1, and the epitaxial growth direction here can be, but is not limited to, <100> Crystal direction.

[0099] Generally speaking, the power device uses an ion implantation method to form a first implantation region 5 of the second conductivity type on the epitaxial layer 2, and the first implantation region 5 includes a main junction 5a, which is arranged at a position close to the active region on the terminal region, that is, the main junction 5a surrounds the active region at the periphery and is connected to the active region. The main junction 5a of the second conductivity type is arranged at a position close to the active region in the terminal region, so that an internal electric field is formed between the main junction 5a of the second conductivity type and the terminal region of the first conductivity type, and the electric field at the edge of the main junction 5a is concentrated, which is easy to break down the power device.

[0100] In order to overcome the problem that the electric field formed between the second conductive type main junction 5a and the first conductive type epitaxial layer 2 is easy to break down the power device, the power device provided in this example is provided with a first anti-breakdown structure, which includes a voltage-dividing deep groove 3 and a field oxide layer 4, and the field oxide layer 4 is filled in the voltage-dividing deep groove 3 and extends to the outside of the terminal area to cover the surface of the voltage-dividing deep groove 3. In this example, the voltage-dividing deep groove 3 is set in the terminal area between the main junction 5a and the cut-off ring 6, and the groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the main junction 5a (that is, the maximum distance from the surface to the PN junction boundary), so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down, thereby ensuring its voltage resistance performance. Since the voltage-dividing deep groove 3 is a truncated terminal, and the field oxide layer 4 filled in the truncated terminal is an insulating medium with almost no mobile ions, the voltage-dividing deep groove 3 cannot form an electric field with the external body area, thereby ensuring the anti-breakdown effect and improving its withstand voltage reliability; the field oxide layer 4 extends to the terminal area to cover the surface of the voltage-dividing deep groove 3, so that the area of ​​the field oxide layer 4 on the surface of the voltage-dividing deep groove 3 is larger, so that the high electric field on the surface of the voltage-dividing deep groove 3 is evenly distributed on the surface outside the terminal area covering the voltage-dividing deep groove 3, thereby avoiding surface breakdown of the power device and improving the withstand voltage reliability; and the field oxide layer 4 is filled in the voltage-dividing deep groove 3 and extends to the outside of the terminal area to cover the surface of the voltage-dividing deep groove 3. The process only needs to be filled once, without introducing additional filling processes, and the preparation process is simple, which saves costs while ensuring withstand voltage reliability. In addition, a part of the voltage-dividing deep groove 3 in the first anti-breakdown structure is generally connected to the source, and its potential is 0V. The deeper the voltage-dividing deep groove 3 is, the greater the voltage difference between it and the drain is, and the stronger the electric field is, which will cause the electric field to be concentrated at the bottom of the voltage-dividing deep groove 3, and then the highest point of the electric field will be transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down.

[0101] In one embodiment, if Figure 1-Figure 4 As shown, the first injection region 5 further includes a field limiting ring 5b, which is arranged in a terminal region outside the main junction 5a;

[0102] The depth of the voltage dividing deep groove 3 is greater than the junction depth of the field limiting ring 5b.

[0103] Among them, the field limiting ring 5b (FLR), also known as the field ring or floating field ring, is a common terminal structure currently used in high-voltage power devices. The characteristics of the field limiting ring structure are as follows: there is a certain distance between the field limiting ring 5b and the main junction 5a, and the doping type and junction depth are consistent with the main junction 5a. In the design of the field limiting ring structure, the ring width, ring spacing and number of rings are the objects that need to be optimized. When the voltage of the main junction 5a is small, the depletion layer has not yet reached the field limiting ring 5b, and the field limiting ring 5b cannot bear the voltage division; when the voltage of the main junction 5a is large, the main junction 5a is connected to the depletion layer of the field limiting ring 5b. At this time, the field limiting ring 5b will bear part of the voltage of the main junction 5a, relieve the electric field concentration at the edge of the main junction 5a, and thus increase the breakdown voltage of the chip. Generally, for a well-designed field limiting ring 5b, its main junction 5a and the field limiting ring 5b will reach the critical breakdown electric field strength at the same time, thereby obtaining a suitable breakdown voltage.

[0104] Generally speaking, a field limiting ring 5b of the second conductivity type is arranged in the terminal region, that is, the main junction 5a and the field limiting ring 5b together constitute the first injection region 5 of the second conductivity type, the main junction 5a is close to the active region, and the field limiting ring 5b is far away from the active region. The field limiting ring 5b is used to share the voltage of the main junction 5a to alleviate the electric field concentration at the edge of the main junction 5a, thereby improving the breakdown voltage of the power device. However, when the power device is in a reverse withstand voltage state, a large amount of charge is easily accumulated at the edge of the field limiting ring 5b, thereby making the power device easy to be broken down in the reverse withstand voltage state. In order to overcome the problem of easy breakdown in the reverse withstand voltage state, a first anti-breakdown structure is provided in the terminal region outside the main junction 5a, that is, a voltage-dividing deep groove 3 is provided in the terminal region outside the main junction 5a and filled with a field oxide layer 4, and the groove depth of the voltage-dividing deep groove 3 is made greater than the junction depth of the field limiting ring 5b, so that the voltage-dividing deep groove 3 penetrates the depletion layer of the field limiting ring 5b. When the power device is in the reverse withstand voltage state, the voltage-dividing deep groove 3 penetrating the depletion layer of the field limiting ring 5b will divide a part of the high electric field gathered at the edge of the field limiting ring 5b, so that the electric field distribution inside the epitaxial layer 2 is more uniform, thereby limiting the possibility of internal breakdown of the power device, so as to solve the problem that the existing power device with the field limiting ring 5b is easy to be broken down in the reverse withstand voltage state; because the field oxide layer 4 is filled in the voltage-dividing deep groove 3 and extends to the outside of the terminal region to cover the surface of the voltage-dividing deep groove 3, the surface high electric field can be evenly distributed on the field oxide layer 4, thereby avoiding the surface of the power device from being broken down.

[0105] In order to overcome the problem that the existing power devices are easily broken down in the reverse withstand voltage state, according to actual conditions, a first anti-breakdown structure can be provided between the main junction 5a and the field limiting ring 5b, and / or, a first anti-breakdown structure can be provided between the field limiting ring 5b and the cut-off ring 6, and / or, a first anti-breakdown structure can be provided between two adjacent field limiting rings 5b, so that the groove depth of the voltage-dividing deep groove 3 of the first anti-breakdown structure is greater than the junction depth of the main junction 5a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down, thereby ensuring its withstand voltage performance, and the groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the field limiting ring 5b, even if the voltage-dividing deep groove 3 passes through the depletion layer of the field limiting ring 5b, when the power device is in the reverse withstand voltage state, the voltage-dividing deep groove 3 that passes through the depletion layer of the field limiting ring 5b will divide a part of the high electric field gathered at the edge of the field limiting ring 5b, so that the electric field distribution inside the epitaxial layer 2 is more uniform, thereby limiting the possibility of internal breakdown of the power device.

[0106] In one embodiment, if Figure 1-Figure 4 As shown, at least three field limiting rings 5b are arranged on the terminal region at intervals, and the distance between two adjacent field limiting rings 5b gradually increases in the direction from the active region to the terminal region.

[0107] As an example, a plurality of field limiting rings 5b are arranged at intervals on the terminal region, that is, the number of field limiting rings 5b is greater than or equal to two, and the number is related to the specific withstand voltage specification. According to the standard design rules, when the number of field limiting rings 5b is at least three, the distance between two adjacent field limiting rings 5b gradually increases in the direction from the active region to the terminal region. For example, three field limiting rings 5b are arranged in sequence outside the main junction 5a, and the distance between the first field limiting ring 5b and the second field limiting ring 5b is smaller than the distance between the second field limiting ring 5b and the third field limiting ring 5b. In this example, the distance between two adjacent field limiting rings 5b gradually increases in the direction from the active region to the terminal region, so that the main junction 5 and at least three field limiting rings 5b will reach the critical breakdown electric field strength at the same time, thereby obtaining a suitable breakdown voltage.

[0108] In one embodiment, at least two first anti-breakdown structures are provided on the terminal region between the main junction 5a and the field limiting ring 5b.

[0109] As an example, at least two first anti-breakdown structures are provided on the terminal area between the main junction 5a and the field limiting ring 5b. The number of the first anti-breakdown structures can be determined according to actual needs, the distance between the field limiting ring 5b and the main junction 5a, and the process level. At least two first anti-breakdown structures are provided between the main junction 5a and the field limiting ring 5b, which can disperse the high electric field gathered between the main junction 5a and the field limiting ring 5b, making the power device less likely to break down, thereby greatly improving the stability of the power device.

[0110] In one embodiment, at least two field limiting rings 5b are arranged at intervals on the termination region, and at least two first anti-breakdown structures are arranged on the termination region between the main junction 5a and the field limiting ring 5b close to the main junction 5a.

[0111] As an example, at least two field limiting rings 5b are spaced apart on the terminal region outside the main junction 5a. When the at least two field limiting rings 5b are arranged from the inside to the outside, at least two first anti-breakdown structures can be arranged between the main junction 5a and the field limiting ring 5b close to the main junction 5a, so that the at least two first anti-breakdown structures can effectively disperse the high electric field gathered between the main junction 5a and the field limiting ring 5b close to the main junction 5a (that is, the field limiting ring 5b arranged on the innermost side), making the power device less likely to break down, thereby greatly improving the stability of the power device.

[0112] In one embodiment, at least two first anti-breakdown structures are provided on the terminal region outside the field limiting ring 5 b.

[0113] As an example, at least two first anti-breakdown structures are provided on the terminal area outside the field limiting ring 5b, and the number of the first anti-breakdown structures can be determined according to actual needs, the spacing between the field limiting ring 5b and the cut-off ring 6, and the process level. In this example, at least two first anti-breakdown structures are provided on the terminal area outside the field limiting ring 5b, and specifically, at least two first anti-breakdown structures are provided on the terminal area between the field limiting ring 6b and the cut-off ring 6, which can disperse the high electric field gathered on the terminal area outside the field limiting ring 6b, making the power device less likely to break down, and greatly improving the stability of the power device.

[0114] In one embodiment, at least two field limiting rings 5 ​​b are arranged at intervals on the terminal region, and at least two first anti-breakdown structures are arranged on the terminal region outside the outermost field limiting ring 5 b.

[0115] As an example, when at least two field limiting rings 5b are arranged at intervals on the terminal region outside the main junction 5a, the at least two field limiting rings 5b are arranged from the inside to the outside, and the number of the first anti-breakdown structures can be determined according to actual needs, the spacing between the field limiting ring 5b and the main junction 5a, and the process level. In this example, at least two first anti-breakdown structures are arranged on the terminal region outside the outermost field limiting ring 5b, which can disperse the high electric field gathered on the terminal region outside the outermost field limiting ring 5b, making the power device less likely to break down, and greatly improving the stability of the power device.

[0116] In one embodiment, at least two field limiting rings 5 ​​b are arranged at intervals on the terminal region, and at least two first anti-breakdown structures are arranged on the terminal region between two adjacent field limiting rings 5 ​​b.

[0117] As an example, Figure 2As shown, when at least two field limiting rings 5b are arranged at intervals on the terminal region outside the main junction 5a, the at least two field limiting rings 5b are arranged from the inside to the outside, and at least two first anti-breakdown structures are arranged on the terminal region between two adjacent field limiting rings 5b. The number of the first anti-breakdown structures can be determined according to actual needs, the size of the field limiting rings 5b and the process level. In this example, at least two first anti-breakdown structures are arranged between two adjacent field limiting rings 5b, which can disperse the high electric field gathered between the two adjacent field limiting rings 5b, making the power device less likely to break down, and greatly improving the stability of the power device.

[0118] In one embodiment, if Figure 4 As shown, at least two deep voltage-dividing grooves 3 are arranged at intervals in the terminal region outside the main junction 5a; the depths of the at least two deep voltage-dividing grooves 3 gradually increase in the direction from the active region to the terminal region.

[0119] As an example, the power device includes a plurality of first anti-breakdown structures arranged on the terminal region, that is, the number of the first anti-breakdown structures is two or more, and the plurality of first anti-breakdown structures include at least two voltage-dividing deep grooves 3, and the plurality of voltage-dividing deep grooves 3 are arranged at intervals in the terminal region outside the main junction 5a; the groove depth of the plurality of voltage-dividing deep grooves 3 gradually increases along the direction from the active region to the terminal region, and the specific depth of each voltage-dividing deep groove 3 can be determined according to actual needs and process level, and can be determined through simulation experiments. In this example, the groove depth of at least two voltage-dividing deep grooves 3 is set to gradually increase along the direction from the active region to the terminal region, which is conducive to the outward expansion of the depletion layer, can reduce the pressure of the cut-off ring 6 in the cut-off protection zone, avoid the side leakage of the power device, and thus improve the stability of the power device.

[0120] In one embodiment, the pressure-dividing deep groove is an inverted stepped groove.

[0121] As an example, the voltage-dividing deep groove is designed as an inverted stepped groove with a certain angle, so that the field oxide layer 4 can be easily filled during the preparation of the power device, which helps to improve the filling efficiency.

[0122] In one embodiment, the terminal region includes a voltage division protection region disposed at the periphery of the active region and a cut-off protection region disposed at the periphery of the voltage division protection region;

[0123] A cut-off ring 6 of the first conductive type is arranged in the cut-off protection zone;

[0124] The main junction 5a is arranged in a voltage division protection zone close to the active region;

[0125] The voltage-dividing deep groove is arranged in the voltage-dividing protection zone between the main junction and the cut-off ring.

[0126] As an example, the terminal region includes a voltage-dividing protection zone arranged at the periphery of the active region and a cut-off protection zone arranged at the periphery of the voltage-dividing protection zone, that is, the epitaxial layer 2 includes an active region, a voltage-dividing protection zone and a cut-off protection zone arranged from the inside to the outside. A cut-off ring 6 of the first conductivity type is arranged in the cut-off protection zone, and the cut-off ring 6 is arranged at the outermost periphery of the terminal region. The main function is to make the chip edge and the body region have the same potential, and prevent edge leakage and edge breakdown caused by further expansion of the depletion layer during breakdown.

[0127] As an example, the main junction 5a is arranged in the voltage dividing protection zone near the active area; the voltage dividing deep groove 3 is arranged in the voltage dividing protection zone between the main junction 5a and the cut-off ring 6, and the groove depth of the voltage dividing deep groove 3 is greater than the junction depth of the main junction 3a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage dividing deep groove 6, thereby ensuring that the terminal is not easily broken down, thereby ensuring its voltage resistance performance; the field oxide layer 4 is filled in the voltage dividing deep groove 3 and extends to the outside of the voltage dividing protection zone to cover the surface of the voltage dividing deep groove 3. The cooperation between the voltage dividing deep groove 3 and the field oxide layer 4 makes it impossible for the voltage dividing deep groove 3 to form an electric field with the external body area, which can ensure the anti-breakdown effect, avoid surface breakdown of the power device, and improve the voltage resistance reliability.

[0128] In one embodiment, if Figure 1-Figure 4 As shown, the power device further includes a second anti-breakdown structure;

[0129] The second anti-breakdown structure includes a first shallow groove 7b, a first insulating oxide layer 8 filled in the first shallow groove 7b, and a conductive semiconductor 9 filled in the first insulating oxide layer 8;

[0130] The first shallow groove 7b is disposed in the field limiting ring 5b, and the groove depth of the first shallow groove 7b is smaller than the junction depth of the field limiting ring 5b.

[0131] Among them, the second anti-breakdown structure is a structure arranged on the surface of the semiconductor material to prevent surface breakdown, specifically a structure arranged in the terminal area to prevent surface breakdown. The first shallow groove 7b refers to a shallow groove in the second anti-breakdown structure for preventing surface breakdown. The groove depth of the first shallow groove 7b is consistent with the groove depth of the active area, about 3-6μm. Generally speaking, if the first shallow groove 7b is too deep, it will affect the withstand voltage level of the power device, and at the same time increase the channel length and affect the switching characteristics of the device; if the first shallow groove 7b is too shallow, it will make it difficult to achieve in terms of process. The first insulating oxide layer 8 is an insulating oxide layer formed by an insulating material. The conductive semiconductor 9 can be, but is not limited to, conductive polysilicon.

[0132] As an example, the second anti-breakdown structure includes a first shallow groove 7b, a first insulating oxide layer 8 filled in the first shallow groove 7b, and a conductive semiconductor 9 filled in the first insulating oxide layer 8, that is, the first shallow groove 7b is filled with the first insulating oxide layer 8 and the conductive semiconductor 9 from bottom to top; the width and depth of the first shallow groove 7b are both smaller than the width and depth of the field limiting ring 5b, the first shallow groove 7b can be set in the field limiting ring 5b, and the groove depth of the first shallow groove 7b is smaller than the junction depth of the field limiting ring 5b, so that the first shallow groove 7b can cooperate with the field limiting ring 5b to bear the voltage drop between the two conductive electrodes of the power device when the power device is reverse biased, so that the electric field is relatively evenly distributed on the first insulating oxide layer 8 in the first shallow groove 7b, avoiding excessive concentration of the electric field and improving the withstand voltage reliability of the power device; the conductive semiconductor 9 is used to neutralize the charges accumulated on the surface of the power device to prevent surface breakdown. For example, when the power device is an IGBT, if the IGBT is reverse biased, the first shallow groove 7b and the field limiting ring 5b jointly bear the voltage drop between the two conductive electrodes, the collector and the emitter, so that the electric field is relatively evenly distributed in the first insulating oxide layer 8 in the first shallow groove 7b, avoiding excessive concentration of the electric field and increasing the voltage resistance reliability of the device.

[0133] In the prior art, a large amount of interface charges will accumulate on the epitaxial layer 2 of the first conductivity type between each field limiting ring 5b, and these interface charges will attract the electric field to gather on the surface of the semiconductor material, causing surface breakdown; a voltage-dividing deep groove 3 is provided in the voltage-dividing protection area between the main junction 5a and the field limiting ring 5b, between the field limiting ring 5b and the cut-off ring 6, or between two adjacent field limiting rings 5b, so that the electric field is evenly distributed on the field oxide layer 4 filled in the voltage-dividing deep groove 3, and the surface breakdown phenomenon of the power device is avoided to a certain extent. In this example, by providing a first shallow groove 7b in the field limiting ring 5b, when the power device is in a reverse withstand voltage state, the first shallow groove 7b and the field limiting ring 5b simultaneously bear the voltage drop between the two conductive electrodes of the collector and the emitter, so that the electric field is relatively evenly distributed on the first insulating oxide layer 8 in the first shallow groove 7b, further avoiding excessive concentration of the electric field, greatly enhancing the withstand voltage reliability of the power device, and using the conductive semiconductor 9 to neutralize the charges accumulated on the surface of the power device to prevent surface breakdown. Since the reverse withstand voltage of the power device is jointly borne by the field limiting ring 5b, the voltage dividing deep groove 3 and the first shallow groove 7b, its withstand voltage capability and reliability are greatly improved; at the same time, the size and process tolerance between the first injection region 5 where the field limiting ring 5b is located are improved, which brings a larger window for design and manufacturing.

[0134] Therefore, a first shallow groove 7b is provided in the first injection region 5 where the field limiting ring 5b is located, and a deep voltage dividing groove 3 is provided between the main junction 5a and the field limiting ring 5b, between the field limiting ring 5b and the cut-off ring 6, or between two adjacent field limiting rings 5b. The deep voltage dividing groove 3 and the first shallow groove 7b are used in combination to ensure the withstand voltage reliability of the power device while effectively reducing the size of the chip terminal area, thereby saving chip area and reducing the manufacturing cost of the chip.

[0135] In one embodiment, if Figure 3 As shown, at least two second anti-breakdown structures are arranged in the field limiting ring 5b.

[0136] As an example, at least two second anti-breakdown structures may be provided in each field limiting ring 5b, that is, a first shallow groove 7b is provided in the field limiting ring 5b, and the number of the first shallow grooves 7b may be determined according to actual needs, the size of the field limiting ring 5b and the process level. The advantage of this structure is that when the power device is reverse biased, there will be more first shallow grooves 7b to bear the voltage drop between the collector and the emitter, thereby improving the voltage resistance of the power device.

[0137] In one embodiment, if Figure 1-Figure 4 As shown, the power device also includes a gate anti-breakdown structure;

[0138] The gate anti-breakdown structure comprises a second shallow groove 7a, a first insulating oxide layer 8 filled in the second shallow groove 7a, and a conductive semiconductor 9 filled in the first insulating oxide layer 8;

[0139] The second shallow groove 7a is disposed in the active area, and the groove depth of the second shallow groove 7a is consistent with the groove depth of the first shallow groove 7b.

[0140] Among them, the gate anti-breakdown structure is arranged in the active area, which can not only play the role of the gate, but also play the role of a structure to prevent surface breakdown. The second shallow groove 7a is a shallow groove that mainly plays a gate control role and a pressure-bearing role in the gate anti-breakdown structure. In this example, the groove depth of the second shallow groove 7a is generally consistent with the groove depth of the first shallow groove 7b, about 3-6μm. If the second shallow groove 7a is too deep, it will affect the withstand voltage level of the power device, and at the same time increase the channel length and affect the switching characteristics of the device; if the second shallow groove 7a is too shallow, it will make the process difficult to achieve. The first insulating oxide layer 8 is an insulating oxide layer formed by an insulating material. When the first insulating oxide layer 8 is filled in the second shallow groove 7a on the active area, the first insulating oxide layer 8 is a gate oxide layer. The conductive semiconductor 9 can be but is not limited to conductive polysilicon.

[0141] During the preparation of power devices, silicon dioxide may be filled on the active area to form a field oxide layer 4, and the field oxide layer 4 is used as a mask for subsequent processes. This process will cause interface charges to accumulate on the surface of the active area. These interface charges will attract the electric field to accumulate on the surface of the semiconductor material, causing surface breakdown. In order to overcome this problem, a gate anti-breakdown structure may be set in the active area, and the gate anti-breakdown structure includes a second shallow groove 7a, a first insulating oxide layer 8 filled in the second shallow groove 7a, and a conductive semiconductor 9 filled in the first insulating oxide layer 8; the second shallow groove 7a is set in the active area, and the groove depth of the second shallow groove 7a is consistent with the groove depth of the first shallow groove 7b, so that the electric field attracted by the interface charges can be relatively evenly distributed in the first insulating oxide layer 8 in the second shallow groove 7a, thereby avoiding excessive concentration of the electric field and increasing the voltage resistance reliability of the device; and the conductive semiconductor 9 is used to neutralize the charges accumulated on the surface of the power device to prevent surface breakdown.

[0142] In one embodiment, the thickness of the first insulating oxide layer 8 is smaller than the thickness of the field oxide layer 4 , and the density of the first insulating oxide layer 8 is greater than the density of the field oxide layer 4 .

[0143] As an example, the thickness of the first insulating oxide layer 8 arranged in the second shallow groove 7a or the first shallow groove 7b is smaller than the thickness of the field oxide layer 4 in the voltage divider deep groove 3, which can meet the smaller design size requirements of the power device, and the thickness of the first insulating oxide layer 8 is smaller than the field oxide layer 4, which can ensure its oxidation quality when the thickness of the first insulating oxide layer 8 is small.

[0144] In one embodiment, the power device further includes:

[0145] A second implantation region 10 of a second conductivity type is disposed in the active region between the second shallow recess 7a and the main junction 5a and is connected to the main junction 5a;

[0146] The source region 11 of the first conductivity type is disposed in the second implantation region 10 .

[0147] As an example, the second conductive type second injection region 10 is arranged in the active region between the second shallow groove 7a and the main junction 5a, and is connected to the second conductive type main junction 5a, so that the electric field distribution at the edge of the active region of the power device is more uniform, which helps to improve the breakdown voltage of the power device. The first conductive type source region 11 is arranged in the second injection region 10, so that the first conductive type epitaxial layer 2, the second conductive type second injection region 10 and the first conductive type source region 11 cooperate to form an NPN structure or a PNP structure.

[0148] As shown in Table 1, when the power device is an electronic conductive channel type, the first conductivity type corresponding to the epitaxial layer 2, the cutoff protection area and the source area 11 is N-type, the second conductivity type corresponding to the first injection area 5 and the second injection area 10 is P-type, and the epitaxial layer 2, the second injection area 10 and the source area 11 cooperate to form an NPN structure; when the power device in the active area is an IGBT structure, the conductivity type of its substrate 1 is P-type, and when the power device in the active area is a VDMOS structure, the conductivity type of its substrate 1 is N-type.

[0149] As shown in Table 2, when the power device is a hole conduction channel type, the first conductivity type corresponding to the epitaxial layer 2, the cutoff protection area and the source area 11 is P type, the second conductivity type corresponding to the first injection area 5 and the second injection area 10 is N type, and the epitaxial layer 2, the second injection area 10 and the source area 11 cooperate to form a PNP structure; when the power device in the active area is an IGBT structure, the conductivity type of its substrate 1 is N type, and when the power device in the active area is a VDMOS structure, the conductivity type of its substrate 1 is P type.

[0150]

[0151]

[0152] In one embodiment, the depth of the second implantation region 10 is smaller than the depth of the second shallow recess 7 a .

[0153] As an example, since the epitaxial layer 2 of the first conductivity type, the second injection region 10 of the second conductivity type and the source region 11 of the first conductivity type cooperate to form an NPN structure or a PNP structure, the depth of the second injection region 10 is less than the groove depth of the second shallow groove 7a, so that the second injection region 10 can form a conductive channel when it is inverted; if the depth of the second injection region 10 is not less than the groove depth of the second shallow groove 7a, it will cause the part of the second injection region 10 that exceeds the second shallow groove 7a to be difficult to invert or even unable to invert, so that the power device cannot be turned on. For example, when the epitaxial layer 2 of the first conductivity type, the second injection region 10 of the second conductivity type and the source region 11 of the first conductivity type jointly form a PNP structure, when the gate is forward biased, the holes in the second injection region 10 are inverted to form an electronic conductive channel, and at this time, the power device is turned on; if the depth of the second injection region 10 is not less than the groove depth of the second shallow groove 7a, it will cause the part of the second injection region 10 that exceeds the second shallow groove 7a to be difficult to invert or even unable to invert, so that the power device cannot be turned on.

[0154] In one embodiment, the doping concentration of the second implantation region 10 is less than the doping concentration of the first implantation region 5 .

[0155] As an example, the doping depth of the second injection region 10 cannot be too high. If the doping depth is too high, the conductive channel will be too long, affecting the switching characteristics of the power device. The first injection region 5 is located in the terminal region and has high requirements for withstand voltage. The higher the doping concentration, the greater the difference in PN junction concentration formed between the first injection region 5 of the second conductivity type and the epitaxial layer 2 of the first conductivity type. The electric field mainly falls on the epitaxial layer 2 of the first conductivity type, and the first conductivity type epitaxial layer 2 is more fully utilized, which will make its withstand voltage higher. Therefore, the doping concentration of the second injection region 10 needs to be designed to be lower than the doping concentration of the first injection region 5, and the specific concentrations of the two are set independently according to actual conditions.

[0156] In one embodiment, the doping concentration of the second implantation region 10 is 1-2 orders of magnitude less than the doping depth of the first implantation region 5 .

[0157] As an example, the doping concentration of the second injection region 10 is 1-2 orders of magnitude less than the doping depth of the first injection region 5. For example, the concentration range of the second injection region is 1e 13 ~5e 13 / cm 2 , then the concentration range of the first injection region is 1e 14 ~5e 15 / cm 2 , so that the concentration difference of the PN junction formed between the first injection region 5 of the second conductivity type and the epitaxial layer 2 of the first conductivity type is relatively large, so that the electric field mainly falls on the epitaxial layer 2 of the first conductivity type, and the voltage resistance of the power device can be guaranteed for the epitaxial layer 2 of the first conductivity type. In this example, the specific doping concentration of the second injection region 10 is determined according to the actual threshold voltage requirements. It is only necessary to ensure that the doping concentration of the first injection region 5 is 1-2 orders of magnitude higher than the doping concentration of the second injection region 10, which is conducive to improving its voltage resistance.

[0158] In one embodiment, the power device further includes:

[0159] A second insulating oxide layer 12 is disposed on the epitaxial layer 2 and the field oxide layer 4, and a contact hole 13 is disposed on the second insulating oxide layer 12;

[0160] The front metal is arranged on the second insulating oxide layer 12, including electrode metal and cut-off ring metal. The electrode metal is connected to the source region 11 and the main junction 5a through the contact hole, and the cut-off ring metal is connected to the insulating ring 6 through the contact hole.

[0161] As an example, a second insulating oxide layer 12 is deposited on the surface of the epitaxial layer 2 of the power device, and the second insulating oxide layer 12 here can be but not limited to silicon glass (USG) or borophosphosilicate glass (BPSG) or phosphosilicate glass (PSG). A plurality of contact holes are provided on the second insulating oxide layer 12.

[0162] The front metal refers to the metal disposed on the front of the epitaxial layer 2, and includes but is not limited to the electrode metal and the cut-off ring metal 16. The electrode metal here is the metal used as the electrode of the power device. For example, when the power device is an IGBT, the electrode metal here can be the emitter metal. The cut-off ring metal 16 is the metal used to connect the cut-off ring 6.

[0163] As an example, the second insulating oxide layer 12 is arranged on the epitaxial layer 2 and the field oxide layer 4 covering the surface of the epitaxial layer 2, and is provided with contact holes 13 such as source region contact holes, main junction contact holes and cut-off ring contact holes. The source region 11 is connected to the electrode metal (such as emitter metal) through the source region contact hole, the main junction 5a is connected to the electrode metal (such as emitter metal) through the main junction contact hole, and the cut-off ring 6 is connected to the cut-off ring metal 16 through the cut-off ring contact hole to ensure the basic functions of the power device.

[0164] In one embodiment, if Figure 1-Figure 4 As shown, the first injection region 5 also includes a field limiting ring 5b, which is arranged in the voltage dividing protection area between the main junction 5a and the cut-off ring 6; the front metal also includes a field plate metal, and the field plate metal 15a / 15b is connected to the field limiting ring through a contact hole.

[0165] The field plate metal 15 a / 15 b is a metal used to connect the field limiting ring 5 b .

[0166] As an example, the second insulating oxide layer 12 is arranged on the epitaxial layer 2 and on the field oxide layer 4 covering the surface of the epitaxial layer 2, and is provided with contact holes 13 such as source region contact holes, main junction contact holes, field plate contact holes and cut-off ring contact holes. The source region 11 is connected to the electrode metal (such as emitter metal) through the source region contact hole, the main junction 5a is connected to the electrode metal (such as emitter metal) through the main junction contact hole, the field limiting ring 5b is connected to the field plate metal 15a / 15b through the field plate contact hole, and the cut-off ring 6 is connected to the cut-off ring metal 16 through the cut-off ring contact hole to ensure the basic functions of the power device.

[0167] In the prior art, the field limiting ring structure is very sensitive to the charge density at the interface of the silicon-oxide layer. When the interface charge density is too large, the electric field distribution at the interface is uneven, and a large electric field is easily accumulated, resulting in surface breakdown of the power device in the terminal area. In order to alleviate this breakdown effect, the field limiting ring structure has rarely been used alone, and the field ring field plate terminal with a field plate structure attached to the field limiting ring structure has become the mainstream. The field plate structure includes a second insulating oxide layer 12 and a field plate metal 15a / 15b. The existing field ring field plate terminal includes field limiting rings 5b arranged adjacent to each other at a specified distance, and a field plate structure composed of metal 15 deposited on the second insulating oxide layer 12 is arranged above each field limiting ring 5b. When the power device is working under withstand voltage, the field limiting ring 5b will be depleted in sequence along the direction from the device active area to the device terminal protection area, and the depletion layer formed will also be connected in sequence. Similar to the field limiting ring structure, the higher the withstand voltage required for the field ring field plate terminal, the more field limiting rings 5b and field plates there are. If the field ring and field plate terminals are used as the withstand voltage protection structure, the withstand voltage reliability is more susceptible to the fluctuation of design size and manufacturing process. In addition, in order to ensure the withstand voltage of the power device, the size of this type of terminal will be very large, which will increase the area of ​​the entire power device. In mass production, large-area tube cores are not conducive to cost savings, and the profit of a single wafer will also decrease.

[0168] In this example, a field plate contact hole is formed on the second insulating oxide layer 12, which is arranged on the epitaxial layer 2 and on the field oxide layer 4 covering the surface of the epitaxial layer 2. The field plate metal 15a / 15b is connected to the field limiting ring 5b through the field plate contact hole. Since the field oxide layer 4 on the surface of the voltage dividing protection zone is connected to the field oxide layer 4 arranged in the voltage dividing deep groove 3, during the manufacturing process, a voltage dividing deep groove 3 can be opened on the surface of the epitaxial layer 2, and the field oxide layer 4 can be filled in and on the surface of the voltage dividing deep groove 3 to complete the filling process, and the process is simple; since the voltage dividing deep groove 3 is a truncated type The terminal, and the field oxide layer 4 filled in the truncated terminal is an insulating medium, in which there are almost no mobile ions, so that the voltage-dividing deep groove 3 cannot form an electric field with the external body area, and the groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the main junction 5a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down. In this way, without increasing the chip area, the field ring and field plate terminals can be used to ensure its voltage resistance performance, and the first anti-breakdown structure arranged between the main junction 5a and the cut-off ring 6 can be used to ensure its voltage resistance performance.

[0169] In one embodiment, the active region is a trench IGBT structure or a trench VDMOS structure.

[0170] In the design of power devices, IGBT (insulated gate bipolar transistor) and VDMOS (vertical double diffused metal oxide semiconductor field effect transistor) are the mainstream power device structures. The use of trench IGBT structure or trench VDMOS structure can avoid introducing additional trench etching process and increasing costs.

[0171] In one embodiment, a method for preparing a power device is provided, comprising:

[0172] S501: epitaxially forming an epitaxial layer of a first conductivity type on a substrate, wherein the epitaxial layer includes an active region and a terminal region disposed outside the active region;

[0173] S502: etching a voltage-dividing deep groove on the terminal region of the epitaxial layer, and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer;

[0174] S503: etching an injection gap on the field oxide layer in the terminal region, and forming a first injection region of the second conductivity type in the terminal region through the injection gap, wherein the first injection region includes a main junction, and the main junction is arranged at a position in the terminal region close to the active region, and a voltage divider deep groove is arranged in the terminal region outside the main junction, and a groove depth of the voltage divider deep groove is greater than a junction depth of the main junction.

[0175] As an example, in step S501, a substrate 1 is provided, and the substrate 1 may be a substrate of a first conductivity type or a substrate of a second conductivity type; then, an epitaxial layer 2 of a first conductivity type is formed on the substrate by epitaxy, and the epitaxial growth direction here may be, but is not limited to, <100> Crystal orientation. In this example, when the power device in the active area is an IGBT, the conductivity type of the substrate 1 and the epitaxial layer 2 are different, that is, the substrate 1 is of the second conductivity type; when the power device in the active area is a VDMOS, the conductivity type of the substrate 1 and the epitaxial layer 2 are different, that is, the substrate 1 is of the first conductivity type. In this example, the epitaxial layer 2 includes an active area and a terminal area arranged outside the active area, and the terminal area includes a voltage-dividing protection area arranged outside the active area and a cut-off protection area arranged outside the voltage-dividing protection area, that is, the epitaxial layer 2 includes an active area, a voltage-dividing protection area, and a cut-off protection area arranged from the inside to the outside.

[0176] As an example, in step S502, a pressure-dividing deep groove 3 is first etched on the terminal area of ​​the epitaxial layer 2, specifically, a pressure-dividing deep groove 3 is etched on the pressure-dividing protection area close to the active area, and the pressure-dividing deep groove 3 is formed specifically by dry etching, and the mask required for etching the pressure-dividing deep groove 3 is an oxide layer (the oxide layer as a mask will be removed after etching), and then the upper surface of the pressure-dividing deep groove 3 to be etched is exposed by exposure and development, and the groove pattern is etched to form a pressure-dividing deep groove 3, and the groove depth of the pressure-dividing deep groove 3 is greater than the junction depth of the main junction 5a to be injected. Next, a field oxide layer is formed in the pressure-dividing deep groove 3 and on the surface of the epitaxial layer 2, specifically, a dry oxygen + wet oxygen + dry oxygen growth method is adopted, silicon dioxide is filled in the pressure-dividing deep groove 3 and extended to the surface of the epitaxial layer 2 to form a field oxide layer, and a dry oxygen + wet oxygen + dry oxygen growth method is adopted to quickly form a field oxide layer 4 of qualified quality.

[0177] As an example, in step S503, the field oxide layer 4 of the terminal region is etched to form an injection gap, which can be understood as using the field oxide layer 4 as a mask so that ion implantation can be performed through the injection gap later. Then, a first injection region of the second conductivity type is formed in the voltage-dividing protection zone through the injection gap. In this example, the field oxide layer 4 is used as an injection mask, and the injection gap for ion implantation is determined by exposure and development, and then the field oxide layer 4 is etched to expose the epitaxial layer 2 corresponding to the injection gap; then, the field oxide layer 4 is used as a mask, and ion implantation technology is used to form a first injection region 5 of the second conductivity type in the voltage-dividing protection zone. In this example, the injected first injection region of the second conductivity type includes a main junction 5a, which is arranged at a position close to the active region in the terminal region, and a voltage-dividing deep groove 3 is arranged in the terminal region outside the main junction 5a. The groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the main junction 5a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down, thereby ensuring its withstand voltage performance.

[0178] In the present embodiment, a deep pressure-dividing groove is etched on the terminal region of the epitaxial layer 2, and a field oxide layer is formed inside the deep pressure-dividing groove and on the surface of the epitaxial layer. The process requires only one filling process, and no additional filling process is required. The preparation process is simple, and costs are saved while ensuring voltage-resistant reliability. Moreover, in the subsequent first injection region, the field oxide layer can be used as an injection mask, which can reduce the number of masks required in the preparation process and save corresponding processes, thereby helping to improve efficiency and save costs. It is further defined that the voltage-dividing deep groove is set in the terminal area outside the main junction, and the groove depth of the voltage-dividing deep groove is greater than the junction depth of the main junction, so that the highest point of the electric field is transferred from the vicinity of the main junction to the bottom of the voltage-dividing deep groove, thereby ensuring that the terminal is not easily broken down, thereby ensuring its voltage-withstanding performance; the field oxide layer is filled in the voltage-dividing deep groove and extends to the outside of the voltage-dividing protection zone to cover the surface of the voltage-dividing deep groove. Since the voltage-dividing deep groove belongs to a truncated terminal, and the field oxide layer filled in the truncated terminal is an insulating medium, there are almost no mobile ions in it, so that the voltage-dividing deep groove cannot form an electric field with the external body area, which can play an anti-breakdown effect and improve its voltage-withstanding reliability; the field oxide layer extends to the voltage-dividing protection zone to cover the surface of the voltage-dividing deep groove, so that the field oxide layer area on the surface of the voltage-dividing deep groove is larger, so as to evenly distribute the high electric field on the surface of the voltage-dividing deep groove on the surface of the voltage-dividing deep groove outside the voltage-dividing protection zone covering the voltage-dividing deep groove, which can avoid surface breakdown of the power device and ensure its voltage-withstanding reliability.

[0179] In one embodiment, the terminal region includes a voltage division protection region disposed at the periphery of the active region and a cut-off protection region disposed at the periphery of the voltage division protection region;

[0180] Etching an implantation gap on the field oxide layer of the terminal region, and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, comprising:

[0181] A first implantation gap is etched on the field oxide layer of the voltage division protection zone, and a first implantation zone of the second conductivity type is formed in the voltage division protection zone through the first implantation gap.

[0182] As an example, the termination region includes a voltage division protection region disposed at the periphery of the active region and a cut-off protection region disposed at the periphery of the voltage division protection region.

[0183] As an example, in step S503, the field oxide layer 4 of the voltage-dividing protection zone is first etched to form a first injection gap; then, a first injection zone 5 of the second conductivity type is formed in the voltage-dividing protection zone through the first injection gap. In this example, the field oxide layer 4 is used as an injection mask, and the first injection gap for ion injection is determined by exposure and development, and then the field oxide layer 4 is etched to expose the epitaxial layer 2 corresponding to the first injection gap; then, the field oxide layer 4 is used as a mask, and the ion injection technology is used to form a first injection zone 5 of the second conductivity type in the voltage-dividing protection zone. In this example, the first injection zone of the second conductivity type injected includes a main junction 5a, which is arranged at a position close to the active area in the terminal area, and the voltage-dividing deep groove 3 is arranged in the terminal area outside the main junction 5a. The groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the main junction 5a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down, thereby ensuring its withstand voltage performance.

[0184] In one embodiment, after step S502, that is, after etching a voltage-dividing deep groove on the terminal region of the epitaxial layer and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing a power device further includes:

[0185] A second implantation gap is etched on the field oxide layer of the cut-off protection area, and a cut-off ring of the first conductivity type is formed in the cut-off protection area through the second implantation gap.

[0186] As an example, the preparation method of the power device also includes: after forming a field oxide layer in the voltage divider deep groove and on the surface of the epitaxial layer, first etching the field oxide layer 4 of the cut-off protection area to form a second injection gap, and then forming a cut-off ring 6 of the first conductivity type in the cut-off protection area through the second injection gap. In this example, the field oxide layer 4 is used as an injection mask, and the second injection gap that needs to be ion-implanted is determined by exposure and development, and then the field oxide layer 4 is etched to expose the epitaxial layer 2 corresponding to the second injection gap; then, the field oxide layer 4 is used as a mask, and ion implantation technology is used to form a cut-off ring 6 of the first conductivity type in the cut-off protection area. The cut-off ring 6 is set at the outermost periphery of the terminal area, and its main function is to make the chip edge and the body area have the same potential, so as to prevent edge leakage and edge breakdown caused by further expansion of the depletion layer during breakdown.

[0187] In one embodiment, the first injection region 5 further includes a field limiting ring 5, which is arranged in a terminal region outside the main junction 5a; the depth of the voltage dividing groove is greater than the junction depth of the field limiting ring.

[0188] As an example, in step S503, the field oxide layer 4 of the terminal region is first etched to form an injection gap, which can be understood as using the field oxide layer 4 as a mask so that ion implantation can be performed later through the injection gap. Then, a first injection region of the second conductivity type is formed in the voltage dividing protection zone through the injection gap, which includes not only the main junction 5a but also the field limiting ring 5b. The field limiting ring 5b is arranged in the terminal region outside the main junction 5a, and the groove depth of the voltage dividing deep groove 3 is greater than the junction depth of the field limiting ring 5b. Specifically, according to actual conditions, a first anti-breakdown structure may be provided between the main junction 5a and the field limiting ring 5b, and / or a first anti-breakdown structure may be provided between the field limiting ring 5b and the cut-off ring 6, and / or a first anti-breakdown structure may be provided between two adjacent field limiting rings 5b, so that the groove depth of the voltage-dividing deep groove 3 of the first anti-breakdown structure is greater than the junction depth of the main junction 5a, so that the highest point of the electric field is transferred from the vicinity of the main junction 5a to the bottom of the voltage-dividing deep groove 3, thereby ensuring that the terminal is not easily broken down, thereby ensuring its withstand voltage performance, and the groove depth of the voltage-dividing deep groove 3 is greater than the junction depth of the field limiting ring 5b, even if the voltage-dividing deep groove 3 passes through the depletion layer of the field limiting ring 5b, when the power device is in a reverse withstand voltage state, the voltage-dividing deep groove 3 that passes through the depletion layer of the field limiting ring 5b will divide a part of the high electric field gathered at the edge of the field limiting ring 5b, so that the electric field distribution inside the epitaxial layer 2 is more uniform, thereby limiting the possibility of internal breakdown of the power device.

[0189] In one embodiment, at least three field limiting rings 5 ​​b are spaced apart on the terminal region, and the distance between two adjacent field limiting rings 5 ​​b gradually increases in a direction from the active region to the terminal region.

[0190] As an example, at least three field limiting rings 5b are spaced apart on the terminal region, that is, the number of field limiting rings 5b is greater than or equal to three, and the number is related to the specific withstand voltage specification. According to standard design rules, the spacing between adjacent field limiting rings 5b needs to be gradually increased in the direction from the active region to the terminal region, so that the main junction 5 and at least three field limiting rings 5b can reach the critical breakdown electric field strength at the same time, thereby obtaining a suitable breakdown voltage.

[0191] In one embodiment, at least two voltage-dividing deep grooves are arranged at intervals in the terminal region outside the main junction; and the depths of the at least two voltage-dividing deep grooves gradually increase in a direction from the active region to the terminal region.

[0192] As an example, the depth of at least two voltage-dividing deep grooves 3 gradually increases along the direction from the active area to the terminal area, and the specific depth of each voltage-dividing deep groove 3 can be determined according to actual needs and process level, and can be determined through simulation experiments. In this example, the depth of at least two voltage-dividing deep grooves 3 is set to gradually increase along the direction from the active area to the terminal area, which is conducive to the outward expansion of the depletion layer, can reduce the pressure of the cut-off ring 6 in the cut-off protection area, avoid side leakage of the power device, and thus improve the stability of the power device.

[0193] In one embodiment, at least two voltage dividing deep grooves 4 are arranged on the terminal region between the main junction 5a and the field limiting ring 5b.

[0194] As an example, at least two voltage-dividing deep grooves 4 are arranged on the terminal area between the main junction 5a and the field limiting ring 5b, and a field oxide layer 4 is formed in each voltage-dividing deep groove 4 and on the surface of the epitaxial layer 2, which can effectively disperse the high electric field accumulated between the main junction 5a and the field limiting ring 5b, making the power device less likely to break down, thereby greatly improving the stability of the power device.

[0195] In one embodiment, at least two field limiting rings 5b are spaced apart on the terminal region, and at least two voltage dividing deep grooves 6 are arranged on the terminal region between the main junction 5a and the field limiting ring 5b close to the main junction 5a.

[0196] As an example, at least two field limiting rings 5b are arranged at intervals on the terminal region outside the main junction 5a. When the at least two field limiting rings 5b are arranged from the inside to the outside, at least two voltage-dividing deep grooves 6 can be arranged between the main junction 5a and the field limiting ring 5b close to the main junction 5a, so that the at least two voltage-dividing deep grooves 6 and the field oxide layer 4 arranged in the voltage-dividing deep grooves 4 and extending to the outside of the terminal region to cover the voltage-dividing deep grooves 4 can effectively disperse the high electric field accumulated between the main junction 5a and the field limiting ring 5b close to the main junction 5a (that is, the field limiting ring 5b arranged on the innermost side), so that the power device is less likely to break down, thereby greatly improving the stability of the power device.

[0197] In one embodiment, at least two voltage-dividing deep grooves 3 are arranged on the terminal region outside the field limiting ring 5 b.

[0198] As an example, at least two voltage-dividing deep grooves 3 are arranged on the terminal area outside the field limiting ring 5b, and a field oxide layer 4 is formed in each voltage-dividing deep groove 4 and on the surface of the epitaxial layer 2, which can effectively disperse the high electric field concentrated in the terminal area outside the field limiting ring 6b, making the power device less likely to break down, thereby greatly improving the stability of the power device.

[0199] In one embodiment, at least two field limiting rings 5 ​​b are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves 3 are arranged on the terminal region outside the outermost field limiting ring 5 b.

[0200] As an example, at least two field limiting rings 5b are arranged at intervals on the terminal region outside the main junction 5a. When the at least two field limiting rings 5b are arranged from the inside to the outside, at least two voltage-dividing deep grooves 3 can be arranged on the terminal region outside the outermost field limiting ring 5b, so that at least two voltage-dividing deep grooves 6 and a field oxide layer 4 arranged in the voltage-dividing deep grooves 4 and extending outside the terminal region to cover the voltage-dividing deep grooves 4 can effectively disperse the high electric field gathered in the terminal region outside the outermost field limiting ring 5b, so that the power device is less likely to break down, thereby greatly improving the stability of the power device.

[0201] In one embodiment, at least two field limiting rings 5 ​​b are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves 3 are arranged on the terminal region between two adjacent field limiting rings 5 ​​b.

[0202] As an example, Figure 2 As shown, at least two field limiting rings 5b are arranged at intervals on the terminal region outside the main junction 5a. When the at least two field limiting rings 5b are arranged from the inside to the outside, at least two voltage dividing deep grooves 3 can be arranged in the terminal region between two adjacent field limiting rings 5b, so that at least two voltage dividing deep grooves 6 and the field oxide layer 4 arranged in the voltage dividing deep grooves 4 and extending to the outside of the terminal region to cover the voltage dividing deep grooves 4 can effectively disperse the high electric field accumulated between the two adjacent field limiting rings 5b, so that the power device is less likely to break down, and the stability of the power device is greatly improved.

[0203] In one embodiment, the pressure-dividing deep groove is an inverted stepped groove.

[0204] As an example, the voltage-dividing deep groove is designed as an inverted stepped groove with a certain angle, so that the field oxide layer 4 can be easily filled during the preparation of the power device, which helps to improve the filling efficiency.

[0205] In one embodiment, after step S504, that is, etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing a power device further includes:

[0206] Etching a first shallow groove on the field limiting ring, depositing a first insulating oxide layer in the first shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a second anti-breakdown structure;

[0207] The groove depth of the first shallow groove is smaller than the junction depth of the field limiting ring.

[0208] As an example, a first shallow groove 7b is etched in the field limiting ring 4, and then a first insulating oxide layer 8 is deposited in the first shallow groove 7b. Then, a conductive semiconductor is deposited in the deposited first insulating oxide layer 8 to form a second anti-breakdown structure. Since the first shallow groove 7b is arranged in the field limiting ring 5b, and the groove depth of the first shallow groove 7b is smaller than the junction depth of the field limiting ring 5b, the first shallow groove 7b can cooperate with the field limiting ring 5b to jointly bear the voltage drop between the two conductive electrodes of the power device when the power device is reverse biased, so that the electric field is relatively evenly distributed on the first insulating oxide layer 8 in the first shallow groove 7b, thereby avoiding excessive concentration of the electric field and improving the withstand voltage reliability of the power device; the conductive semiconductor 9 is used to neutralize the charges accumulated on the surface of the power device to prevent surface breakdown. For example, when the power device is an IGBT, if the IGBT is reverse biased, the first shallow groove 7b and the field limiting ring 5b jointly bear the voltage drop between the two conductive electrodes, the collector and the emitter, so that the electric field is relatively evenly distributed in the first insulating oxide layer 8 in the first shallow groove 7b, avoiding excessive concentration of the electric field and increasing the voltage resistance reliability of the device.

[0209] In one embodiment, after etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing a power device further includes:

[0210] Etching the field oxide layer of the active area, etching a second shallow groove in the active area, depositing a first insulating oxide layer in the second shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a gate anti-breakdown structure;

[0211] The groove depth of the second shallow groove is consistent with the groove depth of the first shallow groove.

[0212] As an example, the field oxide layer 4 of the active area is first etched to remove the field oxide layer 4 on the active area; then, a second shallow groove 7a is etched on the active area where the field oxide layer 4 is removed, and a first insulating oxide layer 8 is filled in the second shallow groove 7a, and a conductive semiconductor 9 is filled in the first insulating oxide layer 8. The second shallow groove 7a is a shallow groove that mainly plays a gate control role and a pressure-bearing role in the gate anti-breakdown structure. In this example, the groove depth of the second shallow groove 7a is generally consistent with the groove depth of the first shallow groove 7b, about 3-6μm. If the second shallow groove 7a is too deep, it will affect the withstand voltage level of the power device, and at the same time increase the channel length and affect the switching characteristics of the device; if the second shallow groove 7a is too shallow, it will make it difficult to achieve in terms of process. The first insulating oxide layer 8 is an insulating oxide layer formed by an insulating material. When the first insulating oxide layer 8 is filled in the second shallow groove 7a on the active area, the first insulating oxide layer 8 is a gate oxide layer. The conductive semiconductor 9 can be, but is not limited to, conductive polysilicon.

[0213] In this example, the second shallow groove 7a is arranged in the active area, and the groove depth of the second shallow groove 7a is consistent with the groove depth of the first shallow groove 7b, so that the electric field formed by the interface charge is relatively evenly distributed in the first insulating oxide layer 8 in the second shallow groove 7a, thereby avoiding excessive concentration of the electric field and increasing the voltage resistance reliability of the device; and the conductive semiconductor 9 is used to neutralize the charges accumulated on the surface of the power device to prevent surface breakdown.

[0214] In one embodiment, after forming the gate breakdown protection structure, the method for preparing a power device further includes: forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region;

[0215] The second injection region is arranged in the active region between the second shallow groove and the main junction and is connected to the main junction; the source region is arranged in the second injection region.

[0216] As an example, after etching the field oxide layer of the active area, etching a second shallow groove in the active area, depositing a first insulating oxide layer in the second shallow groove, depositing a conductive semiconductor in the first insulating oxide layer, and forming a gate breakdown protection structure, the method for preparing a power device also includes: forming a second injection region 10 of the second conductivity type and a source region 11 of the first conductivity type in the active area. The second injection region 10 of the second conductivity type is arranged on the active area and connected to the main junction 5a of the second conductivity type, so that the electric field distribution at the edge of the active area of ​​the power device is more uniform, which helps to improve the breakdown voltage of the power device. The source region 11 of the first conductivity type is arranged in the second injection region 10 of the second conductivity type, so that the epitaxial layer 2 of the first conductivity type, the second injection region 10 of the second conductivity type and the source region 11 of the first conductivity type cooperate to form an NPN structure or a PNP structure.

[0217] In one embodiment, the depth of the second implantation region is less than the depth of the second shallow recess.

[0218] As an example, since the epitaxial layer 2 of the first conductivity type, the second injection region 10 of the second conductivity type and the source region 11 of the first conductivity type cooperate to form an NPN structure or a PNP structure, the depth of the second injection region 10 is less than the groove depth of the second shallow groove 7a, so that the second injection region 10 can form a conductive channel when it is inverted; if the depth of the second injection region 10 is not less than the groove depth of the second shallow groove 7a, it will cause the part of the second injection region 10 that exceeds the second shallow groove 7a to be difficult to invert or even unable to invert, so that the power device cannot be turned on. For example, when the epitaxial layer 2 of the first conductivity type, the second injection region 10 of the second conductivity type and the source region 11 of the first conductivity type jointly form a PNP structure, when the gate is forward biased, the holes in the second injection region 10 are inverted to form an electronic conductive channel, and at this time, the power device is turned on; if the depth of the second injection region 10 is not less than the groove depth of the second shallow groove 7a, it will cause the part of the second injection region 10 that exceeds the second shallow groove 7a to be difficult to invert or even unable to invert, so that the power device cannot be turned on.

[0219] In one embodiment, the doping concentration of the second implantation region is less than the doping concentration of the first implantation region.

[0220] As an example, the doping depth of the second injection region 10 cannot be too high. If the doping depth is too high, the conductive channel will be too long, affecting the switching characteristics of the power device. The first injection region 5 is located in the terminal region and has high requirements for withstand voltage. The higher the doping concentration, the greater the difference in PN junction concentration formed between the first injection region 5 of the second conductivity type and the epitaxial layer 2 of the first conductivity type. The electric field mainly falls on the epitaxial layer 2 of the first conductivity type, and the first conductivity type epitaxial layer 2 is more fully utilized, which will make its withstand voltage higher. Therefore, the doping concentration of the second injection region 10 needs to be designed to be lower than the doping concentration of the first injection region 5, and the specific concentrations of the two are set independently according to actual conditions.

[0221] In one embodiment, the doping concentration of the second implantation region is 1-2 orders of magnitude less than the doping depth of the first implantation region.

[0222] As an example, the doping concentration of the second injection region 10 is 1-2 orders of magnitude less than the doping depth of the first injection region 5. For example, the concentration range of the second injection region is 1e 13 ~5e 13 / cm 2 , then the concentration range of the first injection region is 1e 14 ~5e 15 / cm 2, so that the concentration difference of the PN junction formed between the first injection region 5 of the second conductivity type and the epitaxial layer 2 of the first conductivity type is relatively large, so that the electric field mainly falls on the epitaxial layer 2 of the first conductivity type, and the voltage resistance of the power device can be guaranteed for the epitaxial layer 2 of the first conductivity type. In this example, the specific doping concentration of the second injection region 10 is determined according to the actual threshold voltage requirements. It is only necessary to ensure that the doping concentration of the first injection region 5 is 1-2 orders of magnitude higher than the doping concentration of the second injection region 10, which is conducive to improving its voltage resistance.

[0223] In one embodiment, after forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region, the method for preparing a power device further includes:

[0224] Depositing a second insulating oxide layer on the epitaxial layer and the field oxide layer, and etching a contact hole on the second insulating oxide layer;

[0225] A front metal is deposited on the second insulating oxide layer. The front metal includes an electrode metal and a cut-off ring metal. The electrode metal is connected to the source region and the main junction through a contact hole, and the cut-off ring metal is connected to the cut-off ring through a contact hole.

[0226] As an example, a second insulating oxide layer 12 is first deposited on the epitaxial layer 2 and the field oxide layer 4, and contact holes 13 are etched on the second insulating oxide layer 12. The contact holes 13 include a source region contact hole, a main junction contact hole and a stop ring contact hole.

[0227] As an example, a front metal is deposited on the second insulating oxide layer 12, and the front metal includes an electrode metal 14 and a stop ring metal 16. The electrode metal 14 is connected to the source region 11 and the main junction 5a through the contact hole 13, and the stop ring metal 16 is connected to the stop ring 6 through the contact hole 13. The second insulating oxide layer 12 is arranged on the epitaxial layer 2 and on the field oxide layer 4 covering the surface of the epitaxial layer 2, and is provided with contact holes 13 such as a source region contact hole, a main junction contact hole and a stop ring contact hole. The source region 11 is connected to the electrode metal (such as the emitter metal) through the source region contact hole, the main junction 5a is connected to the electrode metal (such as the emitter metal) through the main junction contact hole, and the stop ring 6 is connected to the stop ring metal 16 through the stop ring contact hole to ensure the realization of the basic functions of the power device.

[0228] As an example, the contact hole 13 etched on the second insulating oxide layer 12 may also include a field limiting ring contact hole. Accordingly, the front metal deposited on the second insulating oxide layer 12 may also include a field plate metal 15a / 15b, and the field plate metal 15a / 15b is connected to the field limiting ring 5b in the voltage divider protection zone through the field limiting ring contact hole.

[0229] In one embodiment, after step S502, that is, after etching a voltage-dividing deep groove on the terminal region of the epitaxial layer and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing a power device further includes: grinding the field oxide layer.

[0230] As an example, after step S502, that is, after a field oxide layer is formed in the voltage divider deep groove and on the surface of the epitaxial layer, the field oxide layer 4 can be polished using but not limited to a chemical mechanical polishing (CMP) process to make the surface of the field oxide field smoother, which helps to ensure the stability of forming a first injection region of the second conductivity type in the voltage divider protection zone through the injection gap and forming a cutoff ring of the first conductivity type in the cutoff protection zone.

[0231] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention.

Claims

1. A power device, characterized in that: include: substrate; An epitaxial layer of the first conductivity type is arranged on the substrate, and an active area and a terminal area arranged at the periphery of the active area are provided on the epitaxial layer; A first injection region of a second conductivity type, the first injection region comprising a main junction, the main junction being disposed on the terminal region near the active region; The first anti-breakdown structure includes a voltage-dividing deep groove and a field oxide layer; the voltage-dividing deep groove is arranged in a terminal region outside the main junction, and the groove depth of the voltage-dividing deep groove is greater than the junction depth of the main junction; the field oxide layer is filled in the voltage-dividing deep groove and extends to the outside of the terminal region to cover the surface of the voltage-dividing deep groove.

2. The power device according to claim 1, characterized in that: The first injection region further includes a field limiting ring, and the field limiting ring is arranged in a terminal region outside the main junction; The depth of the voltage-dividing deep groove is greater than the junction depth of the field limiting ring.

3. The power device according to claim 2, characterized in that: At least three field limiting rings are arranged at intervals on the terminal region, and the distance between two adjacent field limiting rings gradually increases in the direction from the active region to the terminal region.

4. The power device according to claim 2, characterized in that: At least two first anti-breakdown structures are provided on the terminal region between the main junction and the field limiting ring.

5. The power device according to claim 4, characterized in that: At least two of the field limiting rings are arranged at intervals on the terminal region, and at least two of the first anti-breakdown structures are arranged on the terminal region between the main junction and the field limiting ring close to the main junction.

6. The power device according to claim 2, characterized in that: At least two first anti-breakdown structures are provided on the terminal area outside the field limiting ring.

7. The power device according to claim 6, characterized in that: At least two of the field limiting rings are arranged at intervals on the terminal area, and at least two of the first anti-breakdown structures are arranged on the terminal area outside the outermost field limiting ring.

8. The power device according to claim 2, characterized in that: At least two field limiting rings are arranged at intervals on the terminal area, and at least two first anti-breakdown structures are arranged on the terminal area between two adjacent field limiting rings.

9. The power device according to claim 1, characterized in that: At least two of the voltage-dividing deep grooves are arranged at intervals in the terminal region outside the main junction; and the depths of the at least two voltage-dividing deep grooves gradually increase along a direction from the active region to the terminal region.

10. The power device according to claim 1, characterized in that: The pressure-dividing deep groove is an inverted stepped groove.

11. The power device according to claim 1, characterized in that: The terminal area includes a voltage division protection area arranged at the periphery of the active area and a cut-off protection area arranged at the periphery of the voltage division protection area; A cut-off ring of a first conductive type, arranged in the cut-off protection zone; The main junction is arranged in a voltage division protection zone close to the active region; The voltage-dividing deep groove is arranged in a voltage-dividing protection zone between the main junction and the cut-off ring.

12. The power device according to claim 2, characterized in that: The power device further includes a second anti-breakdown structure; The second anti-breakdown structure includes a first shallow groove, a first insulating oxide layer filled in the first shallow groove, and a conductive semiconductor filled in the first insulating oxide layer; The first shallow groove is arranged in the field limiting ring, and a groove depth of the first shallow groove is smaller than a junction depth of the field limiting ring.

13. The power device according to claim 12, characterized in that: At least two second anti-breakdown structures are arranged in the field limiting ring.

14. The power device according to claim 12, characterized in that: The power device also includes a gate anti-breakdown structure; The gate anti-breakdown structure comprises a second shallow groove, a first insulating oxide layer filled in the second shallow groove, and a conductive semiconductor filled in the first insulating oxide layer; The second shallow groove is arranged in the active area, and the groove depth of the second shallow groove is consistent with the groove depth of the first shallow groove.

15. The power device according to claim 12 or 14, characterized in that: The thickness of the first insulating oxide layer is smaller than the thickness of the field oxide layer, and the density of the first insulating oxide layer is greater than the density of the field oxide layer.

16. The power device according to claim 14, characterized in that: The power device further comprises: A second implantation region of a second conductivity type is disposed in the active region between the second shallow recess and the main junction and is connected to the main junction; A source region of the first conductivity type is arranged in the second implantation region.

17. The power device according to claim 16, characterized in that: The depth of the second implantation region is smaller than the depth of the second shallow recess.

18. The power device according to claim 16, characterized in that: The doping concentration of the second implantation region is lower than the doping concentration of the first implantation region.

19. The power device according to claim 16, characterized in that: The doping concentration of the second implantation region is 1-2 orders of magnitude less than the doping depth of the first implantation region.

20. The power device according to claim 16, characterized in that: The power device further comprises: A second insulating oxide layer is disposed on the epitaxial layer and the field oxide layer, and a contact hole is provided on the second insulating oxide layer; The front metal is arranged on the second insulating oxide layer, and includes an electrode metal and a cut-off ring metal. The electrode metal is connected to the source region and the main junction through the contact hole, and the cut-off ring metal is connected to the cut-off ring through the contact hole.

21. The power device according to claim 20, characterized in that: The first injection region further comprises a field limiting ring, and the field limiting ring is arranged in a voltage dividing protection zone between the main junction and the cut-off ring; The front metal further includes a field plate metal, and the field plate metal is connected to the field limiting ring through the contact hole.

22. The power device according to claim 1, characterized in that: The active region is a trench IGBT structure or a trench VDMOS structure.

23. A method for preparing a power device, characterized in that: include: epitaxially forming an epitaxial layer of a first conductivity type on a substrate, wherein the epitaxial layer comprises an active region and a terminal region disposed at the periphery of the active region; Etching a voltage-dividing deep groove on the terminal region of the epitaxial layer, and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer; An injection gap is etched on the field oxide layer in the terminal region, and a first injection region of a second conductivity type is formed in the terminal region through the injection gap. The first injection region includes a main junction, and the main junction is arranged at a position in the terminal region close to the active region. The voltage divider deep groove is arranged in the terminal region outside the main junction, and the groove depth of the voltage divider deep groove is greater than the junction depth of the main junction.

24. The method for preparing a power device as claimed in claim 23, characterized in that: The terminal area includes a voltage division protection area arranged at the periphery of the active area and a cut-off protection area arranged at the periphery of the voltage division protection area; The step of etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap comprises: A first implantation gap is etched on the field oxide layer of the voltage division protection zone, and a first implantation zone of a second conductivity type is formed in the voltage division protection zone through the first implantation gap.

25. The method for preparing a power device as claimed in claim 24, characterized in that: After etching a voltage-dividing deep groove on the terminal region of the epitaxial layer and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing the power device further includes: A second implantation gap is etched on the field oxide layer in the cut-off protection zone, and a cut-off ring of the first conductivity type is formed in the cut-off protection zone through the second implantation gap.

26. The method for preparing a power device as claimed in claim 23, characterized in that: The first injection region further includes a field limiting ring, which is arranged in a terminal region outside the main junction; the depth of the voltage dividing deep groove is greater than the junction depth of the field limiting ring.

27. The method for preparing a power device as claimed in claim 26, characterized in that: At least three field limiting rings are arranged at intervals on the terminal region, and the distance between two adjacent field limiting rings gradually increases in the direction from the active region to the terminal region.

28. The method for preparing a power device as claimed in claim 26, characterized in that: At least two of the voltage-dividing deep grooves are arranged at intervals in the terminal region outside the main junction; and the depths of the at least two voltage-dividing deep grooves gradually increase along a direction from the active region to the terminal region.

29. The method for preparing a power device as claimed in claim 26, characterized in that: At least two of the voltage-dividing deep grooves are arranged on a terminal region between the main junction and the field limiting ring.

30. The method for preparing a power device as claimed in claim 29, characterized in that: At least two field limiting rings are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves are arranged on the terminal region between the main junction and the field limiting ring close to the main junction.

31. The method for preparing a power device as claimed in claim 26, characterized in that: At least two of the voltage-dividing deep grooves are arranged on a terminal region outside the field limiting ring.

32. The method for preparing a power device as claimed in claim 31, characterized in that: At least two field limiting rings are arranged at intervals on the terminal region, and at least two voltage-dividing deep grooves are arranged on the terminal region outside the outermost field limiting ring.

33. The method for preparing a power device as claimed in claim 26, characterized in that: At least two field limiting rings are arranged at intervals on the terminal region, and at least two voltage dividing deep grooves are arranged on the terminal region between two adjacent field limiting rings.

34. The method for preparing a power device as claimed in claim 23, characterized in that: The pressure-dividing deep groove is an inverted stepped groove.

35. The method for preparing a power device as claimed in claim 26, characterized in that: After etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing the power device further includes: Etching a first shallow groove on the field limiting ring, depositing a first insulating oxide layer in the first shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a second anti-breakdown structure; Wherein, the groove depth of the first shallow groove is smaller than the junction depth of the field limiting ring.

36. The method for preparing a power device as claimed in claim 35, characterized in that: After etching an implantation gap on the field oxide layer in the terminal region and forming a first implantation region of the second conductivity type in the terminal region through the implantation gap, the method for preparing the power device further includes: Etching the field oxide layer of the active area, etching a second shallow groove in the active area, depositing a first insulating oxide layer in the second shallow groove, and depositing a conductive semiconductor in the first insulating oxide layer to form a gate anti-breakdown structure; The groove depth of the second shallow groove is consistent with the groove depth of the first shallow groove.

37. The method for preparing a power device as claimed in claim 36, characterized in that: After forming the gate anti-breakdown structure, the method for preparing the power device further includes: forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region; The second injection region is arranged in the active region between the second shallow groove and the main junction and is connected to the main junction; the source region is arranged in the second injection region.

38. The method for preparing a power device as claimed in claim 37, characterized in that: The depth of the second implantation region is smaller than the depth of the second shallow recess.

39. The method for preparing a power device as claimed in claim 37, characterized in that: The doping concentration of the second implantation region is lower than the doping concentration of the first implantation region.

40. The method for preparing a power device as claimed in claim 38, characterized in that: The doping concentration of the second implantation region is 1-2 orders of magnitude less than the doping depth of the first implantation region.

41. The method for preparing a power device as claimed in claim 37, characterized in that: After forming a second implantation region of the second conductivity type and a source region of the first conductivity type in the active region, the method for preparing the power device further includes: Depositing a second insulating oxide layer on the epitaxial layer and the field oxide layer, and etching a contact hole on the second insulating oxide layer; A front metal is deposited on the second insulating oxide layer, including an electrode metal and a cut-off ring metal. The electrode metal is connected to the source region and the main junction through the contact hole, and the cut-off ring metal is connected to the cut-off ring through the contact hole.

42. The method for preparing a power device as claimed in claim 23, characterized in that: After etching a voltage-dividing deep groove on the terminal region of the epitaxial layer and forming a field oxide layer in the voltage-dividing deep groove and on the surface of the epitaxial layer, the method for preparing the power device further includes: The field oxide layer is polished.

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