Display device

Abstract

The invention relates to a display device. The display device includes a substrate including a main display area, a component area, and a non-display area; an auxiliary light emitting element disposed in the component area; a driver disposed in the non-display area; an auxiliary pixel circuit disposed in the non-display area, the auxiliary pixel circuit including an auxiliary transistor; and a connection wiring including a first portion, a second portion disposed on the first portion, and a third portion disposed on the second portion, the connection wiring connecting the auxiliary light emitting element and the auxiliary pixel circuit, in which the first portion includes a transparent conductive oxide, the second portion includes silver or a silver alloy, and the third portion includes a transparent conductive oxide.

Description

Technical Field

[0001] Embodiments relate to a display device. Background Art

[0002] A display device is a device that displays an image and visually provides information to a user. Recently, as display devices have become thinner and lighter, display devices are becoming applicable to many uses.

[0003] In addition to display devices becoming thinner and lighter, the display area of ​​the display devices is also becoming larger, allowing various functions to be added to the display area. Sometimes, a display device may include a component area that performs various functions while displaying an image. Summary of the invention

[0004] Embodiments provide a display device including a component area having improved display quality.

[0005] According to an embodiment, a display device may include: a substrate including a main display area, a component area, and a non-display area; an auxiliary light-emitting element arranged in the component area; a driver arranged in the non-display area; an auxiliary pixel circuit arranged in the non-display area; and a connecting wiring including a first part, a second part arranged on the first part, and a third part arranged on the second part.

[0006] In an implementation, the auxiliary pixel circuit may include an auxiliary transistor.

[0007] In an embodiment, the connection wiring may connect the auxiliary light emitting element and the auxiliary pixel circuit.

[0008] In an embodiment, the first portion may include a transparent conductive oxide.

[0009] In an embodiment, the second portion may include silver or a silver alloy.

[0010] In an embodiment, the third portion may include a transparent conductive oxide.

[0011] In an embodiment, the transparent conductive oxide included in the first portion may include indium tin oxide.

[0012] In an embodiment, the transparent conductive oxide included in the first portion may include indium tin zinc oxide.

[0013] In embodiments, the indium tin zinc oxide may be amorphous.

[0014] In an embodiment, a ratio of zinc oxide in indium tin zinc oxide may be equal to or greater than about 10 wt % and equal to or less than about 30 wt %.

[0015] In an embodiment, the transparent conductive oxide included in the third portion may include indium tin oxide.

[0016] In an embodiment, the transparent conductive oxide included in the third portion may include indium tin zinc oxide.

[0017] In embodiments, the indium tin zinc oxide may be amorphous.

[0018] In an embodiment, a ratio of zinc oxide in indium tin zinc oxide may be equal to or greater than about 10 wt % and equal to or less than about 30 wt %.

[0019] In an embodiment, the silver alloy may include copper.

[0020] In an embodiment, the silver alloy may further include zinc.

[0021] In an embodiment, the ratio of copper in the silver alloy may be equal to or greater than about 0.5 at % and equal to or less than about 1 at %.

[0022] In an embodiment, the ratio of zinc in the silver alloy may be equal to or greater than about 0.5 at % and equal to or less than about 1 at %.

[0023] In an embodiment, the ratio of zinc in the silver alloy and the ratio of copper in the silver alloy may be the same.

[0024] In an embodiment, the thickness of the first portion may be equal to or greater than about 30 angstroms and equal to or less than about 70 angstroms.

[0025] In an embodiment, the thickness of the second portion may be equal to or greater than about 40 angstroms and equal to or less than about 60 angstroms.

[0026] In an embodiment, the thickness of the third portion may be equal to or greater than about 30 angstroms and equal to or less than about 70 angstroms.

[0027] In an embodiment, the thickness of the first portion and the thickness of the third portion may be the same.

[0028] In an embodiment, the thickness of the second portion may be greater than the thickness of the first portion.

[0029] The thickness of the second portion may be greater than the thickness of the third portion.

[0030] The display device according to the embodiment may include a main display area, a component area and a non-display area. The auxiliary light emitting element may be arranged in the component area. In addition, the auxiliary pixel circuit may be arranged in the non-display area. The auxiliary light emitting element and the auxiliary pixel circuit may be connected by a connection wiring.

[0031] The connection wiring may include a first portion, a second portion disposed on the first portion, and a third portion disposed on the second portion. Each of the first portion and the third portion may include amorphous indium tin zinc oxide ("ITZO"). In addition, the second portion may include a silver alloy.

[0032] Accordingly, the light transmittance of the connection wiring can be improved. In addition, the sheet resistance of the connection wiring can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0034] Figure 1 A plan view for explaining a display device according to an embodiment.

[0035] Figure 2 To explain Figure 1 A cross-sectional view of a display device.

[0036] Figure 3 for Figure 1 An enlarged plan view of an example of area A.

[0037] Figure 4 for Figure 1 An enlarged plan view of another example of area A.

[0038] Figure 5 for Figure 1 An enlarged plan view of another example of area A.

[0039] Figure 6 To explain Figure 2 A cross-sectional view of a connection wiring included in a display device. DETAILED DESCRIPTION

[0040] Hereinafter, a display device according to an embodiment will be described in more detail with reference to the accompanying drawings. The same reference numerals are used for the same components in the drawings, and repeated description of the same components will be omitted.

[0041] Figure 1 A plan view for explaining a display device according to an embodiment.

[0042] refer to Figure 1 , the display device DD may include a display area DA and a non-display area NDA. The display area DA may include an assembly area CA and a main display area MDA surrounding at least a portion of the assembly area CA.

[0043] The main display area MDA may be defined as an area that can display an image by generating light or adjusting the transmittance of light provided by an external light source. The main light emitting element LED may be disposed in the main display area MDA. The main light emitting element LED may emit light. The main light emitting element LED may be repeatedly arranged along a first direction DR1 and a second direction DR2 crossing the first direction DR1.

[0044] The component area CA may be arranged inside the main display area MDA. In an embodiment, the component area CA may be arranged at the upper center of the main display area MDA. In another embodiment, the component area CA may be arranged at the upper left side of the main display area MDA. In another embodiment, the component area CA may be arranged at the upper right side of the main display area MDA.

[0045] In an embodiment, the component area CA may have a circular shape in a plan view. In another embodiment, the component area CA may have a shape different from a circular shape in a plan view. For example, the component area CA may have a polygonal shape in a plan view.

[0046] The auxiliary light emitting elements LED' may be disposed in the assembly area CA. The auxiliary light emitting elements LED' may emit light. The auxiliary light emitting elements LED' may be repeatedly arranged in the first direction DR1 and the second direction DR2.

[0047] Although not in Figure 1 , but the component area CA may further include a transmission area. Figure 2 The light and / or sound outputted by the component C) and transmitted to the outside of the display device or the light and / or sound transmitted from the outside to the component may pass through the transmission area. The auxiliary light emitting element LED' may not be arranged in the transmission area. Accordingly, the resolution of the image provided by the component area CA may be lower than the resolution of the image provided by the main display area MDA.

[0048] The non-display area NDA may be located around the display area DA. For example, the non-display area NDA may surround at least a portion of the display area DA. A driver may be disposed in the non-display area NDA. For example, the driver may include a data driver and a gate driver, etc.

[0049] In an embodiment, the auxiliary pixel circuit (e.g., Figure 2 The auxiliary pixel circuit PXC') may be further disposed in the non-display area NDA. The auxiliary pixel circuit may provide a signal or voltage to the auxiliary light emitting element LED'. The non-display area NDA may not display an image.

[0050] Figure 2 To explain Figure 1 A cross-sectional view of a display device.

[0051] refer to Figure 2 and Figure 3 , display device (e.g., Figure 1 The display device DD) may include a substrate SUB, an isolation layer BAR, a buffer layer BUF, a main pixel circuit PXC, an auxiliary pixel circuit PXC', a gate insulating layer GI, a first interlayer insulating layer ILD1, a second interlayer insulating layer ILD2, a first through-hole insulating layer VIA1, a second through-hole insulating layer VIA2, an additional wiring AE, a connecting wiring CNE, a pixel electrode PE, an auxiliary pixel electrode PE', a light-emitting layer EML, an auxiliary light-emitting layer EML', a pixel defining layer PDL, a common electrode CE and an encapsulation layer TFE.

[0052] The substrate SUB may include a main display area DA, an assembly area CA, and a non-display area NDA. The substrate SUB may include a transparent material or an opaque material. The substrate SUB may be formed of a transparent resin substrate. Examples of the transparent resin substrate may include a polyimide substrate. In this case, the polyimide substrate may include a first organic layer, a first isolation layer, a second organic layer, and the like.

[0053] Alternatively, the substrate SUB may include a quartz substrate (e.g., a synthetic quartz substrate or a fluorine-doped quartz substrate), a calcium fluoride substrate, a soda-lime glass substrate, or an alkali-free glass substrate, etc. These materials may be used alone or in combination with each other. The substrate SUB may be continuously disposed throughout the main display area MDA, the component area CA, and the non-display area NDA.

[0054] The isolation layer BAR may be disposed on the substrate SUB. The isolation layer BAR may prevent impurities from penetrating into the upper portion of the substrate SUB from the outside. The isolation layer BAR may include an inorganic material (such as silicon oxide, silicon nitride, or silicon oxynitride, etc.). These materials may be used alone or in combination with each other. In addition, the isolation layer BAR may be formed into a single-layer structure or a multi-layer structure. The isolation layer BAR may be continuously disposed throughout the main display area MDA, the component area CA, and the non-display area NDA.

[0055] The buffer layer BUF may be disposed on the isolation layer BAR. The buffer layer BUF may prevent metal atoms or impurities from diffusing from the substrate SUB to the active pattern ACT and the auxiliary active pattern ACT'. The buffer layer BUF may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0056] For example, the buffer layer BUF may include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, etc. These materials may be used alone or in combination with each other.

[0057] The main pixel circuit PXC may include a main transistor TR and a main capacitor CP. The main transistor TR may include a source electrode SE, a drain electrode DE, an active pattern ACT, and a first gate electrode GE1. The main capacitor CP may include a first gate electrode GE1 and a second gate electrode GE2. The main pixel circuit PXC may be disposed in the main display area MDA.

[0058] The auxiliary pixel circuit PXC' may include an auxiliary transistor TR' and an auxiliary capacitor CP'. The auxiliary transistor TR' may include an auxiliary source electrode SE', an auxiliary drain electrode DE', an auxiliary active pattern ACT', and a first auxiliary gate electrode GE1'. The auxiliary capacitor CP' may include a first auxiliary gate electrode GE1' and a second auxiliary gate electrode GE2'. In an embodiment, the auxiliary pixel circuit PXC' may be disposed in the non-display area NDA.

[0059] The active pattern ACT may be disposed on the buffer layer BUF. The active pattern ACT may include a source region, a drain region, and a channel region disposed between the source region and the drain region. The active pattern ACT may be disposed in the main display area MDA.

[0060] The active pattern ACT may include an inorganic semiconductor (eg, amorphous silicon, polycrystalline silicon, a metal oxide semiconductor), an organic semiconductor, etc. These materials may be used alone or in combination with each other.

[0061] The metal oxide semiconductor may include a binary compound ("AB") containing indium ("In"), zinc ("Zn"), gallium ("Ga"), tin ("Sn"), titanium ("Ti"), aluminum ("Al"), hafnium ("Hf"), zirconium ("Zr"), or magnesium ("Mg"), etc. x ”), ternary compounds (“AB x C y ”) or quaternary compounds (“AB x C y D z ")wait.

[0062] For example, the metal oxide semiconductor may include zinc oxide (“ZnO x ”), gallium oxide (“GaO x "), tin oxide ("SnO x ”), indium oxide (“InO x ”), indium gallium oxide (“IGO”), indium zinc oxide (“IZO”), indium tin oxide (“ITO”), indium zinc tin oxide (“IZTO”), or indium gallium zinc oxide (“IGZO”). These materials may be used alone or in combination with one another.

[0063] The auxiliary active pattern ACT' may be disposed on the buffer layer BUF. The auxiliary active pattern ACT' may include a source region, a drain region, and a channel region disposed between the source region and the drain region. The auxiliary active pattern ACT' may be disposed in the non-display area NDA.

[0064] The auxiliary active pattern ACT' may be formed on the same layer as the active pattern ACT. In addition, the auxiliary active pattern ACT' may be formed by the same process as that of the active pattern ACT. In addition, the auxiliary active pattern ACT' may include substantially the same material as that of the active pattern ACT.

[0065] The gate insulating layer GI may be disposed on the buffer layer BUF. The gate insulating layer GI may cover the active pattern ACT and the auxiliary active pattern ACT'. The gate insulating layer GI may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0066] For example, the gate insulating layer GI may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide, etc. These materials may be used alone or in combination with each other.

[0067] The first gate electrode GE1 may be disposed on the gate insulating layer GI. The first gate electrode GE1 may overlap the channel region of the active pattern ACT. The first gate electrode GE1 may be disposed in the main display area MDA.

[0068] The first gate electrode GE1 may include metal, alloy, metal nitride, conductive metal oxide, or transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0069] Examples of the metal may include silver ("Ag"), molybdenum ("Mo"), aluminum ("Al"), tungsten ("W"), copper ("Cu"), nickel ("Ni"), chromium ("Cr"), titanium ("Ti"), tantalum ("Ta"), platinum ("Pt"), or scandium ("Sc"), etc. These materials may be used alone or in combination with each other.

[0070] Examples of the conductive metal oxide may include indium tin oxide or indium zinc oxide, etc. These materials may be used alone or in combination with each other.

[0071] In addition, examples of metal nitrides may include aluminum nitride (“AlN x ”), tungsten nitride (“WN x ”) or chromium nitride (“CrN x ”) etc. These materials may be used alone or in combination with each other.

[0072] The first auxiliary gate electrode GE1' may be disposed on the gate insulating layer GI. The first auxiliary gate electrode GE1' may overlap the channel region of the auxiliary active pattern ACT'. In an embodiment, the first auxiliary gate electrode GE1' may be disposed in the non-display area NDA.

[0073] The first auxiliary gate electrode GE1' may be formed on the same layer as the first gate electrode GE1. In addition, the first auxiliary gate electrode GE1' may be formed by the same process as the first gate electrode GE1 and may be formed simultaneously with the first gate electrode GE1. In addition, the first auxiliary gate electrode GE1' may include substantially the same material as the first gate electrode GE1.

[0074] The first interlayer insulating layer ILD1 may be disposed on the gate insulating layer GI. The first interlayer insulating layer ILD1 may cover the first gate electrode GE1 and the first auxiliary gate electrode GE1 ′. The first interlayer insulating layer ILD1 may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0075] For example, the first interlayer insulating layer ILD1 may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide, etc. These materials may be used alone or in combination with each other.

[0076] The second gate electrode GE2 may be disposed on the first interlayer insulating layer ILD1. The second gate electrode GE2 may overlap the first gate electrode GE1. The second gate electrode GE2 may include a material substantially the same as that of the first gate electrode GE1.

[0077] The second auxiliary gate electrode GE2' may be disposed on the first interlayer insulating layer ILD1. The second auxiliary gate electrode GE2' may overlap the first auxiliary gate electrode GE1'.

[0078] The second auxiliary gate electrode GE2' may be formed on the same layer as the second gate electrode GE2. In addition, the second auxiliary gate electrode GE2' may be formed by the same process as that of the second gate electrode GE2. In addition, the second auxiliary gate electrode GE2' may include substantially the same material as that of the second gate electrode GE2.

[0079] The second interlayer insulating layer ILD2 may be disposed on the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may fully cover the second gate electrode GE2 and the second auxiliary gate electrode GE2'. The second interlayer insulating layer ILD2 may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0080] For example, the second interlayer insulating layer ILD2 may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, or silicon oxycarbide, etc. These materials may be used alone or in combination with each other.

[0081] The source electrode SE may be disposed on the second interlayer insulating layer ILD2 . The source electrode SE may be connected to the source region of the active pattern ACT through a contact hole penetrating the second interlayer insulating layer ILD2 , the first interlayer insulating layer ILD1 , and the gate insulating layer GI.

[0082] The drain electrode DE may be disposed on the second interlayer insulating layer ILD2 . The drain electrode DE may be connected to the drain region of the active pattern ACT through a contact hole penetrating the second interlayer insulating layer ILD2 , the first interlayer insulating layer ILD1 , and the gate insulating layer GI.

[0083] For example, the source electrode SE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0084] The drain electrode DE may be formed on the same layer as the source electrode SE. In addition, the drain electrode DE may be formed by the same process as that of the source electrode SE. In addition, the drain electrode DE may include substantially the same material as that of the source electrode SE.

[0085] The auxiliary source electrode SE' may be disposed on the second interlayer insulating layer ILD2 and may be connected to the source region of the auxiliary active pattern ACT' through a contact hole penetrating the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI.

[0086] The auxiliary source electrode SE' may be formed on the same layer as the source electrode SE. In addition, the auxiliary source electrode SE' may be formed by the same process as that of the source electrode SE. In addition, the auxiliary source electrode SE' may include substantially the same material as that of the source electrode SE.

[0087] The auxiliary drain electrode DE' may be disposed on the second interlayer insulating layer ILD2 and may be connected to the drain region of the auxiliary active pattern ACT' through a contact hole penetrating the second interlayer insulating layer ILD2, the first interlayer insulating layer ILD1, and the gate insulating layer GI.

[0088] The auxiliary drain electrode DE' may be formed on the same layer as the auxiliary source electrode SE'. Also, the auxiliary drain electrode DE' may be formed by the same process as that of the auxiliary source electrode SE'. Also, the auxiliary drain electrode DE' may include substantially the same material as that of the auxiliary source electrode SE'.

[0089] The first through hole insulating layer VIA1 may be disposed on the second interlayer insulating layer ILD2. The first through hole insulating layer VIA1 may fully cover the source electrode SE, the drain electrode DE, the auxiliary source electrode SE', and the auxiliary drain electrode DE'. The first through hole insulating layer VIA1 may have a substantially flat top surface without generating a step around each of the source electrode SE, the drain electrode DE, the auxiliary source electrode SE', and the auxiliary drain electrode DE'. The first through hole insulating layer VIA1 may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0090] The first through hole insulating layer VIA1 may include an organic material. For example, the first through hole insulating layer VIA1 may include an organic material such as phenolic resin, acrylic resin, polyimide resin, polyamide resin, siloxane resin, or epoxy resin. These materials may be used alone or in combination with each other.

[0091] The additional wiring AE may be disposed on the first via insulating layer VIA1. The additional wiring AE may be connected to the source electrode SE through a contact hole penetrating the first via insulating layer VIA1. The additional wiring AE may be disposed in the main display area MDA.

[0092] The additional wiring AE may include metal, alloy, metal nitride, conductive metal oxide, or transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0093] The connection wiring CNE may be disposed on the first through hole insulating layer VIA1. The auxiliary light emitting element LED' and the auxiliary pixel circuit PXC' may be connected to each other through the connection wiring CNE. Specifically, the connection wiring CNE may be connected to the auxiliary source electrode SE' through a contact hole penetrating the first through hole insulating layer VIA1.

[0094] In an implementation, the connection wiring CNE may be continuously disposed throughout the assembly area CA and the non-display area NDA. In addition, the connection wiring CNE may be formed on the same layer as the additional wiring AE.

[0095] The second through hole insulating layer VIA2 may be disposed on the first through hole insulating layer VIA1. The second through hole insulating layer VIA2 may cover the additional wiring AE and the connection wiring CNE, and may form a substantially flat top surface without forming a step or unevenness around each of the additional wiring AE and the connection wiring CNE. The second through hole insulating layer VIA2 may be continuously disposed throughout the main display area MDA, the assembly area CA, and the non-display area NDA.

[0096] The second through hole insulating layer VIA2 may include an organic material. For example, the second through hole insulating layer VIA2 may include an organic material (such as phenolic resin, acrylic resin, polyimide resin, polyamide resin, siloxane resin or epoxy resin, etc.). These materials may be used alone or in combination with each other.

[0097] The pixel electrode PE may be disposed on the second through-hole insulating layer VIA2. The pixel electrode PE may be connected to the additional wiring AE through a contact hole penetrating the second through-hole insulating layer VIA2. The pixel electrode PE may be disposed in the main display area MDA.

[0098] The pixel electrode PE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. These materials may be used alone or in combination with each other. In an embodiment, the pixel electrode PE may have a stacked structure including ITO / Ag / ITO. For example, the pixel electrode PE may serve as an anode.

[0099] The auxiliary pixel electrode PE' may be disposed on the second through hole insulating layer VIA2. The auxiliary pixel electrode PE' may be connected to the connection wiring CNE through a contact hole penetrating the second through hole insulating layer VIA2. The auxiliary pixel electrode PE' may be disposed in the assembly area CA.

[0100] The auxiliary pixel electrode PE' may be formed on the same layer as the pixel electrode PE. In addition, the auxiliary pixel electrode PE' may be formed by the same process as that of the pixel electrode PE. In addition, the auxiliary pixel electrode PE' may include substantially the same material as that of the pixel electrode PE.

[0101] The pixel defining layer PDL may be disposed on the second via insulating layer VIA2. The pixel defining layer PDL may cover the side of the pixel electrode PE. In addition, a first opening exposing a portion of the upper surface of the pixel electrode PE may be defined in the pixel defining layer PDL.

[0102] In addition, the pixel defining layer PDL may cover the side of the auxiliary pixel electrode PE′ In addition, a second opening exposing a portion of the upper surface of the auxiliary pixel electrode PE′ may be defined in the pixel defining layer PDL.

[0103] For example, the pixel defining layer PDL may include an inorganic material or an organic material. In an embodiment, the pixel defining layer PDL may include an organic material (such as an epoxy resin or a silicone resin, etc.). These materials may be used alone or in combination with each other. In another embodiment, the pixel defining layer PDL may further include a light-blocking material containing a black pigment and / or a black dye, etc.

[0104] The light emitting layer EML may be disposed on the pixel electrode PE. The light emitting layer EML may include an organic material that emits light of a predetermined color. For example, the light emitting layer EML may include an organic material that emits red light. However, the present disclosure is not limited thereto, and the light emitting layer EML may emit light of a color different from the color of red light. The light emitting layer EML may be disposed in the main display area MDA.

[0105] The auxiliary light emitting layer EML' may be disposed on the auxiliary pixel electrode PE'. The auxiliary light emitting layer EML' may be disposed in the component area CA. The auxiliary light emitting layer EML' may be formed on the same layer as the light emitting layer EML. In addition, the auxiliary light emitting layer EML' may be formed by the same process as that of the light emitting layer EML. In addition, the auxiliary light emitting layer EML' may include a material substantially the same as that of the light emitting layer EML.

[0106] The common electrode CE may be disposed on the light emitting layer EML, the auxiliary light emitting layer EML' and the pixel defining layer PDL. In an embodiment, the common electrode CE may be continuously disposed throughout the main display area MDA, the component area CA and the non-display area NDA. That is, the common electrode CE may be integrally formed throughout the main display area MDA, the component area CA and the non-display area NDA.

[0107] In another embodiment, the common electrode CE may be separately disposed throughout the main display area MDA and the assembly area CA. In addition, the common electrode CE may be separately disposed throughout the assembly area CA and the non-display area NDA.

[0108] The common electrode CE may include a metal, an alloy, a metal nitride, a conductive metal oxide, or a transparent conductive material, etc. These materials may be used alone or in combination with each other. The common electrode CE may serve as a cathode.

[0109] The light emitting element LED may include a pixel electrode PE, a light emitting layer EML, and a first portion of a common electrode CE. The first portion of the common electrode CE may be disposed in the main display area MDA.

[0110] In addition, the auxiliary light emitting element LED' may include an auxiliary pixel electrode PE', an auxiliary light emitting layer EML', and a second portion of the common electrode CE. The second portion of the common electrode CE may be disposed in the assembly area CA.

[0111] The encapsulation layer TFE may be disposed on the common electrode CE. The encapsulation layer TFE may prevent impurities and moisture from penetrating from the outside into the common electrode CE, the light-emitting layer EML, and the pixel electrode PE, and may prevent impurities and moisture from penetrating from the outside into the common electrode CE, the auxiliary light-emitting layer EML', and the auxiliary pixel electrode PE'. The encapsulation layer TFE may be continuously disposed throughout the main display area MDA, the component area CA, and the non-display area NDA.

[0112] The encapsulation layer TFE may include at least one inorganic layer and at least one organic layer. For example, the inorganic layer may include silicon oxide, silicon nitride, silicon oxynitride, etc. These materials may be used alone or in combination with each other. The organic layer may include a polymer cured product (such as polyacrylate).

[0113] The component C may be disposed under the substrate SUB. The component C may be disposed in the component area CA. For example, the component C may include an imaging device. The imaging device may be a camera using infrared or visible light. For example, the component C may include a solar cell, a flash, an illumination sensor, a proximity sensor, and / or an iris sensor, etc. For example, the component C may include a function of receiving sound.

[0114] Figure 3 for Figure 1 An enlarged plan view of an example of area A. Figure 4 for Figure 1 An enlarged plan view of another example of area A. Figure 5 for Figure 1 An enlarged plan view of another example of area A.

[0115] refer to Figure 2 and Figure 3 , the auxiliary light emitting element LED' may be disposed in the assembly area CA. For example, the first auxiliary light emitting element LED1 and the second auxiliary light emitting element LED2 may be disposed in the assembly area CA. The first auxiliary light emitting element LED1 and the second auxiliary light emitting element LED2 may be spaced apart from each other.

[0116] The auxiliary pixel circuit PXC' may be disposed in the non-display area NDA. For example, the first auxiliary pixel circuit PXC1 and the second auxiliary pixel circuit PXC2 may be disposed in the non-display area NDA. The first auxiliary pixel circuit PXC1 and the second auxiliary pixel circuit PXC2 may be spaced apart from each other.

[0117] The auxiliary light emitting element LED' and the auxiliary pixel circuit PXC' may be connected to each other through a connection wiring CNE. For example, the first auxiliary light emitting element LED1 and the first auxiliary pixel circuit PXC1 may be connected through a first connection wiring CNE1. In addition, the second auxiliary light emitting element LED2 and the second auxiliary pixel circuit PXC2 may be connected through a second connection wiring CNE2.

[0118] Figure 2 and Figure 3 An example may be explained in which each of the first auxiliary pixel circuit PXC1 and the second auxiliary pixel circuit PXC2 is disposed in the non-display area NDA. However, the present disclosure is not limited thereto.

[0119] refer to Figure 4In another embodiment, each of the first auxiliary pixel circuit PXC1 and the second auxiliary pixel circuit PXC2 may be disposed in the main display area MDA.

[0120] refer to Figure 5 In another embodiment, the first auxiliary pixel circuit PXC1 may be disposed in the main display area MDA. In addition, the second auxiliary pixel circuit PXC2 may be disposed in the non-display area NDA.

[0121] Figure 6 To explain Figure 2 A cross-sectional view of a connection wiring included in a display device.

[0122] refer to Figure 6 , the connection wiring CNE may include a first portion C1, a second portion C2, and a third portion C3. The second portion C2 may be disposed on the first portion C1. In addition, the third portion C3 may be disposed on the second portion C2.

[0123] In an embodiment, the first portion C1 may include a transparent conductive oxide (“TCO”). For example, the first portion C1 may include indium tin zinc oxide (“ITZO”).

[0124] However, the present disclosure is not limited thereto. For example, the first portion C1 may include indium tin oxide ("ITO"), indium zinc oxide ("IZO"), gallium zinc oxide ("GZO"), or indium gallium zinc oxide ("IGZO"), etc. These materials may be used alone or in combination with each other.

[0125] Indium tin zinc oxide may be a material obtained by doping indium tin oxide with zinc oxide ("ZnO").

[0126] In an embodiment, the first portion C1 may include an amorphous transparent conductive oxide. For example, the first portion C1 may include amorphous indium tin zinc oxide.

[0127] Amorphous transparent conductive oxides (such as amorphous indium tin zinc oxide) can remain amorphous even during heat treatment. Figure 1 When the manufacturing process of the display device DD) is performed at a high process temperature, the first portion C1 may maintain an amorphous state.

[0128] Since the first portion C1 may include amorphous indium tin zinc oxide, light transmittance of the connection wiring CNE may be improved. In addition, sheet resistance of the connection wiring CNE may be reduced.

[0129] In an embodiment, the ratio of zinc oxide in indium tin zinc oxide may be equal to or greater than about 10 wt % and equal to or less than about 30 wt %. When the ratio of zinc oxide is less than about 10 wt %, the first portion C1 may become crystalline. That is, the first portion C1 may not remain amorphous.

[0130] Light may be incident on the display device. The light incident on the display device may be reflected by an electrode disposed below the connection wiring CNE. The light reflected by the electrode may be incident on the lower surface of the first portion C1. The light incident on the lower surface of the first portion C1 may be divided into a first light reflected from the lower surface of the first portion C1 and a second light reflected from the upper surface of the first portion C1. The first light and the second light may disappear due to destructive interference.

[0131] When the ratio of zinc oxide exceeds about 30wt%, the refractive index of the first portion C1 may be reduced. In this case, destructive interference may not occur between the first light and the second light. Accordingly, the first light and the second light may not disappear. Accordingly, the first light and the second light may be visually recognized by a user of the display device.

[0132] However, this explains one possible mechanism by which light incident on the display device destructively interferes, and there is another mechanism by which light incident on the display device can destructively interfere. Using the latter mechanism, when the proportion of zinc oxide exceeds about 30wt%, the light incident on the display device may not disappear.

[0133] In an embodiment, the thickness W1 of the first portion C1 may be equal to or greater than about 30 angstroms and equal to or less than about 70 angstroms. When the thickness W1 of the first portion C1 exceeds about 70 angstroms, a difference in cutting dimension loss (CD skew) may occur between the first portion C1 and the second portion C2.

[0134] The second portion C2 may include silver ("Ag"), and the silver may have chemical resistance weaker than that of the transparent conductive material. The first portion C1 may protect the second portion C2 having weak chemical resistance. When the thickness W1 of the first portion C1 is less than about 30 angstroms, the first portion C1 may not be sufficient to protect the second portion C2.

[0135] The second portion C2 may include silver. In addition, the second portion C2 may include a silver alloy. In an embodiment, the silver alloy may include copper. In an embodiment, the silver alloy may further include zinc.

[0136] Since the second portion C2 includes the silver alloy, the light transmittance of the connection wiring CNE can be improved. In addition, the sheet resistance of the connection wiring CNE can be reduced.

[0137] In addition, if the second portion C2 includes a silver alloy, pure silver may not aggregate. Therefore, preferably, the second portion C2 may include a silver alloy.

[0138] In an embodiment, the ratio of copper in the silver alloy may be equal to or greater than about 0.5 at % and equal to or less than about 1 at %. In an embodiment, the ratio of zinc in the silver alloy may be equal to or greater than about 0.5 at % and equal to or less than about 1 at %.

[0139] When the proportion of copper is less than about 0.5 at %, the sheet resistance of the second portion C2 may increase. In addition, when the proportion of zinc is less than about 0.5 at %, the sheet resistance of the second portion C2 may increase.

[0140] If the proportion of copper exceeds about 1 at%, particles of copper may aggregate together. In addition, when the proportion of zinc exceeds about 1 at%, particles of zinc may aggregate together.

[0141] In an embodiment, the ratio of zinc in the silver alloy and the ratio of copper in the silver alloy may be the same. In another embodiment, the ratio of zinc in the silver alloy and the ratio of copper in the silver alloy may be different from each other.

[0142] In an embodiment, the thickness W2 of the second portion C2 may be equal to or greater than about 40 angstroms and equal to or less than about 60 angstroms. When the thickness W2 of the second portion C2 exceeds about 60 angstroms, light transmittance of the second portion C2 may be reduced.

[0143] When the thickness W2 of the second portion C2 is less than about 40 angstroms, the sheet resistance of the second portion C2 may increase.

[0144] In an embodiment, the third portion C3 may include a transparent conductive oxide. For example, the third portion C3 may include indium tin zinc oxide.

[0145] However, the present disclosure is not limited thereto. For example, the third portion C3 may include indium tin oxide, indium zinc oxide, gallium zinc oxide, or indium gallium zinc oxide, etc. These materials may be used alone or in combination with each other.

[0146] In an embodiment, the third portion C3 may include an amorphous transparent conductive oxide. For example, the third portion C3 may include amorphous indium tin zinc oxide.

[0147] Amorphous transparent conductive oxides (such as amorphous indium tin zinc oxide) can maintain an amorphous state even during heat treatment. Therefore, when the manufacturing process of the display device is performed at a high process temperature, the third portion C3 can maintain an amorphous state.

[0148] Since the third portion C3 may include amorphous indium tin zinc oxide, light transmittance of the connection wiring CNE may be improved. In addition, sheet resistance of the connection wiring CNE may be reduced.

[0149] In an embodiment, the ratio of zinc oxide in the indium tin zinc oxide of the third portion C3 may be equal to or greater than about 10 wt % and equal to or less than about 30 wt %. When the ratio of zinc oxide in the third portion C3 is less than about 10 wt %, the third portion C3 may become crystalline. That is, the third portion C3 may not remain amorphous.

[0150] Light may be incident on the display device. Light incident on the display device may be reflected by an electrode disposed below the connection wiring CNE. Light reflected by the electrode may be incident on the lower surface of the third portion C3. Light incident on the lower surface of the third portion C3 may be divided into first light reflected from the lower surface of the third portion C3 and second light reflected from the upper surface of the third portion C3. The first light and the second light may disappear due to destructive interference.

[0151] When the ratio of zinc oxide in the third portion C3 exceeds about 30 wt %, the refractive index of the third portion C3 may be reduced. In this case, destructive interference may not occur between the first light and the second light. Accordingly, the first light and the second light may not disappear. Accordingly, the first light and the second light may be visually recognized by a user of the display device.

[0152] However, this explains a possible mechanism in which light incident on the display device undergoes destructive interference, and there is another mechanism by which light incident on the display device can achieve destructive interference. Using the latter mechanism, when the proportion of zinc oxide in the third part C3 exceeds about 30wt%, the light incident on the display device may not disappear.

[0153] In an embodiment, the thickness W3 of the third portion C3 may be equal to or greater than about 30 angstroms and equal to or less than about 70 angstroms. When the thickness W3 of the third portion C3 exceeds about 70 angstroms, a difference in cutting dimension loss (CD skew) may occur between the second portion C2 and the third portion C3.

[0154] The third portion C3 may protect the second portion C2 having weak chemical resistance. When the thickness W3 of the third portion C3 is less than about 30 angstroms, the third portion C3 may not be sufficient to protect the second portion C2.

[0155] In an embodiment, the thickness W3 of the third portion C3 and the thickness W1 of the first portion C1 may be the same. In another embodiment, the thickness W3 of the third portion C3 and the thickness W1 of the first portion C1 may be different from each other.

[0156] In an embodiment, the thickness W2 of the second portion C2 may be greater than the thickness W1 of the first portion C1. In another embodiment, the thickness W2 of the second portion C2 and the thickness W1 of the first portion C1 may be the same. In another embodiment, the thickness W2 of the second portion C2 may be less than the thickness W1 of the first portion C1.

[0157] In an embodiment, the thickness W2 of the second portion C2 may be greater than the thickness W3 of the third portion C3. In another embodiment, the thickness W2 of the second portion C2 and the thickness W3 of the third portion C3 may be the same. In another embodiment, the thickness W2 of the second portion C2 may be less than the thickness W3 of the third portion C3.

[0158] The present disclosure can be applied to various display devices. For example, the present disclosure is applicable to various display devices such as display devices for vehicles, ships and aircraft, portable communication devices, display devices for display or information transmission, and medical display devices.

[0159] The foregoing is an explanation of the embodiments and is not to be construed as limiting. Although several embodiments are described, it is readily understood by those skilled in the art that many modifications may be made in the embodiments without substantially departing from the new teachings and advantages of the inventive concept. Accordingly, all such modifications are intended to be included within the scope of the inventive concept as defined in the claims. Therefore, it should be understood that the foregoing is an explanation of various embodiments and is not to be construed as being limited to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the appended claims.

Claims

1. A display device, comprising: A substrate, comprising a main display area, a component area and a non-display area; An auxiliary light-emitting element is disposed in the component area; A driver, arranged in the non-display area; an auxiliary pixel circuit, disposed in the non-display area, the auxiliary pixel circuit comprising an auxiliary transistor; as well as A connecting wiring includes a first portion, a second portion arranged on the first portion, and a third portion arranged on the second portion, wherein the connecting wiring connects the auxiliary light-emitting element and the auxiliary pixel circuit, wherein the first portion includes a transparent conductive oxide, the second portion includes silver or a silver alloy, and the third portion includes a transparent conductive oxide. 2 . The display device of claim 1 , wherein the transparent conductive oxide in the first portion comprises indium tin oxide. 3 . The display device of claim 1 , wherein the transparent conductive oxide in the first portion comprises indium tin zinc oxide. The display device according to claim 3 , wherein the ITO is amorphous. 5 . The display device according to claim 4 , wherein a ratio of zinc oxide in the indium tin zinc oxide is equal to or greater than 10 wt % and equal to or less than 30 wt %. 6 . The display device according to claim 1 , wherein the transparent conductive oxide included in the third portion comprises indium tin oxide. 7 . The display device of claim 1 , wherein the transparent conductive oxide in the third portion comprises indium tin zinc oxide. The display device according to claim 7 , wherein the ITO is amorphous.

9. The display device according to claim 1, wherein the silver alloy includes copper.

10. The display device of claim 9, wherein the silver alloy further comprises zinc.

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