Counting control device and method of universal timer

Abstract

The invention provides a counting control device and method for a universal timer. The counting control device comprises a counting control module, a synchronous control module and multiple types of active registers, the movable register is correspondingly provided with a mirror image register; a target mirror image loading event and a first target control value are pre-configured in the mirror image register, the first target control value is loaded into the movable register when the target mirror image loading event is received, and the movable register outputs a target trigger signal when the real-time count value is equal to the first target control value; the counting control module determines a control result based on the received target trigger signal; the synchronization control module processes the received target trigger signal and / or an externally input synchronization event based on a pre-configured processing logic, outputs a target synchronization output pulse signal and triggers a control result at an expected time point, and a counting mode after synchronization output can be programmed and controlled, so that the multi-device synchronization function is more comprehensive.

Description

Technical Field

[0001] The present application relates to the field of counters, and in particular, to a counting control device and method for a universal timer. Background Art

[0002] The counting control device of a universal timer is the core component for realizing its timing and counting functions. The counting control device can perform phase control and output synchronization signals for phase linkage control with other devices. However, the counting cycle and phase configuration mechanism of the existing counting control device is not safe enough, and may cause changes in the cycle, duty cycle and phase at unexpected time points. Moreover, the counting mode after the synchronous output cannot be programmed and controlled, and the phase synchronization function with other devices is relatively simple. Summary of the invention

[0003] In view of this, the purpose of the present application is to provide a counting control device and method for a universal timer, which can count more flexibly, generate a counter control time according to an event, and accurately control the triggering of the control result at the desired time point, and the counting mode after the synchronous output can be programmably controlled, thereby increasing the flexibility and functionality of the counting control device.

[0004] An embodiment of the present application provides a counting control device for a universal timer, the counting control device comprising: a counting control module, a synchronization control module and multiple types of activity registers; the counting control module comprises a counting register; the activity register is correspondingly provided with a mirror register;

[0005] The counting control module counts to obtain a real-time counting value, and sends the real-time counting value to the activity register;

[0006] The mirror register is pre-configured with a target mirror loading event and a first target control value matching the target mirror loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target mirror loading event;

[0007] The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register;

[0008] The counting control module processes the received target trigger signal to determine a control result for the counting control module;

[0009] The synchronization control module processes the received target trigger signal and / or external input synchronization event based on pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization of a universal timer equipped with the counting control device and a target device.

[0010] In some embodiments, in the counting control device of the universal timer, the activity register pre-stores a basic control value corresponding to a basic control event;

[0011] When the real-time count value received by the activity register is equal to the basic control value, the activity register outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register.

[0012] In some embodiments, in the counting control device of the universal timer, the synchronization control module includes an event editing unit and a synchronization output selection unit;

[0013] The event editing unit processes the received target trigger signal and / or external input synchronization event based on the preconfigured processing logic, and outputs the processed multiple synchronization trigger signals to the synchronization output selection unit;

[0014] The synchronous output selection unit outputs a target synchronous output pulse signal in response to receiving a target synchronous trigger signal that matches a pre-configured selection instruction.

[0015] In some embodiments, in the counting control device of the universal timer, the pre-configured processing logic in the event editing unit is configured based on the following method:

[0016] Analyze the synchronization service requirements between the universal timer installed with the counting control device and the target device, and determine the logical relationship between the register control event and / or the external input synchronization event; the register control event is used to trigger the active register to output the target trigger signal;

[0017] Based on the logical relationship between the register control event and / or the external input synchronization event, the processing logic of the event editing unit is configured.

[0018] In some embodiments, in the counting control device of the universal timer, the counting control device further comprises a first-stage clock frequency division unit and a second-stage clock frequency division unit, and the first-stage clock frequency division unit and the second-stage clock frequency division unit are connected in series;

[0019] The first-level clock division unit processes the clock signal based on a pre-configured first-level division multiple, and outputs the first-level divided clock signal to the second-level clock division module; the second-level clock division unit processes the first-level divided clock signal based on a pre-configured second-level division multiple, and outputs the second-level divided clock signal.

[0020] In some embodiments, in the counting control device of the universal timer, the clock division unit corresponds to a division control unit, and the division control unit controls the first-level division multiple of the first-level clock division unit and the second-level division multiple of the second-level clock division unit to match the register control event in response to receiving a register control event; the register control event is used to trigger the active register to output a target trigger signal.

[0021] In some embodiments, in the counting control device of the universal timer, the mirror register is pre-configured whether to enable the mirror mode. If the mirror register is configured to enable the mirror mode, a target mirror loading event, a first target control value that matches the target mirror loading event, and a target frequency division coefficient of the target mirror loading event are configured so that the mirror register loads the first target control value into the corresponding active register based on the target frequency division coefficient in response to receiving the target mirror loading event.

[0022] In some embodiments, in the counting control device of the universal timer, when the mirror register is configured to enable the mirror mode, the mirror register configures whether to enable the overall loading mode, and if the overall loading mode is enabled, configures the overall loading event of the mirror register, the second target control value of the overall loading event, and the overall loading event frequency division coefficient, so that multiple mirror registers configured with the same overall loading event are overall loaded based on the overall loading event frequency division coefficient;

[0023] The overall loading is that the plurality of mirror registers configured with the same overall loading event respond to the received overall loading event, and the second target control value is loaded into the corresponding active registers at the same time.

[0024] In some embodiments, in the counting control device of the universal timer, after the mirror register is configured to enable the overall loading mode, the mirror register configures whether to enable the single overall loading mode; if the single overall loading mode is enabled, multiple mirror registers configured with the same overall loading event perform a single overall loading.

[0025] In some embodiments, in the counting control device of the universal timer, after the mirror register is configured to enable the overall loading mode, a single loading flag is configured;

[0026] After a single overall load is performed, if the single load flag of the single overall load is not cleared, the mirror register stops responding to the overall load event.

[0027] In some embodiments, in the counting control device of the universal timer, when the mirror register is configured to enable the overall loading mode, the mirror register stops responding to the target mirror loading event.

[0028] In some embodiments, in the counting control device of the universal timer, the types of the active registers include comparison registers, phase registers and period registers.

[0029] In some embodiments, in the counting control device of the universal timer, the target trigger signal output by the comparison register is sent to the synchronization control module;

[0030] The target trigger signal output by the phase register is sent to the counting register of the counting control module to update the initial value of the counting register;

[0031] The target trigger signal output by the period register is sent to the reset end of the counting control module to trigger the reset of the counting cycle.

[0032] In some embodiments, in the counting control device of the universal timer, the target trigger signal output by the phase register is sent to the counting register of the counting control module, and after the initial value of the counting register is updated, the counting control module starts counting from the initial value based on a preconfigured counting mode;

[0033] The counting modes include up counting, down counting, and up-down counting.

[0034] In some embodiments, in the counting control device of the universal timer, the number of mirror registers corresponding to the active register is one or more; when different mirror registers corresponding to the active register are pre-configured with different target mirror loading events.

[0035] In some embodiments, a counting control method of a universal timer is also provided, which is applied to a counting control device, wherein the counting control device comprises: a counting control module, a synchronization control module and multiple types of active registers; the counting control module comprises a counting register; the active register is correspondingly provided with a mirror register; the counting control method comprises:

[0036] The counting control module counts to obtain a real-time counting value, and sends the real-time counting value to the activity register;

[0037] The mirror register is pre-configured with a target mirror loading event and a first target control value matching the target mirror loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target mirror loading event;

[0038] The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register;

[0039] The counting control module processes the received target trigger signal to determine a control result for the counting control module;

[0040] The synchronization control module processes the received target trigger signal and / or external input synchronization event based on pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization of a universal timer equipped with the counting control device and a target device.

[0041] The embodiment of the present application provides a counting control device and method for a universal timer. By configuring mirror registers for various types of active registers, when the mirror register is triggered by an event selected by the mirror register, the value in the mirror register is loaded into the corresponding active register, thereby triggering the change of period, duty cycle and phase at the desired time point; and the counting mode after synchronous output can be programmably controlled, thus increasing the flexibility of the counting control device, enriching the phase synchronization function with other devices, and making the multi-device synchronization function more comprehensive. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 The circuit schematic diagram of the counting control device of the universal timer according to the embodiment of the present application is shown;

[0044] Figure 2 A framework diagram showing the overall loading function of the universal timer according to an embodiment of the present application is shown;

[0045] Figure 3 The basic effect diagram of the implementation output of the counting control device described in the embodiment of the present application is shown;

[0046] Figure 4A flow chart of a counting control method of a universal timer described in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0047] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of explanation and description and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn in real proportion. The flowchart used in this application shows the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowchart can be implemented out of sequence, and the steps without logical context can be reversed in order or implemented simultaneously. In addition, those skilled in the art can add one or more other operations to the flowchart under the guidance of the content of the present application, or remove one or more operations from the flowchart.

[0048] In addition, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0049] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0050] The counting control device of a universal timer is the core component for realizing its timing and counting functions. The counting control device can perform phase control and output synchronization signals for phase linkage control with other devices. However, the counting cycle and phase configuration mechanism of the existing counting control device is not safe enough, and may cause changes in the cycle, duty cycle and phase at unexpected time points. Moreover, the counting mode after the synchronous output cannot be programmed and controlled, and the phase synchronization function with other devices is relatively simple.

[0051] Based on this, an embodiment of the present application provides a counting control device and method for a universal timer. By configuring mirror registers for various types of active registers, when the mirror register is triggered by an event selected by the mirror register, the value in the mirror register is loaded into the corresponding active register, thereby triggering the change of period, duty cycle and phase at the desired time point; and the counting mode after synchronous output can be programmably controlled, thus increasing the flexibility of the counting control device, enriching the phase synchronization function with other devices, and making the multi-device synchronization function more comprehensive.

[0052] Please refer to Figure 1 , Figure 1 FIG. 4 shows a circuit schematic diagram of a counting control device of a universal timer according to an embodiment of the present application; Figure 1 As shown, the counting control device includes: a counting control module, a synchronization control module and multiple types of active registers; the counting control module includes a counting register; the active register is correspondingly provided with a mirror register;

[0053] The counting control module counts to obtain a real-time counting value, and sends the real-time counting value to the activity register;

[0054] The mirror register is pre-configured with a target mirror loading event and a first target control value matching the target mirror loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target mirror loading event;

[0055] The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register;

[0056] The counting control module processes the received target trigger signal to determine a control result for the counting control module;

[0057] The synchronization control module processes the received target trigger signal and / or external input synchronization event based on pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization of a universal timer equipped with the counting control device and a target device.

[0058] Please refer to Figure 1 The types of active registers include comparison registers, phase registers and period registers.

[0059] The period register is used to store the length of the counter period, and the length of the counter period determines how many times the counter needs to count to trigger a period event.

[0060] The periodic event is usually used to reset a counter or trigger some periodic operation.

[0061] The counting register CNTR is used to record the current number of counts. When the count value of CNTR reaches the value of the register control event, a register control event will be triggered, such as a comparison event, a cycle event, a count overflow event, etc.; when the value of CNTR reaches 0, a specific output event will also be triggered.

[0062] The synchronization event, in an electronic circuit, refers to an event that occurs synchronously with a clock signal. For example, the synchronization event may be used to ensure that certain operations occur synchronously with the clock CLK, thereby avoiding timing problems.

[0063] Count overflow: When the value of CNTR exceeds the maximum range that it can represent, a count overflow event will occur. The count overflow event can be used to trigger some error handling or special operations.

[0064] The synchronous output pulse signal is synchronized with the clock CLK and is used to trigger external devices or synchronize operations with other circuits.

[0065] The clock CLK and the clock frequency division module, specifically, the clock CLK is the basic timing signal of the circuit, used to drive the operation of the counter and other state machines; the clock frequency division module is used to reduce the frequency of the clock CLK to a certain required frequency.

[0066] The synchronization switch is used to control whether a synchronization event is input to the clock control module.

[0067] The phase register is used to store information related to the phase of the clock signal, such as a phase offset.

[0068] The comparison registers 1 to n are all used to compare with the value of CNTR. When the value of CNTR is equal to the value of a comparison register, the comparison register outputs a synchronous output event, which can be used to control the synchronization of other devices, trigger interrupts, etc.

[0069] In the embodiment of the present application, the target image loading events in different image registers may be different or the same.

[0070] The counting control device of the universal timer described in the embodiment of the present application is configured with a mirror register. After the target mirror loading event configured in the mirror register occurs, the first target control value of the mirror register will be loaded into the active register, and the control of the actual counter is generated according to the value of the active register. Therefore, the period and phase relationship of the counter can only be changed at a specific time point or when a specific event (i.e., the target mirror loading event) occurs, thereby accurately controlling the counter to be triggered at the desired time point.

[0071] It should be noted that the activity register in the counting control device of the universal timer pre-stores a basic control value corresponding to a basic control event;

[0072] When the real-time count value received by the activity register is equal to the basic control value, the activity register outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register.

[0073] That is to say, for the active register in the embodiment of the present application, the control of the actual counter can first be generated according to the basic control value of the active register, and when a specific event (i.e., the target image loading event) occurs, the value in the image register is loaded into the active register to achieve conditional control of the counter, thereby controlling the counting more flexibly.

[0074] In some optional embodiments, in the counting control device of the universal timer, the number of mirror registers corresponding to the active register is one or more; when different mirror registers corresponding to the active register are pre-configured with different target mirror loading events.

[0075] That is to say, the active register can be loaded with different values ​​by different events when different events occur, so as to realize multiple controls and further increase the flexibility in controlling counting.

[0076] The counting control device of the universal timer described in the embodiment of the present application can enable the mirror function of the register configuration, and the enabling and disabling of the mirror function can be programmably configured; when the mirror function is turned on, after the selected event occurs, the value of the mirror register will be loaded into the active register.

[0077] That is to say, in the counting control device of the universal timer described in the embodiment of the present application, the mirror register is pre-configured whether to enable the mirror mode. If the mirror register is configured to enable the mirror mode, a target mirror loading event, a first target control value that matches the target mirror loading event, and a target division coefficient of the target mirror loading event are configured, so that the mirror register responds to receiving the target mirror loading event and loads the first target control value into the corresponding active register based on the target division coefficient.

[0078] In order to cope with the scenario of changing the configuration at the same time, the counting control device of the universal timer described in the embodiment of the present application realizes the overall loading function.

[0079] Specifically, in the counting control device of the universal timer, when the mirror register is configured to enable the mirror mode, the mirror register configures whether to enable the overall loading mode, and if the overall loading mode is enabled, configures the overall loading event of the mirror register, the second target control value of the overall loading event, and the overall loading event frequency division coefficient, so that multiple mirror registers configured with the same overall loading event are overall loaded based on the overall loading event frequency division coefficient;

[0080] The overall loading is that the plurality of mirror registers configured with the same overall loading event respond to the received overall loading event, and the second target control value is loaded into the corresponding active registers at the same time.

[0081] In this way, the configuration of multiple mirror registers configured with the same overall load event can be changed at the same time.

[0082] The multiple mirror registers configured with the same overall loading event may be partially active registers or all active registers; the partially active registers may all be of the same type, such as all comparison registers, or may be of different types, such as including one or more comparison registers, and also including a phase register and / or a period register.

[0083] In the counting control device of the universal timer described in the embodiment of the present application, when the mirror register is configured to enable the overall loading mode, the mirror register stops responding to the target mirror loading event.

[0084] That is, if the mirror function of an active register is turned on and the overall load function is turned on, no matter how their respective mirror load events are configured, they will not work; the value of the mirror register will only be loaded into the active register when the overall load event is valid.

[0085] In order to be suitable for some special applications, a single overall loading function is implemented in the counting control device of the universal timer described in the embodiment of the present application.

[0086] Specifically, after the mirror register is configured to enable the overall loading mode, the mirror register configures whether to enable the single overall loading mode; if the single overall loading mode is enabled, multiple mirror registers configured with the same overall loading event perform a single overall loading.

[0087] The counting control device of the universal timer described in the embodiment of the present application is characterized in that, when the mirror register is configured to enable the overall loading mode, a single loading flag is configured;

[0088] After a single overall load is performed, if the single load flag of the single overall load is not cleared, the mirror register stops responding to the overall load event.

[0089] That is to say, if the mirror mode is enabled and the overall loading function is enabled, after the single overall loading is enabled, a loading event will not occur again until the single loading flag is cleared.

[0090] Please refer to Figure 2 , Figure 2 A framework diagram showing the overall loading function of the universal timer according to an embodiment of the present application is shown; Figure 2 As shown, the schematic diagram mainly includes 5 steps S201-S205; in the step S201, the basic loading mode or the image loading mode is selected; in the step S202, for the image loading mode, it is determined whether to select the ordinary image loading mode or the overall image loading mode; in the step S203, for the overall image loading mode, it is determined whether to select a single load; for the image recording mode, event 1...event n of the image register is configured,

[0091] In the counting control device of the universal timer described in the embodiment of the present application, the counting control device further includes a first-stage clock frequency division unit and a second-stage clock frequency division unit, and the first-stage clock frequency division unit and the second-stage clock frequency division unit are connected in series;

[0092] The first-level clock division unit processes the clock signal based on a pre-configured first-level division multiple, and outputs the first-level divided clock signal to the second-level clock division module; the second-level clock division unit processes the first-level divided clock signal based on a pre-configured second-level division multiple, and outputs the second-level divided clock signal.

[0093] The clock in the embodiment of the present application is divided into two levels. Each level of frequency division can be controlled programmably, so that the counter can work at a lower frequency, and a lower frequency counting mode can be generated in a specific application.

[0094] The counter uses the divided clock DIVCLK to count.

[0095] In the counting control device of the universal timer described in the embodiment of the present application, the clock division unit corresponds to the division control unit, and the division control unit controls the first-level division multiple of the first-level clock division unit and the second-level division multiple of the second-level clock division unit to match the register control event in response to receiving the register control event; the register control event is used to trigger the active register to output the target trigger signal.

[0096] That is to say, the embodiment of the present application can configure the first-level frequency division multiple of the first-level clock frequency division unit and the second-level frequency division multiple of the second-level clock frequency division unit in real time based on events, thereby accurately synchronizing the device with other devices.

[0097] In the counting control device of the universal timer described in the embodiment of the present application, the types of the active registers include comparison registers, phase registers and period registers.

[0098] The activity register is loaded with the first target control value, and when the received real-time count value is equal to the first target control value, a target trigger signal is output to the count control module or the synchronization control module connected to the activity register.

[0099] Specifically, the target trigger signal output by the comparison register is sent to the synchronization control module;

[0100] The target trigger signal output by the phase register is sent to the counting register of the counting control module to update the initial value of the counting register;

[0101] The target trigger signal output by the period register is sent to the reset end of the counting control module to trigger the reset of the counting cycle.

[0102] The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register. For details, please refer to Figure 3 , Figure 3The basic effect diagram of the implementation output of the counting control device described in the embodiment of the present application is shown; according to the first target control value or basic control value configured in comparison register 1, comparison register 2, comparison register 3...comparison register n, the real-time count value of the counting register is compared with it. Specifically, the counting control module can generate event 1 in which CNTR is equal to comparison register 1 when counting up, CNTR is equal to comparison register, CNTR is equal to comparison register...CNTR is equal to event n of comparison register n; similarly, it can also generate event 1 in which CNTR is equal to comparison register, CNTR is equal to comparison register, CNTR is equal to comparison register...CNTR is equal to event n of comparison register n when counting down; the generated event (i.e., the target trigger signal) is sent to the synchronization control module.

[0103] The target trigger signal output by the cycle register is sent to the reset end of the counting control module to trigger the reset of the counting cycle. Specifically, when the cycle register is configured, if the counting mode is up counting, it starts counting from 0, counts to the cycle, and then starts counting from zero; if it is down counting mode, it starts from 0, the next clock counts to the cycle, and then decreases in sequence. If it is up-down counting mode, it increases from 0 to the cycle, and then decreases to 0.

[0104] The target trigger signal output by the phase register is sent to the counting register of the counting control module, and after the initial value of the counting register is updated, the counting control module starts counting from the initial value based on a pre-configured counting mode;

[0105] The counting modes include up counting, down counting, and up-down counting.

[0106] In the embodiment of the present application, the phase loading event of the phase register is configurable, and can be a synchronous event or a mirror loading event of the phase register. If it is an up-down counting mode, the counting direction after the phase loading can be reconfigured.

[0107] If PHS_DIR is configured to count up, if a phase load event occurs during the up-counting process, the count register value will be loaded with the value of the phase register and count up from this value; if a phase load event occurs during the down-counting process, the count register value will be loaded with the value of the phase register and count up from this value.

[0108] If PHS_DIR is configured for down counting, if a phase load event occurs during the up counting process, the count register value will be loaded with the value of the phase register and count down from this value; if a phase load event occurs during the down counting process, the count register value will be loaded with the value of the phase register and count down from this value.

[0109] The counting control device of the universal timer described in the embodiment of the present application, the synchronization control module includes an event editing unit and a synchronization output selection unit;

[0110] The event editing unit processes the received target trigger signal and / or external input synchronization event based on the preconfigured processing logic, and outputs the processed multiple synchronization trigger signals to the synchronization output selection unit;

[0111] The synchronous output selection unit outputs a target synchronous output pulse signal in response to receiving a target synchronous trigger signal that matches a pre-configured selection instruction.

[0112] The counting control device of the universal timer and the pre-configured processing logic in the event editing unit are configured based on the following method:

[0113] Analyze the synchronization service requirements between the universal timer installed with the counting control device and the target device, and determine the logical relationship between the register control event and / or the external input synchronization event; the register control event is used to trigger the active register to output the target trigger signal;

[0114] Based on the logical relationship between the register control event and / or the external input synchronization event, the processing logic of the event editing unit is configured.

[0115] The event editing unit processes the received target trigger signal and / or external input synchronization event based on the pre-configured processing logic, and outputs the processed multiple synchronization trigger signals to the synchronization output selection unit. Specifically, the multiple synchronization trigger signals can be generated simultaneously or at different times; the processing logic processes the received target trigger signal as a synchronization output event output after the comparison register is triggered.

[0116] The logical relationship between the register control events and / or the external input synchronization events includes the AND, OR, AND and other logics between the register control events; includes the AND, OR, AND and other logics between the external input synchronization events; includes the AND, OR, AND and other logics between the register control events and the external input synchronization events.

[0117] Just as an example, Figure 1 As shown, the logical relationship between the external input synchronization events is "or".

[0118] The synchronous output selection unit outputs a target synchronous output pulse signal in response to receiving a target synchronous trigger signal that matches a pre-configured selection instruction. The target synchronous output pulse signal can be used to synchronize the device with other devices. By selecting the target synchronous trigger signal to output the target synchronous output pulse signal, the flexibility and versatility of the counter control device are increased, which facilitates the coordination with other registers, timers and other devices to realize different events; it is also convenient to realize more complex control by time-sharing, such as controlling scene changes.

[0119] The use process of the counting control device of the universal timer described in the embodiment of the present application is as follows:

[0120] Configure the frequency division multiples of the first-level clock division unit and the second-level clock division unit; configure the counting mode; configure whether the mirror register enables the mirror mode. If enabled, select the mirror loading event and the event frequency division coefficient; if the mirror mode is enabled, configure whether to use the overall loading mode. If enabled, select the overall loading event and the overall loading event frequency division coefficient; if the overall loading mode is enabled, configure whether to use the single loading mode; if the mirror mode of each active register is configured, configure the period register, comparison register, phase register, etc.; configure whether to enable the phase synchronization function.

[0121] It should be noted that, in the embodiment of the present application, the number of comparator registers can be adjusted according to actual needs, and the types and numbers of mirror loading events and synchronous output events can be adjusted according to actual needs.

[0122] Based on the same inventive concept, the embodiment of the present application also provides a counting control method for a universal timer corresponding to the counting control device of the universal timer. Since the principle of solving the problem by the method in the embodiment of the present application is similar to the above-mentioned counting control device in the embodiment of the present application, the implementation of the method can refer to the implementation of the device, and the repeated parts will not be repeated.

[0123] Please refer to Figure 4 , Figure 4 A flow chart of a counting control method of a universal timer according to an embodiment of the present application is shown; the counting control method of the universal timer is applied to a counting control device, the counting control device comprising: a counting control module, a synchronization control module and multiple types of active registers; the counting control module comprises a counting register; the active register is correspondingly provided with a mirror register; the counting control method comprises the following steps S401-S405:

[0124] S401, the counting control module counts to obtain a real-time counting value, and sends the real-time counting value to an activity register;

[0125] S402: The mirror register is pre-configured with a target image loading event and a first target control value matching the target image loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target image loading event;

[0126] S403, the activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register;

[0127] S404, the counting control module processes the received target trigger signal to determine a control result for the counting control module;

[0128] S405. The synchronization control module processes the received target trigger signal and / or external input synchronization event based on the pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization between the universal timer equipped with the counting control device and the target device.

[0129] In some embodiments, in the counting control method of the universal timer, the activity register pre-stores a basic control value corresponding to a basic control event;

[0130] When the real-time count value received by the activity register is equal to the basic control value, the activity register outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register.

[0131] In some embodiments, in the counting control method of the universal timer, the synchronization control module includes an event editing unit and a synchronization output selection unit;

[0132] The event editing unit processes the received target trigger signal and / or external input synchronization event based on the preconfigured processing logic, and outputs the processed multiple synchronization trigger signals to the synchronization output selection unit;

[0133] The synchronous output selection unit outputs a target synchronous output pulse signal in response to receiving a target synchronous trigger signal that matches a pre-configured selection instruction.

[0134] In some embodiments, in the counting control method of the universal timer, the processing logic pre-configured in the event editing unit is configured based on the following method:

[0135] Analyze the synchronization service requirements between the universal timer installed with the counting control device and the target device, and determine the logical relationship between the register control event and / or the external input synchronization event; the register control event is used to trigger the active register to output the target trigger signal;

[0136] Based on the logical relationship between the register control event and / or the external input synchronization event, the processing logic of the event editing unit is configured.

[0137] In some embodiments, in the counting control method of the universal timer, the counting control device further includes a first-stage clock frequency division unit and a second-stage clock frequency division unit, and the first-stage clock frequency division unit and the second-stage clock frequency division unit are connected in series;

[0138] The first-level clock division unit processes the clock signal based on a pre-configured first-level division multiple, and outputs the first-level divided clock signal to the second-level clock division module; the second-level clock division unit processes the first-level divided clock signal based on a pre-configured second-level division multiple, and outputs the second-level divided clock signal.

[0139] In some embodiments, in the counting control method of the universal timer, the clock division unit corresponds to a division control unit, and the division control unit controls the first-level division multiple of the first-level clock division unit and the second-level division multiple of the second-level clock division unit to match the register control event in response to receiving a register control event; the register control event is used to trigger the active register to output a target trigger signal.

[0140] In some embodiments, in the counting control method of the universal timer, the mirror register is pre-configured whether to enable the mirror mode. If the mirror register is configured to enable the mirror mode, a target mirror loading event, a first target control value that matches the target mirror loading event, and a target division coefficient of the target mirror loading event are configured so that the mirror register responds to receiving the target mirror loading event and loads the first target control value into the corresponding active register based on the target division coefficient.

[0141] In some embodiments, in the counting control method of the universal timer, after the mirror register is configured to enable the mirror mode, the mirror register configures whether to enable the overall loading mode, and if the overall loading mode is enabled, configures the overall loading event of the mirror register, the second target control value of the overall loading event, and the overall loading event frequency division coefficient, so that multiple mirror registers configured with the same overall loading event are overall loaded based on the overall loading event frequency division coefficient;

[0142] The overall loading is that the plurality of mirror registers configured with the same overall loading event respond to the received overall loading event, and the second target control value is loaded into the corresponding active registers at the same time.

[0143] In some embodiments, in the counting control method of the universal timer, after the mirror register is configured to enable the overall loading mode, the mirror register configures whether to enable the single overall loading mode; if the single overall loading mode is enabled, multiple mirror registers configured with the same overall loading event perform a single overall loading.

[0144] In some embodiments, in the counting control method of the universal timer, after the mirror register is configured to enable the overall loading mode, a single loading flag is configured;

[0145] After a single overall load is performed, if the single load flag of the single overall load is not cleared, the mirror register stops responding to the overall load event.

[0146] In some embodiments, in the counting control method of the universal timer, after the mirror register is configured to enable the overall loading mode, the mirror register stops responding to the target mirror loading event.

[0147] In some embodiments, in the counting control method of the universal timer, the types of the active registers include comparison registers, phase registers and period registers.

[0148] In some embodiments, in the counting control method of the universal timer, the target trigger signal output by the comparison register is sent to the synchronization control module;

[0149] The target trigger signal output by the phase register is sent to the counting register of the counting control module to update the initial value of the counting register;

[0150] The target trigger signal output by the period register is sent to the reset end of the counting control module to trigger the reset of the counting cycle.

[0151] In some embodiments, in the counting control method of the universal timer, the target trigger signal output by the phase register is sent to the counting register of the counting control module, and after the initial value of the counting register is updated, the counting control module starts counting from the initial value based on a preconfigured counting mode;

[0152] The counting modes include up counting, down counting, and up-down counting.

[0153] In some embodiments, in the counting control method of the universal timer, the number of mirror registers corresponding to the active register is one or more; when different mirror registers corresponding to the active register are pre-configured with different target mirror loading events.

[0154] Those skilled in the art can clearly understand that, for the convenience and simplicity of description, the specific working process of the system and device described above can refer to the corresponding process in the method embodiment, and will not be repeated in this application. In the several embodiments provided in this application, it should be understood that the disclosed system, device and method can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the modules is only a logical function division. There may be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0155] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0156] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0157] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a platform server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard drives, ROM, RAM, magnetic disks, or optical disks.

[0158] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A counting control device for a universal timer, characterized in that: The counting control device comprises: a counting control module, a synchronization control module and multiple types of active registers; the counting control module comprises a counting register; the active register is provided with a mirror register correspondingly; The counting control module counts to obtain a real-time counting value, and sends the real-time counting value to the activity register; The mirror register is pre-configured with a target mirror loading event and a first target control value matching the target mirror loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target mirror loading event; The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register; The counting control module processes the received target trigger signal to determine a control result for the counting control module; The synchronization control module processes the received target trigger signal and / or external input synchronization event based on pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization of a universal timer equipped with the counting control device and a target device.

2. The counting control device of the universal timer according to claim 1, characterized in that: The activity register pre-stores a basic control value corresponding to a basic control event; When the real-time count value received by the activity register is equal to the basic control value, the activity register outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register.

3. The counting control device of a universal timer according to claim 1, characterized in that: The synchronization control module includes an event editing unit and a synchronization output selection unit; The event editing unit processes the received target trigger signal and / or external input synchronization event based on the preconfigured processing logic, and outputs the processed multiple synchronization trigger signals to the synchronization output selection unit; The synchronous output selection unit outputs a target synchronous output pulse signal in response to receiving a target synchronous trigger signal that matches a pre-configured selection instruction.

4. The counting control device of a universal timer according to claim 3, characterized in that: The pre-configured processing logic in the event editing unit is configured based on the following method: Analyzing synchronization service requirements between a universal timer equipped with the counting control device and a target device, and determining a logical relationship between register control events and / or external input synchronization events; The register control event is used to trigger the active register to output a target trigger signal; Based on the logical relationship between the register control event and / or the external input synchronization event, the processing logic of the event editing unit is configured.

5. The counting control device of a universal timer according to claim 1, characterized in that: The counting control device further comprises a first-stage clock frequency division unit and a second-stage clock frequency division unit, wherein the first-stage clock frequency division unit and the second-stage clock frequency division unit are connected in series; The first-level clock division unit processes the clock signal based on a pre-configured first-level division multiple, and outputs the first-level divided clock signal to the second-level clock division module; the second-level clock division unit processes the first-level divided clock signal based on a pre-configured second-level division multiple, and outputs the second-level divided clock signal.

6. The counting control device of a universal timer according to claim 5, characterized in that: The clock division unit corresponds to a division control unit, and the division control unit controls the first-level division multiple of the first-level clock division unit and the second-level division multiple of the second-level clock division unit to match the register control event in response to receiving the register control event; the register control event is used to trigger the active register to output the target trigger signal.

7. The counting control device of a universal timer according to claim 1, characterized in that: The mirror register is pre-configured to determine whether to enable the mirror mode. If the mirror register is configured to enable the mirror mode, a target mirror loading event, a first target control value that matches the target mirror loading event, and a target frequency division coefficient of the target mirror loading event are configured so that the mirror register loads the first target control value into the corresponding active register based on the target frequency division coefficient in response to receiving the target mirror loading event.

8. The counting control device of a universal timer according to claim 7, characterized in that: When the mirror register is configured to enable the mirror mode, the mirror register configures whether to enable the overall loading mode, and if the overall loading mode is enabled, configures the overall loading event of the mirror register, the second target control value of the overall loading event, and the overall loading event frequency division coefficient, so that multiple mirror registers configured with the same overall loading event are overall loaded based on the overall loading event frequency division coefficient; The overall loading is that the plurality of mirror registers configured with the same overall loading event respond to the received overall loading event, and the second target control value is loaded into the corresponding active registers at the same time.

9. The counting control device of a universal timer according to claim 8, characterized in that: After the mirror register is configured to enable the overall loading mode, the mirror register configures whether to enable the single overall loading mode; if the single overall loading mode is enabled, multiple mirror registers configured with the same overall loading event perform a single overall loading.

10. The counting control device of a universal timer according to claim 8, characterized in that: After the mirror register is configured to enable the overall loading mode, a single loading flag is configured; After a single overall load is performed, if the single load flag of the single overall load is not cleared, the mirror register stops responding to the overall load event.

11. The counting control device of a universal timer according to claim 8 or 9, characterized in that: When the mirror register is configured to enable the overall loading mode, the mirror register stops responding to the target mirror loading event.

12. The counting control device of a universal timer according to claim 1, characterized in that: The types of active registers include compare registers, phase registers and period registers.

13. The counting control device of a universal timer according to claim 11, characterized in that: The target trigger signal output by the comparison register is sent to the synchronization control module; The target trigger signal output by the phase register is sent to the counting register of the counting control module to update the initial value of the counting register; The target trigger signal output by the period register is sent to the reset end of the counting control module to trigger the reset of the counting cycle.

14. The counting control device of a universal timer according to claim 13, characterized in that: The target trigger signal output by the phase register is sent to the counting register of the counting control module, and after the initial value of the counting register is updated, the counting control module starts counting from the initial value based on a pre-configured counting mode; The counting modes include up counting, down counting, and up-down counting.

15. The counting control device of a universal timer according to claim 1, characterized in that: The number of mirror registers corresponding to the active register is one or more; when different mirror registers corresponding to the active register are pre-configured with different target mirror loading events.

16. A counting control method for a universal timer, characterized in that: Applied to a counting control device, the counting control device comprises: a counting control module, a synchronization control module and multiple types of active registers; the counting control module comprises a counting register; the active register is correspondingly provided with a mirror register; the counting control method comprises: The counting control module counts to obtain a real-time counting value, and sends the real-time counting value to the activity register; The mirror register is pre-configured with a target mirror loading event and a first target control value matching the target mirror loading event, and the mirror register loads the first target control value into a corresponding active register in response to receiving the target mirror loading event; The activity register loads the first target control value, and when the received real-time count value is equal to the first target control value, outputs a target trigger signal to the count control module or the synchronization control module connected to the activity register; The counting control module processes the received target trigger signal to determine a control result for the counting control module; The synchronization control module processes the received target trigger signal and / or external input synchronization event based on pre-configured processing logic, and outputs a target synchronization output pulse signal; the synchronization output pulse signal is used to control the synchronization of a universal timer equipped with the counting control device and a target device.

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