High-inhibition high-isolation frequency conversion amplification multifunctional chip

Abstract

The invention discloses a high-suppression high-isolation frequency conversion amplification multifunctional chip, which belongs to the technical field of integrated circuits and comprises a radio frequency amplification filter network, a high-suppression frequency conversion network and a high-isolation intermediate frequency network which are connected in sequence. According to the high-suppression high-isolation variable-frequency amplification multifunctional chip, the amplification and filtering functions of radio-frequency signals are jointly realized by adopting the two-stage cascode self-bias amplification unit and the high-suppression filtering unit through the radio-frequency amplification and filtering network; according to the frequency conversion network, a passive high-suppression-degree orthogonal frequency conversion unit is combined with a local oscillation amplification unit to jointly achieve the amplification and frequency conversion functions of a local oscillation signal, and a local oscillation amplification part is achieved through a first-stage cascode self-bias amplification unit and a first-stage cascode self-bias amplification unit. The high-isolation intermediate-frequency network comprises two intermediate-frequency filtering matching units. The invention has the advantages of low power consumption, high frequency conversion gain, high signal isolation and suppression degree, high integration level and the like.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuit design, and in particular relates to a high-inhibition and high-isolation frequency conversion amplification multifunctional chip. Background Art

[0002] The orthogonal mixer is a key component in monolithic microwave integrated circuits and is frequently used in RF receiving and transmitting systems. With the rapid development of microwave and millimeter wave technology, the demand for monolithic integrated broadband orthogonal mixers in microwave communication, navigation, guidance, satellite communication, military electronic warfare and radar is increasing, and the requirements for its performance and functional integration are also increasing. By integrating orthogonal mixers, filters, RF and intermediate frequency amplifiers, etc. inside the chip through design, a typical frequency conversion multifunctional chip is obtained. This design scheme is conducive to the miniaturization and integration of communication systems, so it has good and broad application prospects, but it also puts forward high design requirements for the performance of frequency conversion amplifier multifunctional chips in terms of low power consumption, low noise, high frequency conversion gain, high port isolation, high suppression and high integration. Summary of the invention

[0003] In view of the above-mentioned deficiencies in the prior art, the high-inhibition and high-isolation frequency conversion amplification multifunctional chip provided by the present invention has the advantages of low power consumption, high frequency conversion gain, high signal isolation and suppression, and high integration.

[0004] In order to achieve the above-mentioned invention object, the technical solution adopted by the present invention is: a high-inhibition and high-isolation frequency conversion amplifier multifunctional chip, including a radio frequency amplification filter network, a high-inhibition frequency conversion network and a high-isolation intermediate frequency network; The input end of the RF amplification and filtering network serves as the RF input end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip, the output end of the RF amplification and filtering network is connected to the input end of the high-inhibition frequency conversion network, the first output end of the high-inhibition frequency conversion network is connected to the first input end of the high-isolation intermediate frequency network, the second output end of the high-inhibition frequency conversion network is connected to the second input end of the high-isolation intermediate frequency network, the first output end and the second output end of the high-isolation intermediate frequency network serve as the first intermediate frequency output end and the second intermediate frequency output end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip respectively; The high suppression frequency conversion network is also provided with a local oscillator input terminal.

[0005] The beneficial effects of the present invention are: The high-inhibition and high-isolation frequency conversion amplification multifunctional chip of the present invention realizes the amplification and filtering function of the radio frequency signal by using a two-stage common source and common gate self-biased amplification unit and a high-inhibition filtering unit through a radio frequency amplification and filtering network; the frequency conversion network uses a passive high-inhibition orthogonal frequency conversion unit combined with a local oscillator amplification unit to realize the amplification and frequency conversion function of the local oscillator signal, and the local oscillator amplification part is realized by a first-stage common source and a first-stage common source and common gate self-biased amplification unit; the high-isolation intermediate frequency network includes two filtering and matching units. The present invention has the advantages of low power consumption, high frequency conversion gain, high signal isolation and suppression, and high integration.

[0006] Further, the radio frequency amplification and filtering network includes a microstrip line ML1; One end of the microstrip line ML1 serves as the input end of the radio frequency amplification and filtering network and is connected to the grounding inductor L1. The other end of the microstrip line ML1 is connected to one end of the microstrip line ML2 through the capacitor C1. The other end of the microstrip line ML2 is connected to the gate of the field effect transistor M1. The source of the field effect transistor M1 is connected to one end of the microstrip line ML32. The other end of the microstrip line ML32 is connected to the grounding resistor R1 and the grounding capacitor C2 respectively. The drain of the field effect transistor M1 is connected to one end of the microstrip line ML4, the other end of the microstrip line ML4 is connected to the source of the field effect transistor M2, the gate of the field effect transistor M2 is connected to one end of the resistor R2, the other end of the resistor R2 is respectively connected to the grounding capacitor C3 and one end of the resistor R3, the other end of the resistor R3 is respectively connected to the grounding resistor R4 and one end of the resistor R5, the drain of the field effect transistor M2 is connected to one end of the microstrip line ML5, the other end of the microstrip line ML5 is respectively connected to one end of the inductor L2 and one end of the microstrip line ML6, the other end of the inductor L2 is respectively connected to the other end of the resistor R5, the grounding capacitor C4, one end of the resistor R6 and the drain power supply voltage VD1, and the other end of the resistor R6 is connected to the grounding capacitor C5; The other end of the microstrip line ML6 is connected to one end of the capacitor C6, the other end of the capacitor C6 is respectively connected to the grounding inductor L3 and one end of the microstrip line ML7, the other end of the microstrip line ML7 is connected to the gate of the field effect transistor M3, the source of the field effect transistor M3 is connected to one end of the microstrip line ML8, and the other end of the microstrip line ML8 is respectively connected to the grounding capacitor C7 and the grounding resistor R7; The drain of the field effect transistor M3 is connected to one end of the microstrip line ML9, the other end of the microstrip line ML9 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M4 is connected to one end of the resistor R8, the other end of the resistor R8 is respectively connected to the grounding capacitor C8 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to the grounding resistor R10 and one end of the resistor R11, the drain of the field effect transistor M4 is connected to one end of the microstrip line ML10, the other end of the microstrip line ML10 is respectively connected to one end of the inductor L4 and one end of the microstrip line ML11, the other end of the inductor L4 is respectively connected to the other end of the resistor R11, the grounding capacitor C9, one end of the resistor R12 and the drain power supply voltage VD1, and the other end of the resistor R12 is connected to the grounding capacitor C10; The other end of the microstrip line ML11 is respectively connected to one end of the grounded capacitor C11 and the capacitor C12, the other end of the capacitor C12 is connected to one end of the microstrip line ML12, the other end of the microstrip line ML12 is respectively connected to the grounded inductor L5, the grounded capacitor C13, one end of the inductor L6, one end of the inductor L7 and one end of the capacitor C16, the other end of the inductor L6 is connected to one end of the capacitor C15, the other end of the capacitor C15 is respectively connected to the other end of the inductor L7, the other end of the capacitor C16, the grounded inductor L8 and the grounded capacitor C14, and serves as the output end of the RF amplification and filtering network.

[0007] The beneficial effects of the above further scheme are: The input end of the present invention adopts a radio frequency amplification and filtering network to achieve low-noise amplification and out-of-band suppression of radio frequency signals. The radio frequency amplification and filtering network includes an amplification unit and a filtering unit, wherein the amplification unit adopts a two-stage common source and common gate amplification combined with a self-biased structure, which can effectively reduce power consumption while obtaining the characteristics of low noise, high gain and medium power output. The VD1 drain power supply filter part adopts a parallel C to ground and a series RC to ground circuit, which mainly suppresses the low-frequency and high-frequency self-excited unstable signals of the power supply. The filtering unit adopts a three-stage elliptic function bandpass structure, which has the characteristics of low insertion loss and high out-of-band suppression, and suppresses intermediate frequency signals, local oscillator signals and out-of-band clutter. The radio frequency input end adopts a low-pass structure with a parallel inductor to ground, which can effectively improve the ESD protection capability of the port while matching the impedance.

[0008] Further, the high suppression frequency conversion network includes a microstrip line ML13; One end of the microstrip line ML13 is connected to one end of the microstrip line ML14 and serves as the input end of the high suppression frequency conversion network. The other end of the microstrip line ML13 is respectively connected to one end of the grounded capacitor C17 and the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L9. The other end of the inductor L9 is connected to the first input end of the balun balun1. The second input end of the balun balun1 is grounded to the grounded capacitor C19. The first unbalanced end of the balun balun1 is connected to the grounded capacitor C20. The second unbalanced end of the balun balun1 serves as the first output end of the high suppression frequency conversion network. The first output end of the balun balun1 is respectively connected to the positive electrode of the diode D2 and the negative electrode of the diode D1. The second output end of the balun balun1 is connected to the cathode of the diode D3 and the anode of the diode D4 respectively, the anode of the diode D1 is connected to the cathode of the diode D4 and the first input end of the balun balun2 respectively, the cathode of the diode D2 is connected to the anode of the diode D3 and the second input end of the balun balun2 respectively, the unbalanced end of the balun balun2 is connected to the grounding capacitor C22, the first output end of the balun balun2 is connected to the grounding capacitor C22, the second output end of the balun balun2 is connected to one end of the microstrip line ML15, the other end of the microstrip line ML15 is connected to the first input end of the 90° coupler, and the first output end of the 90° coupler is connected to the grounding resistor R13; The other end of the microstrip line ML14 is respectively connected to one end of the grounded capacitor C23 and the capacitor C24, the other end of the capacitor C24 is connected to one end of the inductor L10, the other end of the inductor L10 is connected to the first input end of the balun balun3, the second input end of the balun balun3 is connected to the grounded capacitor C25, the first unbalanced end of the balun balun3 is connected to the grounded capacitor C26, the second unbalanced end of the balun balun3 serves as the second output end of the high suppression frequency conversion network, the first output end of the balun balun3 is respectively connected to the positive electrode of the diode D7 and the negative electrode of the diode D8, the second output end of the balun balun3 is respectively connected to the two The cathode of the diode D6 is connected to the anode of the diode D5, the cathode of the diode D7 is respectively connected to the anode of the diode D6 and the first input end of the balun balun4, the anode of the diode D8 is respectively connected to the cathode of the diode D5 and the second input end of the balun balun4, the unbalanced end of the balun balun4 is connected to the grounded capacitor C27, the first output end of the balun balun4 is connected to the grounded capacitor C28, the second output end of the balun balun4 is connected to one end of the microstrip line ML16, the other end of the microstrip line ML16 is connected to the second input end of the 90° coupler, and the second output end of the 90° coupler is connected to one end of the microstrip line ML17; The other end of the microstrip line ML17 is connected to one end of the capacitor C39, the other end of the capacitor C39 is respectively connected to the grounded capacitor C38 and one end of the microstrip line ML18, the other end of the microstrip line ML18 is respectively connected to one end of the inductor L14 and one end of the microstrip line ML19, the other end of the inductor L14 is respectively connected to one end of the resistor R18, the grounded capacitor C36, one end of the resistor R19 and the drain power supply voltage VD2, the other end of the resistor R19 is connected to the grounded capacitor C37, the other end of the resistor R18 is respectively connected to the grounded resistor R20 and one end of the resistor R21, the other end of the resistor R21 is respectively connected to the grounded capacitor C35 and one end of the resistor R17, the other end of the resistor R17 is connected to the gate of the field effect transistor M7, the drain of the field effect transistor M7 is connected to the other end of the microstrip line ML19, and the source of the field effect transistor M7 is connected to one end of the microstrip line ML20; The other end of the microstrip line ML20 is connected to the drain of the field effect transistor M6, the source of the field effect transistor M6 is connected to one end of the microstrip line ML21, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the gate of the field effect transistor M6 is connected to one end of the microstrip line ML22, the other end of the microstrip line ML22 is respectively connected to one end of the grounding inductor L13 and the capacitor C33, the other end of the capacitor C33 is respectively connected to one end of the microstrip line ML23, the other end of the microstrip line ML23 is respectively connected to one end of the inductor L12 and the microstrip line ML24, the other end of the inductor L12 ... other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected The capacitor C31 and one end of the resistor R15 are connected to the drain power supply voltage VD2, the other end of the resistor R15 is connected to the grounded capacitor C32, the other end of the microstrip line ML24 is connected to the drain of the field effect transistor M5, the source of the field effect transistor M5 is connected to one end of the microstrip line ML25, the other end of the microstrip line ML25 is respectively connected to the grounded resistor R14 and the grounded capacitor C30, the gate of the field effect transistor M5 is connected to one end of the microstrip line ML26, the other end of the microstrip line ML26 is connected to one end of the capacitor C29, the other end of the capacitor C29 is connected to the grounded inductor L11, and serves as the local oscillator input end of the high suppression frequency conversion network.

[0009] The beneficial effects of the above further scheme are: The mixing part of the high-suppression frequency conversion network of the present invention adopts a passive orthogonal mixing structure, which includes a power divider at the RF end, a 90° coupler at the local oscillator end, and two balanced mixing units, outputting two intermediate frequency signals with the same amplitude and orthogonal phase, and having the characteristics of high image suppression, moderate insertion loss, good port isolation and linearity. The local oscillator amplifier part adopts a common source + common source and common gate combined with a self-biased structure to achieve signal amplification and impedance matching. This structure has the characteristics of low power consumption, high gain and medium driving power; the VD2 drain power supply filter part adopts a parallel C to ground and a series RC to ground circuit, which mainly realizes the suppression of low-frequency and high-frequency self-excited unstable signals of the power supply. The local oscillator input end adopts a low-pass structure with a parallel inductor to ground, which can effectively improve the ESD protection capability of the port while matching the impedance.

[0010] Furthermore, the high isolation intermediate frequency filter network includes microstrip line ML27 and microstrip line ML30; One end of the microstrip line ML27 serves as a first input end of the high-isolation intermediate-frequency filter network, the other end of the microstrip line ML27 is respectively connected to the grounded inductor L15, the grounded capacitor C44, one end of the capacitor C46, ​​one end of the inductor L17 and one end of the inductor L18, the other end of the inductor L18 is connected to one end of the capacitor C47, the other end of the capacitor C47 is respectively connected to the other end of the inductor L17, the other end of the capacitor C46, ​​the grounded inductor L16, the grounded capacitor C45 and one end of the microstrip line ML28, the other end of the microstrip line ML28 serves as a first output end of the high-isolation intermediate-frequency filter network; One end of the microstrip line ML30 serves as the second input end of the high-isolation intermediate frequency filter network, the other end of the microstrip line ML30 is respectively connected to the grounded inductor L19, the grounded capacitor C40, one end of the capacitor C42, one end of the inductor L21 and one end of the inductor L22, the other end of the inductor L22 is connected to one end of the capacitor C43, the other end of the capacitor C43 is respectively connected to the other end of the inductor L21, the other end of the capacitor C42, the grounded inductor L20, the grounded capacitor C41 and one end of the microstrip line ML31, and the other end of the microstrip line ML31 serves as the second output end of the high-isolation intermediate frequency filter network.

[0011] The beneficial effects of the above further scheme are: The high isolation intermediate frequency network of the present invention includes two identical filter matching units. Both filter units adopt a third-order elliptic function bandpass filter structure to achieve low insertion loss and high out-of-band suppression characteristics, thereby improving the out-of-band suppression of the intermediate frequency signal and the isolation between the intermediate frequency signal and the radio frequency signal and the local oscillator signal. The two intermediate frequency signals IF1 / IF2 with the same amplitude and orthogonal phase can be synthesized and output through an external 90° bridge coupler, and have good image suppression characteristics. The filter unit has good impedance matching characteristics, and there is a parallel inductance to ground path at the intermediate frequency output end IF1 / IF2, which can effectively improve the ESD protection capability of the port while matching the impedance. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a structural block diagram of the high-inhibition, high-isolation, variable-frequency amplification multifunctional chip provided by the present invention.

[0013] Figure 2 This is a schematic diagram of the radio frequency amplification and filtering network circuit provided by the present invention.

[0014] Figure 3 This is a schematic diagram of the high suppression frequency conversion network circuit provided by the present invention.

[0015] Figure 4 This is a schematic diagram of the high-isolation intermediate frequency filter network circuit provided by the present invention. DETAILED DESCRIPTION

[0016] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0017] The embodiment of the present invention provides a high-inhibition high-isolation frequency conversion amplification multifunctional chip, such as Figure 1 As shown, it includes a radio frequency amplification and filtering network, a high suppression frequency conversion network, and a high isolation intermediate frequency network; The input end of the RF amplification and filtering network serves as the RF input end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip, the output end of the RF amplification and filtering network is connected to the input end of the high-inhibition frequency conversion network, the first output end of the high-inhibition frequency conversion network is connected to the first input end of the high-isolation intermediate frequency network, the second output end of the high-inhibition frequency conversion network is connected to the second input end of the high-isolation intermediate frequency network, the first output end and the second output end of the high-isolation intermediate frequency network serve as the first intermediate frequency output end and the second intermediate frequency output end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip respectively; A local oscillator input terminal is also provided in the high suppression frequency conversion network.

[0018] like Figure 2 As shown, the radio frequency amplification and filtering network in this embodiment includes a microstrip line ML1; One end of the microstrip line ML1 serves as the input end (RF end) of the radio frequency amplification and filtering network and is connected to the grounding inductor L1. The other end of the microstrip line ML1 is connected to one end of the microstrip line ML2 through the capacitor C1. The other end of the microstrip line ML2 is connected to the gate of the field effect transistor M1. The source of the field effect transistor M1 is connected to one end of the microstrip line ML32. The other end of the microstrip line MLM32 is connected to the grounding resistor R1 and the grounding capacitor C2 respectively. The drain of the field effect transistor M1 is connected to one end of the microstrip line ML4, the other end of the microstrip line ML4 is connected to the source of the field effect transistor M2, the gate of the field effect transistor M2 is connected to one end of the resistor R2, the other end of the resistor R2 is respectively connected to the grounded capacitor C3 and one end of the resistor R3, the other end of the resistor R3 is respectively connected to the grounded resistor R4 and one end of the resistor R5, the drain of the field effect transistor M2 is connected to one end of the microstrip line ML5, the other end of the microstrip line ML5 is respectively connected to one end of the inductor L2 and one end of the microstrip line ML6, the other end of the inductor L2 is respectively connected to the other end of the resistor R5, the grounded capacitor C4, one end of the resistor R6 and the drain power supply voltage VD1, and the other end of the resistor R6 is connected to the grounded capacitor C5; The other end of the microstrip line ML6 is connected to one end of the capacitor C6, the other end of the capacitor C6 is respectively connected to the grounding inductor L3 and one end of the microstrip line ML7, the other end of the microstrip line ML7 is connected to the gate of the field effect transistor M3, the source of the field effect transistor M3 is connected to one end of the microstrip line ML8, and the other end of the microstrip line ML8 is respectively connected to the grounding capacitor C7 and the grounding resistor R7; The drain of the field effect transistor M3 is connected to one end of the microstrip line ML9, the other end of the microstrip line ML9 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M4 is connected to one end of the resistor R8, the other end of the resistor R8 is respectively connected to the grounded capacitor C8 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to the grounded resistor R10 and one end of the resistor R11, the drain of the field effect transistor M4 is connected to one end of the microstrip line ML10, the other end of the microstrip line ML10 is respectively connected to one end of the inductor L4 and one end of the microstrip line ML11, the other end of the inductor L4 is respectively connected to the other end of the resistor R11, the grounded capacitor C9, one end of the resistor R12 and the drain power supply voltage VD1, and the other end of the resistor R12 is connected to the grounded capacitor C10; The other end of the microstrip line ML11 is respectively connected to one end of the grounded capacitor C11 and the capacitor C12, the other end of the capacitor C12 is connected to one end of the microstrip line ML12, the other end of the microstrip line ML12 is respectively connected to the grounded inductor L5, the grounded capacitor C13, one end of the inductor L6, one end of the inductor L7 and one end of the capacitor C16, the other end of the inductor L6 is connected to one end of the capacitor C15, the other end of the capacitor C15 is respectively connected to the other end of the inductor L7, the other end of the capacitor C16, the grounded inductor L8 and the grounded capacitor C14, and serves as the output end (end A) of the RF amplification and filtering network.

[0019] like Figure 3 As shown, the high suppression frequency conversion network in this embodiment includes a microstrip line ML13; One end of the microstrip line ML13 is connected to one end of the microstrip line ML14 and serves as the input end (end A1) of the high suppression frequency conversion network. The other end of the microstrip line ML13 is respectively connected to one end of the grounded capacitor C17 and the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L9. The other end of the inductor L9 is connected to the first input end of the balun balun 1. The second input end of the balun balun 1 is grounded to the grounded capacitor C19. The first unbalanced end of the balun balun 1 is connected to the grounded capacitor C20. The second unbalanced end of the balun balun 1 serves as the first output end (end B) of the high suppression frequency conversion network. The first output end of the balun balun 1 is respectively connected to the anode of the diode D2 and the cathode of the diode D1. The cathode of the balun balun 1 is connected to the cathode of the diode D3 and the anode of the diode D4 respectively, the anode of the diode D1 is connected to the cathode of the diode D4 and the first input of the balun balun 2 respectively, the cathode of the diode D2 is connected to the anode of the diode D3 and the second input of the balun balun 2 respectively, the unbalanced end of the balun balun 2 is connected to the grounded capacitor C22, the first output end of the balun balun 2 is connected to the grounded capacitor C22, the second output end of the balun balun 2 is connected to one end of the microstrip line ML15, the other end of the microstrip line ML15 is connected to the first input of the 90° coupler, and the first output end of the 90° coupler is connected to the grounded resistor R13; The other end of the microstrip line ML14 is connected to one end of the grounded capacitor C23 and the capacitor C24 respectively, the other end of the capacitor C24 is connected to one end of the inductor L10, the other end of the inductor L10 is connected to the first input end of the balun balun3, the second input end of the balun balun3 is connected to the grounded capacitor C25, the first unbalanced end of the balun balun3 is connected to the grounded capacitor C26, the second unbalanced end of the balun balun3 serves as the second output end (end C) of the high suppression frequency conversion network, the first output end of the balun balun3 is connected to the anode of the diode D7 and the cathode of the diode D8 respectively, and the second output end of the balun balun3 is connected to the two The cathode of the diode D6 is connected to the anode of the diode D5, the cathode of the diode D7 is connected to the anode of the diode D6 and the first input terminal of the balun balun4 respectively, the anode of the diode D8 is connected to the cathode of the diode D5 and the second input terminal of the balun balun4 respectively, the unbalanced terminal of the balun balun4 is connected to the grounded capacitor C27, the first output terminal of the balun balun4 is connected to the grounded capacitor C28, the second output terminal of the balun balun4 is connected to one end of the microstrip line ML16, the other end of the microstrip line ML16 is connected to the second input terminal of the 90° coupler, and the second output terminal of the 90° coupler is connected to one end of the microstrip line ML17; The other end of the microstrip line ML17 is connected to one end of the capacitor C39, the other end of the capacitor C39 is respectively connected to the grounded capacitor C38 and one end of the microstrip line ML18, the other end of the microstrip line ML18 is respectively connected to one end of the inductor L14 and one end of the microstrip line ML19, the other end of the inductor L14 is respectively connected to one end of the resistor R18, the grounded capacitor C36, one end of the resistor R19 and the drain power supply voltage VD2, the other end of the resistor R19 is connected to the grounded capacitor C37, the other end of the resistor R18 is respectively connected to the grounded resistor R20 and one end of the resistor R21, the other end of the resistor R21 is respectively connected to the grounded capacitor C35 and one end of the resistor R17, the other end of the resistor R17 is connected to the gate of the field effect transistor M7, the drain of the field effect transistor M7 is connected to the other end of the microstrip line ML19, and the source of the field effect transistor M7 is connected to one end of the microstrip line ML20; The other end of the microstrip line ML20 is connected to the drain of the field effect transistor M6, the source of the field effect transistor M6 is connected to one end of the microstrip line ML21, the other end of the microstrip line ML21 is connected to the grounding resistor R16 and the grounding capacitor C34 respectively, the gate of the field effect transistor M6 is connected to one end of the microstrip line ML22, the other end of the microstrip line ML22 is connected to one end of the grounding inductor L13 and the capacitor C33 respectively, the other end of the capacitor C33 is connected to one end of the microstrip line ML23 respectively, the other end of the microstrip line ML23 is connected to one end of the inductor L12 and the microstrip line ML24 respectively, the other end of the inductor L12 is connected to the grounding resistor R16 and the grounding capacitor C34 respectively. Capacitor C31 and one end of resistor R15 are connected to the drain power supply voltage VD2, the other end of resistor R15 is connected to grounded capacitor C32, the other end of microstrip line ML24 is connected to the drain of field effect transistor M5, the source of field effect transistor M5 is connected to one end of microstrip line ML25, the other end of microstrip line ML25 is respectively connected to grounded resistor R14 and grounded capacitor C30, the gate of field effect transistor M5 is connected to one end of microstrip line ML26, the other end of microstrip line ML26 is connected to one end of capacitor C29, the other end of capacitor C29 is connected to grounded inductor L11, and serves as the local oscillator input end of the high suppression frequency conversion network.

[0020] like Figure 4 As shown, the high isolation intermediate frequency filter network in this embodiment includes microstrip line ML27 and microstrip line ML30; One end of the microstrip line ML27 serves as the first input end (B1 end) of the high-isolation intermediate frequency filter network, the other end of the microstrip line ML27 is respectively connected to the grounded inductor L15, the grounded capacitor C44, one end of the capacitor C46, ​​one end of the inductor L17 and one end of the inductor L18, the other end of the inductor L18 is connected to one end of the capacitor C47, the other end of the capacitor C47 is respectively connected to the other end of the inductor L17, the other end of the capacitor C46, ​​the grounded inductor L16, the grounded capacitor C45 and one end of the microstrip line ML28, the other end of the microstrip line ML28 serves as the first output end (IF1 end) of the high-isolation intermediate frequency filter network; One end of the microstrip line ML30 serves as the second input end (end C1) of the high-isolation intermediate frequency filter network, the other end of the microstrip line ML30 is respectively connected to the grounded inductor L19, the grounded capacitor C40, one end of the capacitor C42, one end of the inductor L21 and one end of the inductor L22, the other end of the inductor L22 is connected to one end of the capacitor C43, the other end of the capacitor C43 is respectively connected to the other end of the inductor L21, the other end of the capacitor C42, the grounded inductor L20, the grounded capacitor C41 and one end of the microstrip line ML31, the other end of the microstrip line ML31 serves as the second output end (end IF2) of the high-isolation intermediate frequency filter network.

[0021] Combine the following Figure 2-Figure 4The specific working principle and process of the present invention are introduced: In the present invention, the RF input signal enters the RF amplification and filtering network through the RF input end, performs low-noise amplification of the signal through the two-stage common source and common gate amplification unit, and then enters the RF end of the frequency conversion network after performing out-of-band suppression of the signal through the filtering unit; the local oscillator input signal enters the frequency conversion network through the local oscillator input end, and realizes the amplification of the local oscillator signal through the common source + common source and common gate amplification unit; the RF and local oscillator signals are down-converted through the frequency conversion network to generate two intermediate frequency signals IF1 and IF2 with the same amplitude and orthogonal phase, and enter the intermediate frequency network at the same time, and the local oscillator and RF leakage signals and clutter signals are filtered through the filtering unit and then sent to the intermediate frequency output end, and the two intermediate frequency signals IF1 / IF2 with the same amplitude and orthogonal phase can be synthesized and output through an external 90° bridge coupler, and have good image suppression characteristics, realizing the down-conversion working mode. The present invention has the advantages of low power consumption, high frequency conversion gain, high signal isolation and suppression, and high integration.

[0022] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0023] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. A high-inhibition and high-isolation frequency conversion amplifier multifunctional chip, characterized in that: Including RF amplification and filtering network, high suppression frequency conversion network and high isolation intermediate frequency network; The input end of the RF amplification and filtering network serves as the RF input end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip, the output end of the RF amplification and filtering network is connected to the input end of the high-inhibition frequency conversion network, the first output end of the high-inhibition frequency conversion network is connected to the first input end of the high-isolation intermediate frequency network, the second output end of the high-inhibition frequency conversion network is connected to the second input end of the high-isolation intermediate frequency network, the first output end and the second output end of the high-isolation intermediate frequency network serve as the first intermediate frequency output end and the second intermediate frequency output end of the high-inhibition and high-isolation frequency conversion amplification multifunctional chip respectively; The high suppression frequency conversion network is also provided with a local oscillator input terminal.

2. The high-inhibition and high-isolation variable frequency amplification multifunctional chip according to claim 1, characterized in that: The radio frequency amplification and filtering network comprises a microstrip line ML1; One end of the microstrip line ML1 serves as the input end of the radio frequency amplification and filtering network and is connected to the grounding inductor L1. The other end of the microstrip line ML1 is connected to one end of the microstrip line ML2 through the capacitor C1. The other end of the microstrip line ML2 is connected to the gate of the field effect transistor M1. The source of the field effect transistor M1 is connected to one end of the microstrip line ML32. The other end of the microstrip line ML32 is connected to the grounding resistor R1 and the grounding capacitor C2 respectively. The drain of the field effect transistor M1 is connected to one end of the microstrip line ML4, the other end of the microstrip line ML4 is connected to the source of the field effect transistor M2, the gate of the field effect transistor M2 is connected to one end of the resistor R2, the other end of the resistor R2 is respectively connected to the grounding capacitor C3 and one end of the resistor R3, the other end of the resistor R3 is respectively connected to the grounding resistor R4 and one end of the resistor R5, the drain of the field effect transistor M2 is connected to one end of the microstrip line ML5, the other end of the microstrip line ML5 is respectively connected to one end of the inductor L2 and one end of the microstrip line ML6, the other end of the inductor L2 is respectively connected to the other end of the resistor R5, the grounding capacitor C4, one end of the resistor R6 and the drain power supply voltage VD1, and the other end of the resistor R6 is connected to the grounding capacitor C5; The other end of the microstrip line ML6 is connected to one end of the capacitor C6, the other end of the capacitor C6 is respectively connected to the grounding inductor L3 and one end of the microstrip line ML7, the other end of the microstrip line ML7 is connected to the gate of the field effect transistor M3, the source of the field effect transistor M3 is connected to one end of the microstrip line ML8, and the other end of the microstrip line ML8 is respectively connected to the grounding capacitor C7 and the grounding resistor R7; The drain of the field effect transistor M3 is connected to one end of the microstrip line ML9, the other end of the microstrip line ML9 is connected to the source of the field effect transistor M4, the gate of the field effect transistor M4 is connected to one end of the resistor R8, the other end of the resistor R8 is respectively connected to the grounding capacitor C8 and one end of the resistor R9, the other end of the resistor R9 is respectively connected to the grounding resistor R10 and one end of the resistor R11, the drain of the field effect transistor M4 is connected to one end of the microstrip line ML10, the other end of the microstrip line ML10 is respectively connected to one end of the inductor L4 and one end of the microstrip line ML11, the other end of the inductor L4 is respectively connected to the other end of the resistor R11, the grounding capacitor C9, one end of the resistor R12 and the drain power supply voltage VD1, and the other end of the resistor R12 is connected to the grounding capacitor C10; The other end of the microstrip line ML11 is respectively connected to one end of the grounded capacitor C11 and the capacitor C12, the other end of the capacitor C12 is connected to one end of the microstrip line ML12, the other end of the microstrip line ML12 is respectively connected to the grounded inductor L5, the grounded capacitor C13, one end of the inductor L6, one end of the inductor L7 and one end of the capacitor C16, the other end of the inductor L6 is connected to one end of the capacitor C15, the other end of the capacitor C15 is respectively connected to the other end of the inductor L7, the other end of the capacitor C16, the grounded inductor L8 and the grounded capacitor C14, and serves as the output end of the RF amplification and filtering network.

3. The high-inhibition high-isolation variable frequency amplification multifunctional chip according to claim 2, characterized in that: The high suppression frequency conversion network includes a microstrip line ML13; One end of the microstrip line ML13 is connected to one end of the microstrip line ML14 and serves as the input end of the high suppression frequency conversion network. The other end of the microstrip line ML13 is respectively connected to one end of the grounded capacitor C17 and the capacitor C18. The other end of the capacitor C18 is connected to one end of the inductor L9. The other end of the inductor L9 is connected to the first input end of the balun balun1. The second input end of the balun balun1 is grounded to the grounded capacitor C19. The first unbalanced end of the balun balun1 is connected to the grounded capacitor C20. The second unbalanced end of the balun balun1 serves as the first output end of the high suppression frequency conversion network. The first output end of the balun balun1 is respectively connected to the positive electrode of the diode D2 and the negative electrode of the diode D1. The second output end of the balun balun1 is connected to the cathode of the diode D3 and the anode of the diode D4 respectively, the anode of the diode D1 is connected to the cathode of the diode D4 and the first input end of the balun balun2 respectively, the cathode of the diode D2 is connected to the anode of the diode D3 and the second input end of the balun balun2 respectively, the unbalanced end of the balun balun2 is connected to the grounding capacitor C22, the first output end of the balun balun2 is connected to the grounding capacitor C22, the second output end of the balun balun2 is connected to one end of the microstrip line ML15, the other end of the microstrip line ML15 is connected to the first input end of the 90° coupler, and the first output end of the 90° coupler is connected to the grounding resistor R13; The other end of the microstrip line ML14 is respectively connected to one end of the grounded capacitor C23 and the capacitor C24, the other end of the capacitor C24 is connected to one end of the inductor L10, the other end of the inductor L10 is connected to the first input end of the balun balun3, the second input end of the balun balun3 is connected to the grounded capacitor C25, the first unbalanced end of the balun balun3 is connected to the grounded capacitor C26, the second unbalanced end of the balun balun3 serves as the second output end of the high suppression frequency conversion network, the first output end of the balun balun3 is respectively connected to the positive electrode of the diode D7 and the negative electrode of the diode D8, the second output end of the balun balun3 is respectively connected to the two The cathode of the diode D6 is connected to the anode of the diode D5, the cathode of the diode D7 is respectively connected to the anode of the diode D6 and the first input end of the balun balun4, the anode of the diode D8 is respectively connected to the cathode of the diode D5 and the second input end of the balun balun4, the unbalanced end of the balun balun4 is connected to the grounded capacitor C27, the first output end of the balun balun4 is connected to the grounded capacitor C28, the second output end of the balun balun4 is connected to one end of the microstrip line ML16, the other end of the microstrip line ML16 is connected to the second input end of the 90° coupler, and the second output end of the 90° coupler is connected to one end of the microstrip line ML17; The other end of the microstrip line ML17 is connected to one end of the capacitor C39, the other end of the capacitor C39 is respectively connected to the grounded capacitor C38 and one end of the microstrip line ML18, the other end of the microstrip line ML18 is respectively connected to one end of the inductor L14 and one end of the microstrip line ML19, the other end of the inductor L14 is respectively connected to one end of the resistor R18, the grounded capacitor C36, one end of the resistor R19 and the drain power supply voltage VD2, the other end of the resistor R19 is connected to the grounded capacitor C37, the other end of the resistor R18 is respectively connected to the grounded resistor R20 and one end of the resistor R21, the other end of the resistor R21 is respectively connected to the grounded capacitor C35 and one end of the resistor R17, the other end of the resistor R17 is connected to the gate of the field effect transistor M7, the drain of the field effect transistor M7 is connected to the other end of the microstrip line ML19, and the source of the field effect transistor M7 is connected to one end of the microstrip line ML20; The other end of the microstrip line ML20 is connected to the drain of the field effect transistor M6, the source of the field effect transistor M6 is connected to one end of the microstrip line ML21, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the gate of the field effect transistor M6 is connected to one end of the microstrip line ML22, the other end of the microstrip line ML22 is respectively connected to one end of the grounding inductor L13 and the capacitor C33, the other end of the capacitor C33 is respectively connected to one end of the microstrip line ML23, the other end of the microstrip line ML23 is respectively connected to one end of the inductor L12 and the microstrip line ML24, the other end of the inductor L12 ... other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected to the grounding resistor R16 and the grounding capacitor C34, the other end of the microstrip line ML21 is respectively connected The capacitor C31 and one end of the resistor R15 are connected to the drain power supply voltage VD2, the other end of the resistor R15 is connected to the grounded capacitor C32, the other end of the microstrip line ML24 is connected to the drain of the field effect transistor M5, the source of the field effect transistor M5 is connected to one end of the microstrip line ML25, the other end of the microstrip line ML25 is respectively connected to the grounded resistor R14 and the grounded capacitor C30, the gate of the field effect transistor M5 is connected to one end of the microstrip line ML26, the other end of the microstrip line ML26 is connected to one end of the capacitor C29, the other end of the capacitor C29 is connected to the grounded inductor L11, and serves as the local oscillator input end of the high suppression frequency conversion network.

4. The high-inhibition and high-isolation variable frequency amplification multifunctional chip according to claim 3 is characterized in that: The high isolation intermediate frequency filter network includes microstrip line ML27 and microstrip line ML30; One end of the microstrip line ML27 serves as a first input end of the high-isolation intermediate-frequency filter network, the other end of the microstrip line ML27 is respectively connected to the grounded inductor L15, the grounded capacitor C44, one end of the capacitor C46, ​​one end of the inductor L17 and one end of the inductor L18, the other end of the inductor L18 is connected to one end of the capacitor C47, the other end of the capacitor C47 is respectively connected to the other end of the inductor L17, the other end of the capacitor C46, ​​the grounded inductor L16, the grounded capacitor C45 and one end of the microstrip line ML28, the other end of the microstrip line ML28 serves as a first output end of the high-isolation intermediate-frequency filter network; One end of the microstrip line ML30 serves as the second input end of the high-isolation intermediate frequency filter network, the other end of the microstrip line ML30 is respectively connected to the grounded inductor L19, the grounded capacitor C40, one end of the capacitor C42, one end of the inductor L21 and one end of the inductor L22, the other end of the inductor L22 is connected to one end of the capacitor C43, the other end of the capacitor C43 is respectively connected to the other end of the inductor L21, the other end of the capacitor C42, the grounded inductor L20, the grounded capacitor C41 and one end of the microstrip line ML31, and the other end of the microstrip line ML31 serves as the second output end of the high-isolation intermediate frequency filter network.

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