Circuit board manufacturing method of thick copper fine circuit with blind holes and circuit board

By setting blind holes on the circuit board and splitting the design thickness of the conductive circuit layer for electroplating filling and thickening, the poor plating uniformity and etching problems caused by copper thickness design are solved, and the plating uniformity and etching effect of the circuit board are improved .

CN119255486AActive Publication Date: 2025-01-03KINWONG ELECTRONIC TECH (ZHUHAI) CO LTD +1
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Patent Information

Application Number
CN202411031187.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-07-29
Publication Date
2025-01-03
Estimated Expiration
2044-07-29

AI Technical Summary

Technical Problem

In the prior art, when the copper thickness is large, the electroplated copper thickness of the circuit board is extremely poor and the uniformity is poor, resulting in unclear etching and small wire problems.

Method used

By setting blind holes on the substrate and splitting the total design thickness of the conductive line layer into the first design thickness B and the second design thickness C, the electroplating and thickening are performed respectively to ensure that the blind holes fill the electroplating layer, and at the same time, the Improve the uniformity of the conductive line layer.

Benefits of technology

While ensuring that the blind holes fill the electroplating layer, the extreme difference after electroplating is reduced, the uniformity of the conductive circuit layer is improved, and the problems of unclean etching and small wires are avoided.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to the field of circuit board manufacturing, and discloses a circuit board manufacturing method of a thick copper fine circuit with blind holes and a circuit board, the circuit board manufacturing method comprises the following steps: providing a substrate, the substrate comprises a base material and two conductive circuit layers, the substrate is provided with the blind holes, and the basic thickness of the conductive circuit layers is D; obtaining the total design thickness A of the conductive circuit layer, and splitting the total design thickness A into a first design thickness B and a second design thickness C; performing electroplating hole filling on the substrate to enable the increased thickness of the conductive circuit layer to be a first design thickness B; and carrying out electroplating thickening on the substrate, so that the increased thickness of the conductive circuit layer is a second design thickness C. According to the circuit board manufacturing method and the circuit board provided by the embodiment of the invention, the problems that the thickness range of the conductive circuit layer of the manufactured circuit board is large and the uniformity is poor when the total design thickness of the conductive circuit layer is relatively large in the related technology, so that incomplete etching and line closeness are easy to occur during subsequent etching can be solved.
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Description

Technical Field

[0001] The present application relates to the field of circuit board manufacturing, and in particular to a method for manufacturing a circuit board with thick copper fine circuits having blind holes and a circuit board. Background Art

[0002] The electromagnetic inductance of the embedded magnetic circuit board is related to the geometric shape of the conductor (coil), conductor material, conductor length, conductor cross-sectional area and other factors. When other factors remain unchanged, the electromagnetic inductance can only be increased by increasing the conductor cross-sectional area and conductor length (number of turns) to the maximum extent from the copper thickness and line width. Therefore, the buried magnetic circuit board is generally designed with thick copper, and the copper thickness is designed to be more than 50μm.

[0003] The line width / line spacing of a conventional 50μm copper-thick circuit board is 100μm / 100μm. The line width and line spacing of the buried magnetic circuit board are designed to be fine in order to obtain as many turns as possible within a certain space. However, when the copper thickness is designed to be larger, the design of finer line width and line spacing has exceeded the current process manufacturing capabilities. The electroplated copper thickness of the produced circuit board is very different and the uniformity is poor, which leads to problems such as incomplete etching and thin lines during subsequent etching. Summary of the invention

[0004] The present application provides a method for manufacturing a circuit board with thick copper fine circuits with blind holes and a circuit board, which can improve the problem in the related art that when the copper thickness is designed to be large, the electroplated copper thickness of the manufactured circuit board is very different and the uniformity is poor, which in turn leads to problems such as incomplete etching and thin lines during subsequent etching.

[0005] In a first aspect, an embodiment of the present application provides a method for manufacturing a circuit board having thick copper fine circuits with blind vias, comprising:

[0006] A substrate is provided, wherein the substrate comprises a substrate and two conductive circuit layers, wherein the two conductive circuit layers are respectively arranged on opposite sides of the substrate, wherein the substrate is provided with a blind hole, wherein the blind hole penetrates one of the conductive circuit layers, and the other conductive circuit layer defines a bottom surface of the blind hole, and the basic thickness of the conductive circuit layer is D;

[0007] Obtaining a total design thickness A of the conductive circuit layer, and splitting the total design thickness A into a first design thickness B and a second design thickness C, wherein both the first design thickness B and the second design thickness C are greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer increased when the substrate is electroplated and the blind hole is filled with the electroplating layer, and the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D;

[0008] Performing electroplating filling on the substrate so that the blind hole is filled with the electroplating layer and the thickness of the conductive circuit layer is increased to the first designed thickness B;

[0009] The substrate is electroplated to be thickened so that the increased thickness of the conductive circuit layer is the second designed thickness C.

[0010] In some embodiments, the electroplating and hole filling of the substrate so that the blind hole is filled with the electroplating layer and the conductive circuit layer increases the first designed thickness B includes:

[0011] Determining whether the first designed thickness B is greater than 20 μm;

[0012] If the first designed thickness B is less than 20 μm, the substrate is electroplated once to fill the blind hole with the electroplating layer, and the thickness of the conductive circuit layer is increased to the first designed thickness B;

[0013] If the first designed thickness B is greater than or equal to 20 μm, the substrate is electroplated and filled N times so that the blind hole is filled with the electroplating layer and the increased thickness of the conductive circuit layer is the first designed thickness B, where N is a positive integer greater than or equal to 2.

[0014] In some embodiments, in the process of performing electroplating and hole filling on the substrate N times, the thickness of the conductive circuit layer increased by d1 each time the substrate is electroplated and hole filling is performed, and 10 μm≤d1<20 μm.

[0015] In some embodiments, the step of performing N times of electroplating and filling holes on the substrate includes:

[0016] Clamping two electroplating clips respectively at a first corner of the substrate and a second corner diagonally opposite to the first corner, and performing an N-1th electroplating on the substrate;

[0017] The two electroplating clips are respectively clamped on the third corner of the substrate and the fourth corner diagonally opposite to the third corner, and the substrate is electroplated for the Nth time, and the projection of the line connecting the third corner and the fourth corner on the substrate and the projection of the line connecting the first corner and the second corner on the substrate intersect.

[0018] In some embodiments, the electroplating thickening of the substrate so that the increased thickness of the conductive circuit layer is the second designed thickness C includes:

[0019] Determining whether the second designed thickness C is greater than 20 μm;

[0020] If the second designed thickness C is less than 20 μm, the substrate is electroplated once to increase the thickness of the conductive circuit layer to the second designed thickness C;

[0021] If the second designed thickness C is greater than or equal to 20 μm, the substrate is electroplated for M times to thicken the substrate, so that the increased thickness of the conductive circuit layer is the second designed thickness C, where M is a positive integer greater than or equal to 2.

[0022] In some embodiments, in the process of performing electroplating thickening on the substrate M times, the thickness of the conductive circuit layer increased by d2 each time the substrate is electroplated thickening, 10 μm≤d2<20 μm.

[0023] In some embodiments, when the substrate is electroplated and the holes are filled, two electroplating clamps are used to clamp the opposite ends of the substrate respectively;

[0024] And / or, when the substrate is electroplated and thickened, two electroplating clamps are used to clamp opposite ends of the substrate respectively.

[0025] In some embodiments, after the substrate is electroplated and thickened, the method for manufacturing the circuit board further includes:

[0026] Applying a transfer film to the thickened conductive circuit layer;

[0027] Exposing the transfer film according to preset line data, the preset line data extending along a circular path, wherein the preset line data is arranged corresponding to the designed line, the inner circle of the preset line data is inwardly contracted relative to the inner circle of the designed line and has a first pre-compensation amount;

[0028] Performing a development process on the unexposed transfer film;

[0029] The conductive circuit layer covered by the transfer film which is not exposed is removed by etching, so that the remaining conductive circuit layer forms the designed circuit.

[0030] In some of the embodiments, the outer circle of the preset line data expands outward relative to the outer circle of the designed line and has a second pre-compensation amount; and / or, the side wall of the end of the preset line data expands outward relative to the side wall of the end of the designed line and has a third pre-compensation amount.

[0031] In a second aspect, an embodiment of the present application provides a circuit board, which is processed by the circuit board manufacturing method as described in the first aspect.

[0032] The method for manufacturing a circuit board with a thick copper fine circuit with blind holes provided in an embodiment of the present application has the beneficial effect that: since the total design thickness A of the conductive circuit layer is first obtained, and the total design thickness A is divided into a first design thickness B and a second design thickness C, the first design thickness B and the second design thickness C are both greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer increased when the blind holes are filled with the electroplating layer by electroplating the substrate, the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D, and then the substrate is electroplated and filled. The blind hole is filled with the electroplating layer, and the thickness of the conductive circuit layer is increased to the first design thickness B, and the substrate is electroplated to be thickened, so that the thickness of the conductive circuit layer is increased to the second design thickness C. Therefore, while ensuring that the blind hole is filled with the electroplating layer, the range of the conductive circuit layer after the substrate is electroplated and thickened is reduced and its uniformity is improved, thereby improving the problem in the related art that when the total design thickness A of the conductive circuit layer is large, the thickness range of the conductive circuit layer of the manufactured circuit board is large and the uniformity is poor, which leads to problems such as incomplete etching and thin lines during subsequent etching.

[0033] The beneficial effects of the circuit board provided in the present application compared with the prior art can be referred to the description of the beneficial effects of the circuit board manufacturing method with thick copper fine circuits with blind holes provided in the present application compared with the prior art, which will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0035] Figure 1 It is a flow chart of a method for manufacturing a circuit board with thick copper fine circuits with blind holes in one embodiment of the present application;

[0036] Figure 2 This is a schematic diagram of the structure of a substrate in one of the embodiments of the present application;

[0037] Figure 3 is Figure 2 A schematic diagram of a deposition layer being arranged on the bottom copper of the substrate shown;

[0038] Figure 4 Yes Figure 3 The schematic diagram of the substrate being subjected to the first electroplating hole filling process is shown;

[0039] Figure 5 Yes Figure 3 The schematic diagram of the substrate being subjected to the second electroplating hole filling process is shown;

[0040] Figure 6 Yes Figure 5 The schematic diagram of the substrate being thickened by the first electroplating is shown;

[0041] Figure 7 Yes Figure 5 Schematic diagram of the substrate being subjected to a second electroplating thickening;

[0042] Figure 8 It is a schematic diagram of attaching a transfer film to the thickened conductive circuit layer in the substrate after the substrate is electroplated and thickened in one of the embodiments of the present application;

[0043] Fig. 9 Yes Figure 8 Schematic diagram of the transfer film shown in Figure 1 for exposure and development;

[0044] Fig.10 Etching removal part Fig. 9 A schematic diagram of a thickened conductive circuit layer shown;

[0045] Fig.11 yes Fig.10 Schematic diagram of the local structure of the designed circuit;

[0046] Fig.12 is a schematic diagram of performing electroplating and hole filling on a substrate in another embodiment of the present application;

[0047] Fig.13 It is a schematic diagram of performing a primary electroplating thickening on a substrate in another embodiment of the present application;

[0048] Fig.14 It is a compensation rule for designing a circuit in one of the embodiments of the present application.

[0049] The meanings of the marks in the figure are:

[0050] 10. Substrate;

[0051] 11. Substrate; 12. Conductive circuit layer; 120. Designed circuit; 121. Bottom copper; 122. Deposition layer; 123. End; 124. Outer circle of circuit; 125. Inner circle of circuit; 13. Blind hole; 20. Transfer film. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0053] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0054] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0055] References to "one embodiment", "some embodiments" or "an embodiment" described in the specification of this application mean that a particular feature, structure or characteristic described in conjunction with the embodiment is included in one or more embodiments of the present application. Thus, the phrases "in one embodiment", "in some other embodiments", "in some other embodiments", etc., which appear at different places in this specification, do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. In addition, in one or more embodiments, particular features, structures or characteristics may be combined in any suitable manner.

[0056] In order to illustrate the technical solution of the present application, a description is given below with reference to specific drawings and embodiments.

[0057] The line width / line spacing of a conventional 50μm copper-thick circuit board is 100μm / 100μm. The line width and line spacing of the buried magnetic circuit board are designed to be fine in order to obtain as many turns as possible within a certain space. However, when the copper thickness is designed to be larger, the line width and line spacing design is finer. For example, when the copper thickness is 50μm and the corresponding line width / line spacing is 75 / 75μm, it exceeds the current process manufacturing capability. The electroplated copper thickness of the produced circuit board is very different and the uniformity is poor, which leads to problems such as incomplete etching and thin lines during subsequent etching.

[0058] In view of this, the present application provides a method for manufacturing a circuit board with thick copper and fine circuits with blind holes and a circuit board, which can improve the problem in the related art that when the copper thickness is designed to be large, the electroplated copper thickness of the produced circuit board is very different and the uniformity is poor, which in turn leads to problems such as unclean etching and thin lines during subsequent etching.

[0059] Please refer to Figures 1 to 7 In a first aspect, an embodiment of the present application provides a method for manufacturing a circuit board having a thick copper fine circuit with a blind hole 13, comprising:

[0060] S100: Provide a substrate 10, the substrate 10 includes a base material 11 and two conductive circuit layers 12, the two conductive circuit layers 12 are respectively arranged on opposite sides of the base material 11, the substrate 10 is provided with a blind hole 13, the blind hole 13 penetrates one of the conductive circuit layers 12, and the other conductive circuit layer 12 defines the bottom surface of the blind hole 13, and the basic thickness of the conductive circuit layer 12 is D.

[0061] Specifically, the conductive circuit layer 12 may include a bottom copper 121 and a deposition layer 122 disposed on the bottom copper 121, a portion of the deposition layer 122 is located on the bottom wall and side wall of the blind hole 13, and the bottom copper 121 and the deposition layer 122 may both be a copper layer or a silver layer. The blind hole 13 may be firstly processed on a process board including the substrate 10 and the bottom copper 121 by laser drilling, and then the deposition layer 122 may be deposited on the bottom wall and side wall of the blind hole 13 by chemical deposition or copper flash plating, so as to be used for electroplating and conducting in the process, and at the same time, the deposition layer 122 may be deposited on the bottom copper 121 to obtain the substrate 10.

[0062] For example, the thickness of the bottom copper 121 and the thickness of the deposited layer 122 can both be 5μm-7μm. The bottom copper 121 can be thinned to 5μm-7μm by copper reduction browning to avoid the risk of laser incompleteness during laser drilling caused by the bottom copper 121 thickness being greater than 7μm, and to avoid the bottom copper 121 thickness being less than 5μm, which causes the bottom copper 121 to be too thin and corroded. Browning is to form a browning film on the surface of the bottom copper 121 to protect the copper surface.

[0063] During laser drilling, adjust the laser parameters, laser process the blind hole 13 on one side of the substrate 10, check whether the hole shape of the blind hole 13 is OK, and measure the roundness lower hole diameter / upper hole diameter>90%.

[0064] S200: Obtain the total design thickness A of the conductive circuit layer 12, and split the total design thickness A into a first design thickness B and a second design thickness C. The first design thickness B and the second design thickness C are both greater than the basic thickness D. The first design thickness B is the thickness increased by the conductive circuit layer 12 when the substrate 10 is electroplated and the blind hole 13 is filled with the electroplating layer. The total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D.

[0065] Specifically, the first design thickness B and the second design thickness C can be calculated based on parameters such as electroplating equipment, chemical system, chemical concentration, etc. Alternatively, the first design thickness B and the second design thickness C can be obtained by performing a first piece test.

[0066] It can be understood that ABD=C.

[0067] It should be noted that, in actual production, the value of the first design thickness B can be determined according to the aperture size of the blind hole 13. For a blind hole 13 with a conventional aperture of 0.1 mm, the first design thickness B is about 20 μm. For a blind hole 13 with a conventional aperture of 0.15 mm, the first design thickness B is about 25 μm.

[0068] S300: performing electroplating to fill holes on the substrate 10, so that the blind holes 13 are filled with the electroplating layer, and the thickness of the conductive circuit layer 12 is increased to the first designed thickness B.

[0069] Specifically, the substrate 10 may be electroplated and filled with holes by horizontal continuous electroplating or VCP (Vertical Conveyor Plating). A long-time low-current electroplating method may be used to improve the uniformity of the thickened conductive circuit layer 12. For example, when the substrate 10 is electroplated and filled with holes, the current density is 12ASF-16ASF, and the time is 45min-60min.

[0070] It should be noted that when the current density exceeds 16ASF, the current density is large and the electroplating efficiency is high, but the thickened conductive circuit layer 12 is uneven, and when the current density is lower than 12ASF, the electroplating time is too long and the production efficiency is too low.

[0071] For example, when the substrate 10 is electroplated and hole-filled, two electroplating clamps are used to clamp opposite ends of the substrate 10 respectively, so that the substrate 10 will not float in the copper cylinder containing the electroplating solution, thereby improving the uniformity of electroplating.

[0072] S400: performing electroplating to thicken the substrate 10 so that the increased thickness of the conductive circuit layer 12 is a second designed thickness C.

[0073] Specifically, the substrate 10 can be electroplated and thickened by VCP electroplating. A long-time low-current electroplating method can be used to improve the uniformity of the thickened conductive circuit layer 12. Generally speaking, the minimum current density of VCP electroplating is 5ASF, but considering the production efficiency and uniformity effect, the current density can be between 12ASF and 18ASF, and the uniformity is better. When the current density exceeds 18ASF, the current density is large and the electroplating efficiency is high, but the thickened conductive circuit layer 12 is uneven. When the current density is lower than 12ASF, the electroplating time is long and the production efficiency is too low.

[0074] It can be understood that after the substrate 10 is thickened by electroplating, the thickness of the conductive circuit layer 12 is the total designed thickness A, and the total designed thickness A may be greater than 50 μm.

[0075] For example, when the substrate 10 is electroplated and thickened, two electroplating clamps are used to clamp opposite ends of the substrate 10 respectively, so that the substrate 10 will not float in the copper cylinder containing the electroplating solution, thereby improving the uniformity of the electroplating.

[0076] As can be seen from the above, the method for manufacturing a circuit board with thick copper fine circuits with blind holes 13 provided in the embodiment of the present application is that the total design thickness A of the conductive circuit layer 12 is first obtained, and the total design thickness A is divided into a first design thickness B and a second design thickness C, the first design thickness B and the second design thickness C are both greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer 12 increased when the blind hole 13 is filled with the electroplating layer by electroplating the substrate 10, and the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D, and then the substrate 10 is electroplated and filled so that the blind hole 13 is filled with the electroplating layer. The hole 13 is filled with the electroplating layer, and the thickness of the conductive circuit layer 12 is increased to the first design thickness B, and the substrate 10 is electroplated and thickened, so that the thickness of the conductive circuit layer 12 is increased to the second design thickness C. Therefore, while ensuring that the blind hole 13 is filled with the electroplating layer, the range of the conductive circuit layer 12 after the substrate 10 is electroplated and thickened is reduced and its uniformity is improved, thereby improving the problem in the related art that when the total design thickness A of the conductive circuit layer 12 is large, the thickness range of the conductive circuit layer 12 of the produced circuit board is large and the uniformity is poor, which leads to problems such as incomplete etching and thin lines during subsequent etching.

[0077] Optionally, C≥10μm. This configuration can avoid the problem of poor browning and board explosion caused by C being too small.

[0078] Specifically, there are subsequent processes such as circuit pre-treatment and resin grinding before browning, which will corrode the surface conductive circuit layer 12. There are connecting lines between the electroplating layers when electroplating for different times. When the connection position is corroded, browning solution will enter, resulting in poor browning.

[0079] Optionally, after the electroplating is completed, a copper thickness measuring instrument may be used to check whether the thickness of the conductive circuit layer 12 meets the requirements and whether the range is controlled within ±5 μm.

[0080] In addition, the floating plate has a fixing and positioning function for the substrate 10. The design of the floating plate can adjust the volume and thus the buoyancy. Therefore, the deviation setting of the height of the floating plate during each production will have an impact on the uniformity. It is usually tested once a month and adjusted together with the electroplating uniformity test. When producing this type of special thick copper narrow spacing substrate 10, the uniformity of the copper thickness is tested on the test board before production, and the uniformity is improved by adjusting the size of the floating plate height. For example, for a substrate 10 of a certain material number, the board height is 616mm. The test found that the uniformity is best when the deviation is set to 4mm, so 616+4=620mm. In addition, the equipment itself will have a deviation of 1mm, so the actual height of the floating plate is 621mm. The best uniformity effect is achieved by adjusting the deviation setting of the floating plate.

[0081] The substrate 10 is electroplated and filled with holes, so that the blind hole 13 is filled with the electroplating layer, and the conductive circuit layer 12 increases the first design thickness B, including:

[0082] First, it is determined whether the first design thickness B is greater than 20 μm.

[0083] Secondly, if the first design thickness B is less than 20μm, please refer to Fig.12 , the substrate 10 is electroplated once to fill the blind hole 13 with the electroplating layer, and the increased thickness of the conductive circuit layer 12 is the first designed thickness B.

[0084] If the first designed thickness B is greater than or equal to 20 μm, the substrate 10 is electroplated for N times to fill the blind hole 13 with the electroplating layer and increase the thickness of the conductive circuit layer 12 to the first designed thickness B, where N is a positive integer greater than or equal to 2.

[0085] By adopting the above solution, the substrate 10 can be electroplated to fill the blind hole 13 with the electroplating layer, and the conductive circuit layer 12 is increased to the first designed thickness B, so that the range of the thickened conductive circuit layer 12 is smaller and the uniformity is better.

[0086] It should be noted that the value of N is related to the uniformity accuracy requirements of the conductive circuit layer 12, the equipment, and the solution. For example, when the first design thickness B is within 20 μm, the range can be within ±2 μm, and when the first design thickness B is 25 μm, the range is within ±2.5 μm.

[0087] Considering factors such as electroplating equipment and chemicals, if the thickness d1 of the conductive circuit layer 12 increased each time the substrate 10 is electroplated and filled with holes is between 5 μm and 10 μm, the uniformity of the thickened conductive circuit layer 12 is best, then 5≤d1≤10 μm; if the thickness d1 of the conductive circuit layer 12 increased each time the substrate 10 is electroplated and filled with holes is between 8 and 15 μm, the uniformity of the thickened conductive circuit layer 12 is best, then 8≤d1≤15 μm. The same applies to other situations.

[0088] In this embodiment, during the process of performing N times of electroplating and hole filling on the substrate 10, the thickness of the conductive circuit layer 12 is increased by d1 each time the substrate 10 is electroplated and hole filling is performed, and 10μm≤d1<20μm. Such a setting can ensure that the thickness uniformity of the thickened conductive circuit layer 12 is better and can also ensure sufficiently high production efficiency.

[0089] For example, when the first design thickness B is 25μm, N=2, the increased thickness of the conductive circuit layer 12 when the substrate 10 is electroplated and filled with holes for the first time is B1, and the increased thickness of the conductive circuit layer 12 when the substrate 10 is electroplated and filled with holes for the second time is B2, and B1 / B2 can be 12.5μm / 12.5μm, or 10μm / 15μm or 12 / 13μm, respectively, that is, B1 / B2 is in the range of 10μm≤B1<20μm and 10μm≤B2<20μm.

[0090] Specifically, the substrate 10 is electroplated and filled with holes N times, including:

[0091] First, two electroplating clips are clamped on a first corner of the substrate 10 and a second corner diagonally opposite to the first corner, respectively, and the substrate 10 is electroplated for the N-1th time.

[0092] Secondly, two electroplating clips are respectively clamped on the third corner of the substrate 10 and the fourth corner diagonally opposite to the third corner, and the substrate 10 is electroplated for the Nth time. The projection of the line connecting the third corner and the fourth corner on the substrate 10 and the projection of the line connecting the first corner and the second corner on the substrate 10 intersect.

[0093] By adopting the above solution, the thickness uniformity of the conductive circuit layer 12 after the substrate 10 is thickened after N times of electroplating and hole filling can be improved.

[0094] For example, when the substrate 10 is a rectangular parallelepiped, the first corner, the third corner, the second corner, and the fourth corner are four corners sequentially arranged along the edge of the substrate 10 .

[0095] It should be noted that the current at the electroplating clamp position is usually in the high potential area with a large current density and a thicker electroplated copper thickness. The lower half is the electroplated low potential area with a slightly thinner electroplated copper thickness. Therefore, when the substrate 10 is electroplated and filled with holes N times, the extreme difference in copper thickness can be minimized by clamping the diagonals, and the electroplating uniformity can be improved.

[0096] The substrate 10 is electroplated to be thickened so that the thickness of the conductive circuit layer 12 is increased to a second designed thickness C, including:

[0097] First, it is determined whether the second design thickness C is greater than 20 μm.

[0098] Secondly, if the second design thickness C is less than 20μm, please refer to Fig.13 , the substrate 10 is electroplated and thickened once, so that the increased thickness of the conductive circuit layer 12 is the second designed thickness C.

[0099] If the second designed thickness C is greater than or equal to 20 μm, the substrate 10 is electroplated for M times to increase the thickness of the conductive circuit layer 12 to the second designed thickness C, where M is a positive integer greater than or equal to 2.

[0100] By adopting the above solution, the substrate 10 can be electroplated and thickened so that the thickness of the conductive circuit layer 12 increases to the second designed thickness C, so that the range of the thickened conductive circuit layer 12 is small and the uniformity is better.

[0101] In this embodiment, during the M-times of electroplating thickening of the substrate 10, the thickness of the conductive circuit layer 12 increased by d2 each time the substrate 10 is electroplated and thickened, 10μm≤d2<20μm. This arrangement can ensure that the thickness uniformity of the thickened conductive circuit layer 12 is better and can also ensure sufficiently high production efficiency.

[0102] Please refer to Figures 8 to 11 In some embodiments, after the substrate 10 is electroplated and thickened, the method for manufacturing the circuit board further includes:

[0103] First, the transfer film 20 is attached to the thickened conductive circuit layer 12 .

[0104] Specifically, the transfer film 20 may be a dry film.

[0105] Secondly, the transfer film 20 is exposed according to the preset circuit data, which extends along a circular path, wherein the preset circuit data is set corresponding to the design circuit 120, and the inner circle of the preset circuit data is retracted relative to the circuit inner circle 125 of the design circuit 120 and has a first pre-compensation amount.

[0106] The transfer film 20 can be exposed according to preset circuit data using a film or DI (Direct Imaging) exposure machine. The exposure scale is 16±2 grids, and the exposure uniformity is controlled to be >95%. Exposure is performed according to preset circuit data.

[0107] Next, the unexposed transfer film 20 is subjected to a development process.

[0108] Finally, the conductive circuit layer 12 covered by the transfer film 20 that is not exposed is removed by etching, so that the remaining conductive circuit layer 12 forms the designed circuit 120 .

[0109] Specifically, the conductive circuit layer 12 covered by the transfer film 20 that is not exposed can be removed by etching with an etching solution.

[0110] By adopting the above solution, it is possible to avoid the problem that when etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, the conductive circuit layer 12 corresponding to the inner circuit circle 125 of the designed circuit 120 is easily attacked by etching solution, resulting in excessive corrosion.

[0111] Optionally, when etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, the long side feeding method can be used to improve etching uniformity. After etching away the conductive circuit layer 12 covered by the unexposed transfer film 20, AOI (Automated Optical Inspection) can be used to check whether the designed circuit 120 has problems such as thin lines and incomplete etching, and a line width measuring instrument can be used to measure whether the line width of the designed circuit 120 is within the required range.

[0112] Optionally, the outer ring of the preset circuit data is expanded relative to the circuit outer ring 124 of the designed circuit 120 and has a second pre-compensation amount; and / or the side wall of the end of the preset circuit data is expanded relative to the side wall of the end 123 of the designed circuit 120 and has a third pre-compensation amount. This can prevent the conductive circuit layer 12 corresponding to the circuit outer ring 124 of the designed circuit 120 and the conductive circuit layer 12 corresponding to the end 123 (line head position) of the designed circuit 120 from being easily attacked by etching solution, resulting in excessive erosion.

[0113] For example, the first pre-compensation amount and the second pre-compensation amount can both compensate 5 μm more than the normal compensation amount. The designed circuit 120 can be a coil.

[0114] Among them, the compensation of the design circuit 120 can be optimized through pre-compensation and dynamic compensation to obtain the first pre-compensation amount, the second pre-compensation amount and the third pre-compensation amount. Pre-compensation refers to the pre-compensation adjustment of the line width according to the expected manufacturing tolerance and circuit performance requirements during the circuit board design process, and dynamic compensation refers to the dynamic compensation adjustment of the line width according to the production data (etching bite, line width change). Pre-compensation is pre-compensation performed in the design stage, and dynamic compensation is real-time compensation during the manufacturing process. The compensation rules can be based on Fig.14 As shown, the average copper thickness is the average value of the thickness of different parts of the conductive circuit layer 12 after the substrate 10 is electroplated and thickened.

[0115] For example, in this embodiment, the line width / line spacing of the design circuit 120 is required to be 75μm / 75μm. During etching, the inner circle 125 and the outer circle of the design circuit 120 are easily attacked by etching solution, and the amount of bite is large, so the dynamic compensation is 40μm. The line in the middle of the design circuit 120 is relatively dense, and the exchangeability of the etching solution is poor, and it is not easy to be attacked. Therefore, under the premise of ensuring the minimum spacing of the line width pre-compensation of 40μm, the pre-compensation is changed to 35μm. The end 123 (line head) position of the design circuit 120 is easily attacked by etching solution on both sides due to the independent line design, so an additional 15μm is added. In terms of process, the conventional practice is to feed the board with the long side to improve the efficiency of board placement. In this embodiment, the board is fed with the short side during production, the solution is evenly distributed, and the etching uniformity is better.

[0116] The method for manufacturing a circuit board with thick copper fine circuits having blind holes 13 provided in an embodiment of the present application improves the uniformity and range of electroplating by controlling the thickness d1 of each hole filling by electroplating and the thickness d2 of each thickening by electroplating, and solves the problems of poor electroplating uniformity, large range and etching line width by optimizing line width compensation parameters and changing the board placement method.

[0117] In a second aspect, an embodiment of the present application provides a circuit board, which is processed by the circuit board manufacturing method of the first aspect.

[0118] The circuit board with thick copper fine circuits and blind holes 13 provided in the embodiment of the present application first obtains the total design thickness A of the conductive circuit layer 12, and divides the total design thickness A into a first design thickness B and a second design thickness C, the first design thickness B and the second design thickness C are both greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer 12 increased when the blind holes 13 are filled with the electroplating layer by electroplating the substrate 10, the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D, and then the substrate 10 is electroplated to fill the blind holes 13. The electroplating layer is used to increase the thickness of the conductive circuit layer 12 to the first design thickness B, and the substrate 10 is electroplated and thickened to increase the thickness of the conductive circuit layer 12 to the second design thickness C. Therefore, while ensuring that the blind hole 13 is filled with the electroplating layer, the range of the conductive circuit layer 12 after the substrate 10 is electroplated and thickened is reduced and its uniformity is improved, thereby improving the problem in the related art that when the total design thickness A of the conductive circuit layer 12 is large, the thickness range of the conductive circuit layer 12 of the manufactured circuit board is large and the uniformity is poor, which leads to problems such as incomplete etching and thin lines during subsequent etching.

[0119] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A method for manufacturing a circuit board with thick copper fine circuits with blind holes, characterized in that: include: A substrate is provided, wherein the substrate comprises a substrate and two conductive circuit layers, wherein the two conductive circuit layers are respectively arranged on opposite sides of the substrate, wherein the substrate is provided with a blind hole, wherein the blind hole penetrates one of the conductive circuit layers, and the other conductive circuit layer defines a bottom surface of the blind hole, and the basic thickness of the conductive circuit layer is D; Obtaining a total design thickness A of the conductive circuit layer, and splitting the total design thickness A into a first design thickness B and a second design thickness C, wherein the first design thickness B and the second design thickness C are both greater than the basic thickness D, the first design thickness B is the thickness of the conductive circuit layer increased when the substrate is electroplated and the blind hole is filled with the electroplating layer, and the total design thickness A is the sum of the first design thickness B, the second design thickness C and the basic thickness D; Performing electroplating filling on the substrate so that the blind hole is filled with the electroplating layer and the thickness of the conductive circuit layer is increased to the first designed thickness B; The substrate is electroplated to be thickened so that the increased thickness of the conductive circuit layer is the second designed thickness C.

2. The method for manufacturing a circuit board according to claim 1, characterized in that: The step of performing electroplating and hole filling on the substrate so that the blind hole is filled with the electroplating layer and the conductive circuit layer increases with the first designed thickness B includes: Determining whether the first designed thickness B is greater than 20 μm; If the first designed thickness B is less than 20 μm, the substrate is electroplated once to fill the blind hole with the electroplating layer, and the thickness of the conductive circuit layer is increased to the first designed thickness B; If the first designed thickness B is greater than or equal to 20 μm, the substrate is electroplated and filled N times so that the blind hole is filled with the electroplating layer and the increased thickness of the conductive circuit layer is the first designed thickness B, where N is a positive integer greater than or equal to 2.

3. The method for manufacturing a circuit board according to claim 2, characterized in that: In the process of performing N times of electroplating and hole filling on the substrate, the thickness of the conductive circuit layer increased by d1 each time the substrate is electroplated and hole filling is performed, and 10 μm≤d1<20 μm.

4. The method for manufacturing a circuit board according to claim 2, characterized in that: The step of performing N times of electroplating and hole filling on the substrate comprises: Clamping two electroplating clips respectively at a first corner of the substrate and a second corner diagonally opposite to the first corner, and performing an N-1th electroplating on the substrate; The two electroplating clips are respectively clamped on the third corner of the substrate and the fourth corner diagonally opposite to the third corner, and the substrate is electroplated for the Nth time, and the projection of the line connecting the third corner and the fourth corner on the substrate and the projection of the line connecting the first corner and the second corner on the substrate intersect.

5. The method for manufacturing a circuit board according to claim 1, characterized in that: The step of performing electroplating thickening on the substrate so that the increased thickness of the conductive circuit layer is the second designed thickness C comprises: Determining whether the second designed thickness C is greater than 20 μm; If the second designed thickness C is less than 20 μm, the substrate is electroplated once to increase the thickness of the conductive circuit layer to the second designed thickness C; If the second designed thickness C is greater than or equal to 20 μm, the substrate is electroplated for M times to increase the thickness of the conductive circuit layer to the second designed thickness C, where M is a positive integer greater than or equal to 2.

6. The method for manufacturing a circuit board according to claim 5, characterized in that: In the process of performing M times of electroplating thickening on the substrate, the thickness of the conductive circuit layer increased by d2 each time the substrate is electroplated thickening, 10 μm≤d2<20 μm.

7. The method for manufacturing a circuit board according to claim 1, characterized in that: When the substrate is electroplated and hole-filled, two electroplating clamps are used to clamp opposite ends of the substrate respectively; And / or, when the substrate is electroplated and thickened, two electroplating clamps are used to clamp opposite ends of the substrate respectively.

8. The method for manufacturing a circuit board according to any one of claims 1 to 7, characterized in that: After the substrate is electroplated and thickened, the method for manufacturing the circuit board further includes: Applying a transfer film to the thickened conductive circuit layer; Exposing the transfer film according to preset line data, the preset line data extending along a circular path, wherein the preset line data is arranged corresponding to the design line, the inner circle of the preset line data is inwardly contracted relative to the inner circle of the design line and has a first pre-compensation amount; Performing a development process on the unexposed transfer film; The conductive circuit layer covered by the transfer film which is not exposed is removed by etching, so that the remaining conductive circuit layer forms the designed circuit.

9. The method for manufacturing a circuit board according to claim 8, characterized in that: The outer circle of the preset line data expands outward relative to the outer circle of the designed line and has a second pre-compensation amount; and / or the side wall of the end of the preset line data expands outward relative to the side wall of the end of the designed line and has a third pre-compensation amount.

10. A circuit board, characterized in that: The circuit board is manufactured by the circuit board manufacturing method according to any one of claims 1 to 9.

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