Incremental encoder signal preprocessing circuit

Abstract

The invention provides an incremental encoder signal preprocessing circuit which comprises a preprocessing circuit arranged between an incremental encoder and a rear-end processing circuit, and the incremental encoder comprises a first output mode and a second output mode. The preprocessing circuit comprises a first resistance processing module connected with the first output mode and a second resistance processing module connected with the second output mode, and voltage released by the first output mode forms first preprocessing voltage through the first resistance processing module. Voltage released in the second output mode forms second preprocessing voltage through the second resistance processing module, and the preprocessing circuit further comprises a voltage processing module connected with the first preprocessing voltage and the second preprocessing voltage and an output resistance processing module arranged behind the voltage processing module. The second pre-processing voltage forms a third pre-processing voltage through the voltage processing module, the third pre-processing voltage forms an output voltage through the output resistance processing module, and the front-end signal can be converted into a unified output signal.

Description

Technical Field

[0001] The invention relates to the technical field of circuit control, and in particular to an incremental encoder signal preprocessing circuit. Background Art

[0002] In the prior art, various output forms of incremental encoders are inconsistent (for example, single-ended output signals and differential output signals). Due to the different electrical output forms of incremental encoders, the robustness and flexibility of various back-end application circuit system designs are restricted. Therefore, it is urgent to design a preprocessing circuit to convert various front-end signals into a unified output signal. Summary of the invention

[0003] In view of the deficiencies in the prior art, an object of the present invention is to provide an incremental encoder signal preprocessing circuit, aiming to solve the technical problems mentioned in the background technology.

[0004] In order to achieve the above object, the present invention is implemented by the following technical solutions:

[0005] A preprocessing circuit for an incremental encoder signal comprises a preprocessing circuit arranged between an incremental encoder and a back-end processing circuit, wherein the incremental encoder comprises a first output mode and a second output mode, the preprocessing circuit comprises a first resistance processing module connected to the first output mode, and a second resistance processing module connected to the second output mode, wherein a voltage released by the first output mode forms a first preprocessing voltage via the first resistance processing module, and a voltage released by the second output mode forms a second preprocessing voltage via the second resistance processing module, the preprocessing circuit further comprises a voltage processing module connected to the first preprocessing voltage and the second preprocessing voltage, and an output resistance processing module arranged behind the voltage processing module, wherein the second preprocessing voltage forms a third preprocessing voltage via the voltage processing module, and the third preprocessing voltage forms an output voltage via the output resistance processing module.

[0006] According to one aspect of the above technical solution, the first output mode includes a first signal line terminal 1 and a voltage reference point 1, and the second output mode includes a first signal line terminal 2 and a voltage reference point 2.

[0007] According to one aspect of the above technical solution, the first resistance processing module includes a first processing unit connected to the first signal line terminal 1, and a second processing unit connected to the voltage reference point 1, the first processing unit includes a first conductive wire, and resistors 1 and 3 arranged on the first conductive wire, one end of the first conductive wire is supplied with voltage, and the other end is grounded, the second processing unit includes a second conductive wire, and resistors 2 and 4 arranged on the second conductive wire, one end of the second conductive wire is supplied with voltage, and the other end is grounded.

[0008] According to one aspect of the above technical solution, the second resistance processing module includes a third processing unit connected to the first signal line terminal two, and a fourth processing unit connected to the voltage reference point two, the third processing unit includes a third conductive line, and resistors six and eight arranged on the third conductive line, one end of the third conductive line is voltage-supplied and the other end is grounded, the fourth processing unit includes a fourth conductive line, and resistors seven and nine arranged on the fourth conductive line, one end of the fourth conductive line is voltage-supplied and the other end is grounded.

[0009] According to one aspect of the above technical solution, the first output mode includes a second signal line terminal 1 and a third signal line terminal 1, and the second output mode includes a second signal line terminal 2 and a third signal line terminal 2.

[0010] According to one aspect of the above technical solution, the first resistance processing module includes a first processing unit connected to the second signal line terminal 1, and a second processing unit connected to the third signal line terminal 1, the first processing unit includes a first conductive wire, and resistors 1 and 3 arranged on the first conductive wire, one end of the first conductive wire is voltage-supplied and the other end is grounded, the second processing unit includes a second conductive wire, and resistors 2 and 4 arranged on the second conductive wire, one end of the second conductive wire is voltage-supplied and the other end is grounded.

[0011] According to one aspect of the above technical solution, the second resistance processing module includes a third processing unit connected to the second signal line terminal 2, and a fourth processing unit connected to the third signal line terminal 2, the third processing unit includes a third conductive line, and resistors 6 and 8 arranged on the third conductive line, one end of the third conductive line is voltage-supplied, and the other end is grounded, the fourth processing unit includes a fourth conductive line, and resistors 7 and 9 arranged on the fourth conductive line, one end of the fourth conductive line is voltage-supplied, and the other end is grounded.

[0012] According to one aspect of the above technical solution, the voltage processing module includes a first voltage comparator connected to the first signal line terminal one and the voltage reference point one, and a second voltage comparator connected to the first signal line terminal two and the voltage reference point two, one end of the first voltage comparator is for voltage supply and the other end is for grounding.

[0013] According to one aspect of the above technical solution, the voltage processing module includes a first voltage comparator connected to the second signal line terminal 1 and the third signal line terminal 1, and a second voltage comparator connected to the second signal line terminal 2 and the third signal line terminal 2, one end of the first voltage comparator is for voltage supply and the other end is for grounding.

[0014] According to one aspect of the above technical solution, the output resistance processing module includes a fifth conductive wire arranged behind the first voltage comparator, and a sixth conductive wire arranged behind the second voltage comparator, a resistor five is arranged on the fifth conductive wire, and a resistor ten is arranged on the sixth conductive wire, and the fifth conductive wire and the sixth conductive wire both have one end for supplying voltage and one end for connecting wires.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] First, the resistance value of the voltage released by the first output mode is controlled within a range through the first resistance processing module, and then the resistance value of the voltage released by the second output mode is controlled within a range through the second resistance processing module, so as to limit the voltage released by the first output mode and the voltage released by the second output mode, and control both of them within a small range to achieve primary control, and then compare the first preprocessing voltage and the second preprocessing voltage through the voltage processing module, and control the voltages of the two again within a small range to achieve secondary control. Since they have been controlled twice, their voltages are very similar. Finally, the third preprocessing voltage is limited to an output form of 5V through the output resistance processing module, and the output form is unified, so that the output of the incremental encoder can be well adapted to the back-end processing circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a structural block diagram of the incremental encoder signal preprocessing circuit in the first embodiment of the present invention;

[0018] Figure 2 It is a structural block diagram of the preprocessing circuit in the first embodiment of the present invention;

[0019] Figure 3 It is a structural block diagram of the preprocessing circuit in the second embodiment of the present invention;

[0020] Description of main component symbols:

[0021]

[0022]

[0023] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0024] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Several embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thorough and comprehensive.

[0025] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "left", "right" and similar expressions used herein are for illustrative purposes only.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0027] See also Figure 1 to Figure 2 , shown is an incremental encoder signal preprocessing circuit in the first embodiment of the present invention, including a preprocessing circuit 20 arranged between the incremental encoder 10 and the back-end processing circuit 30, the incremental encoder 10 includes a first output mode and a second output mode, the preprocessing circuit 20 includes a first resistance processing module connected to the first output mode, and a second resistance processing module connected to the second output mode, the voltage released by the first output mode forms a first preprocessing voltage through the first resistance processing module, and the voltage released by the second output mode forms a second preprocessing voltage through the second resistance processing module, the preprocessing circuit 20 also includes a voltage processing module connected to the first preprocessing voltage and the second preprocessing voltage, and an output resistance processing module arranged behind the voltage processing module, the second preprocessing voltage forms a third preprocessing voltage through the voltage processing module, and the third preprocessing voltage forms an output voltage through the output resistance processing module.

[0028] It can be understood that the present invention first controls the resistance value of the voltage released by the first output mode within a range through the first resistance processing module, and then controls the resistance value of the voltage released by the second output mode within a range through the second resistance processing module, so as to limit the voltage released by the first output mode and the voltage released by the second output mode, and control both of them within a small range to achieve primary control, and then compare the first preprocessing voltage and the second preprocessing voltage through the voltage processing module, and control the voltages of the two again within a small range to achieve secondary control. Since they have been controlled twice, their voltages are very similar. Finally, the third preprocessing voltage is limited to an output form of 5V through the output resistance processing module, and the output form is unified, so that the output of the incremental encoder 10 can be well adapted to the back-end processing circuit 30.

[0029] Specifically, the first output mode includes a first signal line terminal 1 and a voltage reference point 1 41 , and the second output mode includes a first signal line terminal 2 42 and a voltage reference point 2 43 .

[0030] It can be understood that this structural form indicates that the incremental encoder 10 outputs a single-ended signal.

[0031] Further, the first resistance processing module includes a first processing unit connected to the first signal line terminal 1, and a second processing unit connected to the voltage reference point 1 41, the first processing unit includes a first conductive line 44, and a resistor 1 45 and a resistor 3 48 arranged on the first conductive line 44, one end of the first conductive line 44 is voltage-supplied and the other end is grounded, the second processing unit includes a second conductive line 46, and a resistor 2 47 and a resistor 49 arranged on the second conductive line 46, one end of the second conductive line 46 is voltage-supplied and the other end is grounded;

[0032] The second resistance processing module includes a third processing unit connected to the first signal line terminal 2 42, and a fourth processing unit connected to the voltage reference point 2 43, the third processing unit includes a third conductive line 53, and a resistor 6 54 and a resistor 8 57 arranged on the third conductive line 53, one end of the third conductive line 53 is for voltage supply and the other end is for grounding, the fourth processing unit includes a fourth conductive line 55, and a resistor 7 56 and a resistor 9 58 arranged on the fourth conductive line 55, one end of the fourth conductive line 55 is for voltage supply and the other end is for grounding;

[0033] It can be understood that the first signal line terminal one and the voltage reference point one 41 are a group, and the first signal line terminal two 42 and the voltage reference point two 43 are another group. First, the voltage released by the first signal line terminal one reaches the first conductive wire 44, passes through the resistor one 45 and the resistor three 48, and is output as the first preprocessing voltage. The voltage released by the voltage reference point one 41 reaches the second conductive wire 46, passes through the resistor two 47 and the resistor four 49, and is output as the first preprocessing voltage. At the same time, the voltage released by the first signal line terminal two 42 reaches the third conductive wire 53, passes through the resistor six 54 and the resistor eight 57, and is output as the second preprocessing voltage. The voltage released by the voltage reference point two 43 reaches the fourth conductive wire 55, passes through the resistor seven 56 and the resistor nine 58, and is output as the second preprocessing voltage.

[0034] Furthermore, the voltage processing module includes a first voltage comparator 50 connected to the first signal line terminal 1 and the voltage reference point 1 41, and a second voltage comparator 59 connected to the first signal line terminal 2 42 and the voltage reference point 2 43, one end of the first voltage comparator 50 is voltage supply and the other end is grounded.

[0035] It can be understood that the first preprocessed voltage after processing of the first signal line terminal 1 and the voltage reference point 1 41 has become closer, and then the two are optimized again through the first voltage comparator 50 to make the two closer, and then the third preprocessed voltage is output. Similarly, the second preprocessed voltage after processing of the first signal line terminal 2 42 and the voltage reference point 2 43 has become closer, and then the two are optimized again through the second voltage comparator 59 to make the two closer, and then the third preprocessed voltage is output.

[0036] Furthermore, the output resistance processing module includes a fifth conductive wire 51 arranged behind the first voltage comparator 50, and a sixth conductive wire 60 arranged behind the second voltage comparator 59, the fifth conductive wire 51 is provided with a resistor 52, the sixth conductive wire 60 is provided with a resistor 61, and the fifth conductive wire 51 and the sixth conductive wire 60 both have one end for supplying voltage and one end for connecting wires.

[0037] It can be understood that after two levels of control, the voltage can be converted into a 5V output form through the resistor 52 on the fifth conductive line 51 and the resistor 10 61 on the sixth conductive line 60 respectively.

[0038] Preferably, the present invention provides a ratio of values ​​between resistors and an embodiment of each resistor in the present application:

[0039] Resistor one: resistor three = 100:47; resistor two: resistor four = 100:10; resistor six: resistor eight = 100:47; resistor seven: resistor nine = 100:10.

[0040] The values ​​of resistors 3 and 8 are 320k~560k.

[0041] In this embodiment, resistor 1: 10k; resistor 3: 470k; resistor 2: 10k; resistor 4: 1k; resistor 5: 10k; resistor 6: 10k; resistor 8: 470k; resistor 7: 10k; resistor 9: 1k; resistor 10: 10k.

[0042] In summary, the incremental encoder signal preprocessing circuit in the above embodiment of the present invention can output a 5V output form through the preprocessing circuit 20, thereby unifying the output form so that the output of the incremental encoder 10 can be well adapted to the back-end processing circuit 30.

[0043] Please refer to Figure 3 , which shows an incremental encoder signal preprocessing circuit 20 in a second embodiment of the present invention. The difference between this embodiment and the first embodiment is that:

[0044] The first output mode includes a second signal line terminal 70 and a third signal line terminal 71 , and the second output mode includes a second signal line terminal 72 and a third signal line terminal 73 .

[0045] It can be understood that this structural form indicates that the incremental encoder 10 outputs a differential signal.

[0046] Further, the first resistance processing module includes a first processing unit connected to the second signal line terminal 1 70, and a second processing unit connected to the third signal line terminal 1 71, the first processing unit includes a first conductive line 44, and a resistor 1 45 and a resistor 3 48 arranged on the first conductive line 44, one end of the first conductive line 44 is for voltage supply and the other end is for grounding, the second processing unit includes a second conductive line 46, and a resistor 2 47 and a resistor 49 arranged on the second conductive line 46, one end of the second conductive line 46 is for voltage supply and the other end is for grounding, Grounded; the second resistance processing module includes a third processing unit connected to the second signal line terminal 72, and a fourth processing unit connected to the third signal line terminal 73, the third processing unit includes a third conductive line 53, and a resistor six 54 and a resistor eight 57 arranged on the third conductive line 53, one end of the third conductive line 53 is supplied with voltage, and the other end is grounded, the fourth processing unit includes a fourth conductive line 55, and a resistor seven 56 and a resistor nine 58 arranged on the fourth conductive line 55, one end of the fourth conductive line 55 is supplied with voltage, and the other end is grounded.

[0047] It can be understood that the second signal line terminal 1 70 and the third signal line terminal 1 71 are a group, and the second signal line terminal 2 72 and the third signal line terminal 2 73 are another group. First, the voltage released by the second signal line terminal 1 70 reaches the first conductive line 44, passes through the resistor 1 45 and the resistor 3 48, and is output as the first preprocessing voltage. The voltage released by the third signal line terminal 1 71 reaches the second conductive line 46, passes through the resistor 2 47 and the resistor 49, and is output as the first preprocessing voltage. At the same time, the voltage released by the second signal line terminal 2 72 reaches the third conductive line 53, passes through the resistor 6 54 and the resistor 8 57, and is output as the second preprocessing voltage. The voltage released by the third signal line terminal 2 73 reaches the fourth conductive line 55, passes through the resistor 7 56 and the resistor 9 58, and is output as the second preprocessing voltage.

[0048] Furthermore, the voltage processing module includes a first voltage comparator 50 connected to the second signal line terminal 1 70 and the third signal line terminal 1 71, and a second voltage comparator 59 connected to the second signal line terminal 2 72 and the third signal line terminal 2 73, and one end of the first voltage comparator 50 is supplied with voltage and the other end is grounded.

[0049] It can be understood that the first preprocessed voltage after processing of the second signal line terminal 70 and the third signal line terminal 71 has become closer, and then the two are optimized again through the first voltage comparator 50 to make the two closer, and then the third preprocessed voltage is output. Similarly, the second preprocessed voltage after processing of the second signal line terminal 72 and the third signal line terminal 73 has become closer, and then the two are optimized again through the second voltage comparator 59 to make the two closer, and then the third preprocessed voltage is output.

[0050] Except for the above differences, the rest of the structure of this embodiment is consistent with that of the first embodiment, and the ratio and value of each resistor are also consistent with those of the first embodiment.

[0051] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0052] The above-mentioned embodiments only express several implementation methods of the present invention, and the description thereof is relatively specific and detailed, but it cannot be understood as limiting the scope of the patent of the present invention. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, which all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.

Claims

1. An incremental encoder signal preprocessing circuit, characterized in that: The invention comprises a preprocessing circuit arranged between an incremental encoder and a back-end processing circuit, wherein the incremental encoder comprises a first output mode and a second output mode, the preprocessing circuit comprises a first resistance processing module connected to the first output mode and a second resistance processing module connected to the second output mode, the voltage released by the first output mode forms a first preprocessing voltage through the first resistance processing module, and the voltage released by the second output mode forms a second preprocessing voltage through the second resistance processing module, the preprocessing circuit further comprises a voltage processing module connected to the first preprocessing voltage and the second preprocessing voltage, and an output resistance processing module arranged behind the voltage processing module, the second preprocessing voltage forms a third preprocessing voltage through the voltage processing module, and the third preprocessing voltage forms an output voltage through the output resistance processing module.

2. The incremental encoder signal preprocessing circuit according to claim 1, characterized in that: The first output mode includes a first signal line terminal 1 and a voltage reference point 1, and the second output mode includes a first signal line terminal 2 and a voltage reference point 2.

3. The incremental encoder signal preprocessing circuit according to claim 2, characterized in that: The first resistance processing module includes a first processing unit connected to the first signal line terminal 1, and a second processing unit connected to the voltage reference point 1, the first processing unit includes a first conductive wire, and resistors 1 and 3 arranged on the first conductive wire, one end of the first conductive wire is voltage-supplied and the other end is grounded, the second processing unit includes a second conductive wire, and resistors 2 and 4 arranged on the second conductive wire, one end of the second conductive wire is voltage-supplied and the other end is grounded.

4. The incremental encoder signal preprocessing circuit according to claim 3, characterized in that: The second resistance processing module includes a third processing unit connected to the first signal line terminal 2, and a fourth processing unit connected to the voltage reference point 2, the third processing unit includes a third conductive line, and resistors 6 and 8 arranged on the third conductive line, one end of the third conductive line is voltage-supplied and the other end is grounded, the fourth processing unit includes a fourth conductive line, and resistors 7 and 9 arranged on the fourth conductive line, one end of the fourth conductive line is voltage-supplied and the other end is grounded.

5. The incremental encoder signal preprocessing circuit according to claim 1, characterized in that: The first output mode includes a second signal line terminal 1 and a third signal line terminal 1, and the second output mode includes a second signal line terminal 2 and a third signal line terminal 2.

6. The incremental encoder signal preprocessing circuit according to claim 5, characterized in that: The first resistance processing module includes a first processing unit connected to the second signal line terminal 1, and a second processing unit connected to the third signal line terminal 1, the first processing unit includes a first conductive line, and resistors 1 and 3 arranged on the first conductive line, one end of the first conductive line is voltage-supplied and the other end is grounded, the second processing unit includes a second conductive line, and resistors 2 and 4 arranged on the second conductive line, one end of the second conductive line is voltage-supplied and the other end is grounded.

7. The incremental encoder signal preprocessing circuit according to claim 6, characterized in that: The second resistance processing module includes a third processing unit connected to the second signal line terminal 2, and a fourth processing unit connected to the third signal line terminal 2, the third processing unit includes a third conductive line, and resistors 6 and 8 arranged on the third conductive line, one end of the third conductive line is voltage-supplied and the other end is grounded, the fourth processing unit includes a fourth conductive line, and resistors 7 and 9 arranged on the fourth conductive line, one end of the fourth conductive line is voltage-supplied and the other end is grounded.

8. The incremental encoder signal preprocessing circuit according to claim 4, characterized in that: The voltage processing module includes a first voltage comparator connected to the first signal line terminal 1 and the voltage reference point 1, and a second voltage comparator connected to the first signal line terminal 2 and the voltage reference point 2, one end of the first voltage comparator is for voltage supply and the other end is for grounding.

9. The incremental encoder signal preprocessing circuit according to claim 8, characterized in that: The voltage processing module includes a first voltage comparator connected to the second signal line terminal 1 and the third signal line terminal 1, and a second voltage comparator connected to the second signal line terminal 2 and the third signal line terminal 2. One end of the first voltage comparator is for voltage supply and the other end is for grounding.

10. The incremental encoder signal preprocessing circuit according to claim 8 or 9, characterized in that: The output resistance processing module includes a fifth conductive line arranged behind the first voltage comparator and a sixth conductive line arranged behind the second voltage comparator. A resistor five is arranged on the fifth conductive line, and a resistor ten is arranged on the sixth conductive line. The fifth conductive line and the sixth conductive line both have voltage supply at one end and connection at the other end.

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