Fault response control method, electronic equipment and readable storage medium

Abstract

The invention provides a fault response control method, electronic equipment and a readable storage medium. The method comprises the following steps for each type of fault response: judging whether the fault response is not inhibited by other fault responses which are being executed except the fault response; if it is judged that the fault response is not restrained by other fault responses which are being executed except the fault response, whether the execution condition of the fault response is triggered or not is judged; if it is judged that the execution condition of the fault response is triggered, the fault response is executed. According to the method, diversified requirements of different manufacturers on fault responses can be met, effective coordination between the fault responses can be realized, and mutual interference and conflict between the fault responses are avoided.

Description

Technical Field

[0001] The present invention relates to the field of vehicle control technology, and in particular to a fault response control method, an electronic device and a readable storage medium. Background Art

[0002] The complex controller on the vehicle will diagnose all kinds of input signals, controls, and output signals in the system. If an abnormality is identified in the diagnosis, it will be determined as a fault, and then post-fault processing will be performed to ensure the safety of vehicle personnel. Among them, the implementation of the safety mechanism in the functional safety software also performs similar diagnosis and then the control system responds to the fault to enter a safe state. However, because the quality of vehicles, configurations and batteries of various vehicle manufacturers and battery pack manufacturers are different, the requirements for each fault response are also different. Among them, there are more than a dozen different response modes for fault response, such as lower high voltage and different levels of power limit. At the same time, there are differences in fault recovery, such as fault response that does not recover and fault response that can recover. In addition, some manufacturers have different fault responses that suppress other fault responses. Based on these requirements, the development of functional safety fault responses for battery management systems has the following difficulties:

[0003] 1. Diverse fault response requirements: Different vehicle manufacturers and battery pack manufacturers have different requirements for fault response due to differences in vehicle quality, configuration and battery quality. Therefore, designing a platform control strategy that can meet a variety of different fault response requirements is a complex task.

[0004] 2. Priority and coordination of fault responses: When a vehicle has multiple faults at the same time, it is a technical challenge to determine the priority of different fault responses and coordinate them. In particular, in some cases, a certain fault response may inhibit the execution of other fault responses, which further increases the complexity of the platform control strategy.

[0005] 3. Integration of functional safety mechanisms and software limitations: The safety mechanisms in functional safety software need to be tightly integrated with the fault response strategy to ensure that the system can be quickly and accurately controlled to enter a safe state when an abnormality is diagnosed. This requires a deep understanding of the functional safety standards and their application to actual fault response strategies. However, due to the existence of safety mechanisms, functional safety software cannot implement uncertain software strategies such as AI or machine learning, which also limits the means of implementing platform control strategies.

[0006] 4. Universality and flexibility of platform control strategy: Designing a platform control strategy means finding a universal and flexible solution to meet the needs of different manufacturers. This requires finding a balance between standardization and customization to ensure that the strategy can meet the basic requirements of most manufacturers and can be flexibly adjusted to meet specific needs.

[0007] Due to these difficulties, the current functional safety fault response software development of battery management systems is developed once for each customer project. In actual applications, a lot of time and effort is required for customized development, which increases costs and complexity.

[0008] It should be noted that the information disclosed in the background technology section of the invention is only intended to deepen the understanding of the general background technology of the invention, and should not be regarded as an admission or suggestion in any form that the information constitutes prior art already known to those skilled in the art. Summary of the invention

[0009] The purpose of the present invention is to provide a fault response control method, an electronic device and a readable storage medium, which can not only meet the diverse needs of different manufacturers for fault responses, but also achieve effective coordination between fault responses and avoid mutual interference and conflict between fault responses.

[0010] To achieve the above object, the present invention provides a fault response control method, the method comprising performing the following steps for each type of fault response:

[0011] Determining whether the fault response is not suppressed by other fault responses being executed other than the fault response;

[0012] If it is determined that the fault response is not suppressed by other fault responses being executed other than the fault response, then determining whether the execution condition of the fault response is triggered;

[0013] If it is determined that the execution condition of the fault response is triggered, the fault response is executed.

[0014] Optionally, the determining whether the fault response is not suppressed by other fault responses being executed except the fault response includes:

[0015] Obtain a fault response suppression summary binary string corresponding to the fault response, wherein each bit position in the fault response suppression summary binary string corresponds to a type of fault response, a bit position 1 indicates that the corresponding type of fault response will not suppress the fault response, and a bit position 0 indicates that the corresponding type of fault response will suppress the fault response;

[0016] Obtain a fault response summary binary string, wherein each bit position in the fault response summary binary string corresponds to a type of fault response, a bit position 1 indicates that a fault response of a corresponding type is being executed, a bit position 0 indicates that a fault response of a corresponding type is not being executed, and the type of the fault response corresponding to the same bit position in the fault response summary binary string and the fault response suppression summary binary string is the same;

[0017] Performing a bitwise AND operation on the fault response suppression summary binary string corresponding to the fault response and the fault response summary binary string bit by bit;

[0018] If the result of the bitwise AND operation is greater than 0, it is determined that the fault response is not suppressed by other fault responses being executed except for the fault response.

[0019] Optionally, obtaining a fault response suppression summary binary string corresponding to the fault response includes:

[0020] According to the suppression relationship between the fault response and each type of fault response obtained by pre-calibration, a fault response suppression summary result corresponding to the fault response is obtained;

[0021] According to the fault response suppression summary result corresponding to the fault response and a preset mapping relationship between the fault response type and the binary string bit, the fault response suppression summary binary string corresponding to the fault response is obtained.

[0022] Optionally, the acquisition of the fault response summary binary string includes:

[0023] Obtain the summary result of the fault response according to the type information of all fault responses being executed;

[0024] According to the fault response summary result and a preset mapping relationship between the fault response type and the binary string bit, a fault response summary binary string is obtained.

[0025] Optionally, determining whether an execution condition of the fault response is triggered includes:

[0026] Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response;

[0027] Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred;

[0028] Performing a bitwise AND operation on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit;

[0029] If the result of the bitwise AND operation is greater than 0, it is determined that the execution condition of the fault response is triggered.

[0030] Optionally, after determining that the execution condition of the fault response is triggered, the control method further includes:

[0031] Determine whether the fault response meets the fault recovery non-exit condition;

[0032] If so, continue to execute the fault response after the fault is recovered.

[0033] Optionally, the determining whether the fault response satisfies a fault recovery non-exit condition includes:

[0034] Obtain a fault response result binary string corresponding to the fault response, wherein each bit position in the fault response result binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault triggers the fault response, and a bit position 0 indicates that the corresponding type of fault does not trigger the fault response;

[0035] Obtain a fault self-locking summary binary string, wherein each bit position in the fault self-locking summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault is self-locking, and a bit position 0 indicates that the corresponding type of fault is not self-locking;

[0036] Performing a bitwise AND operation on the fault response result binary string corresponding to the fault response and the fault self-locking summary binary string bit by bit;

[0037] If the result of the bitwise AND operation is greater than 0, it is determined that the fault response meets the fault recovery no-exit condition.

[0038] Optionally, obtaining a fault response result binary string corresponding to the fault response includes:

[0039] Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response;

[0040] Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred;

[0041] A bitwise AND operation is performed on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit to obtain a fault response result binary string corresponding to the fault response.

[0042] Optionally, the step of obtaining a fault self-locking summary binary string includes:

[0043] The fault self-locking summary binary string is obtained according to the self-locking calibration result of each type of fault obtained in advance and the mapping relationship between the preset fault type and the bit of the binary string.

[0044] Optionally, obtaining a fault response trigger summary binary string corresponding to the fault response includes:

[0045] According to the mapping relationship between the fault and the fault response obtained in advance, a summary result of the target fault type that can trigger the fault response is obtained;

[0046] According to the target fault type summary result and the preset mapping relationship between the fault type and the binary string bit, the fault response trigger summary binary string corresponding to the fault response is obtained.

[0047] Optionally, obtaining the fault summary binary string includes:

[0048] Obtain fault identification results;

[0049] A fault summary binary string is obtained according to the fault identification result and a preset mapping relationship between the fault type and the binary string bit.

[0050] To achieve the above object, the present invention further provides an electronic device, including a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the fault response control method described above is implemented.

[0051] To achieve the above object, the present invention further provides a readable storage medium, wherein the readable storage medium stores a computer program, and when the computer program is executed by a processor, the fault response control method described above is implemented.

[0052] Compared with the prior art, the fault response control method, electronic device and readable storage medium provided by the present invention have the following beneficial effects:

[0053] The fault response control method provided by the present invention performs the following steps for each type of fault response corresponding to the battery management system: determine whether the fault response is not suppressed by other fault responses being executed except the fault response; if it is determined that the fault response is not suppressed by other fault responses being executed except the fault response, determine whether the execution condition of the fault response is triggered; if it is determined that the execution condition of the fault response is triggered, execute the fault response. It can be seen that the fault response control method provided by the present invention can not only meet the diverse needs of different manufacturers for fault responses and meet the needs of platform control strategies, but also achieve effective coordination between fault responses and avoid mutual interference and conflict between fault responses. When the fault response control method provided by the present invention is applied to a battery management system, it can help improve the safety, reliability and maintainability of the vehicle, and provide favorable protection for the functional safety of the battery management system.

[0054] Since the electronic device and the readable storage medium provided by the present invention belong to the same inventive concept as the fault response control method provided by the present invention, the electronic device and the readable storage medium provided by the present invention at least have all the beneficial effects of the fault response control method provided by the present invention. For details, please refer to the relevant description of the beneficial effects of the fault response control method provided by the present invention in the above text. Therefore, the beneficial effects of the electronic device and the readable storage medium provided by the present invention will not be described one by one here. BRIEF DESCRIPTION OF THE DRAWINGS

[0055] Figure 1 A schematic flow chart of a fault response control method provided in one embodiment of the present invention;

[0056] Figure 2 A schematic diagram of the overall process of a fault response control method provided by one embodiment of the present invention;

[0057] Figure 3 A schematic diagram of the block structure of an electronic device provided in one embodiment of the present invention. DETAILED DESCRIPTION

[0058] The fault response control method, electronic device and readable storage medium proposed in the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the drawings are in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose provided by the present invention. In order to make the purposes, features and advantages of the present invention more obvious and easy to understand, please refer to the accompanying drawings. It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for people familiar with this technology to understand and read, and are not used to limit the limiting conditions for the implementation of the present invention. Any structural modification, change in proportional relationship or adjustment of size, under the condition of being the same or similar to the effects that can be produced by the present invention and the purposes that can be achieved, should still fall within the scope of the technical content disclosed by the present invention.

[0059] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements. The singular forms "a", "an" and "the" include plural objects, the term "or" is generally used in a sense including "and / or", the term "several" is generally used in a sense including "at least one", and the term "at least two" is generally used in a sense including "two or more". In addition, the terms "first", "second" and "third" are used for descriptive purposes only and are not to be understood as indicating or suggesting relative importance or implicitly indicating the number of the indicated technical features.

[0060] In addition, it should be noted that, in the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0061] The core idea of ​​the present invention is to provide a fault response control method, an electronic device and a readable storage medium. The present invention can not only meet the diverse needs of different manufacturers for fault responses, but also achieve effective coordination between fault responses and avoid mutual interference and conflict between fault responses.

[0062] It should be noted that the fault response control method provided by the present invention can be applied to the electronic device provided by the present invention, and the electronic device can be a hardware device with various operating systems, and the electronic device can be applied to a battery management system to be used as a battery management controller. The battery management system can be applied to a vehicle, and the vehicle can be a passenger vehicle including but not limited to a pure electric or hybrid sedan, a sports utility vehicle (SUV), a bus, a truck, and various commercial vehicles. In addition, it should be noted that, as can be understood by those skilled in the art, the fault response control method provided by the present invention can be applied not only to a battery management system, but also to other systems that require fault response control, and the present invention does not limit this.

[0063] To realize the above idea, the present invention provides a fault response control method, which can be referred to as Figure 1 , which is a flow chart of a fault response control method provided by an embodiment of the present invention. Figure 1 As shown, the fault response control method includes performing the following steps for each type of fault response:

[0064] Step S100: Determine whether the fault response is not suppressed by other fault responses being executed except the fault response.

[0065] If it is determined that the fault response is not suppressed by other fault responses being executed except the fault response, step S200 is executed to determine whether the execution condition of the fault response is triggered.

[0066] If it is determined that the execution condition of the fault response is triggered, step S300 is executed to execute the fault response.

[0067] It can be seen that the fault response control method provided by the present invention can not only meet the diverse needs of different manufacturers for fault response and the needs of platform control strategy, but also achieve effective coordination between fault responses and avoid mutual interference and conflict between fault responses. When the fault response control method provided by the present invention is applied to a battery management system, it can help improve the safety, reliability and maintainability of the vehicle, and provide favorable protection for the functional safety of the battery management system.

[0068] It should be noted that, as can be understood by those skilled in the art, for any type of fault response, if it is determined that the fault response is suppressed by other fault responses being executed other than the fault response, then the fault response will not be executed; if it is determined that the execution condition of the fault response is not triggered and the fault response does not meet the fault recovery non-exit condition, then the fault response will not be executed either.

[0069] In some exemplary implementations, determining whether the fault response is not suppressed by other fault responses being executed other than the fault response includes:

[0070] Obtain a fault response suppression summary binary string corresponding to the fault response, wherein each bit position in the fault response suppression summary binary string corresponds to a type of fault response, a bit position 1 indicates that the corresponding type of fault response will not suppress the fault response, and a bit position 0 indicates that the corresponding type of fault response will suppress the fault response;

[0071] Obtain a fault response summary binary string, wherein each bit position in the fault response summary binary string corresponds to a type of fault response, a bit position 1 indicates that a fault response of a corresponding type is being executed, a bit position 0 indicates that a fault response of a corresponding type is not being executed, and the type of the fault response corresponding to the same bit position in the fault response summary binary string and the fault response suppression summary binary string is the same;

[0072] Performing a bitwise AND operation on the fault response suppression summary binary string corresponding to the fault response and the fault response summary binary string bit by bit;

[0073] If the result of the bitwise AND operation is greater than 0, it is determined that the fault response is not suppressed by other fault responses being executed except for the fault response.

[0074] Therefore, by obtaining the fault response summary binary string and the fault response suppression summary binary string corresponding to the fault response, and performing a bitwise AND operation on the fault response suppression summary binary string corresponding to the fault response and the fault response summary binary string, it is possible to directly and accurately judge whether the fault response is not suppressed by other fault responses being executed except the fault response based on the result of the bitwise AND operation between the two, thereby effectively avoiding misjudgment and missed judgment, and effectively improving the availability and practicality of the fault response control method provided by the present invention.

[0075] In some exemplary implementations, obtaining the fault response suppression summary binary string corresponding to the fault response includes:

[0076] According to the suppression relationship between the fault response and each type of fault response obtained by pre-calibration, a fault response suppression summary result corresponding to the fault response is obtained;

[0077] According to the fault response suppression summary result corresponding to the fault response and a preset mapping relationship between the fault response type and the binary string bit, the fault response suppression summary binary string corresponding to the fault response is obtained.

[0078] Therefore, the present invention not only enables systematic management and configuration of various possible fault responses by presetting the mapping relationship between the fault response type and the bit position of the binary string, but also expands the bit position of the binary string corresponding to the fault response type and the bit position of the fault response suppression summary binary string according to the type of the newly added fault response, thereby realizing the control of the newly added fault response, thereby expanding new customer needs.

[0079] Specifically, please refer to Table 1, which is a fault response suppression calibration result table provided in a specific example of the present invention.

[0080] Table 1 Fault response suppression calibration results

[0081]

[0082] It should be noted that, as those skilled in the art can understand, "1" in Table 1 means that the fault response in the corresponding row will not suppress the fault response in the corresponding column, and "0" in Table 1 means that the fault response in the corresponding row will suppress the fault response in the corresponding column. As shown in Table 1, fault response 1 is the fault response with the highest priority, and other types of fault responses (fault response 2 to fault response n) will not suppress fault response 1, but fault response 1 will suppress other types of fault responses (fault response 2 to fault response n). It should be noted that, as those skilled in the art can understand, for different fault response control items, only simple configuration calibration is required to achieve the manufacturer's personalized customization of the fault response control strategy, which greatly improves the availability and practicality of the fault response control strategy.

[0083] Please continue to refer to Table 2, which is a mapping relationship table between fault response types and binary string bits provided in a specific example of the present invention.

[0084] Table 2 Mapping relationship between fault response type and binary string bit

[0085]

[0086] Therefore, for each type of fault response, it can be determined according to Table 1 which fault responses will suppress the fault response and which fault responses will not suppress the fault response, thereby obtaining the fault response suppression summary result corresponding to the fault response; and then according to Table 2, the bit position 0 corresponding to the fault response that will suppress the fault response and the bit position 1 corresponding to the fault response that will not suppress the fault response can be determined, thereby obtaining the fault response suppression summary binary string corresponding to the fault response.

[0087] It should be noted that, as can be understood by those skilled in the art, the mapping relationship between faults and fault responses shown in Table 1 can be flexibly adjusted and expanded according to customer and project requirements, and only simple configuration calibration is required for specific projects. It should also be noted that, as can be understood by those skilled in the art, the mapping relationship between fault response types and binary string bits shown in Table 2 can also be flexibly adjusted and expanded according to customer and project requirements.

[0088] Furthermore, taking the battery management system as an example, the fault response types mainly include: immediate reduction of high voltage, slow reduction of high voltage, power limitation to 0, power limitation to limp home, high-level power limitation, medium-level power limitation, low-level power limitation, prohibition of feedback, prohibition of charging, etc.

[0089] In some exemplary implementations, obtaining the fault response summary binary string includes:

[0090] Obtain the summary result of the fault response according to the type information of all fault responses being executed;

[0091] According to the fault response summary result and a preset mapping relationship between the fault response type and the binary string bit, a fault response summary binary string is obtained.

[0092] Specifically, according to the fault response summary result and the mapping relationship between the preset fault response type and the binary string bit, for each fault response being executed, the bit position corresponding to the fault response is set to 1, and for each fault response not being executed, the bit position corresponding to the fault response is set to 0, so that the fault response summary binary string can be obtained.

[0093] In some exemplary implementations, determining whether the execution condition of the fault response is triggered includes:

[0094] Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response;

[0095] Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred;

[0096] Performing a bitwise AND operation on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit;

[0097] If the result of the bitwise AND operation is greater than 0, it is determined that the execution condition of the fault response is triggered.

[0098] Therefore, by obtaining the fault response trigger summary binary string corresponding to the fault response and obtaining the fault summary binary string, and performing a bit-by-bit AND operation on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string, it is possible to directly and accurately determine whether the execution condition of the fault response is triggered based on the result of the bit-by-bit AND operation between the two, thereby effectively avoiding misjudgment and missed judgment, and effectively improving the availability and practicality of the fault response control method provided by the present invention.

[0099] In some exemplary implementations, obtaining the fault response trigger summary binary string corresponding to the fault response includes:

[0100] According to the mapping relationship between the fault and the fault response obtained in advance, a summary result of the target fault type that can trigger the fault response is obtained;

[0101] According to the target fault type summary result and the preset mapping relationship between the fault type and the binary string bit, the fault response trigger summary binary string corresponding to the fault response is obtained.

[0102] Therefore, the present invention obtains the target fault type summary result that can trigger the fault response according to the mapping relationship between the fault and the fault response obtained in advance, and obtains the fault response trigger summary binary string corresponding to the fault response according to the target fault type summary result and the mapping relationship between the pre-set fault type and the binary string bit, so as to realize the correspondence between configurable faults and fault responses, so that the fault response control method provided by the present invention can be flexibly adjusted according to the actual needs of different manufacturers.

[0103] Specifically, for each target fault type that can trigger the fault response, the bit position corresponding to the target fault type is set to 1, and for each fault type that cannot trigger the fault response, the bit position corresponding to the fault type is set to 0, so that the fault response trigger summary binary string corresponding to the fault response can be obtained.

[0104] Please continue to refer to Table 3, which is a mapping relationship table between faults and fault responses provided in a specific example of the present invention.

[0105] Table 3 Mapping relationship between faults and fault responses

[0106]

[0107] It should be noted that, as can be understood by those skilled in the art, "1" in Table 3 indicates that the fault in the corresponding column will trigger the fault response in the corresponding row, and "0" in Table 3 indicates that the fault in the corresponding column will not trigger the fault response in the corresponding row. As shown in Table 3, fault 1 will trigger fault response 1, fault 2 and fault 3 will both trigger fault response 2, ..., fault Z will trigger fault response 3 and fault response n.

[0108] Please continue to refer to Table 4, which is a mapping relationship table between fault types and binary string bits provided in a specific example of the present invention.

[0109] Table 4 Mapping relationship between fault types and binary string bits

[0110]

[0111] Therefore, for each type of fault response, it can be determined according to Table 3 which types of faults can trigger the fault response and which types of faults will not trigger the fault response, so as to obtain the target fault type summary result that can trigger the fault response. Then, according to Table 4, the bit position corresponding to the target fault type that can trigger the fault response can be set to 1, and the other bits can be set to 0, so as to obtain the fault response trigger summary binary string corresponding to the fault response.

[0112] It should be noted that, as can be understood by those skilled in the art, the mapping relationship between faults and fault responses shown in Table 3 can be flexibly adjusted and expanded according to customer and project requirements, and only simple configuration calibration is required for specific projects. It should also be noted that, as can be understood by those skilled in the art, the mapping relationship between fault types and binary string bits shown in Table 4 can also be flexibly adjusted and expanded according to customer and project requirements. Specifically, the number of bits of the binary string corresponding to the fault type can be expanded according to the type of newly added faults, thereby expanding new customer requirements.

[0113] Furthermore, taking the battery management system as an example, the main types of faults involved in functional safety are single cell sampling, module temperature sampling, current signal sampling, relay signal sampling, high voltage signal sampling, and chip, communication, calculation conversion processing and other faults on the relevant sampling paths. Therefore, by standardizing the fault types and uniformly classifying and defining the possible fault types in the battery management system, a common standard can be set for fault description and identification between different manufacturers, which greatly simplifies the fault diagnosis process and improves accuracy.

[0114] In some exemplary implementations, obtaining a fault summary binary string includes:

[0115] Obtain fault identification results;

[0116] A fault summary binary string is obtained according to the fault identification result and a preset mapping relationship between the fault type and the binary string bit.

[0117] Specifically, according to the fault identification result and the mapping relationship between the pre-set fault type and the binary string bit, the bit position corresponding to the identified fault (i.e., the fault that has occurred) is set to 1, and the bit position corresponding to the unidentified fault (i.e., the fault that has not occurred) is set to 0, so as to obtain the fault summary binary string.

[0118] In some exemplary embodiments, after determining that the execution condition of the fault response is triggered, the fault response control method further includes:

[0119] Determine whether the fault response meets the fault recovery non-exit condition;

[0120] If so, continue to execute the fault response after the fault is recovered.

[0121] Therefore, by continuing to execute the fault response after fault recovery when it is determined that the fault response meets the fault recovery non-exit condition, the corresponding fault response can be maintained after fault recovery, which can meet the customer's needs for fault recovery exit or fault recovery non-exit.

[0122] In some exemplary implementations, determining whether the fault response satisfies the fault recovery non-exit condition includes:

[0123] Obtain a fault response result binary string corresponding to the fault response, wherein each bit in the fault response result binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault triggers the fault response, and a bit position 0 indicates that the corresponding type of fault does not trigger the fault response;

[0124] Obtain a fault self-locking summary binary string, wherein each bit position in the fault self-locking summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault is self-locking, and a bit position 0 indicates that the corresponding type of fault is not self-locking;

[0125] Performing a bitwise AND operation on the fault response result binary string corresponding to the fault response and the fault self-locking summary binary string bit by bit;

[0126] If the result of the bitwise AND operation is greater than 0, it is determined that the fault response meets the fault recovery no-exit condition.

[0127] Since for each type of fault response, the value of each bit in the fault response result binary string corresponding to the fault response indicates whether the corresponding type of fault triggers the fault response, and the value of each bit in the fault self-locking summary binary string indicates whether the corresponding type of fault is self-locking, when the result of the bitwise AND operation of the corresponding bit is greater than 0, it indicates that the fault self-locking of the fault response is triggered, so that it can be determined that the fault response meets the fault recovery non-exit condition.

[0128] It should be noted that, as can be understood by those skilled in the art, fault self-locking means that the corresponding fault response is maintained after the fault is recovered, and fault non-self-locking means that the corresponding fault response is exited after the fault is recovered. In addition, it should be noted that, as can be understood by those skilled in the art, for each fault response that meets the fault recovery non-exit condition, there is no need to perform the judgment of step S100 and step S200 on the fault response in the subsequent control cycle.

[0129] In some exemplary implementations, the step of obtaining a fault self-locking summary binary string includes:

[0130] The fault self-locking summary binary string is obtained according to the self-locking calibration result of each type of fault obtained in advance and the mapping relationship between the preset fault type and the bit of the binary string.

[0131] Specifically, according to the self-locking calibration results of each type of fault and the mapping relationship between the pre-set fault type and the binary string bit, the bit position corresponding to the fault type with the self-locking calibration result being self-locking is set to 1, and the bit position corresponding to the fault type with the self-locking calibration result being non-self-locking is set to 0, so as to obtain the fault self-locking summary binary string.

[0132] Please continue to refer to Table 5, which is a fault self-locking calibration result table provided in a specific example of the present invention.

[0133] Table 5 Fault self-locking calibration results

[0134]

[0135] It should be noted that, as can be understood by those skilled in the art, "1" in Table 5 indicates that the corresponding type of fault is self-locking, and "0" indicates that the corresponding type of fault is not self-locking.

[0136] In some exemplary implementations, obtaining a fault response result binary string corresponding to the fault response includes:

[0137] Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response;

[0138] Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred;

[0139] A bitwise AND operation is performed on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit to obtain a fault response result binary string corresponding to the fault response.

[0140] Since for each type of fault response, the value of each bit in the fault response trigger summary binary string corresponding to the fault response indicates whether the corresponding type of fault will trigger the fault response, and the value of each bit in the fault summary binary string indicates whether the corresponding type of fault has occurred, the result of the bitwise AND operation of the corresponding bits indicates whether the corresponding type of fault triggers the fault response, and the fault response result binary string corresponding to the fault response can be obtained according to the result of the bitwise AND operation of the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string.

[0141] It should be noted that, as can be understood by those skilled in the art, the specific contents of how to obtain the fault response trigger summary binary string corresponding to the fault response and how to obtain the fault summary binary string can be referred to the relevant description above, which will not be repeated here.

[0142] Combine the following Figure 2 , the overall process of the fault response control method provided by the present invention is described. Please refer to Figure 2 , which is a schematic diagram of the overall flow of a fault response control method provided by an embodiment of the present invention. Figure 2 As shown, the calculation can be performed cyclically one by one according to the number of fault responses. For fault response i, the fault suppression value y corresponding to the fault response is first determined. i Is it 0? If not, continue to execute the fault response and continue the calculation of the next fault response (i.e., let i=i+1). If the fault suppression value y corresponding to the fault response is i If the bitwise AND operation result of the fault response suppression summary binary string and the fault response summary binary string corresponding to the fault response is equal to 0, then determine whether the bitwise AND operation result of the fault response trigger summary binary string and the fault summary binary string corresponding to the fault response is greater than 0. If the bitwise AND operation result is greater than 0, then further determine whether the bitwise AND operation result of the fault response trigger summary binary string and the fault summary binary string corresponding to the fault response is greater than 0. If the bitwise AND operation result of the fault response result binary string and the fault self-locking summary binary string is greater than 0. If the bitwise AND operation result of the fault response result binary string corresponding to the fault response is greater than 0, then the fault suppression value y corresponding to the fault response is set to y. i Assign a value of 1 (i.e., the fault suppression value y i =1), and continue to execute the fault response after the fault is restored (that is, in the subsequent cycle, the fault response is no longer judged by the result of the bitwise AND operation). On the contrary, if the result of the bitwise AND operation of the fault response result binary string corresponding to the fault response and the fault self-locking summary binary string is equal to 0, then the fault suppression value y corresponding to the fault response is i Assign a value of 0 (i.e., the fault suppression value yi =0), and in the next control cycle, it is necessary to continue to perform the judgment operation on the result of the bitwise AND operation on the fault response. If the result of the bitwise AND operation of the fault response result binary string corresponding to the fault response and the fault self-locking summary binary string is equal to 0, the fault response is not executed. If the result of the bitwise AND operation of the fault response suppression summary binary string corresponding to the fault response and the fault response summary binary string is equal to 0, the fault response is not executed, and the operation of the next fault response is continued (that is, let i=i+1). It should be noted that, as can be understood by those skilled in the art, for each type of fault response, the initial value of the fault suppression value corresponding to the fault response is 0.

[0143] Based on the same inventive concept, the present invention also provides an electronic device, please refer to Figure 3 , which is a schematic diagram of a block structure of an electronic device provided by an embodiment of the present invention. Figure 3 As shown, the electronic device includes a processor 101 and a memory 103, and a computer program is stored on the memory 103. When the computer program is executed by the processor 101, the fault response control method described above is implemented. Since the electronic device provided by the present invention and the fault response control method provided by the present invention belong to the same inventive concept, the electronic device provided by the present invention at least has all the beneficial effects of the fault response control method provided by the present invention. For details, reference can be made to the relevant description of the beneficial effects of the fault response control method provided by the present invention in the above text, so the beneficial effects of the electronic device provided by the present invention will not be repeated here one by one.

[0144] like Figure 3 As shown, the electronic device also includes a communication interface 102 and a communication bus 104, wherein the processor 101, the communication interface 102, and the memory 103 complete mutual communication through the communication bus 104. The communication bus 104 includes but is not limited to a CAN bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus. The communication interface 102 is used for communication between the above-mentioned electronic device (such as a battery management controller) and other electronic devices (such as a vehicle controller, a motor controller, etc., not shown in the figure). The communication bus 104 connects the above-mentioned electronic device (such as a battery management controller) and other electronic devices (such as a vehicle controller, a motor controller, etc., not shown in the figure) and other dispersed nodes into a closed-loop system, so that each electronic device can perform multiple working states (parking state, charging state, starting state, running state, vehicle forward and backward state, feedback braking state, mechanical braking state, general fault state, major fault state) Communication and data transmission, thereby realizing the control function of the vehicle.

[0145] The processor 101 referred to in the present invention may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor 101 is the control center of the electronic device, and various interfaces and lines are used to connect various parts of the entire electronic device.

[0146] The memory 103 can be used to store the computer program, and the processor 101 implements various functions of the electronic device by running or executing the computer program stored in the memory 103 and calling the data stored in the memory 103. The memory 103 may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable memory (PROM), electrically programmable memory (EPROM), electrically erasable programmable memory (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, random access memory is available in a variety of forms, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous random access memory (SDRAM), double data rate synchronous random access memory (DDRSDRAM), enhanced synchronous random access memory (ESDRAM), synchronous link (Synchlink) dynamic random access memory (SLDRAM), memory bus (Rambus) direct random access memory (RDRAM), direct memory bus dynamic random access memory (DRDRAM), and memory bus dynamic random access memory (RDRAM), etc.

[0147] The present invention also provides a readable storage medium, wherein a computer program is stored in the readable storage medium, and when the computer program is executed by a processor, the fault response control method described above can be implemented. Since the readable storage medium provided by the present invention and the fault response control method provided by the present invention belong to the same inventive concept, the readable storage medium provided by the present invention at least has all the beneficial effects of the fault response control method provided by the present invention, and the relevant description of the beneficial effects of the fault response control method provided by the present invention can be referred to above, so the beneficial effects of the readable storage medium provided by the present invention will not be described one by one here.

[0148] It should be noted that the readable storage medium provided by the present invention can adopt any combination of one or more computer-readable media. The readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, a system, device or component of electricity, magnetism, light, electromagnetic, infrared or semiconductor, or any combination of the above. More specific examples (non-exhaustive enumeration) of computer-readable storage media include: an electrical connection with one or more wires, a portable computer hard disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this article, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, a device or a device or used in combination with it.

[0149] It should also be noted that a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, device, or device. The program code contained on the computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical cable, RF, etc., or any suitable combination of the above.

[0150] In summary, compared with the prior art, the fault response control method, electronic device and readable storage medium provided by the present invention have the following beneficial effects:

[0151] The present invention performs the following steps for each type of fault response corresponding to the battery management system: determine whether the fault response is not suppressed by other fault responses being executed except the fault response; if it is determined that the fault response is not suppressed by other fault responses being executed except the fault response, determine whether the execution condition of the fault response is triggered; if it is determined that the execution condition of the fault response is triggered, execute the fault response. It can be seen that the present invention can not only meet the diverse needs of different manufacturers for fault responses and meet the needs of platform control strategies, but also achieve effective coordination between fault responses and avoid mutual interference and conflict between fault responses. When the fault response control method provided by the present invention is applied to a battery management system, it can help improve the safety, reliability and maintainability of the vehicle, and provide favorable protection for the functional safety of the battery management system.

[0152] In addition, the present invention can realize the correspondence between configurable faults and fault responses and the correspondence between fault recovery modes, and can be flexibly adjusted according to the actual needs of different manufacturers, so as to realize personalized customization of fault responses by different manufacturers, greatly improving the availability and practicality of the fault response control method.

[0153] It should be noted that the computer program code for performing the operation of the present invention can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages-such as Java, Smalltalk, C++, and also conventional procedural programming languages-such as "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as an independent software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer can be connected to the user's computer through any type of network-including a local area network (LAN) or a wide area network (WAN), or can be connected to an external computer (for example, using an Internet service provider to connect through the Internet).

[0154] It should be noted that the devices and methods disclosed in the embodiments of this article can also be implemented in other ways. The device implementation described above is only schematic. For example, the flowcharts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of this article. In this regard, each box in the flowchart or block diagram can represent a part of a module, program or code, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function, and the module, program segment or part of the code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flowchart, and the combination of boxes in the block diagram and / or flowchart can be implemented by a dedicated hardware-based system for performing a specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions. In addition, the functional modules in the various embodiments of this document may be integrated together to form an independent part, or each module may exist independently, or two or more modules may be integrated to form an independent part.

[0155] It should also be noted that the above description is only a description of the preferred embodiment of the present invention, and is not any limitation on the scope of the present invention. Any changes and modifications made by a person skilled in the art in the field of the present invention based on the above disclosure are within the scope of protection of the present invention. Obviously, a person skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A fault response control method, characterized in that: include: The following steps are performed for each type of fault response: Determining whether the fault response is not suppressed by other fault responses being executed other than the fault response; If it is determined that the fault response is not suppressed by other fault responses being executed other than the fault response, then determining whether the execution condition of the fault response is triggered; If it is determined that the execution condition of the fault response is triggered, the fault response is executed.

2. The fault response control method according to claim 1, characterized in that: The determining whether the fault response is not suppressed by other fault responses being executed other than the fault response includes: Obtain a fault response suppression summary binary string corresponding to the fault response, wherein each bit position in the fault response suppression summary binary string corresponds to a type of fault response, a bit position 1 indicates that the corresponding type of fault response will not suppress the fault response, and a bit position 0 indicates that the corresponding type of fault response will suppress the fault response; Obtain a fault response summary binary string, wherein each bit position in the fault response summary binary string corresponds to a type of fault response, a bit position 1 indicates that a fault response of a corresponding type is being executed, a bit position 0 indicates that a fault response of a corresponding type is not being executed, and the type of the fault response corresponding to the same bit position in the fault response summary binary string and the fault response suppression summary binary string is the same; Performing a bitwise AND operation on the fault response suppression summary binary string corresponding to the fault response and the fault response summary binary string bit by bit; If the result of the bitwise AND operation is greater than 0, it is determined that the fault response is not suppressed by other fault responses being executed except for the fault response.

3. The fault response control method according to claim 2, characterized in that: The step of obtaining the fault response suppression summary binary string corresponding to the fault response includes: According to the suppression relationship between the fault response and each type of fault response obtained by pre-calibration, a fault response suppression summary result corresponding to the fault response is obtained; According to the fault response suppression summary result corresponding to the fault response and a preset mapping relationship between the fault response type and the binary string bit, the fault response suppression summary binary string corresponding to the fault response is obtained.

4. The fault response control method according to claim 2, characterized in that: The acquisition of the fault response summary binary string includes: Obtain the summary result of the fault response according to the type information of all fault responses being executed; According to the fault response summary result and a preset mapping relationship between the fault response type and the binary string bit, a fault response summary binary string is obtained.

5. The fault response control method according to claim 1, characterized in that: The determining whether the execution condition of the fault response is triggered includes: Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response; Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred; Performing a bitwise AND operation on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit; If the result of the bitwise AND operation is greater than 0, it is determined that the execution condition of the fault response is triggered.

6. The fault response control method according to claim 1, characterized in that: After determining that the execution condition of the fault response is triggered, the control method further includes: Determine whether the fault response meets the fault recovery non-exit condition; If so, continue to execute the fault response after the fault is recovered.

7. The fault response control method according to claim 6, characterized in that: The determining whether the fault response satisfies the fault recovery non-exit condition includes: Obtain a fault response result binary string corresponding to the fault response, wherein each bit position in the fault response result binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault triggers the fault response, and a bit position 0 indicates that the corresponding type of fault does not trigger the fault response; Obtain a fault self-locking summary binary string, wherein each bit position in the fault self-locking summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault is self-locking, and a bit position 0 indicates that the corresponding type of fault is not self-locking; Performing a bitwise AND operation on the fault response result binary string corresponding to the fault response and the fault self-locking summary binary string bit by bit; If the result of the bitwise AND operation is greater than 0, it is determined that the fault response meets the fault recovery no-exit condition.

8. The fault response control method according to claim 7, characterized in that: The step of obtaining a fault response result binary string corresponding to the fault response includes: Obtain a fault response trigger summary binary string corresponding to the fault response, wherein each bit position in the fault response trigger summary binary string corresponds to a type of fault, a bit position 1 indicates that the corresponding type of fault will trigger the fault response, and a bit position 0 indicates that the corresponding type of fault will not trigger the fault response; Obtain a fault summary binary string, wherein each bit position in the fault summary binary string corresponds to a type of fault, a bit position 1 indicates that a fault of the corresponding type has occurred, and a bit position 0 indicates that a fault of the corresponding type has not occurred; A bitwise AND operation is performed on the fault response trigger summary binary string corresponding to the fault response and the fault summary binary string bit by bit to obtain a fault response result binary string corresponding to the fault response.

9. The fault response control method according to claim 7, characterized in that: The method of obtaining the fault self-locking summary binary string includes: The fault self-locking summary binary string is obtained according to the self-locking calibration result of each type of fault obtained in advance and the mapping relationship between the preset fault type and the bit of the binary string.

10. The fault response control method according to claim 5 or 8, characterized in that: The obtaining of the fault response trigger summary binary string corresponding to the fault response includes: According to the mapping relationship between the fault and the fault response obtained in advance, a summary result of the target fault type that can trigger the fault response is obtained; According to the target fault type summary result and the preset mapping relationship between the fault type and the binary string bit, the fault response trigger summary binary string corresponding to the fault response is obtained.

11. The fault response control method according to claim 5 or 8, characterized in that: The obtaining of the fault summary binary string includes: Obtain fault identification results; A fault summary binary string is obtained according to the fault identification result and a preset mapping relationship between the fault type and the binary string bit.

12. An electronic device, characterized in that: The method comprises a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method according to any one of claims 1 to 11 is implemented.

13. A readable storage medium, characterized in that: The readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

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