Security access control method and system of OTP (One Time Programmable) memory

Abstract

The invention discloses a security access control method and system for an OTP (One Time Programmable) memory, and the method comprises the steps: carrying out the partition authority control, namely, dividing the OTP memory into a plurality of types of protected regions from the hardware access logic based on the user type and data importance degree of the OTP memory, different read-write access permissions and all-0 or all-1 transparent data scrambling and data error correction verification protection strategies are set for different protected areas; the sensitive data read authority safety control is that read authority control of sensitive data is executed based on two-stage identity authentication, the first-stage identity authentication comprises general register value authentication, and the second-stage identity authentication comprises authentication code value authentication of the OTP memory. Based on data confidentiality and an authentication protection principle, the method has an access control mechanism with a high security degree, strictly controls illegal access, has the characteristics of preventing physical attacks such as probes, layout reversion and information visualization, and can meet the application requirements of users and manufacturers at various levels.

Description

Technical Field

[0001] The present invention relates to the technical field of network information security, and in particular to a method and system for controlling secure access to an OTP memory. Background Art

[0002] 1. OTP memory

[0003] One Time Programmable (OTP) memory refers to a type of non-volatile memory that can only be programmed once in an application. This type of memory has the characteristics of high data storage reliability and good programming flexibility. We know that ROM can be programmed by modifying certain mask layers (Mask). Although its reliability is high, its programming flexibility is poor. If it needs to be modified, it can only modify the mask version and process it again, so both the processing cost and the time cost are high. OTP memory solves this problem very well. Users can operate the programming unit at any time according to the different market demands for products. Such flexibility and operability are what everyone desires. As a non-volatile memory with high reliability and low cost, OTP memory is widely used in identity recognition, code storage, key storage and other fields. Suitable OTP memory can provide low power consumption characteristics, small chip area requirements, and can also meet the requirements of non-volatile memory.

[0004] 2. OTP storage security

[0005] The changes in the storage unit before and after OTP memory programming are very small, and it is almost impossible to reverse engineer the system of OTP memory. In addition, it has a one-time programming feature, so the data stored in the OTP memory has high reliability and confidentiality, and can be well used for security control within the chip, such as chip testability control, security mode control, etc. In the current CMOS high-tech chip process, due to the lack of on-chip EFLASH non-volatile storage support, OTP memory can effectively support on-chip secure storage of sensitive data such as firmware, version numbers, important parameters, keys, etc. It has indispensable and widespread applications in the field of information security such as radio frequency identification and on-chip SoC systems. Due to the importance of OTP stored data, its security needs to be paid special attention. Summary of the invention

[0006] In order to solve the above problems, the present invention proposes a secure access control method and system for OTP memory, which can realize the partition permission control mechanism of OTP memory, sensitive data area read permission security control, write protection security control, programming status identification security control, sensitive data scrambling protection and data error correction protection.

[0007] The technical solution adopted by the present invention is as follows:

[0008] On the one hand, the present invention provides a security access control method for an OTP memory, comprising:

[0009] Partition permission control: Based on the OTP memory user type and data importance, the OTP memory is divided into several types of protected areas from the hardware access logic, and different read and write access permissions, all-0 or all-1 transparent data scrambling, and data error correction protection strategies are set for different protected areas;

[0010] Sensitive data read permission security control: Perform sensitive data read permission control based on two-level identity authentication, where the first level of identity authentication includes general register value authentication, and the second level of identity authentication includes OTP memory authentication code value authentication.

[0011] Furthermore, it also includes write protection security control: hardware-level write operation permission protection is performed on the OTP memory, that is, permission authentication of the corresponding protected area authentication code is performed before the OTP memory write operation. The OTP memory write operation can only be performed when the authentication is successful, otherwise there is no write operation permission for the OTP memory.

[0012] Furthermore, it also includes programming status identification security control: setting a programming status identification for the OTP memory application data to prevent the OTP memory user from modifying or misoperating the written key data again; the programming status identification is stored in the programming status identification area address of the OTP memory, and each bit of status information identifies the corresponding programming status.

[0013] Furthermore, it also includes sensitive data scrambling protection: hardware-level data scrambling protection is performed on the sensitive data of the OTP memory, the scrambling and descrambling key is set to a hardware fixed value or comes from the key area of ​​the OTP memory, and the key register is automatically read when the hardware is powered on; the scrambling and descrambling algorithm uses a lightweight cryptographic algorithm or linear transformation processing to obtain the scrambling and descrambling results; hardware-level all-0 or all-1 transparent operation is performed on the sensitive data of the OTP memory, that is, all-0 or all-1 data is also all-0 or all-1 after scrambling and descrambling.

[0014] Furthermore, it also includes data error correction and verification protection: using error correction code to encode and decode protection for OTP memory data, selecting codeword generation matrix G and check matrix H of corresponding magnitude, and the error correction code includes linear block code.

[0015] On the other hand, the present invention provides an OTP memory security access control system, comprising:

[0016] The partition permission control module is configured to divide the OTP memory into several types of protected areas based on the type of OTP memory user and the importance of data from the hardware access logic, and set different read and write access permissions and all-0 or all-1 transparent data scrambling and data error correction protection strategies for different protected areas;

[0017] The sensitive data read permission security control module is configured to perform read permission control of sensitive data based on two-level identity authentication, wherein the first level identity authentication includes general register value authentication, and the second level identity authentication includes authentication code value authentication of OTP memory.

[0018] Furthermore, it also includes a write protection security control module, which is configured to perform hardware-level write operation permission protection for the OTP memory, that is, to perform permission authentication of the corresponding protected area authentication code before the OTP memory write operation, and the OTP memory write operation can only be performed when the authentication is successful, otherwise there is no write operation permission for the OTP memory.

[0019] Furthermore, it also includes a programming status identification security control module, which is configured to set a programming status identification for the OTP memory application data to prevent the OTP memory user from modifying or misoperating the written key data again; the programming status identification is stored in the programming status identification area address of the OTP memory, and the corresponding programming status is identified by each bit of status information.

[0020] Furthermore, it also includes a sensitive data scrambling protection module, which is configured to perform hardware-level data scrambling protection on the sensitive data of the OTP memory. The scrambling and descrambling key is set to a hardware fixed value or comes from the key area of ​​the OTP memory, and is automatically read from the key register when the hardware is powered on; the scrambling and descrambling algorithm adopts a lightweight cryptographic algorithm or linear transformation processing to obtain the scrambling and descrambling results; and a hardware-level all-0 or all-1 transparent operation is performed on the sensitive data of the OTP memory, that is, the all-0 or all-1 data is also all-0 or all-1 after scrambling and descrambling.

[0021] Furthermore, it also includes a data error correction and verification protection module, which is configured to use error correction codes to perform encoding and decoding protection on the OTP memory data, select codeword generation matrix G and check matrix H of corresponding magnitude, and the error correction code includes linear block code.

[0022] The beneficial effects of the present invention are:

[0023] 1. High-security access control mechanism

[0024] The OTP storage module is mainly used to store chip identification codes, security control information, root keys, trusted keys, protection algorithm keys and other sensitive data information, and has high security requirements. Based on the partition identity authentication and data confidentiality mechanism, according to the one-time programming characteristics of OTP, a two-level identity authentication read permission control and a one-level identity authentication write protection permission control method are designed to strictly control illegal access to OTP. On the basis that the changes in the storage unit before and after the OTP memory are very small, the all-0 or all-1 transparent data scrambling design is introduced to further strengthen the protection against physical attacks such as probes, layout reversal, and visualization. In view of the fact that a small amount of stored data in the OTP memory under the high-tech CMOS process is unstable, the OTP data is encoded and decoded with error correction code for protection, combined with a flexible multi-bit data programming state identification security control method, the overall security of OTP storage has a high-intensity security protection capability.

[0025] 2. Regionalized security control to meet the application needs of users and manufacturers at all levels

[0026] The OTP memory is divided into multiple protected areas from the hardware access logic. The corresponding read and write access rights can be set according to the application requirements of users, manufacturers and other levels. This regionalized security access control is conducive to the refined design of security protection solutions, and it has both flexibility and high security.

[0027] 3. Flexible multi-bit data one-time programming locking mechanism

[0028] The one-time programming feature of OTP memory usually corresponds to bit-level behavior. For bit-level data, it can be used to control chip security behavior, such as enabling DFT, enabling CP test, enabling JTAG test interface control, enabling power domain, etc. For multi-bit data, the programming state identification security control method used in this design can ensure that key information cannot be modified even if the authentication is passed after programming only once, and has a multi-bit wide one-time programming lock feature. Therefore, according to the characteristics of data application, the multi-bit data one-time programming lock security control method can be used as needed to more flexibly and effectively ensure the security of OTP storage data.

[0029] In summary, the present invention is based on the principle of data confidentiality and authentication protection, has a high-security access control mechanism, strictly controls illegal access to OTP, and has the characteristics of preventing physical attacks such as probes, layout reversal, and information visualization. Regionalized security control is adopted to meet the application needs of users and manufacturers at all levels. At the same time, the flexible multi-bit data one-time programming locking mechanism further effectively guarantees the security of OTP storage data. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1Schematic diagram of a secure access control system for an OTP memory in an embodiment of the present invention.

[0031] Figure 2 It is a software programming safety operation flow chart.

[0032] Figure 3 This is a flowchart of the all-1 data transparency and descrambling process. DETAILED DESCRIPTION

[0033] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, the specific implementation methods of the present invention are now described. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention, that is, the embodiments described are only part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present invention.

[0034] Example 1

[0035] The present embodiment provides a method for secure access control of an OTP memory, which at least includes a partition permission control strategy and a sensitive data read permission security control strategy, wherein the partition permission control strategy includes: based on the OTP memory user type and the importance of the data, the OTP memory is divided into several types of protected areas from the hardware access logic, and different read and write access permissions and all-0 or all-1 transparent data scrambling and data error correction protection strategies are set for different protected areas; the sensitive data read permission security control strategy includes executing sensitive data read permission control based on two-level identity authentication, wherein the first-level identity authentication includes general register value authentication, and the second-level identity authentication includes authentication of the authentication code value of the OTP memory.

[0036] This embodiment introduces a security control access module in the OTP controller based on the principles of data confidentiality and authentication protection. Specifically, the OTP storage can be divided into a general data user area, a sensitive data user area, a programming status identification user area, a general data manufacturer area, a sensitive data manufacturer area, and a programming status identification manufacturer area; different read and write access permissions are set for each area according to different roles and the importance of data protection in each area.

[0037] Preferably, the security access control method of this embodiment also includes write protection security control, programming state identification security control, sensitive data scrambling protection and data error correction protection strategy. Among them, the programming state identification security control strategy includes setting the programming state identification bit for the application data to prevent the user from modifying or misoperating the key data that has been written again; the sensitive data scrambling protection strategy includes hardware-level all-0 or first 1 data transparent scrambling protection for the sensitive data area to further enhance the physical attack protection effect; for the situation where a small amount of stored data is unstable under the high-tech CMOS process of the chip, the data error correction protection strategy includes using linear error correction code for encoding and decoding protection to enhance the stability of the data.

[0038] Accordingly, this embodiment also provides a security access control system for an OTP memory, which is implemented by introducing a security control access module into an OTP controller. Figure 1 As shown, the OTP controller includes a security control access module, a bus slave interface module, a CP test interface module and an interface state machine, wherein the security control access module is respectively connected to the bus slave interface module and the interface state machine, and the interface state machine is connected to the CP test interface module. The security control access module includes OTP partition authority control, sensitive data area read authority security control, write protection security control, programming state identification security control, sensitive data scrambling protection and data error correction protection unit.

[0039] Specifically, the secure access control method and system of the OTP memory of this embodiment can be implemented in the following manner.

[0040] 1. OTP partition permission control mechanism

[0041] According to different roles and data importance, OTP storage can be divided into general data user area, sensitive data user area, programming status identification user area, general data manufacturer area, sensitive data manufacturer area, and programming status identification manufacturer area. According to the OTP memory access address, through the address decoding logic, different access rights are set for different areas, and whether the data is scrambled for protection, and then according to the chip application scenario, different security schemes or security strengths can be met as needed, as shown in Table 1.

[0042] Table 1-OTP partition permission control

[0043]

[0044] 2. Security control of read permissions in sensitive data areas

[0045] The read access permission control of the OTP sensitive data area adopts a two-level permission authentication register control method. The first level is the general register value authentication, and the second level is the authentication code value stored in the OTP. When the chip is powered on, the OTP hardware controller directly reads the register for storage. The authentication code value stored in the OTP can be set to different private confidentiality values ​​according to the different needs of users, with high security and flexibility.

[0046] 3. Write protection security control

[0047] In order to prevent users from illegally writing or misoperating the OTP due to program errors, hardware-level write permission protection is performed on the OTP. Before the write operation, the permission authentication of the corresponding area authentication code is required. If the authentication is successful, the OTP write operation can be performed, otherwise there is no OTP write permission.

[0048] 4. Programming status identification safety control

[0049] The one-time programming feature of OTP memory usually corresponds to bit-level behavior, and the software programming operation is usually a multi-bit word width. In order to ensure that key information cannot be modified even if the authentication is passed after programming only once, the controller needs to store whether each word has been programmed. Therefore, the programming status identification bit is set to prevent the user from programming the same address again after programming. The write programming status identification is stored in the address of the programming status identification area of ​​the OTP, and the corresponding word programming status is identified with each bit of status information.

[0050] Each time the software programs the OTP content, it needs to program the corresponding status bit. According to the above security control, the process of software programming operation is as follows: Figure 2 shown.

[0051] 5. Sensitive data scrambling protection

[0052] (1)Sensitive data area scrambling

[0053] OTP storage usually stores sensitive data such as the chip version number, important parameters, and keys. In addition to access rights security control, it is necessary to further strengthen the security of OTP storage data to prevent physical attacks such as probe detection from illegally stealing OTP sensitive data. Hardware-level data scrambling protection is performed on sensitive data areas. The scrambling and descrambling keys can be designed as hardware fixed values ​​or derived from the key area of ​​OTP, which are automatically read from the key register when the hardware is powered on. Considering the comprehensive consideration of performance and area, the scrambling and descrambling algorithm uses a lightweight cryptographic algorithm or linear transformation processing to obtain the scrambling and descrambling results.

[0054] (2) All 0s and all 1s are transparent

[0055] The initial default state of OTP storage data is all 0 or all 1, and the specific value is related to the process manufacturing and implementation principle of OTP. In order to facilitate chip testing and the association of OTP storage default values ​​in chip function design, it is necessary to maintain the transparent operation of all 0 or all 1 for OTP original data, that is, all 0 or all 1 data, after scrambling and descrambling, is also all 0 or all 1.

[0056] Taking the implementation method of OTP storage data being all 1 by default as an example, when the chip is powered on normally, the OTP scrambling and descrambling key generation module generates the OTP scrambling and descrambling key, and the scrambling and descrambling module starts the operation to pre-calculate the all-1 scrambled data Enc_ff and the all-1 descrambled data Dec_ff. The transparent processing flow is as follows: Figure 3 shown.

[0057] 6. Data error correction and protection

[0058] In the OTP memory under the CMOS high-tech process, a small amount of stored data is unstable. Error correction code is used to encode and decode the OTP data for protection. Based on the comprehensive consideration of area and performance, the error correction code usually adopts linear block code, and the codeword generation matrix G and check matrix H of appropriate magnitude are selected according to the probability of unstable OTP data under the chip process.

[0059] In summary, the OTP memory security access control method and system of the present invention is based on the confidentiality and authentication protection principles of data, has a high-security access control mechanism, strictly controls illegal access to OTP, and has the characteristics of preventing physical attacks such as probes, layout reversal, and information visualization. Regionalized security control is adopted to meet the application needs of users and manufacturers at all levels. At the same time, the flexible multi-bit data one-time programming locking mechanism can further effectively ensure the security of OTP storage data.

[0060] Example 2

[0061] This embodiment is based on embodiment 1:

[0062] This embodiment provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the OTP memory security access control method of embodiment 1 is implemented. The computer program may be in source code form, object code form, executable file, or some intermediate form.

[0063] Example 3

[0064] This embodiment is based on embodiment 1:

[0065] This embodiment provides a computer-readable storage medium storing a computer program, which implements the secure access control method of the OTP memory of Embodiment 1 when executed by a processor. The computer program may be in source code form, object code form, executable file, or some intermediate form. The storage medium includes: any entity or device capable of carrying computer program code, recording medium, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal, and software distribution medium. It should be noted that the content contained in the storage medium may be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the storage medium does not include electric carrier signals and telecommunication signals.

[0066] It should be noted that, for the aforementioned method embodiments, for the sake of simplicity of description, they are expressed as a series of action combinations, but those skilled in the art should be aware that the present application is not limited by the order of the actions described, because according to the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present application.

Claims

1. A method for secure access control of an OTP memory, characterized in that: include: Partition permission control: Based on the OTP memory user type and data importance, the OTP memory is divided into several types of protected areas from the hardware access logic, and different read and write access permissions, all-0 or all-1 transparent data scrambling, and data error correction protection strategies are set for different protected areas; Sensitive data read permission security control: Perform sensitive data read permission control based on two-level identity authentication, where the first level of identity authentication includes general register value authentication, and the second level of identity authentication includes OTP memory authentication code value authentication.

2. A method for controlling secure access to an OTP memory according to claim 1, characterized in that: It also includes write protection security control: hardware-level write operation permission protection for the OTP memory, that is, permission authentication of the corresponding protected area authentication code is performed before the OTP memory write operation. The OTP memory write operation can only be performed when the authentication is successful, otherwise there is no write operation permission for the OTP memory.

3. A method for controlling secure access to an OTP memory according to claim 1, characterized in that: It also includes programming status identification security control: setting programming status identification for OTP memory application data to prevent the OTP memory user from modifying or misoperating the written key data again; The programming state identifier is stored in the address of the programming state identifier area of ​​the OTP memory, and each bit of state information identifies the corresponding programming state.

4. A method for controlling secure access to an OTP memory according to claim 1, characterized in that: Also includes sensitive data scrambling protection: Hardware-level data scrambling protection is performed for sensitive data in the OTP memory. The scrambling and descrambling keys are set to hardware fixed values ​​or come from the key area of ​​the OTP memory, and are automatically read from the key register when the hardware is powered on. The scrambling and descrambling algorithms use lightweight cryptographic algorithms or linear transformation processing to obtain scrambling and descrambling results. A hardware-level all-0 or all-1 transparent operation is performed on the sensitive data of the OTP memory, that is, the all-0 or all-1 data is also all-0 or all-1 after scrambling.

5. The method for secure access control of an OTP memory according to claim 1, characterized in that: It also includes data error correction and verification protection: error correction codes are used to encode and decode the OTP memory data, and codeword generation matrix G and check matrix H of corresponding magnitude are selected, and the error correction code includes linear block code.

6. A secure access control system for an OTP memory, characterized in that: include: The partition permission control module is configured to divide the OTP memory into several types of protected areas based on the type of OTP memory user and the importance of data from the hardware access logic, and set different read and write access permissions and all-0 or all-1 transparent data scrambling and data error correction protection strategies for different protected areas; The sensitive data read permission security control module is configured to perform read permission control of sensitive data based on two-level identity authentication, wherein the first level identity authentication includes general register value authentication, and the second level identity authentication includes authentication code value authentication of OTP memory.

7. A secure access control system for an OTP memory according to claim 6, characterized in that: It also includes a write protection security control module, which is configured to perform hardware-level write operation permission protection for the OTP memory, that is, to perform permission authentication of the corresponding protected area authentication code before the OTP memory write operation. The OTP memory write operation can only be performed when the authentication is successful, otherwise there is no write operation permission for the OTP memory.

8. A secure access control system for an OTP memory according to claim 6, characterized in that: It also includes a programming state identification security control module, which is configured to set a programming state identification for the OTP memory application data to prevent the OTP memory user from modifying or misoperating the written key data again; The programming state identifier is stored in the address of the programming state identifier area of ​​the OTP memory, and each bit of state information identifies the corresponding programming state.

9. A secure access control system for an OTP memory according to claim 6, characterized in that: It also includes a sensitive data scrambling protection module, which is configured to perform hardware-level data scrambling protection on the sensitive data of the OTP memory. The scrambling and descrambling keys are set to hardware fixed values ​​or come from the key area of ​​the OTP memory, and are automatically read from the key register when the hardware is powered on. The scrambling and descrambling algorithms use lightweight cryptographic algorithms or linear transformation processing to obtain scrambling and descrambling results; and hardware-level all-0 or all-1 transparent operations are performed on the sensitive data of the OTP memory, that is, all-0 or all-1 data are also all-0 or all-1 after scrambling and descrambling.

10. A secure access control system for an OTP memory according to claim 6, characterized in that: It also includes a data error correction and verification protection module, which is configured to use error correction codes to perform encoding and decoding protection on the OTP memory data, select codeword generation matrix G and verification matrix H of corresponding magnitude, and the error correction code includes linear block code.

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