Design method for reducing internal sintering stress of MLCC

By inserting a blank dielectric layer and holding electrode layer in the MLCC, the crack problem caused by sintering stress is solved, and the reliability and structural stability of the product are improved.

CN119274977APending Publication Date: 2025-01-07YUANLIU HONGYUAN (SUZHOU) ELECTRONIC TECH CO LTD
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Patent Information

Application Number
CN202411241901.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-05
Publication Date
2025-01-07

AI Technical Summary

Technical Problem

During the sintering process, internal stress accumulation caused by the difference in the sintering shrinkage between the ceramic medium and the metal electrode layer is prone to cracks, which affects product reliability, especially in high-layer count or high-pressure products, the problem is more prominent.

Method used

Insert ≥2 blank dielectric layers into the electrode layer of the MLCC to form an intermediate blank intercalation segment, and keep the electrode layers above and below the intercalation segment well. A specific electrode layer and dielectric layer alternately stack design is adopted to reduce sintering stress.

Benefits of technology

By reducing sintering stress and reducing the risk of internal cracks, the reliability of the product is improved, and the MLCC is divided into two parallel structures, reducing the stress accumulation caused by the shrinkage ratio of ceramic medium and internal electrode slurry.

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Abstract

The invention relates to the technical field of electronic design, in particular to a design method for reducing internal sintering stress of an MLCC, and the method comprises the design steps: S1, inserting two or more blank dielectric layers in the center of an integral electrode layer, and forming a blank intercalation segment Cn; and S2, connecting an upper layer of electrode adjacent to the blank medium intercalation section and a lower layer of electrode adjacent to the intercalation section with the same terminal, that is, during lamination, the lamination dislocation number of an electrode layer after the blank intercalation layer is laminated at the center and the lamination dislocation number of an electrode layer before the blank intercalation layer is laminated are kept consistent, that is, relative dislocation is avoided. Two or more blank dielectric layers are added in the middle of a conventional MLCC inner electrode design structure, a middle blank dielectric intercalation section is formed, the sintering stress of the middle portion is reduced, the risk that cracks occur in the middle is reduced, and therefore the sintering stress accumulated due to the large difference between the sintering shrinkage rate of a ceramic dielectric diaphragm and the sintering shrinkage rate of inner electrode slurry can be reduced, and the service life of the MLCC is prolonged. And the product reliability is improved.
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Description

Technical Field

[0001] The present invention belongs to the technical field of electronic design, and specifically relates to a design method for reducing the internal sintering stress of MLCC. Background Art

[0002] MLCC is made of ceramic dielectric layers and metal electrode layers stacked alternately and then sintered at high temperature. The sintering shrinkage rates of ceramic dielectric diaphragms and metal electrode slurries are quite different, which will cause greater internal stress between the ceramic dielectric and metal electrode layers after sintering. The more electrode layers there are, the greater the internal stress accumulation, which can easily lead to internal cracks in the MLCC and affect product reliability. The current solution to the internal sintering stress of MLCC is mainly from the sintering process. By adjusting the optimal sintering heating and cooling rates, the internal stress accumulation can be reduced as much as possible during the sintering process. A suitable sintering process is crucial to the performance of MLCC products, but for some products with a higher number of layers or high-voltage products, there is still a high proportion of internal cracks caused by sintering stress, which affects product reliability. In this regard, we propose a design method to reduce the internal sintering stress of MLCC. Summary of the invention

[0003] In view of the deficiencies in the prior art, the present invention provides a design method for reducing the internal sintering stress of MLCC to solve the above technical problems.

[0004] To achieve the above object, the present invention provides the following technical solution: a design method for reducing the internal sintering stress of MLCC, the design steps are:

[0005] S1. Insert ≥2 layers of blank dielectric layers at the center of the overall electrode layer to form a blank intercalation segment C. n ;

[0006] S2. The upper electrode layer adjacent to the blank dielectric intercalation segment and the lower electrode layer adjacent to the intercalation segment are connected to the same terminal, that is, when stacking, the stacking misalignment number of an electrode layer after stacking the blank intercalation layer in the center and an electrode layer before stacking the blank intercalation layer is consistent, that is, relative misalignment;

[0007] S3, where the electrode layer connected to the left terminal of the blank dielectric layer is A, the electrode layer connected to the right terminal of the blank dielectric layer is B, and the blank dielectric layer is C. Figure 1 , the design formula is: C x +ABA+C n +ABA+C y .

[0008] Preferably, the blank dielectric layer in step S1 is blank and has no electrodes, and the electrode layer in steps S2 and S3 is a dielectric layer printed with electrodes; the middle position in step S1 is determined based on the number of electrode layers, and the middle position is between the two electrode layers close to the middle.

[0009] Preferably, the MLCC is formed by alternately stacking electrode layers and blank dielectrics according to a design formula.

[0010] Preferably, in step S3, C x Represented as a combination of a blank dielectric layer connected to the bottommost electrode layer.

[0011] Preferably, in step S3, ABA is an electrode layer arrangement pattern, represented by an electrode layer A connected to the left terminal, an electrode layer B connected to the right terminal, and another electrode layer A connected to the left terminal again.

[0012] Preferably, in step S3, C y Represented as a combination of another set of blank dielectric layers connected to the top electrode layer.

[0013] Compared with the prior art, the present invention has the following beneficial effects:

[0014] The present application forms an intermediate blank dielectric intercalation section by adding two or more dielectric layers in the middle of the conventional MLCC internal electrode design structure, thereby reducing the sintering stress in the middle part and reducing the risk of cracks in the middle; and the two electrode layers above and below the intercalation section are not misaligned, which is equivalent to dividing an MLCC into two parallel MLCCs, and the number of electrode layers of each MLCC is half of the total number of layers, thereby greatly reducing the sintering stress accumulated due to the large difference in sintering shrinkage rate between the ceramic dielectric diaphragm and the internal electrode slurry, thereby improving the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a segmented design diagram of the MLCC of the present invention;

[0016] Figure 2 This is a diagram showing the order of stacking layers of MLCC of the present invention. DETAILED DESCRIPTION

[0017] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0018] The present invention provides a technical solution: a design method for reducing the internal sintering stress of MLCC, the design steps are:

[0019] S1. Insert ≥2 layers of blank dielectric layers at the center of the overall electrode layer to form a blank intercalation segment C. n ;

[0020] S2, the upper electrode adjacent to the blank dielectric intercalation section and the lower electrode adjacent to the intercalation section are connected to the same terminal, that is, when stacking, the stacking misalignment number of an electrode after stacking the blank intercalation in the center and an electrode before stacking the blank intercalation are consistent, that is, relatively misaligned;

[0021] S3, where the electrode layer connected to the left terminal of the blank dielectric layer is A, the electrode layer connected to the right terminal of the blank dielectric layer is B, and the blank dielectric layer is C. Figure 1 , the design formula is: C x +ABA+C n +ABA+C y .

[0022] In the MLCC design steps of this application, a blank layer is stacked at the bottom to form a lower blank protective cover C x ; Staggered stacking of electrode layers on the lower blank protective cover, that is, dielectric layers A or B printed with electrodes, to form a lower electrode segment; inserting an intermediate dielectric intercalation layer C at the center of the overall electrode layer to form an intermediate intercalation layer segment C n ; Insert C in the middle medium n A non-displaced electrode layer is stacked on top, and then the electrode layers are stacked alternately to form an upper electrode segment; a blank layer is stacked on the upper electrode segment to form an upper blank protective cover C. y , forming a newly designed MLCC structure.

[0023] Furthermore, in step S1, the blank dielectric layer is blank and has no electrodes, and in steps S2 and S3, the electrode layer is a dielectric layer printed with electrodes; in step S1, the middle position is determined based on the number of electrode layers, and the middle position is between the two electrode layers close to the middle; the MLCC is formed by alternating stacking of electrode layers and blank dielectrics as designed.

[0024] Furthermore, in step S3, Cx is represented by the combination of the electrode layer and the dielectric layer between the blank intercalation segments, ABA is the arrangement pattern of the electrode layer and the dielectric layer, represented by an electrode layer A connected to the left terminal, an electrode layer B connected to the right terminal, and another electrode layer A connected to the left terminal again, C y Represented as a combination of another set of blank dielectric layers connected to the top electrode layer.

[0025] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0026] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A design method for reducing the internal sintering stress of MLCC, characterized in that: The design steps are: S1. Insert ≥2 layers of blank dielectric layers in the middle of the overall electrode layer to form a blank intercalation segment C. n ; S2, the upper electrode layer adjacent to the blank dielectric intercalation segment and the lower electrode layer adjacent to the intercalation segment are connected to the same terminal, that is, when stacking, the stacking misalignment number of an electrode layer after stacking the blank intercalation layer in the center is consistent with that of an electrode layer before stacking the blank intercalation layer, that is, relative misalignment; S3, where the electrode layer connected to the blank dielectric layer and the left terminal is A, the electrode layer connected to the blank dielectric layer and the right terminal is B, and the blank dielectric layer is C. The design formula is: C x +ABA+C n +ABA+C y .

2. The design method for reducing the internal sintering stress of MLCC according to claim 1, characterized in that: In step S1, the blank dielectric layer is blank without electrodes, and in steps S2 and S3, the electrode layer is a dielectric layer printed with electrodes; in step S1, the middle position is determined based on the number of electrode layers, and the middle position is between the two layers of electrodes close to the middle.

3. The design method for reducing the internal sintering stress of MLCC according to claim 1, characterized in that: MLCC is made up of electrode layers and blank dielectrics stacked alternately according to the design.

4. The design method for reducing sintering stress inside MLCC according to claim 1, characterized in that: S3 step C x Represented as a combination of a blank dielectric layer connected to the bottommost electrode layer.

5. The design method for reducing the internal sintering stress of MLCC according to claim 1, characterized in that: In step S3, ABA is the arrangement pattern of the electrode layers, which is represented by an electrode layer A connected to the left terminal, an electrode layer B connected to the right terminal, and another electrode layer A connected to the left terminal again.

6. The design method for reducing sintering stress inside MLCC according to claim 1, characterized in that: S3 step C y Represented as a combination of another set of blank dielectric layers connected to the top electrode layer.