Flat reversible Ethernet interface suitable for light and thin equipment and working method thereof

Abstract

The invention discloses a flat reversible Ethernet interface suitable for light and thin equipment and a working method thereof, and the interface comprises a double-layer PCB which is composed of an upper-layer PCB and a lower-layer PCB, and the upper-layer PCB and the lower-layer PCB achieve signal transmission through cross wiring; the double-layer PCB is provided with an upper row of pins and a lower row of pins, and the upper row of pins are located on the upper layer part, used for signal transmission during forward insertion and directly connected with contacts of the upper layer PCB; and the lower row of pins are positioned on the lower layer part, are used for signal transmission during reverse insertion, and are connected with corresponding contacts of the upper layer PCB through a cross wiring structure in the double-layer PCB. Through the flat design, the occupied space is remarkably saved, ultrathin and light equipment can easily integrate the Ethernet connection function, and the light and thin characteristics or the overall attractiveness of the equipment are not needed to be sacrificed. Meanwhile, the reversible insertion function greatly improves the user experience, does not need to worry about the insertion direction, reduces the connection failure caused by misoperation, and simplifies the connection process of a wired network.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic equipment interface design, and relates to a flat reversible Ethernet interface suitable for thin and light equipment and a working method thereof. Background Art

[0002] With the rapid development of modern electronic technology, all kinds of electronic devices are moving towards becoming thinner and more portable, especially mobile devices such as thin and light notebooks, whose appearance design is crucial to user experience. However, the traditional RJ45 socket (Ethernet interface) has become a major obstacle for these ultra-thin devices in their pursuit of ultimate design due to its large size.

[0003] The traditional RJ45 crystal plug and interface design, as the standard configuration of Ethernet connection, has been widely used in various network devices. However, this design has several significant disadvantages, which limits its application in modern ultra-thin devices.

[0004] First, the physical size of the RJ45 interface is relatively large, which makes it difficult to directly integrate the interface into thin and light devices. In order to meet users' needs for wired network connections, these devices usually need to be connected through additional adapters or docking stations, which not only increases the user's carrying burden, but also affects the overall appearance and portability of the device.

[0005] Secondly, the traditional RJ45 interface design only supports one-way insertion, which is contrary to the user-friendliness and convenience pursued by modern interface design. For example, the USB Type-C interface is widely praised by users for its reversible pluggable design. In contrast, the one-way insertion design of the RJ45 interface not only limits the user's convenience, but also often requires users to try multiple times to insert it correctly, especially in the absence of visual guidance, which undoubtedly reduces the user experience. In addition, the existing RJ45 interface design also has deficiencies in signal mapping. Due to the limitations of the single-layer wiring design, the traditional RJ45 interface cannot support signal mapping when inserted forward and reverse, which makes it difficult to adapt to the reversible pluggable requirements of modern interfaces. This further limits the application scope of the RJ45 interface in modern ultra-thin devices.

[0006] In summary, the traditional Ethernet interface can no longer meet the interface design requirements of modern ultra-thin devices due to its large size, one-way insertion, and inflexible signal mapping. Therefore, it is necessary to develop a new Ethernet interface design to solve these problems and improve the user's wired network connection experience on ultra-thin devices. Summary of the invention

[0007] The purpose of the present invention is to solve the problems of Ethernet interface in the prior art due to its large size, one-way insertion and inflexible signal mapping, and to provide a flat reversible Ethernet interface suitable for thin and light devices and a working method thereof.

[0008] In order to achieve the above object, the present invention adopts the following technical solutions: A flat, reversible Ethernet interface suitable for thin and light devices, comprising: A double-layer PCB board, the double-layer PCB board is composed of an upper PCB and a lower PCB, and signal transmission is achieved between the upper PCB and the lower PCB through cross wiring; the double-layer PCB board is provided with an upper row of pins and a lower row of pins, wherein the upper row of pins is located in the upper layer, arranged in the order of 1 to 8, and is used for signal transmission during forward insertion, and is directly connected to the contacts of the upper PCB; the lower row of pins is located in the lower layer, arranged in the order of H to A, and is used for signal transmission during reverse insertion, and is connected to the corresponding contacts of the upper PCB through the cross wiring structure inside the double-layer PCB.

[0009] The double-layer PCB board structure consists of two conductive layers and an insulating medium located between the two conductive layers. A circuit is arranged on each conductive layer, and electrical connection between the two conductive layers is achieved through vias to realize bidirectional transmission of signals.

[0010] The cross wiring structure on the double-layer PCB board adopts a differential pair design, arranges two lines of the differential pair on the upper and lower layers respectively, and uses terminal resistors to perform impedance matching at the starting and ending ends of the differential pair.

[0011] An electromagnetic shielding layer is arranged between the double-layer PCB boards. The electromagnetic shielding layer uses metal foil or metal mesh as a shielding material. The layout of the shielding layer covers the entire PCB board area.

[0012] The signal mapping of the pins complies with the T568B standard, and the specific mapping rule is that pin A corresponds to pin 1, pin B corresponds to pin 2, and so on, until pin H corresponds to pin 8.

[0013] A working method of a flat reversible Ethernet interface suitable for thin and light equipment, comprising an upper PCB and a lower PCB, wherein the upper PCB is provided with contacts for signal transmission during forward insertion, and the lower PCB is provided with contacts for signal transmission during reverse insertion; When inserted in the forward direction, the pins of the connector are directly connected to the contacts of the upper PCB, and the signal is transmitted through the circuit path of the upper PCB and connected to the circuit path of the lower PCB through vias or jumpers; When inserted in reverse, the pins of the connector are connected to the contacts of the lower PCB, and the signal is transmitted from the lower PCB to the corresponding position of the upper PCB through the vias or jumpers inside the double-layer PCB, ensuring that the signal can be correctly mapped to the predetermined contacts of the upper PCB.

[0014] The Ethernet interface adopts a standardized network communication protocol, and the protocol adopts a carrier sense multiple access / collision detection mechanism to avoid data conflicts. Specifically, before sending data, it checks whether the transmission medium is idle. If the medium is busy, it waits and then tries to send; when the medium is idle, it starts sending data, and continuously detects conflicts during the sending process. Once a conflict is detected, it immediately stops sending and sends an interference signal, and then waits for a backoff time before trying to send again.

[0015] The Ethernet interface uses a high-performance PHY chip, based on which the following functions are performed: Data sending: Receive data frames from the MAC layer of the device, which are encapsulated by the MAC layer into Ethernet frames containing a frame header, data, and a frame trailer; encode the received Ethernet frames and convert them into signals suitable for transmission on physical media; modulate the encoded signals to adapt to the characteristics of different transmission media and convert digital signals into analog signals; transmit the modulated signals to the target device through physical media; Data reception: Receive signals from the physical medium and demodulate them to convert analog signals into digital signals; decode the demodulated signals and restore them to the original Ethernet frame format; check the received data to detect whether there are any transmission errors; send the verified data frames to the MAC layer for processing, and determine whether the data should be received based on the frame header information; Low-level communication control: Before sending data, the carrier sense multiple access / collision detection protocol is executed to coordinate access conflicts and collisions between multiple devices; the channel status is monitored, and whether to send data immediately is decided based on whether the channel is idle; when a conflict is detected during the sending process, data sending is immediately stopped, and the sending is attempted again after a period of time; the connection status of the physical link is established and maintained, including detecting the network cable connection status, network speed matching, and automatic negotiation.

[0016] The cross wiring structure on the double-layer PCB board has redundant paths. Multiple parallel paths are designed in the cross wiring structure of the double-layer PCB board to transmit the same signal to ensure that when a single path fails, the signal can still continue to be transmitted through other parallel paths; the spare path does not transmit the signal under normal circumstances, and the spare path can be switched when a fault occurs, and no additional delay or noise is introduced.

[0017] When the Ethernet interface is inserted into the device interface, the buckles on its left and right sides are buckled into the preset grooves on the interface; when the Ethernet interface needs to be unplugged, the buckle connection structure is also provided with a release mechanism to press the two sides of the Ethernet interface to unplug the Ethernet interface.

[0018] Compared with the prior art, the present invention has the following beneficial effects: The flat reversible Ethernet interface suitable for thin and light devices in the present invention significantly saves space through its flat design, so that ultra-thin and light devices can easily integrate Ethernet connection functions without sacrificing the thin and light characteristics of the device or the overall appearance. At the same time, its reversible insertion function greatly improves the user experience. Users no longer need to worry about the insertion direction, reduce connection failures caused by improper operation, and thus simplify the connection process of the wired network.

[0019] The flat-designed Ethernet interface not only saves valuable space for thin and light devices, but also improves durability and stability through enhanced structural strength, making it more able to withstand physical stress and accidental collisions during plugging and unplugging, and extending its service life. At the same time, it simplifies the installation and maintenance process, especially for devices that are frequently replaced or moved, such as laptops and tablets. Users can quickly connect without worrying about the direction of the interface, greatly improving work efficiency. It also meets users' high requirements for the stability and speed of wired network connections, further enhances the overall value and market competitiveness of the equipment, maintains the transmission performance of Gigabit Ethernet rate, ensures efficient and stable data transmission, and meets users' high requirements for speed and efficiency. Compatibility with standard Ethernet protocols ensures seamless connection with existing network equipment, does not affect the stability and reliability of data transmission, and provides users with a more convenient and efficient network connection experience. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0021] Figure 1 It is a front view of the flat reversible Ethernet interface suitable for thin and light devices of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0023] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0024] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0025] The present invention is further described in detail below in conjunction with the accompanying drawings:

[0026] See also Figure 1 , is a schematic diagram of a flat reversible Ethernet interface suitable for thin and light devices in the present invention, comprising: a double-layer PCB board, the double-layer PCB board is composed of an upper PCB and a lower PCB, and signal transmission is achieved between the upper PCB and the lower PCB through cross wiring; the double-layer PCB board is provided with an upper row of pins and a lower row of pins, wherein the upper row of pins is located in the upper layer, arranged in the order of 1 to 8, and is used for signal transmission during forward insertion, and is directly connected to the contacts of the upper PCB; the lower row of pins is located in the lower layer, arranged in the order of H to A, and is used for signal transmission during reverse insertion, and is connected to the corresponding contacts of the upper PCB through the cross wiring structure inside the double-layer PCB.

[0027] The double-layer PCB board structure consists of two conductive layers and an insulating medium located between the two conductive layers. Circuits are arranged on each conductive layer, and electrical connections between the two conductive layers are achieved through vias to realize bidirectional signal transmission. The cross wiring structure on the double-layer PCB board adopts a differential pair design, arranging the two lines of the differential pair on the upper and lower layers respectively, and using terminal resistors to perform impedance matching at the starting and ending ends of the differential pair.

[0028] Follow the basic principles of differential pair routing, arrange differential pairs on double-layer PCB boards, ensure that the two lines are of equal length, the routing paths are similar and as close as possible to reduce the impact of common-mode interference; implement differential pair routing on double-layer PCB boards, and arrange the two lines of the differential pair in adjacent positions on the upper and lower layers or on the same layer, ensure that the line lengths are as equal as possible, the routing paths are as smooth as possible, and sharp bends and sharp angles are avoided; use ground wires to surround the differential pairs to form a shield, the ground wires should be closely adjacent to the differential pair lines, and form a continuous shielding layer as much as possible; perform impedance matching design at the starting and ending ends of the differential pairs to ensure continuous signal transmission and reduce reflections, specifically, terminal resistors, T-type matching networks and other methods can be used; differential pairs need to cross different PCB layers, and vias should be reasonably set to connect the layers. The vias should be located in the low-impedance area of ​​the signal line to reduce the impact on signal integrity.

[0029] An electromagnetic shielding layer is set between the double-layer PCB boards. The electromagnetic shielding layer uses metal foil or metal mesh as the shielding material. The shielding layer layout covers the entire PCB board area. The signal mapping of the pins follows the T568B standard. The specific mapping rule is that pin A corresponds to pin 1, pin B corresponds to pin 2, and so on, until pin H corresponds to pin 8.

[0030] An embodiment of the present invention is a working method of a flat reversible Ethernet interface suitable for a thin and light device, comprising an upper PCB and a lower PCB, wherein the upper PCB is provided with contacts for signal transmission during forward insertion, and the lower PCB is provided with contacts for signal transmission during reverse insertion; When inserted in the forward direction, the pins of the connector are directly connected to the contacts of the upper PCB, and the signal is transmitted through the circuit path of the upper PCB and connected to the circuit path of the lower PCB through vias or jumpers; When inserted in reverse, the pins of the connector are connected to the contacts of the lower PCB, and the signal is transmitted from the lower PCB to the corresponding position of the upper PCB through the vias or jumpers inside the double-layer PCB, ensuring that the signal can be correctly mapped to the predetermined contacts of the upper PCB.

[0031] The Ethernet interface uses a standardized network communication protocol. The protocol adopts a carrier sense multiple access / collision detection mechanism to avoid data conflicts. Specifically, it checks whether the transmission medium is idle before sending data. If the medium is busy, it waits and then tries to send again. When the medium is idle, it starts sending data and continuously detects conflicts during the sending process. Once a conflict is detected, it immediately stops sending and sends an interference signal, then waits for the backoff time and tries to send again.

[0032] The protocol stipulates that the Ethernet data frame is the basic unit of data transmission. The data frame includes the preamble, the frame start delimiter SFD, the destination MAC address, the source MAC address, the length / type field, the data field and the frame check sequence FCS to ensure data synchronization, identification, identification of the sender and the receiver, length indication, data content transmission and integrity verification. The protocol uses the PAUSE command to implement flow control. When a device sends data, it also sends the PAUSE command to other devices to prohibit them from sending data within a certain period of time, thereby avoiding data conflicts and congestion. The protocol stack includes the physical layer, data link layer, network layer, transport layer and application layer, which are responsible for the physical transmission of data, frame formatting and error checking, routing and forwarding, end-to-end reliable data transmission and providing specific network services for users. The protocol uses ARP to convert IP addresses into MAC addresses in order to send and receive data packets in the local network. Specifically, when a device needs to send data to another device, it first uses ARP to query the MAC address of the target device. After the query is successful, the data packet is encapsulated into an Ethernet frame and sent using the MAC address of the target device as the destination address.

[0033] The Ethernet interface uses a high-performance PHY chip, based on which the following functions are performed: Data sending: Receive data frames from the MAC layer of the device, which are encapsulated by the MAC layer into Ethernet frames containing a frame header, data, and a frame trailer; encode the received Ethernet frames and convert them into signals suitable for transmission on physical media; modulate the encoded signals to adapt to the characteristics of different transmission media and convert digital signals into analog signals; transmit the modulated signals to the target device through physical media; Data reception: Receive signals from the physical medium and demodulate them to convert analog signals into digital signals; decode the demodulated signals and restore them to the original Ethernet frame format; check the received data to detect whether there are any transmission errors; send the verified data frames to the MAC layer for processing, and determine whether the data should be received based on the frame header information; Low-level communication control: Before sending data, the carrier sense multiple access / collision detection protocol is executed to coordinate access conflicts and collisions between multiple devices; the channel status is monitored, and whether to send data immediately is decided based on whether the channel is idle; when a conflict is detected during the sending process, data sending is immediately stopped, and the sending is attempted again after a period of time; the connection status of the physical link is established and maintained, including detecting the network cable connection status, network speed matching, and automatic negotiation.

[0034] The cross wiring structure on the double-layer PCB board has redundant paths. Multiple parallel paths are designed in the cross wiring structure of the double-layer PCB board to transmit the same signal to ensure that when a single path fails, the signal can still continue to be transmitted through other parallel paths; the backup path does not transmit signals under normal circumstances. When a fault occurs, the backup path can be switched without introducing additional delay or noise.

[0035] As needed, design loops around key signal lines or circuit areas as redundant paths to ensure that the signal can continue to be transmitted to the target location through the loop when a single path fails. At the same time, the size and shape of the loop must be considered to avoid introducing unnecessary electromagnetic interference; design multiple vias at key locations as redundant connections to ensure reliable signal transmission. Even if one of the vias fails, the other vias can still ensure signal transmission.

[0036] When the Ethernet interface is inserted into the device interface, the buckles on its left and right sides are buckled into the preset grooves on the interface; when the Ethernet interface needs to be unplugged, the buckle connection structure is also provided with a release mechanism to press the two sides of the Ethernet interface to unplug the Ethernet interface. Example

[0037] The Ethernet interface of the present invention comprises 16 pins arranged in two rows: the upper row of pins (pins 1-8): used for signal transmission during forward insertion, directly connected to the contacts of the upper PCB. The lower row of pins (pins HA): used for reverse insertion, guiding the signal to the corresponding contacts of the upper layer through the cross wiring inside the double-layer PCB.

[0038] The pins follow the T568B standard, and the wiring order is: 1 white orange, 2 orange, 3 white green, 4 blue, 5 white blue, 6 green, 7 white brown, 8 brown Cable pairing: Pair 1: White-orange (send +), Orange (send -) Pair 2: White-green (receive +), green (receive -) Pair 3: White and Blue (send +), Blue (send -) Pair 4: White-brown (receive +), brown (receive -) That is: Pin 1: (Send+), Pin 2: (Send-), Pin 3: (Receive+), Pin 4: (Send-), Pin 5: (Send+), Pin 6: (Receive-), Pin 7: (Receive+), Pin 8: (Receive-), Pin A: (Send+), Pin B: (Send-), Pin C: (Receive+), Pin D: (Send-), Pin E: (Send+), Pin F: (Receive-), Pin G: (Receive+), Pin H: (Receive-).

[0039] Mapping rule: Pin A corresponds to pin 1, pin B corresponds to pin 2, and so on, pin H corresponds to pin 8.

[0040] Snap mechanism: The snaps are designed on the left and right sides of the plug, similar to the traditional RJ45 plug snaps, but the design is flatter to adapt to the new interface shape. Shape and structure: It can be designed as a pair of symmetrical snap devices. When inserted, the snaps on both sides automatically snap into the grooves of the interface to prevent the plug from loosening. When unplugging, release the snaps by gently pressing on both sides of the plug. Advantages: The symmetrical design of the snaps allows it to work effectively when inserted forwards and backwards, ensuring that the plug can be firmly connected to the device.

[0041] The interface of the present invention adopts a flat design, which greatly reduces the size and space occupied by the interface. The interface can be easily integrated into the edge or side of a thin and light device without affecting the overall appearance and portability of the device. At the same time, the flat design also makes the interface more beautiful and elegant, which conforms to the aesthetic trend of modern thin and light devices.

[0042] The interface of the present invention has the characteristic of reversible pluggability, and the user does not need to worry about the insertion direction, and can easily insert the Ethernet cable into the interface anytime and anywhere. This characteristic greatly improves the user's convenience of use, avoiding the difficulty of plugging and unplugging and the waste of time caused by directional restrictions. At the same time, the reversible pluggable design also reduces the risk of interface damage caused by misoperation and prolongs the service life of the device.

[0043] In terms of data transmission, the interface uses advanced transmission technology and precise contact layout to ensure the stability and speed of data transmission. Whether it is daily office, web browsing or high-definition video transmission, the interface can provide a smooth and high-speed network connection experience. In addition, the interface also supports a variety of Ethernet data transmission protocols, such as 10 / 100 / 1000Mbps Ethernet, etc., to meet the network connection needs of different users in different scenarios.

[0044] In addition, the interface of the present invention also has high durability and stability. The interface body is made of high-quality materials and has the characteristics of corrosion resistance and wear resistance. The contact surface is also treated with anti-corrosion materials such as gold plating to ensure the long-term stability and reliability of the interface. Even under high-intensity use or harsh environments, the interface can maintain excellent performance.

[0045] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A flat reversible Ethernet interface suitable for thin and light devices, characterized in that: include: A double-layer PCB board, the double-layer PCB board is composed of an upper PCB and a lower PCB, and signal transmission is achieved between the upper PCB and the lower PCB through cross wiring; the double-layer PCB board is provided with an upper row of pins and a lower row of pins, wherein the upper row of pins is located in the upper layer, arranged in the order of 1 to 8, and is used for signal transmission during forward insertion, and is directly connected to the contacts of the upper PCB; the lower row of pins is located in the lower layer, arranged in the order of H to A, and is used for signal transmission during reverse insertion, and is connected to the corresponding contacts of the upper PCB through the cross wiring structure inside the double-layer PCB.

2. A flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 1, characterized in that: The double-layer PCB board structure consists of two conductive layers and an insulating medium located between the two conductive layers. A circuit is arranged on each conductive layer, and electrical connection between the two conductive layers is achieved through vias to realize bidirectional transmission of signals.

3. A flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 1, characterized in that: The cross wiring structure on the double-layer PCB board adopts a differential pair design, arranges two lines of the differential pair on the upper and lower layers respectively, and uses terminal resistors to perform impedance matching at the starting and ending ends of the differential pair.

4. A flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 1, characterized in that: An electromagnetic shielding layer is arranged between the double-layer PCB boards. The electromagnetic shielding layer uses metal foil or metal mesh as a shielding material. The layout of the shielding layer covers the entire PCB board area.

5. A flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 1, characterized in that: The signal mapping of the pins complies with the T568B standard, and the specific mapping rule is that pin A corresponds to pin 1, pin B corresponds to pin 2, and so on, until pin H corresponds to pin 8.

6. A method for operating a flat reversible Ethernet interface suitable for thin and light devices, characterized in that: It comprises an upper PCB and a lower PCB, wherein the upper PCB is provided with contacts for signal transmission during forward insertion, and the lower PCB is provided with contacts for signal transmission during reverse insertion; When inserted in the forward direction, the pins of the connector are directly connected to the contacts of the upper PCB, and the signal is transmitted through the circuit path of the upper PCB and connected to the circuit path of the lower PCB through vias or jumpers; When inserted in reverse, the pins of the connector are connected to the contacts of the lower PCB, and the signal is transmitted from the lower PCB to the corresponding position of the upper PCB through the vias or jumpers inside the double-layer PCB, ensuring that the signal can be correctly mapped to the predetermined contacts of the upper PCB.

7. A method for operating a flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 6, characterized in that: The Ethernet interface adopts a standardized network communication protocol, and the protocol adopts a carrier sense multiple access / collision detection mechanism to avoid data conflicts. Specifically, before sending data, it checks whether the transmission medium is idle. If the medium is busy, it waits and then tries to send; when the medium is idle, it starts sending data, and continuously detects conflicts during the sending process. Once a conflict is detected, it immediately stops sending and sends an interference signal, and then waits for a backoff time before trying to send again.

8. A method for operating a flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 6, characterized in that: The Ethernet interface uses a high-performance PHY chip, based on which the following functions are performed: Data sending: Receive data frames from the MAC layer of the device, which are encapsulated by the MAC layer into Ethernet frames containing a frame header, data, and a frame trailer; encode the received Ethernet frames and convert them into signals suitable for transmission on physical media; modulate the encoded signals to adapt to the characteristics of different transmission media and convert digital signals into analog signals; transmit the modulated signals to the target device through physical media; Data reception: Receive signals from physical media, demodulate them, and convert analog signals into digital signals; decode the demodulated signals and restore them to the original Ethernet frame format; Verify the received data to detect whether there is any transmission error; The verified data frames are sent to the MAC layer for processing, and the frame header information is used to determine whether the data should be received. Low-level communication control: Before sending data, it executes the carrier sense multiple access / collision detection protocol to coordinate access conflicts and collisions between multiple devices; it monitors the channel status and decides whether to send data immediately based on whether the channel is idle; When a conflict is detected during the sending process, stop sending data immediately and try to send again after waiting for a period of time; establish and maintain the connection status of the physical link, including detecting the network cable connection status, network speed matching, and automatic negotiation.

9. A method for operating a flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 6, characterized in that: The cross wiring structure on the double-layer PCB board has redundant paths. Multiple parallel paths are designed in the cross wiring structure of the double-layer PCB board to transmit the same signal to ensure that when a single path fails, the signal can still continue to be transmitted through other parallel paths; the spare path does not transmit the signal under normal circumstances, and the spare path can be switched when a fault occurs, and no additional delay or noise is introduced.

10. A method for operating a flat reversible Ethernet interface suitable for thin and light devices as claimed in claim 6, characterized in that: When the Ethernet interface is inserted into the device interface, the buckles on its left and right sides are buckled into the preset grooves on the interface; when the Ethernet interface needs to be unplugged, the buckle connection structure is also provided with a release mechanism to press the two sides of the Ethernet interface to unplug the Ethernet interface.

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