Self-checking method, device and equipment based on group three-phase inverter and medium

Abstract

The invention discloses a self-checking method, device and equipment based on a group three-phase inverter and a medium, and relates to the technical field of power electronic control. First IO bus self-checking operation is carried out through frequency detection of a first IO bus of each phase inverter, square wave signals of each phase inverter are uniform if the first IO bus self-checking succeeds, the first IO bus is used for a phase synchronization bus, it is guaranteed that the phase dislocation angle of each phase is in a 120-degree initial state when a signal falling edge is received, and therefore the overall performance of the inverter is improved. And the three-phase load is prevented from being damaged during off-grid operation. And performing level operation on the second IO bus to count the level rising edge times of the inverter of each phase, and determining that the second IO bus corresponding to the inverter of each phase succeeds in self-inspection when the level rising edge times are the same as the conversion times of the level operation. And the second IO bus is used as a state synchronization signal to ensure that the states of the three-phase inverters are consistent in the subsequent grid-connected and off-grid switching process, so that the problem of short-time overcurrent of the load when the actions of the relays are inconsistent is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronic control, and in particular to a self-checking method, device, equipment and medium based on a three-phase inverter. Background Art

[0002] The three-phase inverter is a three-phase user energy storage inverter that realizes the function of a three-phase user energy storage inverter through networking and related control methods. It has the load carrying capacity of three-phase three-wire and three-phase four-wire. When the machine is running off the grid, the three-phase inverter may have a three-phase phase misalignment angle that does not follow the strict 120-degree phase misalignment of the three-phase control, resulting in damage to the three-phase load; at the same time, the three-phase inverter may have a short-term overcurrent problem in the connected three-phase load when the switching states of each phase are not synchronized or the relay action time is inconsistent.

[0003] Therefore, how to avoid short-term overcurrent caused by damage to the three-phase load and asynchronous state of the three-phase inverter group is an urgent problem to be solved by those skilled in the art. Summary of the invention

[0004] The purpose of the present invention is to provide a self-test method, device, equipment and medium based on a three-phase inverter, so as to accurately identify the problem of the IO bus transceiver circuit of a certain phase through the self-test of the IO bus, and avoid the damage of the three-phase load caused by the non-strict phase misalignment of 120 degrees when the three-phase inverter is running off the grid, and avoid the short-term overcurrent problem of the three-phase load caused by the state being out of sync or the inconsistent relay action time.

[0005] In order to solve the above technical problems, the present invention provides a self-test method based on a three-phase inverter, comprising:

[0006] Determine the frequency of the first IO bus by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus;

[0007] Within the preset phase angle range of each phase inverter, sequentially perform level operation on the second IO bus to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0008] When the number of rising edges of the level of each phase inverter is the same as the number of conversions under the level operation of each phase inverter, it is determined that the second IO bus self-test is successful.

[0009] On the one hand, the frequency of the first IO bus is determined by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus, including:

[0010] Sending a square wave signal corresponding to a preset fixed duty cycle and a preset frequency to the reference phase inverter;

[0011] Pulling up the level signals outputted by the first IO bus corresponding to the remaining two-phase inverters except the reference phase inverter;

[0012] The corresponding falling edge is captured by the receiving end of each phase inverter to obtain the corresponding actual frequency;

[0013] If the actual frequency is within the preset range of the preset frequency, it is determined that the self-test of the first IO bus corresponding to each phase inverter is successful.

[0014] On the other hand, the second IO bus is operated in sequence to count the number of rising edges of the level of each phase inverter within the corresponding preset phase angle range, including:

[0015] Get the number of level operations;

[0016] Under the current level operation times, the current phase inverter is controlled to output the low level signal of the second IO bus at the first preset phase angle; during the first preset time interval, the current phase inverter is controlled to output the high level signal of the second IO bus at the second preset phase angle;

[0017] Controlling the remaining phase inverters except the current phase inverter to output a high level signal of the second IO bus;

[0018] Obtaining a first preset phase angle range of the current phase inverter under the current level operation times, and the number of level rising edges corresponding to the respective preset phase angle ranges of the remaining phase inverters except the current phase inverter;

[0019] Determine the number of level rising edges of each phase inverter within the corresponding preset phase angle range according to the number of level operations;

[0020] Among them, the first preset phase angle range includes the first preset phase angle and the second preset phase angle; the first preset phase angle is smaller than the second preset phase angle; the first preset phase angle range and the remaining phase inverters except the current phase inverter have a phase difference angle between their respective preset phase angle ranges.

[0021] On the other hand, determining that the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter includes:

[0022] Controlling the current phase inverter to output the level signal of the second IO bus according to the number of level operations, and obtaining the number of conversions from the low level signal to the high level signal;

[0023] If the number of level rising edges is the same as the number of conversions, it is determined that the second IO bus self-test corresponding to the current phase inverter is successful;

[0024] Correspondingly, if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter, then according to the preset number of level operation rounds, return to the step of performing level operation on the second IO bus in sequence to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range, and restart the level operation to determine the corresponding number of rising edges; if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter when the preset number of level operation rounds is reached, it is determined that the self-test of the second IO bus corresponding to the current phase inverter has failed.

[0025] On the other hand, after determining the self-test result of the second IO bus corresponding to the first phase inverter and before performing a level operation on the second IO bus corresponding to the second phase inverter, the method further includes:

[0026] Acquiring a self-test state of the first phase inverter corresponding to the second IO bus through inter-phase communication between the first phase inverter and the second phase inverter;

[0027] If the self-test state of the second IO bus corresponding to the first phase inverter is successful, the level signal output by the second IO bus corresponding to the first phase inverter is pulled high;

[0028] The level signal output by the second IO bus corresponding to the third-phase inverter is pulled high, and the step of performing level operation on the second IO bus corresponding to the second-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0029] Correspondingly, after determining the self-test result of the second IO bus corresponding to the second phase inverter and before performing a level operation on the second IO bus corresponding to the third phase inverter, the method further includes:

[0030] Obtaining the self-test status of the first phase inverter and the second phase inverter respectively corresponding to the second IO bus through the inter-phase communication mode between the first phase inverter and the third phase inverter and the inter-phase communication mode between the second phase inverter and the third phase inverter;

[0031] If the self-test states of the second IO buses corresponding to the first-phase inverter and the second-phase inverter are both successful, the level signals output by the second IO buses corresponding to the first-phase inverter and the second-phase inverter are pulled high, and the step of performing level operation on the second IO bus corresponding to the third-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range.

[0032] On the other hand, after determining that each phase inverter self-test is successful, the method further includes:

[0033] Setting a flag indicating that each phase inverter has successfully performed a self-test;

[0034] The input signal of the second IO bus is controlled to be pulled low so as to facilitate the state operation of each phase inverter.

[0035] On the other hand, the inter-phase communication mode of each phase inverter is a CAN communication mode; wherein, the interrupt processing status synchronization information is set through a first priority CAN communication frame; and the status information reply is set through a second priority CAN communication frame.

[0036] In order to solve the above technical problems, the present invention also provides a self-test device based on a three-phase inverter, comprising:

[0037] An acquisition module, used for determining the frequency of the first IO bus by capturing the falling edge of each phase inverter when the three-phase inverter is networked and established for communication, so as to perform a self-check operation of the first IO bus;

[0038] A statistical module, used to perform level operations on the second IO bus in sequence within a preset phase angle range of each phase inverter to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0039] The determination module is used to determine that the second IO bus self-test is successful when the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter.

[0040] In order to solve the above technical problems, the present invention also provides a self-test device based on a three-phase inverter, comprising:

[0041] Memory for storing computer programs;

[0042] A processor is used to implement the steps of the self-test method based on a three-phase inverter as described above when executing the computer program.

[0043] In order to solve the above technical problems, the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the self-test method based on the three-phase inverter as described above are implemented.

[0044] The present invention provides a self-test method based on a three-phase inverter. The frequency of the first IO bus is determined by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus; within the preset phase angle range of each phase inverter, the second IO bus is sequentially level-operated to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range; when the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter, it is determined that the second IO bus self-test is successful. The present invention performs a self-test of the IO Bus before connecting to the grid. The first IO bus self-test operation is performed by detecting the frequency of the first IO bus of each phase inverter. When the first IO bus self-test is successful, the square wave signals of each phase inverter are unified. The first IO bus is used for a phase synchronization bus to ensure that the phase misalignment angle of each phase is 120 when the falling edge of the signal is received, so as to avoid damage to the three-phase load during off-grid operation. In addition, by performing level operation on the second IO bus to count the number of level rising edges of each phase inverter, when the number of level rising edges is the same as the number of conversions of the level operation, it is determined that the second IO bus self-test corresponding to each phase inverter is successful. Here, the second IO bus is used as a state synchronization signal. Only when the initial state of the second IO bus is the same, the state of the three-phase inverter group is guaranteed to be consistent during the subsequent on-grid and off-grid switching process, avoiding the occurrence of short-term overcurrent problems of the load when the relay action is inconsistent, and improving the reliability of the inverter.

[0045] In addition, the present invention also provides a self-test device, equipment and medium based on a three-phase inverter, which have the same beneficial effects as the above-mentioned self-test method based on a three-phase inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0047] FIG1 is a flow chart of a self-test method based on a three-phase inverter according to an embodiment of the present invention;

[0048] FIG2 is a circuit structure diagram of a hardware bus of a three-phase inverter provided by an embodiment of the present invention;

[0049] FIG3 is a structural diagram of a three-phase inverter provided by an embodiment of the present invention;

[0050] FIG4 is a flow chart of another self-test method based on a three-phase inverter according to an embodiment of the present invention;

[0051] 5 is a structural diagram of a self-test device based on a three-phase inverter provided by an embodiment of the present invention;

[0052] FIG6 is a structural diagram of a self-test device based on a three-phase inverter provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0053] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] The core of the present invention is to provide a self-test method, device, equipment and medium based on a three-phase inverter, so as to accurately identify the problem of the IO bus transceiver circuit of a certain phase through the self-test of the IO bus, and avoid the damage of the three-phase load caused by the non-strict phase misalignment of 120 degrees when the three-phase inverter is running off the grid, and avoid the problem of short-term overcurrent of the three-phase load caused by the state being out of sync or the inconsistent relay action time.

[0055] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0056] The three-phase control of the single-phase energy storage inverter group is to realize the function of a three-phase household energy storage inverter through networking and related control methods of three single-phase energy storage inverters, and has the load-carrying capacity of three-phase three-wire and three-phase four-wire. If the three phases are not strictly staggered by 120 degrees, the three-phase load cannot be evenly distributed, causing overload and problems with motor operation. The three-phase inverter group may have inconsistent switching states of each phase or inconsistent relay action, resulting in short-term overcurrent of the connected three-phase load, or even circuit breaking or shutdown. The self-test method based on the three-phase inverter group provided by the present invention can avoid the above problems.

[0057] FIG1 is a flow chart of a self-test method based on a three-phase inverter provided by an embodiment of the present invention. As shown in FIG1 , the method includes:

[0058] S11: determining the frequency of the first IO bus by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus;

[0059] S12: within the preset phase angle range of each phase inverter, sequentially performing level operation on the second IO bus to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0060] S13: When the number of rising edges of the level of each phase inverter is the same as the number of conversions under the level operation of each phase inverter, it is determined that the second IO bus self-test is successful.

[0061] Specifically, the three-phase inverter is to realize the function of a three-phase user energy storage inverter by networking three single-phase energy storage inverters and related control methods, and has the load carrying capacity of three-phase three-wire and three-phase four-wire. The first IO bus and the second IO bus in the present invention are respectively responsible for the corresponding bus self-test process for the load damage problem of the three-phase load, so as to realize the strict phase mismatch angle and the state synchronization function of the three-phase inverter in the future.

[0062] The frequency of the first IO bus is determined in step S11 by capturing the falling edge of each phase inverter. The IO bus frequency self-check is that each phase inverter performs self-check on the square wave frequency captured by the bus to ensure that it works within the normal range. As for when the self-check process is performed, it can be performed when each phase inverter successfully establishes communication to ensure the normal operation of the system.

[0063] In some embodiments, the frequency of the first IO bus is determined by capturing a falling edge of each phase inverter to perform a self-test operation of the first IO bus, including:

[0064] Sending a square wave signal corresponding to a preset fixed duty cycle and a preset frequency to the reference phase inverter;

[0065] Pulling up the level signals outputted by the first IO bus corresponding to the remaining two-phase inverters except the reference phase inverter;

[0066] The corresponding falling edge is captured by the receiving end of each phase inverter to obtain the corresponding actual frequency;

[0067] If the actual frequency is within the preset range of the preset frequency, it is determined that the self-test of the first IO bus corresponding to each phase inverter is successful.

[0068] Specifically, the phase sequence configuration between the reference phase inverter and the other two-phase inverters is not limited and can be set according to actual conditions. The input end of the inverter is correctly connected to the corresponding phase of the power supply or grid, and the correct phase sequence and phase angle are set on the control interface of the inverter to ensure that the internal logic of the inverter is consistent with the actual connected phase sequence.

[0069] The reference inverter sends a duty cycle signal, and the remaining phase inverters pull up the signal relative to the first IO bus. Each phase inverter obtains the square wave frequency (actual frequency) by capturing the falling edge. If the square wave frequency is within the preset range of the preset frequency, it is determined that the self-test of the first IO bus is normal, otherwise the self-test fails.

[0070] It should be noted that a square wave signal with a duty cycle and a preset frequency is first sent to the reference phase inverter. For example, a square wave signal with a fixed duty cycle and a frequency of 50 Hz is sent to the R phase inverter, and the input signals of the first input-output (IO) bus of the remaining phase inverters are pulled high, that is, the input signals of the first IO bus of S and T are pulled high, and the fixed duty cycle adopts a 99.8% duty cycle, that is, within one cycle, the high level state only leaves a very short low level time, thereby reducing electromagnetic interference.

[0071] The reference phase inverter here means that in a specific control algorithm, one phase may be selected as a reference or benchmark in order to effectively manage the balance of power supply or optimize specific performance parameters.

[0072] Based on the first IO bus, the three-phase inverter is frequency-detected, and each phase captures the falling edge through the receiving port (Receive, RX) to obtain the square wave frequency. If the frequency is normal within the set range, it is considered that the first IO bus corresponding to each phase inverter is self-checked successfully to ensure that the initialization phase mismatch angle is strictly calculated according to the 120-degree phase mismatch. The setting range here is the range set by the deviation value of the set frequency, which can be plus or minus 0.1Hz. Therefore, if the actual frequency is within the preset range of the preset frequency, it is determined that the first IO bus corresponding to each phase inverter is self-checked successfully. The preset range here can be plus or minus 0.1Hz of the preset frequency.

[0073] The first IO bus in step S11 is used as a phase synchronization bus to ensure that each phase is strictly out of phase by 120 degrees when receiving the falling edge of the signal. The out-of-phase angle here actually means the phase synchronization of the inverter, not the misalignment. The voltage waveform of each phase will be staggered by 120 degrees in time to form a balanced three-phase AC system. The 120-degree phase difference allows efficient power transmission and distribution, which is essential for the stable operation of motors and other three-phase loads.

[0074] FIG2 is a circuit structure diagram of a hardware bus of a three-phase inverter provided by an embodiment of the present invention. As shown in FIG2, a reference phase (R phase) is selected. When the first level signal is converted from a high level to a low level, it is a falling edge. The actual frequency corresponding to the falling edge is captured. If the actual frequency is the same as the preset frequency, it means that the frequency is normal within the set range. It can be understood that the actual frequency in this embodiment is the same as the preset frequency, and a certain deviation can be allowed. For example, the actual frequency is 49.91Hz, and there is a deviation from the preset frequency of 50Hz. The actual frequency is also considered to be the same as the preset frequency. The deviation is set to a certain preset range, such as ±0.1Hz.

[0075] After the three-phase network communication is successfully established, the first IO bus self-test is performed. Each phase captures the falling edge through the RX port corresponding to the three-phase inverter to obtain the square wave frequency. If the frequency is normal within the set range, it is considered that the first IO bus self-test is normal. Otherwise, it is abnormal and enters the Fault mode. The subsequent three-phase operation is not performed, and the second IO bus self-test is not performed.

[0076] In FIG2 , a level signal is input to an input port of a three-phase inverter according to the first IO bus, and then a level signal output by an output port of the three-phase inverter is captured to perform a corresponding self-test scheme.

[0077] The three-phase inverter group provided in this embodiment establishes communication by networking, ensuring the implementation of the self-test scheme of the first IO bus self-test corresponding to the subsequent three-phase inverter group. At the same time, a fixed duty cycle and frequency are issued to improve anti-interference. By comparing the actual frequency with the preset range of the preset frequency, if it is within the preset range, it means that the first IO bus self-test is successful. During the first IO bus self-test process, whether it is connected to the grid or off-grid, the phase misalignment is strictly controlled to be 120 degrees to ensure the phase synchronization of the three-phase inverter group and avoid damage to the three-phase load.

[0078] When the self-test of the first IO bus succeeds, the self-test of the second IO bus of step S12 is performed to set a preset phase angle range of the three-phase inverter. The preset phase angle range here is not the preset phase angle range corresponding to one-phase inverter, but when the preset phase angle range of a certain phase inverter is within the preset phase angle range, the preset phase angle range of the remaining phase inverters follows the rule of the phase mismatch angle (120 degrees), and the preset phase angle range of the remaining phase inverters is obtained by adding the phase mismatch angle to the preset phase angle range of the certain phase inverter.

[0079] For example, when the R-phase inverter is self-tested, the preset phase angle range of the corresponding R-phase inverter is 30-35 degrees, the preset phase angle range of the corresponding S-phase inverter is 270-275 degrees, and the preset phase angle range of the T-phase inverter is 150-155 degrees. When the S-phase inverter is self-tested, the preset phase angle range of the corresponding S-phase inverter is 60-65 degrees, the preset phase angle range of the corresponding T-phase inverter is 300-305 degrees, and the preset phase angle range of the R-phase inverter is 180-185 degrees.

[0080] In step S12, within the preset phase angle range based on the three-phase inverter, the second IO bus is operated in turn to count the number of rising edges of the level of each phase inverter within the corresponding preset phase angle range, that is, the second IO bus is used for the state synchronization signal, and ensures that the state of the three-phase inverter is consistent and the relay action time is consistent during the on-grid switching process. It is also necessary to use the three-phase inverter as the current phase inverter, and perform level operation on the second IO bus of the current phase inverter. In the case of level operation, it will change from high level to low level, or from low level to high level. In this embodiment, the number of corresponding rising edges of the low level to high level is counted.

[0081] If the number of rising edges is the same as the actual number of pull-down and pull-up operations, it means that the output signal of the second IO bus is intact, and it also corresponds to the success of the current phase inverter self-test.

[0082] The current phase inverter here needs to check the corresponding target phase when one phase is checked separately during the self-test process of the inverter. The other two phases are kept pulled high to ensure the accuracy of the detection and the safe operation of the system. It can simulate normal working conditions and more accurately detect the state of the main phase; by pulling high, it is ensured that when detecting the current, the other two phases will not interfere with the detection results, which helps to accurately locate the fault.

[0083] For the three phases of the three-phase inverter group, if the number of rising edges is determined as the current phase inverter, and if it is the same as the number of high and low level conversions under the level operation when it is the current phase, then it is determined that the self-test of the inverter as the current phase is successful; if they are the same, then it is determined that the second IO bus self-test of the three-phase inverter group is successful.

[0084] Only when the second IO bus self-test of the inverter is successful, subsequent related state switching operations and other actions are performed to ensure the state synchronization of the three-phase inverter group.

[0085] The embodiment of the present invention provides a self-test method based on a three-phase inverter. The frequency of the first IO bus is determined by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus; within the preset phase angle range of each phase inverter, the second IO bus is sequentially operated to count the number of rising edges of the level of each phase inverter within the corresponding preset phase angle range; when the number of rising edges of the level of each phase inverter is the same as the number of conversions under the level operation of each phase inverter, it is determined that the self-test of the second IO bus is successful. The present invention performs a self-test of the IO Bus before connecting to the grid. The first IO bus self-test operation is performed by detecting the frequency of the first IO bus of each phase inverter. When the self-test of the first IO bus is successful, the square wave signals of the inverters of each phase are unified. The first IO bus is used for the phase synchronization bus to ensure that the phase misalignment angle of each phase is 120 when the falling edge of the signal is received, so as to avoid damage to the three-phase load during off-grid operation. In addition, by performing level operation on the second IO bus to count the number of level rising edges of each phase inverter, when the number of level rising edges is the same as the number of conversions of the level operation, it is determined that the second IO bus self-test corresponding to each phase inverter is successful. Here, the second IO bus is used as a state synchronization signal. Only when the initial state of the second IO bus is the same, the state of the three-phase inverter group is guaranteed to be consistent during the subsequent on-grid and off-grid switching process, avoiding the occurrence of short-term overcurrent problems of the load when the relay action is inconsistent, and improving the reliability of the inverter.

[0086] In some embodiments, performing level operations on the second IO bus in sequence to count the number of level rising edges of each phase inverter within a corresponding preset phase angle range includes:

[0087] Get the number of level operations;

[0088] Under the current level operation times, the current phase inverter is controlled to output a low level signal of the second IO bus at a first preset phase angle; during the first preset time interval, the current phase inverter is controlled to output a high level signal of the second IO bus at a second preset phase angle;

[0089] Controlling the remaining phase inverters except the current phase inverter to output a high level signal of the second IO bus;

[0090] Obtaining a first preset phase angle range of the current phase inverter under the current level operation times, and the number of level rising edges corresponding to the respective preset phase angle ranges of the remaining phase inverters except the current phase inverter;

[0091] Determine the number of level rising edges of each phase inverter within the corresponding preset phase angle range according to the number of level operations;

[0092] Among them, the first preset phase angle range includes a first preset phase angle and a second preset phase angle; the first preset phase angle is smaller than the second preset phase angle; the first preset phase angle range and the remaining phase inverters except the current phase inverter have a phase difference angle between their respective preset phase angle ranges.

[0093] Specifically, in this embodiment, when the current phase inverter is used to perform pull-down and pull-up operations, the other two phases maintain the pull-up operation to determine the number of rising edges corresponding to the preset phase angle range. The preset phase angle range is mainly selected within the detection angle range. In order to achieve the flexibility of the detection angle of the three-phase inverter group, the minimum phase angle and the maximum phase angle of the detection angle range differ by a preset degree, which is not limited here.

[0094] The number of level operations in this embodiment is based on multiple operations under one round of level operations, for example, 10 level operations. In each level operation, the current phase inverter is controlled to output a low level signal of the second IO bus at the first preset phase angle, and at the first preset time interval, the current phase inverter is controlled to output a high level signal of the second IO bus at the second preset phase angle, that is, a pull-down operation is performed at the first preset phase angle, and a pull-up operation is performed at the second preset phase angle. The remaining phase inverters output a high level signal of the second IO bus, that is, the remaining two phase inverters maintain the pull-up operation. Obtain the number of level rising edges corresponding to the current number of level operations corresponding to the corresponding angle range. It should be noted here that the statistical process of the number of rising edges requires repeated testing of the rising edges of the level signal that appear under the pull-down and pull-up operations, that is, the number of level rising edges determined under the number of level operations. The number of level operations is not limited here, and can be 10 times or multiple times, which can be set according to actual conditions.

[0095] The first preset phase angle range includes a first preset phase angle and a second preset phase angle. The rising edge test can be implemented only when the first preset phase angle is smaller than the second preset phase angle. The first preset phase angle range and the other two-phase inverters have a phase misalignment angle between their respective preset phase angle ranges.

[0096] For example: pull the R phase down at 30 degrees, pull it up at 33 degrees, and continue the pull-up and pull-down operation for 10 times. Keep the S and T phases pulled up. Detect the number of rising edges of the R, S, and T phases in the corresponding angle range. If they are all 10 times, the IO self-test of the phase is successful. Otherwise, the self-test fails. Re-perform the 10 pull-up and pull-down operations of the R phase. If multiple self-test failures occur, an error is reported. The corresponding detection angle ranges are 30 to 35 degrees for the R phase, 270 to 275 degrees for the S phase, and 150 to 155 degrees for the T phase.

[0097] When the S phase is self-checked, the S phase is pulled down at 60 degrees and pulled up at 63 degrees, and the pull-up and pull-down operations are continued for 10 times. The number of rising edges of the R, S, and T phases within the corresponding angle range is detected. If the number is 10 times, the IO self-check of the phase is successful, otherwise the self-check fails, and the S phase is pulled up and down 10 times again. If multiple self-check failures occur, an error is reported. The corresponding detection angle ranges are 180 to 185 degrees for the R phase, 60 to 65 degrees for the S phase, and 300 to 305 degrees for the T phase;

[0098] When self-checking the T phase, pull the T phase down at 90 degrees and pull it up at 93 degrees, and continue the pull-up and pull-down operation for 10 times. Detect the number of rising edges of the R, S, and T phases within the corresponding angle range. If they are all 10 times, the IO self-check of the phase is successful, otherwise the self-check fails, and the T phase is pulled up and pulled down 10 times again. If multiple self-check failures occur, an error is reported. The corresponding detection angle ranges are 330 degrees to 335 degrees for the R phase, 210 degrees to 215 degrees for the S phase, and 90 degrees to 95 degrees for the T phase.

[0099] Based on the self-test process of each phase inverter in the above example when performing its current phase, the selection of the corresponding phase angle can be set based on the actual situation. The first preset phase angle and the second preset phase angle in this embodiment are only a general term. In order to take into account the angle flexibility and applicability of the self-test process of the second IO bus test, the specific phase angle can be tested based on different phase angles.

[0100] In this embodiment, only the number of rising edges corresponding to the remaining two-phase inverters under the pull-down and pull-up operations of the three-phase inverter as the current phase is determined. If the self-test is successful, it is necessary to check the comparison between the number of rising edges and the number of conversions of the pull-down and pull-up level signals under the level operation.

[0101] In some embodiments, determining that the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter includes:

[0102] Controlling the current phase inverter to output the level signal of the second IO bus according to the number of level operations, and obtaining the number of conversions from the low level signal to the high level signal;

[0103] If the number of level rising edges is the same as the number of conversions, it is determined that the second IO bus self-test corresponding to the current phase inverter is successful;

[0104] Correspondingly, if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter, then according to the preset number of level operation rounds, the process returns to the step of performing level operation on the second IO bus in sequence to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range, and the level operation is restarted to determine the corresponding number of rising edges; if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter when the preset number of level operation rounds is reached, it is determined that the self-test of the second IO bus corresponding to the current phase inverter has failed.

[0105] It can be understood that the number of rising edges and the number of conversions in this embodiment are based on the corresponding statistical process under the number of pull-up and pull-down operations under the three-phase inverter group. If the number of rising edges corresponding to 10 pull-down and pull-up operations is 10, it is determined that the second IO bus self-test of the current phase inverter is successful. If the number of rising edges is different from the number of conversions under the level operation of the three-phase inverter group, in order to confirm again, it is necessary to re-perform the pull-up and pull-down operations of the current phase inverter to perform a new level operation and determine the corresponding number of rising edges. It should be noted that in this embodiment, the self-test test is not repeated in a cycle when multiple self-tests are unsuccessful, but the preset number of level operation rounds is limited. When this value is reached, if the number of level rising edges is different from the number of conversions of the level operation of each phase inverter, a conclusion can be drawn to determine that the second IO bus self-test corresponding to the current phase inverter has failed. If the second IO bus self-test of a phase inverter fails, an error processing is required. At this time, there is no need for the second IO bus self-test of other phase inverters, saving self-test time.

[0106] Only when the self-test of the three-phase inverter is successful, can it be determined that the self-test of the second IO bus corresponding to the three-phase inverter is successful.

[0107] The second IO bus self-check process of each phase inverter provided in this embodiment simplifies the self-check process and improves the self-check efficiency by comparing the number of level rising edges and the number of conversions. The second IO bus is used as a state synchronization signal. Only when the initial states of the second IO buses are the same, the states of the three-phase inverters in the subsequent on-grid and off-grid switching process are guaranteed to be consistent, thereby avoiding the occurrence of short-term overcurrent problems of the load and improving the reliability of the inverter.

[0108] Since there is inter-phase communication in the three-phase inverter, for example, when the self-test is successful with the R phase as the main phase, the self-test process with the S phase as the current phase needs to be informed through the inter-phase communication.

[0109] In some embodiments, after determining the self-test result of the second IO bus corresponding to the first phase inverter and before performing a level operation on the second IO bus corresponding to the second phase inverter, the method further includes:

[0110] Acquiring a self-test state of the first phase inverter corresponding to the second IO bus through inter-phase communication between the first phase inverter and the second phase inverter;

[0111] If the self-test state of the second IO bus corresponding to the first phase inverter is successful, the level signal output by the second IO bus corresponding to the first phase inverter is pulled high;

[0112] The level signal output by the second IO bus corresponding to the third-phase inverter is pulled high, and the step of performing a level operation on the second IO bus corresponding to the second-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0113] Correspondingly, after determining the self-test result of the second IO bus corresponding to the second phase inverter and before performing a level operation on the second IO bus corresponding to the third phase inverter, the method further includes:

[0114] Obtaining the self-test status of the first phase inverter and the second phase inverter respectively corresponding to the second IO bus through the inter-phase communication mode between the first phase inverter and the third phase inverter and the inter-phase communication mode between the second phase inverter and the third phase inverter;

[0115] If the self-test states of the second IO buses corresponding to the first-phase inverter and the second-phase inverter are both successful, the level signals output by the second IO buses corresponding to the first-phase inverter and the second-phase inverter are pulled high, and the step of performing level operation on the second IO bus corresponding to the third-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range.

[0116] Specifically, the self-test state of the second IO bus corresponding to the first phase inverter is obtained through the inter-phase communication mode of the three-phase inverter; if the self-test state of the second IO bus corresponding to the first phase inverter is successful, the level signal of the second IO bus corresponding to the first phase inverter is pulled high. At the same time, the level signal of the second IO bus of the third phase inverter is pulled high to facilitate the self-test of the second IO bus corresponding to the second phase inverter.

[0117] Before performing the self-test of the third-phase inverter, it is necessary to determine the self-test status of the second IO bus corresponding to the first-phase inverter and the second-phase inverter. If both are successful, the level signal output by the second IO bus corresponding to the first-phase inverter and the second-phase inverter is pulled high to facilitate the level operation of the third-phase inverter, and the number of level rising edges corresponding to each phase inverter is counted.

[0118] It should be noted that the specific phases corresponding to the first phase inverter, the second phase inverter and the third phase inverter in this embodiment are not limited, as long as the inverters of each phase are different, they can correspond to S, R, T phases, etc.

[0119] For example: the S phase obtains the R phase self-test status through the phase-to-phase communication method. If the R phase self-test is successful, the R phase is pulled high, the T phase remains pulled high, and then the S phase performs the second IO bus self-test; when the S phase self-test is successful, the T phase performs the second IO bus self-test, and the T phase obtains the R and S phase self-test status through the phase-to-phase communication method. If the R and S phase self-tests are successful, the R and S phases are pulled high, and then the T phase performs the second IO bus self-test.

[0120] In this embodiment, the self-test status of the second IO bus corresponding to the inverters of different phases is corresponded by the inter-phase communication mode, so as to enter the self-test process of the second IO bus corresponding to the inverters of other phases in time, thereby improving the self-test efficiency. At the same time, through the inter-phase communication mode, each phase obtains the self-test status of its own inverter and the second IO bus corresponding to the inverters of other phases.

[0121] In some embodiments, the inter-phase communication mode of the three-phase inverter is a CAN communication mode; wherein, the interrupt processing status synchronization information is set through the first priority CAN communication frame; and the status information reply is set through the second priority CAN communication frame.

[0122] It can be understood that the controller area network (CAN) communication method in this embodiment has high real-time communication capability and anti-electromagnetic interference capability. By setting different priorities, the operation processing in the corresponding self-test process is processed. The first priority CAN communication frame is used for command-type bus preemption, and the interrupt directly processes the status synchronization information. The second priority CAN communication frame is used for functions such as status information reply. At this time, the first priority CAN communication frame is larger than the second priority CAN communication frame.

[0123] The single frame setting priority of the CAN communication method of this embodiment can be used for the processing function of status information in different self-checking processes, thereby improving the self-checking efficiency of the self-checking process.

[0124] FIG3 is a structural diagram of a three-phase inverter provided in an embodiment of the present invention. As shown in FIG3 , a three-phase main circuit diagram of the three-phase inverter (R phase, S phase and T phase) corresponds to connecting a grid (Grid) and a load (Load) respectively.

[0125] In some embodiments, after determining that each phase inverter self-test is successful, the method further includes:

[0126] Set the self-test success flag of each phase inverter;

[0127] The input signal of the second IO bus is controlled to be pulled low so as to facilitate the state operation of each phase inverter.

[0128] Specifically, if each phase inverter self-tests successfully, it is necessary to set the three-phase self-test success flag so that it can be pulled low through the second IO bus later. At this time, the initial state of the bus is guaranteed, and subsequent related state switching operations are performed.

[0129] FIG4 is a flow chart of another self-test method based on a three-phase inverter according to an embodiment of the present invention. As shown in FIG4 , the method includes:

[0130] S21: After the phase sequence is set, the R phase sends a fixed duty cycle 50Hz square wave, and the S and T phases pull up the IO bus1 bus;

[0131] S22: When capturing the frequency at each phase RX port, determine whether the frequency is within the set range; if not, proceed to step S23; if yes, proceed to step S24;

[0132] S23: IO bus 1 self-checks abnormally and enters Fault mode. If the fault is cleared, the self-check is re-entered and the process returns to step S21.

[0133] S24: IO bus 1 self-test succeeds, and each phase performs IO bus 2 bus pull-up action;

[0134] S25: Determine whether the IO bus2 RX end detection is a high level; if so, proceed to step S26; if not, return to step S25;

[0135] S26: Start self-test of R phase IO bus2, pull down at 30 degrees, pull up at 33 degrees, continue 10 times, and keep pulling up S and T phases;

[0136] S27: Determine whether the number of rising edges within the corresponding angle ranges of R, S, and T is 10; if not, return to step S26; if so, proceed to step S28;

[0137] S28: The R phase sets the self-test success flag, and the S phase obtains the R phase self-test status through inter-phase communication. After obtaining the R phase self-test success flag, the S phase IO bus2 self-test is performed;

[0138] S29: Perform self-test on S-phase IO bus 2, pull it down at 60 degrees and pull it up at 63 degrees, continue for 10 times, and keep the R and T phases pulled high;

[0139] S30: Determine whether the number of rising edges within the corresponding angle ranges of R, S, and T is 10; if not, return to step S29; if so, proceed to step S31;

[0140] S31: The S phase sets the self-test success flag, and the T phase obtains the R and S phase self-test status through inter-phase communication. After obtaining the RS phase self-test success flag, the T phase IO bus2 self-test is performed;

[0141] S32: Perform self-test on the T-phase IO bus 2, pull it down at 90 degrees and pull it up at 93 degrees, continue for 10 times, and keep the R and S phases pulled high;

[0142] S33: Determine whether the number of rising edges within the corresponding angle ranges of R, S, and T is 10 times. If not, return to step S32; if so, proceed to step S34;

[0143] S34: T phase set self-test success flag;

[0144] S35: Determine whether each phase obtains the self-check status of its own machine and the self-check status of the other two phases successfully; if not, return to step S35; if yes, proceed to step S36;

[0145] S36: Set the IO bus2 self-test success flag, pull down the IO bus2 bus, and perform the state machine switching operation.

[0146] IO bus1 in FIG4 is the first IO bus, and IO bus2 is the second IO bus. It should be noted that, after the phase sequence is successfully set in step S21, the physical address is assigned, and after the determination based on the physical address of each phase, if the physical address of each phase is correctly assigned, the three-phase networking is successful. After the three-phase networking communication is successfully established in step S22, the IO bus1 self-check is performed.

[0147] The above describes in detail various embodiments corresponding to the self-test method based on the three-phase inverter. On this basis, the present invention also discloses a self-test device based on the three-phase inverter corresponding to the above method. FIG5 is a structural diagram of a self-test device based on the three-phase inverter provided by an embodiment of the present invention. As shown in FIG5, the self-test device based on the three-phase inverter includes:

[0148] The acquisition module 11 is used to determine the frequency of the first IO bus by capturing the falling edge of each phase inverter when the three-phase inverter is networked to establish communication, so as to perform a self-check operation of the first IO bus;

[0149] A statistical module 12, used to perform level operations on the second IO bus in sequence within a preset phase angle range of each phase inverter to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range;

[0150] The determination module 13 is configured to determine that the second IO bus self-test is successful when the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter.

[0151] Since the embodiments of the device part correspond to the above embodiments, please refer to the description of the embodiments of the method part for the embodiments of the device part, and will not be repeated here.

[0152] For an introduction to a self-test device based on a three-phase inverter provided by the present invention, please refer to the above method embodiment, and the present invention will not be repeated here. It has the same beneficial effects as the above self-test method based on a three-phase inverter.

[0153] FIG6 is a structural diagram of a self-test device based on a three-phase inverter according to an embodiment of the present invention. As shown in FIG6 , the device includes:

[0154] A memory 21, used for storing computer programs;

[0155] The processor 22 is used to implement the steps of the self-test method based on the three-phase inverter when executing the computer program.

[0156] The three-phase inverter-based self-test device provided in this embodiment may include but is not limited to a smart phone, a tablet computer, a laptop computer, or a desktop computer.

[0157] Among them, the processor 22 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 22 may be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), and a programmable logic array (PLA). The processor 22 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the awake state, also known as a central processing unit (CPU); the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 22 may be integrated with a graphics processing unit (GPU), which is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 22 may also include an artificial intelligence (AI) processor, which is used to process computing operations related to machine learning.

[0158] The memory 21 may include one or more computer-readable storage media, which may be non-transitory. The memory 21 may also include a high-speed random access memory, and a non-volatile memory, such as one or more disk storage devices, flash memory storage devices. In this embodiment, the memory 21 is at least used to store the following computer program 211, wherein, after the computer program is loaded and executed by the processor 22, it can implement the relevant steps of the self-test method based on the group three-phase inverter disclosed in any of the aforementioned embodiments. In addition, the resources stored in the memory 21 may also include an operating system 212 and data 213, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 212 may include Windows, Unix, Linux, etc. Data 213 may include but is not limited to data involved in the self-test method based on the group three-phase inverter, etc.

[0159] In some embodiments, the self-test device based on the three-phase inverter may further include a display screen 23 , an input / output interface 24 , a communication interface 25 , a power supply 26 , and a communication bus 27 .

[0160] Those skilled in the art will appreciate that the structure shown in FIG. 6 does not constitute a limitation on the self-test device based on a group three-phase inverter, and may include more or fewer components than those shown in the figure.

[0161] The processor 22 implements the self-test method based on the three-phase inverter provided by any of the above embodiments by calling the instructions stored in the memory 21 .

[0162] For an introduction to a self-test device based on a three-phase inverter provided by the present invention, please refer to the above method embodiment, and the present invention will not be repeated here. It has the same beneficial effects as the above self-test method based on a three-phase inverter.

[0163] Furthermore, the present invention also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by the processor 22, the steps of the self-test method based on the three-phase inverter are implemented as described above.

[0164] It is understandable that if the method in the above embodiment is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium to execute all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.

[0165] For an introduction to a computer-readable storage medium provided by the present invention, please refer to the above method embodiment, which will not be described in detail herein. It has the same beneficial effects as the above self-test method based on a three-phase inverter.

[0166] The above is a detailed introduction to a self-test method, device, equipment and medium based on a three-phase inverter provided by the present invention. The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the embodiments can refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can refer to the method part description. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the scope of protection of the present invention.

[0167] It should also be noted that, in this specification, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises", "comprising" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprising a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

Claims

1. A self-test method based on a three-phase inverter, characterized in that: include: Determine the frequency of the first IO bus by capturing the falling edge of each phase inverter to perform a self-test operation of the first IO bus; Within the preset phase angle range of each phase inverter, sequentially perform level operation on the second IO bus to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range; When the number of rising edges of the level of each phase inverter is the same as the number of conversions under the level operation of each phase inverter, it is determined that the second IO bus self-test is successful.

2. The self-test method based on a three-phase inverter according to claim 1, characterized in that: The frequency of the first IO bus is determined by capturing the falling edge of each phase inverter to perform a self-check operation of the first IO bus, including: Sending a square wave signal corresponding to a preset fixed duty cycle and a preset frequency to the reference phase inverter; Pulling up the level signals outputted by the first IO bus corresponding to the remaining two-phase inverters except the reference phase inverter; The corresponding falling edge is captured by the receiving end of each phase inverter to obtain the corresponding actual frequency; If the actual frequency is within the preset range of the preset frequency, it is determined that the self-test of the first IO bus corresponding to each phase inverter is successful.

3. The self-test method based on a three-phase inverter according to claim 1 or 2, characterized in that: The second IO bus is operated in sequence to count the number of rising edges of the level of each phase inverter within the corresponding preset phase angle range, including: Get the number of level operations; Under the current level operation times, the current phase inverter is controlled to output the low level signal of the second IO bus at the first preset phase angle; during the first preset time interval, the current phase inverter is controlled to output the high level signal of the second IO bus at the second preset phase angle; Controlling the remaining phase inverters except the current phase inverter to output a high level signal of the second IO bus; Obtaining a first preset phase angle range of the current phase inverter under the current level operation times, and the number of level rising edges corresponding to the respective preset phase angle ranges of the remaining phase inverters except the current phase inverter; Determine the number of level rising edges of each phase inverter within the corresponding preset phase angle range according to the number of level operations; Among them, the first preset phase angle range includes the first preset phase angle and the second preset phase angle; the first preset phase angle is smaller than the second preset phase angle; the first preset phase angle range and the remaining phase inverters except the current phase inverter have a phase difference angle between their respective preset phase angle ranges.

4. The self-test method based on a three-phase inverter according to claim 3, characterized in that: Determining that the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter includes: Controlling the current phase inverter to output the level signal of the second IO bus according to the number of level operations, and obtaining the number of conversions from the low level signal to the high level signal; If the number of level rising edges is the same as the number of conversions, it is determined that the second IO bus self-test corresponding to the current phase inverter is successful; Correspondingly, if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter, then according to the preset number of level operation rounds, return to the step of performing level operation on the second IO bus in sequence to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range, and restart the level operation to determine the corresponding number of rising edges; if the number of level rising edges is different from the number of conversions under the level operation of each phase inverter when the preset number of level operation rounds is reached, it is determined that the self-test of the second IO bus corresponding to the current phase inverter has failed.

5. The self-test method based on a three-phase inverter according to claim 4, characterized in that: After determining the self-test result of the second IO bus corresponding to the first phase inverter and before performing a level operation on the second IO bus corresponding to the second phase inverter, the method further includes: Acquiring a self-test state of the first phase inverter corresponding to the second IO bus through inter-phase communication between the first phase inverter and the second phase inverter; If the self-test state of the second IO bus corresponding to the first phase inverter is successful, the level signal output by the second IO bus corresponding to the first phase inverter is pulled high; The level signal output by the second IO bus corresponding to the third-phase inverter is pulled high, and the step of performing level operation on the second IO bus corresponding to the second-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range; Correspondingly, after determining the self-test result of the second IO bus corresponding to the second phase inverter and before performing a level operation on the second IO bus corresponding to the third phase inverter, the method further includes: Obtaining the self-test status of the first phase inverter and the second phase inverter respectively corresponding to the second IO bus through the inter-phase communication mode between the first phase inverter and the third phase inverter and the inter-phase communication mode between the second phase inverter and the third phase inverter; If the self-test states of the second IO buses corresponding to the first-phase inverter and the second-phase inverter are both successful, the level signals output by the second IO buses corresponding to the first-phase inverter and the second-phase inverter are pulled high, and the step of performing level operation on the second IO bus corresponding to the third-phase inverter is entered to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range.

6. The self-test method based on a three-phase inverter according to claim 1, characterized in that: After determining that each phase inverter self-test is successful, the method further includes: Setting a flag indicating that each phase inverter has successfully performed a self-test; The input signal of the second IO bus is controlled to be pulled low so as to facilitate the state operation of each phase inverter.

7. The self-test method based on a three-phase inverter according to claim 5, characterized in that: The inter-phase communication mode of each phase inverter is a CAN communication mode; wherein, the interrupt processing state synchronization information is set through a first priority CAN communication frame; and the state information reply is set through a second priority CAN communication frame.

8. A self-test device based on a three-phase inverter, characterized in that: include: An acquisition module, used for determining the frequency of the first IO bus by capturing the falling edge of each phase inverter when the three-phase inverter is networked and established for communication, so as to perform a self-check operation of the first IO bus; A statistical module, used to perform level operations on the second IO bus in sequence within a preset phase angle range of each phase inverter to count the number of level rising edges of each phase inverter within the corresponding preset phase angle range; The determination module is used to determine that the second IO bus self-test is successful when the number of level rising edges of each phase inverter is the same as the number of conversions under the level operation of each phase inverter.

9. A self-test device based on a three-phase inverter, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the self-test method based on a three-phase inverter as claimed in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the self-test method based on a group three-phase inverter are implemented as claimed in any one of claims 1 to 7.

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