Driving circuit for signal power composite isolation transmission

Abstract

The invention discloses a driving circuit for signal power composite isolation transmission, and belongs to the field of power electronics. The driving circuit comprises a main transmission circuit, and a forward time slot distribution circuit, a reverse time slot distribution circuit, a forward signal circuit and a reverse signal circuit which are connected with the main transmission circuit, two ends of the main transmission circuit are respectively connected with the main control unit and the power device, and the main transmission circuit receives input power of the main control unit and a driving signal of the forward signal circuit and outputs driving voltage to control on and off of the power device; the main transmission circuit adjusts the operation state according to the received feedback signal; the forward time slot distribution circuit is connected with the forward signal circuit and the main control unit, and the reverse time slot distribution circuit is connected with the reverse signal circuit and the power device; the main control unit performs early warning according to the received fault signal; and the forward time slot distribution circuit and the reverse time slot distribution circuit control the working state of the main transmission circuit according to different signals. The driving signal and the driving power are simultaneously transmitted through the single isolation channel.

Description

Technical Field

[0001] The present invention belongs to the field of power electronics, and more specifically, relates to a driving circuit for signal power composite isolation transmission. Background Art

[0002] The improvement of the withstand voltage level of power devices has significantly improved the size, efficiency and cost of medium and high voltage converter systems, and promoted the rapid development of medium and high voltage application markets such as solid-state transformers, medium voltage drives and medium voltage converters. However, these developments have brought some specific challenges to converter design, among which isolated gate drive design is a major problem. Conventional isolated gate drives use digital isolators to transmit drive signals, but the operating voltage level is not higher than 1.7kV. For voltages of 3.3kV and above, optical fiber or optical coupler is required to transmit isolated signals, but the cost is high, the volume is large, and it is sensitive to high temperatures (-40℃~85℃), making it difficult to integrate. The composite transmission of drive signals and power will form a more integrated drive technology, and will also promote the integration of isolated gate drives into chip and power device module packaging, improve reliability and optimize switching characteristics.

[0003] In the existing single-isolation channel composite transmission method, the drive signal is directly used as the control signal of the drive power, or is used as the control signal of the drive power after being modulated by a high-frequency carrier, forming a power flow with signal characteristic information. However, the drive signal and the power share the same modulation method, and the power switching frequency is the signal carrier frequency, and the modulation freedom is low, resulting in a low transmission rate of the drive signal, a small frequency and duty cycle range, and also affecting the drive power transmission efficiency, output voltage regulation, and power density. Summary of the invention

[0004] In view of the defects of the related art, the purpose of the present invention is to provide a driving circuit for signal-power composite isolated transmission, aiming to solve the problem that the driving signal and power share the same modulation path, the modulation freedom is low, and the transmission efficiency is low.

[0005] To achieve the above object, the present invention provides a driving circuit for signal power composite isolation transmission, including a main transmission circuit and a forward time slot allocation circuit, a reverse time slot allocation circuit, a forward signal circuit, and a reverse signal circuit connected thereto;

[0006] The input end of the main transmission circuit is connected to the main control unit, and the output end is connected to the power device;

[0007] The forward time slot allocation circuit is connected to the forward signal circuit and the main control unit. The forward signal circuit is used to modulate the drive signal output by the main control unit and demodulate the fault signal and feedback signal modulated by the reverse signal circuit. The forward time slot allocation circuit is used to detect the drive signal. When the drive signal exists, the main transmission circuit is controlled to transmit the modulated drive signal from the primary side to the secondary side in isolation. The main control unit is used to issue an early warning according to the demodulated fault signal, and the main transmission circuit is used to adjust the operating state of the main transmission circuit according to the demodulated feedback signal.

[0008] The reverse time slot allocation circuit is connected to the reverse signal circuit and the power device. The reverse signal circuit is used to modulate the fault signal generated by the power device and the feedback signal generated by the main transmission circuit, and demodulate the drive signal transmitted by the main transmission circuit; the main transmission circuit is also used to output a drive voltage according to the demodulated drive signal to control the opening and closing of the power device; the reverse time slot allocation circuit is used to detect the feedback signal, the fault signal and the drive signal, and when the feedback signal and the fault signal exist and the drive signal does not exist, the main transmission circuit is controlled to isolate and transmit the modulated feedback signal and the fault signal from the secondary side to the primary side;

[0009] The main transmission circuit is also used to transmit the input power of the main control unit from the primary side to the secondary side when there is no driving signal, feedback signal and fault signal.

[0010] Optionally, the reverse signal circuit is further used to modulate the restored driving signal obtained by demodulation, and the main transmission circuit is further used to isolate and transmit the modulated restored driving signal from the secondary side to the primary side;

[0011] The forward signal circuit is also used to demodulate the modulated restored driving signal and compare it with the driving signal. If they are different, the driving signal is modulated and transmitted again.

[0012] Optionally, the main transmission circuit includes a DC-DC circuit, a voltage divider circuit and an output circuit;

[0013] The DC-DC circuit is used for driving the transmission channel of power and bidirectional signals;

[0014] The voltage divider circuit is used to generate a source reference potential to enable a negative voltage drive of the power device;

[0015] The output circuit is used to achieve signal amplification and provide current to drive power devices.

[0016] Optionally, the DC-DC circuit is an LLC circuit, comprising: a first MOS tube Q 1 , the second MOS tube Q 2 , the first inductor L 1, the first capacitor C 1 , transformer TF and third diode D 3 , the fourth diode D 4 , the fifth diode D 5 , the sixth diode D 6 , the second capacitor C 2 ;

[0017] The input voltage VIN is input to the first MOS tube Q 1 The drain of the first MOS tube Q 1 The source of the second MOS tube Q 2 The drain and the first inductor L 1 One end of is connected, which is recorded as the first connection point;

[0018] The second MOS tube Q 2 The source of the first capacitor C 1 One end of the first capacitor C 1 The other end of the primary winding of the transformer TF is connected to one end of the primary winding of the transformer TF, and the other end of the primary winding of the transformer TF is connected to the first inductor L 1 The other end of the secondary winding of the transformer TF is connected to the third diode D 3 , the fourth diode D 4 , the fifth diode D 5 and the sixth diode D 6 The input end of the full-bridge rectifier circuit is recorded as the second connection point and the third connection point; the output end of the full-bridge rectifier circuit is connected to the second capacitor C 2 The two ends of are marked as the fourth connection point and the fifth connection point.

[0019] Optionally, the voltage divider circuit includes a second resistor R 2 and Zener diode Z;

[0020] The second resistor R 2 And the voltage zener diode Z in series and then in parallel with the second capacitor C 2 both ends of .

[0021] Optionally, the output circuit includes: a sixth MOS tube Q 6 、The seventh MOS tube Q 7 ;

[0022] The connection point is connected to the sixth MOS tube Q 6 The drain of the sixth MOS tube Q 6 The source of the seventh MOS tube Q 7 The source of is connected, and the connection point is the driving output terminal;

[0023] The sixth MOS tube Q 6 And the seventh MOS tube Q7 The gates of the resistor are short-circuited and the connection point is connected to the reverse signal circuit.

[0024] Optionally, the forward time slot allocation circuit includes: a first MOS tube Q 1 , the second MOS tube Q 2 、The third MOS tube Q 3 and the first resistor R 1 ;

[0025] The first MOS tube Q 1 , the second MOS tube Q 2 Shared with LLC circuit, the third MOS tube Q 3 The source is grounded, the drain is connected to the first resistor R 1 One end of the first resistor R 1 The other end of the first capacitor C 1 Connection, connected to one end of the primary winding of transformer TF.

[0026] Optionally, the reverse time slot allocation circuit includes: a fourth MOS tube Q 4 、The fifth MOS tube Q 5 , the first diode D 1 and the second diode D 2 ;

[0027] The fourth MOS tube Q 4 The source is connected to the drive output terminal, and the drain is connected to the first diode D 1 The anode of the first diode D is connected 1 The cathode is connected to one end of the secondary winding of the transformer TF;

[0028] The fifth MOS tube Q 5 The source is connected to the fifth connection point, and the drain is connected to the second diode D 2 The cathode of the second diode D is connected 2 The anode of is connected to the other end of the secondary winding of the transformer TF.

[0029] Compared with the prior art, the above technical solution conceived by the present invention can achieve the following beneficial effects:

[0030] 1. The present invention provides a driving circuit for signal-power composite isolated transmission, which transmits driving signals and driving power simultaneously through a single isolation channel, switches the transmission of signals or power by the main transmission circuit in different time slots according to whether there is a signal through a time slot allocation circuit, and uses independent branches to transmit signal streams and power streams respectively in different time slots, so that the driving signal and the driving power control signal are independent of each other in time, and the time slot occupied by signal transmission is much smaller than the power transmission time slot, thereby constructing a decoupled transmission architecture, and the circuits can be flexibly designed to meet the requirements of signal and power transmission, solving the problem that the driving signal and power share the same modulation, the modulation freedom is low, and the transmission efficiency is low. High fidelity of the driving signal and efficient transmission of the driving power are achieved. Compared with the traditional driving architecture, no additional isolated power supply module or signal isolation unit is required, no digital processor and dedicated chip are required, the number of components is small, the cost is low, and the volume is small.

[0031] 2. The present invention provides a driving circuit for signal power composite isolated transmission, and designs a forward signal circuit, a forward time slot allocation circuit, a reverse signal circuit and a reverse time slot allocation circuit respectively, so as to solve the problem that the signal for real-time monitoring of the power side status needs to be transmitted separately, and realizes support for the reverse signal transmission function, including device fault signals (device overcurrent, overvoltage and overheating signals), restored driving signals and driving power supply feedback signals (power supply output voltage or current information), so as to ensure efficient and reliable operation of the drive and the device.

[0032] 3. The present invention provides a driving circuit for signal-power composite isolated transmission. The time slot allocation circuit realizes rapid switching of signal and power states by maximizing the multiplexing of switching devices of the main transmission circuit. The number and volume of additional devices are small, and no floating ground drive is required. The control circuit is simple and efficient, which significantly improves the system integration and cost-effectiveness. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a working concept diagram of the signal power time-sharing composite isolation drive provided by the present invention;

[0034] Figure 2 This is a circuit framework diagram of the signal power time-sharing composite isolation drive provided by the present invention;

[0035] Figure 3 A circuit diagram of a signal power time-sharing composite isolation drive provided by an embodiment of the present invention;

[0036] Figure 4 The overall transmission waveform diagram of the signal power time-sharing composite isolation drive provided by the embodiment of the present invention;

[0037] Figure 5 Operation effect diagram of signal power time-sharing composite isolation drive according to an embodiment of the present invention;

[0038] Figure 6 A multi-pulse test circuit for signal power time-sharing composite isolation drive application according to an embodiment of the present invention;

[0039] Figure 7 The figure is a power device switching waveform diagram of a signal power time-sharing composite isolation drive application according to an embodiment of the present invention. DETAILED DESCRIPTION

[0040] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0041] The contents involved in the above embodiment are described below in conjunction with a preferred embodiment.

[0042] like Figure 2 As shown, a driving circuit for signal power composite isolation transmission includes a main transmission circuit and a forward time slot allocation circuit, a reverse time slot allocation circuit, a forward signal circuit, and a reverse signal circuit connected thereto;

[0043] The input end of the main transmission circuit is connected to the main control unit, and the output end is connected to the power device;

[0044] The forward time slot allocation circuit is connected to the forward signal circuit and the main control unit. The forward signal circuit is used to modulate the drive signal output by the main control unit and demodulate the fault signal and feedback signal modulated by the reverse signal circuit. The forward time slot allocation circuit is used to detect the drive signal. When the drive signal exists, the main transmission circuit is controlled to transmit the modulated drive signal from the primary side to the secondary side in isolation. The main control unit is used to issue an early warning according to the demodulated fault signal, and the main transmission circuit is used to adjust the operating state of the main transmission circuit according to the demodulated feedback signal.

[0045] The reverse time slot allocation circuit is connected to the reverse signal circuit and the power device. The reverse signal circuit is used to modulate the fault signal generated by the power device and the feedback signal generated by the main transmission circuit, and demodulate the drive signal transmitted by the main transmission circuit; the main transmission circuit is also used to output a drive voltage according to the demodulated drive signal to control the opening and closing of the power device; the reverse time slot allocation circuit is used to detect the feedback signal, the fault signal and the drive signal, and when the feedback signal and the fault signal exist and the drive signal does not exist, the main transmission circuit is controlled to isolate and transmit the modulated feedback signal and the fault signal from the secondary side to the primary side;

[0046] The main transmission circuit is also used to transmit the input power of the main control unit from the primary side to the secondary side when there is no driving signal, feedback signal and fault signal.

[0047] Optionally, the reverse signal circuit demodulates the driving signal transmitted by the main transmission circuit to obtain a restored driving signal;

[0048] The reverse signal circuit is further used to modulate the restored driving signal, and the main transmission circuit is further used to isolate and transmit the modulated restored driving signal from the secondary side to the primary side;

[0049] The forward signal circuit is also used to demodulate the modulated restored driving signal and compare it with the driving signal. If they are different, the driving signal is modulated and transmitted again.

[0050] like Figure 1 As shown, this scheme adopts time division multiplexing technology to modulate the power and bidirectional signals including drive signal, fault signal, restored drive signal and feedback signal respectively and transmit them through a single isolation channel in different time slots. The time slot occupied by signal transmission is much smaller than the power transmission time slot, and the signal and power transmission do not conflict with each other.

[0051] like Figure 2 As shown, the input power of the main control unit is connected to the primary side of the main transmission circuit, and the secondary side of the main transmission circuit outputs a driving voltage, which is connected to the gate source of the power device to control the opening and closing of the power device; the input end of the forward time slot allocation circuit and the forward signal circuit is connected to the main control unit, receives the driving signal, and outputs a fault signal, and the output end is connected to the main transmission circuit; the fault signal is connected to the input end of the reverse time slot allocation circuit and the reverse signal circuit, and the output end of the reverse time slot allocation circuit and the reverse signal circuit is connected to the main transmission circuit.

[0052] The signal power composite isolation transmission driving circuit provided by this solution includes a signal transmission working state and a power transmission working state. The signal transmission working state is divided into two states: forward transmission and reverse transmission.

[0053] During forward transmission: the main control unit transmits the drive signal to the forward signal circuit for modulation, the forward time slot allocation circuit controls the main transmission circuit to switch to the signal transmission working state, the main transmission circuit isolates and transmits the modulated drive signal from the primary side to the secondary side, and demodulates the modulated drive signal through the reverse signal circuit. The demodulated drive signal is then output through the main transmission circuit to control the opening and closing of the power device.

[0054] When transmitting in reverse:

[0055] The fault signal and the restored driving signal generated by the power device are transmitted to the reverse signal circuit, which modulates them. The reverse time slot allocation circuit controls the main transmission circuit to switch to the signal transmission working state. The main transmission circuit isolates and transmits the modulated fault signal from the secondary side to the primary side, and demodulates the modulated fault signal through the forward signal circuit. The demodulated fault signal is then output to the main control unit through the forward signal circuit. The main control unit issues an early warning based on the fault signal. The demodulated restored driving signal is compared with the driving signal input to the main control unit. If there is a difference, the driving signal input to the main control unit is forwardly transmitted again. The feedback signal is the output voltage and current information of the main transmission circuit. During operation, the main transmission circuit samples the output voltage and current information and feeds it back to the primary side of the isolation transformer, thereby controlling the operating state of the main transmission circuit based on the feedback signal to achieve an output closed loop. For example, if the output voltage is greater than the set voltage (for example, the sampled voltage is 22V, and the set voltage is 20V), the primary switch tube is turned off, so that the main transmission circuit stops running and the output voltage gradually decreases; conversely, when the output voltage drops to less than the set voltage, the switch tube is turned on, and the output voltage gradually increases to achieve an output closed loop. Specifically, the reverse signal circuit obtains the feedback signal from the main transmission circuit and performs preprocessing. After the signal is modulated, it is reversely transmitted to the secondary side of the main transmission circuit through the reverse time slot allocation circuit, and then transmitted from the secondary side of the main transmission circuit to the primary side, and then the feedback signal is demodulated through the forward time slot allocation circuit and the forward signal circuit connected to the primary side. After the feedback signal is transmitted to the main transmission circuit, closed-loop control is performed.

[0056] When there is no signal transmission, the time slot allocation circuit switches the circuit to the power transmission mode. When a forward signal (drive signal) or a reverse signal (fault signal / recovery drive signal / feedback signal) arrives, the circuit is switched to the signal transmission state.

[0057] Optionally, the main transmission circuit includes a DC-DC circuit, a voltage divider circuit and an output circuit;

[0058] The DC-DC circuit is used for driving the transmission channel of power and bidirectional signals;

[0059] The voltage divider circuit is used to generate a source reference potential to enable a negative voltage drive of the power device;

[0060] The output circuit is used to achieve signal amplification and provide current to drive power devices.

[0061] The output power of the DC-DC circuit is 1.5W, and the resonant frequency and the switching frequency are both set to 20MHz, thereby achieving high driving power density and low signal transmission delay.

[0062] like Figure 3As shown, optionally, the DC-DC circuit is an LLC circuit, including: a first MOS tube Q 1 , the second MOS tube Q 2 , the first inductor L 1 , the first capacitor C 1 , transformer TF and third diode D 3 , the fourth diode D 4 , the fifth diode D 5 , the sixth diode D 6 , the second capacitor C 2 ;

[0063] The input voltage VIN is input to the first MOS tube Q 1 The drain of the first MOS tube Q 1 The source of the second MOS tube Q 2 The drain and the first inductor L 1 One end of is connected, which is recorded as the first connection point;

[0064] The second MOS tube Q 2 The source of the first capacitor C 1 One end of the first capacitor C 1 The other end of the primary winding of the transformer TF is connected to one end of the primary winding of the transformer TF, and the other end of the primary winding of the transformer TF is connected to the first inductor L 1 The other end of the secondary winding of the transformer TF is connected to the third diode D 3 , the fourth diode D 4 , the fifth diode D 5 and the sixth diode D 6 The input end of the full-bridge rectifier circuit is recorded as the second connection point and the third connection point; the output end of the full-bridge rectifier circuit is connected to the second capacitor C 2 The two ends of are marked as the fourth connection point and the fifth connection point.

[0065] The voltage at the first connection point is v SW , the voltage at the second connection point is v A , the voltage of the third connection point is v B , where the second connection point and the third connection point are the two midpoint voltages of the rectifier bridge, and the voltage of the fourth connection point is V O , the voltage of the fifth connection point is GND_S, wherein the fourth connection point and the fifth connection point are the secondary grounding of the transformer TF, and the primary and secondary groundings are different.

[0066] Optionally, the voltage divider circuit includes a second resistor R 2 and Zener diode Z;

[0067] The second resistor R 2And the voltage zener diode Z in series and then in parallel with the second capacitor C 2 both ends of .

[0068] The voltage divider circuit is used to generate a 5V reference voltage, provide a negative voltage reference potential for driving, and provide auxiliary power to the secondary side. 2 The voltage at the series connection point with the Zener diode Z is 5V_S.

[0069] Optionally, the output circuit includes: a sixth MOS tube Q 6 、The seventh MOS tube Q 7 ;

[0070] The connection point is connected to the sixth MOS tube Q 6 The drain of the sixth MOS tube Q 6 The source of the seventh MOS tube Q 7 The source of is connected, and the connection point is the driving output terminal;

[0071] The sixth MOS tube Q 6 And the seventh MOS tube Q 7 The gates of the resistor are short-circuited and the connection point is connected to the reverse signal circuit.

[0072] Among them, the sixth MOS tube Q 6 The source of the seventh MOS tube Q 7 The source connection point is recorded as the sixth connection point, and the voltage at the driving output end is v G ; The sixth MOS tube Q 6 And the seventh MOS tube Q 7 The connection point where the gate is short-circuited is recorded as the seventh connection point. The seventh connection point is the input end of the push-pull circuit, and the voltage is v drive .

[0073] Optionally, the forward time slot allocation circuit includes: a first MOS tube Q 1 , the second MOS tube Q 2 、The third MOS tube Q 3 and the first resistor R 1 ;

[0074] The first MOS tube Q 1 , the second MOS tube Q 2 Shared with LLC circuit, the third MOS tube Q 3 The source is grounded, the drain is connected to the first resistor R 1 One end of the first resistor R 1 The other end of the first capacitor C 1 Connection, connected to one end of the primary winding of transformer TF.

[0075] Among them, the third MOS tube Q 3 and the first resistor R1 Used to speed up the first capacitor C 1 The discharge speed is increased, thereby speeding up the transient response of the LLC circuit.

[0076] The forward time slot allocation circuit is used to switch the working state of the main transmission circuit in different time slots according to the driving signal. The main transmission circuit transmits the modulated driving signal in isolation, thereby realizing the cutting off or transmission of signals and power to realize the time slot allocation function.

[0077] Optionally, the reverse time slot allocation circuit includes: a fourth MOS tube Q 4 、The fifth MOS tube Q 5 , the first diode D 1 and the second diode D 2 ;

[0078] The fourth MOS tube Q 4 The source is connected to the drive output terminal, and the drain is connected to the first diode D 1 The anode of the first diode D is connected 1 The cathode is connected to one end of the secondary winding of the transformer TF;

[0079] The fifth MOS tube Q 5 The source is connected to the fifth connection point, and the drain is connected to the second diode D 2 The cathode of the second diode D is connected 2 The anode of is connected to the other end of the secondary winding of the transformer TF.

[0080] The reverse signal circuit is used to switch the working state of the main transmission circuit in different time slots according to the feedback signal and the fault signal, so as to realize the demodulation function of the forward signal and the modulation function of the reverse signal.

[0081] Specifically, Figure 4 This is the overall transmission waveform diagram of the signal power time-sharing composite isolation drive provided by the embodiment of the present invention. GD is the driving signal, SIG FB is the feedback signal, SIG Fault is the fault signal, v clock It is the 20MHz oscillation signal voltage.

[0082] like Figure 4 As shown, at t 0 At this moment, the driving signal SIG GD From low level to high level, the channel time slot is allocated to the rising edge transmission of the driving signal. 1 -S 5 These are the control signals of the primary switching devices in the main transmission circuit. For details, refer to Figure 4 Medium S 1 -S 5Corresponding to control the first MOS tube Q 1 To the fifth MOS tube Q 5 Specifically, at t 00 At this moment, the driving power stops transmitting, that is, S 1 ~S 2 Reset, S 3 Set, v sw 、v C and v A After the damped oscillation occurs, it decays to zero. 01 Moment, S 1 Modulated into three short pulses with a certain time interval, correspondingly at v sw and v A Three short pulses are generated on the 02 At this moment, the driving signal is restored, that is, SIG Re-GD From low level to high level. 03 At this moment, the driving power is normally transmitted, S 3 Close, S 1 and S 2 It is restored to a 20MHz complementary square wave signal with dead time. When the driving signal is transmitted along the falling edge, see t 2 The working principle is similar to that of S. 1 Modulated into two short pulses with a certain time interval, correspondingly at v sw and v A Two short pulses are generated on the 22 At this moment, the falling edge of the driving signal is restored.

[0083] In t 1 At this moment, the feedback signal SIG FB From low level to high level, the channel time slot is allocated to the rising edge transmission of the feedback signal. Specifically, at t 10 Moment, S 5 First, set it for a certain time, then at t 11 Original side v C Descending, triggering S 3 Set signal, S 1 ~S 2 reset, power transmission is turned off. Then, at t 12 At this moment, according to the three signal states, S 4 and S 5 modulated into three short pulses with a certain time interval, correspondingly at v sw and v A Three short pulses are generated on the 13 The restored feedback signal is obtained by signal demodulation at time t 14 At this moment, the driving power is normally transmitted, S1 ~S 3 Restore to the previous state. When the feedback signal is transmitted along the falling edge, see t 3 At the same time, its working principle is similar. The difference is that due to different signal states, S 4 and S 5 The modulation waveform is different. For example, at t 32 At this moment, according to the three signal states, S 4 and S 5 modulated into a short pulse, correspondingly at v sw and v A A short pulse is generated on the 33 The restored feedback signal is obtained by signal demodulation at all times. Fault When the rising edge comes, just change S 4 and S 5 Modulated waveform. For example, at t 42 At this moment, the restored drive signal and feedback signal are both high level, and S 4 and S 5 modulated into four short pulses with a certain time interval, so that at t 43 The restored fault signal is obtained by signal demodulation at all times.

[0084] Figure 5 FIG. 1 is a diagram showing the operation effect of a driving circuit for signal power composite isolation transmission according to an embodiment of the present invention (wherein V O Set to 20V). Figure 6 As shown in the figure, the feedback signal is successfully transmitted to the primary side, and the output voltage is stabilized at 20V by controlling the LLC switch tube on the primary side, with a voltage ripple less than 0.3V, and a good closed-loop effect. The drive signal is successfully restored on the secondary side, with a transmission delay of only 70ns. At the same time, the fault signal is accurately responded to the primary side to achieve an alarm.

[0085] The composite isolation driving circuit provided by the embodiment of the present invention can be applied to high-speed driving of power semiconductor devices in upper and lower bridge arm circuits. Figure 6 The multi-pulse test circuit for the signal power time-sharing composite isolation drive application according to the embodiment of the present invention; the driven power switch tube T 1 and T 2 There are four connection terminals, that is, a power switch tube with four pins is used, including a gate G, a drain D, a source S and a Kelvin source KS.

[0086] Among them, the driven power switch tube T 1 Si MOSFET, IGBT, SiC MOSFET or GaN HEMT devices can be used. 1When using a three-terminal device, the Kelvin source KS and the source S can be considered as the same point.

[0087] Figure 7 The figure is a power device switching waveform diagram of a driving circuit for signal power composite isolation transmission according to an embodiment of the present invention. Figure 7 As shown, v GS The driven power switch tube T 1 The gate-source voltage of the switching frequency is 100kHz, which follows the driving signal well, and v GS The on and off voltages are stable at +15V / -5V respectively, indicating that the drive circuit can ensure the stability of drive power and voltage while transmitting signals. DS The driven power switch tube T 1 The drain-source voltage, i D The driven power switch tube T 1 The drain current, before and after the opening and closing pulses of the driving signal arrive, v DS and i D The ability to switch the switch state normally indicates that the isolation driver has the ability to drive the power switch tube at high speed. L For the load inductor current, when the current reaches 125A, the overcurrent protection and fault signal are triggered. After the power switch tube is turned off, an alarm is successfully sent to the primary side, demonstrating the reliability of the isolation driver.

[0088] The embodiment of the present invention transmits the driving signal and driving power simultaneously through a single isolation channel, and switches the working state of the main transmission circuit in different time slots through a time slot allocation circuit, so that the driving signal and the driving power control signal are independent of each other in time, and the time slot occupied by the signal transmission is much smaller than the power transmission time slot, thereby constructing a decoupled transmission architecture, and the circuits can be flexibly designed to meet the signal and power transmission requirements, solving the problem that the driving signal and power share the same modulation, the modulation freedom is low, and the transmission efficiency is low. The high fidelity of the driving signal and the efficient transmission of the driving power are achieved, the number of components required for the driving circuit is reduced, and the advantages of low cost and small size are achieved.

[0089] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A driving circuit for signal power composite isolation transmission, characterized in that: It includes a main transmission circuit and a forward time slot allocation circuit, a reverse time slot allocation circuit, a forward signal circuit, and a reverse signal circuit connected thereto; The input end of the main transmission circuit is connected to the main control unit, and the output end is connected to the power device; The forward time slot allocation circuit is connected to the forward signal circuit and the main control unit. The forward signal circuit is used to modulate the drive signal output by the main control unit and demodulate the fault signal and feedback signal modulated by the reverse signal circuit. The forward time slot allocation circuit is used to detect the drive signal. When the drive signal exists, the main transmission circuit is controlled to transmit the modulated drive signal from the primary side to the secondary side in isolation. The main control unit is used to issue an early warning according to the demodulated fault signal, and the main transmission circuit is used to adjust the operating state of the main transmission circuit according to the demodulated feedback signal. The reverse time slot allocation circuit is connected to the reverse signal circuit and the power device. The reverse signal circuit is used to modulate the fault signal generated by the power device and the feedback signal generated by the main transmission circuit, and demodulate the drive signal transmitted by the main transmission circuit; the main transmission circuit is also used to output a drive voltage according to the demodulated drive signal to control the opening and closing of the power device; the reverse time slot allocation circuit is used to detect the feedback signal, the fault signal and the drive signal, and when the feedback signal and the fault signal exist and the drive signal does not exist, the main transmission circuit is controlled to isolate and transmit the modulated feedback signal and the fault signal from the secondary side to the primary side; The main transmission circuit is also used to transmit the input power of the main control unit from the primary side to the secondary side when there is no driving signal, feedback signal and fault signal.

2. The driving circuit according to claim 1, characterized in that: The reverse signal circuit is further used to modulate the restored driving signal obtained by demodulation, and the main transmission circuit is further used to isolate and transmit the modulated restored driving signal from the secondary side to the primary side; The forward signal circuit is also used to demodulate the modulated restored driving signal and compare it with the driving signal. If they are different, the driving signal is modulated and transmitted again.

3. The driving circuit according to claim 1, wherein: The main transmission circuit includes a DC-DC circuit, a voltage divider circuit and an output circuit; The DC-DC circuit is used for driving the transmission channel of power and bidirectional signals; The voltage divider circuit is used to generate a source reference potential to enable a negative voltage drive of the power device; The output circuit is used to achieve signal amplification and provide current to drive power devices.

4. The driving circuit according to claim 3, characterized in that: The DC-DC circuit is an LLC circuit, including: a first MOS transistor Q1, a second MOS transistor Q2, a first inductor L1, a first capacitor C1, a transformer TF and a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, and a second capacitor C2; The input voltage VIN is input to the drain of the first MOS transistor Q1, and the source of the first MOS transistor Q1 is connected to the drain of the second MOS transistor Q2 and one end of the first inductor L1, which is recorded as a first connection point; The source of the second MOS tube Q2 is grounded and connected to one end of the first capacitor C1, the other end of the first capacitor C1 is connected to one end of the primary winding of the transformer TF, the other end of the primary winding of the transformer TF is connected to the other end of the first inductor L1, and the two ends of the secondary winding of the transformer TF are respectively connected to the input ends of the full-bridge rectifier circuit composed of the third diode D3, the fourth diode D4, the fifth diode D5 and the sixth diode D6, which are recorded as the second connection point and the third connection point; the output end of the full-bridge rectifier circuit is connected to the two ends of the second capacitor C2, which are recorded as the fourth connection point and the fifth connection point.

5. The driving circuit according to claim 4, characterized in that: The voltage divider circuit includes a second resistor R2 and a voltage stabilizing diode Z; The second resistor R2 and the voltage stabilizing diode Z are connected in series and then connected in parallel at both ends of the second capacitor C2.

6. The driving circuit according to claim 4, characterized in that: The output circuit includes: a sixth MOS transistor Q6 and a seventh MOS transistor Q7; The connection point is connected to the drain of the sixth MOS transistor Q6, the source of the sixth MOS transistor Q6 is connected to the source of the seventh MOS transistor Q7, and the connection point is a driving output terminal; The gates of the sixth MOS transistor Q6 and the seventh MOS transistor Q7 are short-circuited, and the connection point is connected to the reverse signal circuit.

7. The driving circuit according to claim 4, characterized in that: The forward time slot allocation circuit comprises: a first MOS transistor Q1, a second MOS transistor Q2, a third MOS transistor Q3 and a first resistor R1; The first MOS transistor Q1 and the second MOS transistor Q2 are shared with the LLC circuit. The source of the third MOS transistor Q3 is grounded, and the drain is connected to one end of the first resistor R1. The other end of the first resistor R1 is connected to the first capacitor C1, which is connected to one end of the primary winding of the transformer TF.

8. The driving circuit according to claim 4, characterized in that: A reverse time slot distribution circuit includes: a fourth MOS transistor Q4, a fifth MOS transistor Q5, a first diode D1 and a second diode D2; The source of the fourth MOS transistor Q4 is connected to the driving output terminal, the drain is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to one end of the secondary winding of the transformer TF; The source of the fifth MOS transistor Q5 is connected to the fifth connection point, the drain is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the other end of the secondary winding of the transformer TF.

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