Communication circuit, device and equipment

Abstract

The invention discloses a communication circuit, device and equipment, and relates to the technical field of communication, and the communication circuit comprises a signal processing module, an analog-to-digital conversion module, a digital-to-analog conversion module, a first photoelectric conversion module and a second photoelectric conversion module. An optical fiber serves as a signal transmission channel among a first photoelectric conversion module, a signal processing module and a second photoelectric conversion module, and signals transmitted between an analog-to-digital conversion module and the signal processing module and signals transmitted between the signal processing module and a digital-to-analog conversion module are converted into optical signals with low transmission loss. Therefore, under the condition of ensuring stable and accurate signal transmission, the analog-to-digital conversion module and the digital-to-analog conversion module can be freely arranged away from the signal processing module, free planning of a line is facilitated, and the space occupancy rate and the circuit design cost can be reduced. In addition, the system power consumption of the whole communication system can be reduced, and the communication quality is improved.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a communication circuit, device and equipment. Background Art

[0002] In the existing wireless communication technology, the signal conversion process of analog-to-digital conversion and digital-to-analog conversion is usually involved in the transmitter and the receiver, which can be mainly realized by analog-to-digital conversion modules and analog-to-digital conversion modules. With the development of science and technology, the sampling rate of analog-to-digital conversion modules and analog-to-digital conversion modules is getting higher and higher, and the signal transmission rate demand is getting faster and faster. In the process of high-speed information transmission, the JESD204B / JESD204C protocol can usually be used for high-speed transmission of signals. However, there will be certain losses in the high-speed transmission of signals on the printed circuit board in this way. If the analog-to-digital conversion module or the analog-to-digital conversion module is too far away from the signal processing module, the loss will affect the stability and integrity of the signal transmission, and the signal cannot be transmitted completely and stably, and the communication quality is poor. If the analog-to-digital conversion module or the analog-to-digital conversion module is too close to the signal processing module, it is difficult to design the signal routing, which is not convenient for large-scale array design and difficult to achieve miniaturized packaging. Summary of the invention

[0003] The main purpose of the present application is to provide a communication circuit, device and equipment, aiming to solve the technical problem of how to extend the effective signal transmission distance between the analog-to-digital conversion module and the digital-to-analog conversion module in the communication circuit without affecting the communication quality.

[0004] To achieve the above-mentioned purpose, an embodiment of the present application provides a communication circuit, the communication circuit comprising: a signal processing module, an analog-to-digital conversion module, a digital-to-analog conversion module, a first photoelectric conversion module, and a second photoelectric conversion module;

[0005] The analog-to-digital conversion module is used to convert the analog signal into a first digital electrical signal and transmit it to the first photoelectric conversion module;

[0006] The first photoelectric conversion module is used to convert the first digital electrical signal into a first optical signal, and transmit the first optical signal to the signal processing module via an optical fiber;

[0007] The signal processing module is used to process the first optical signal and generate a second optical signal, and transmit the second optical signal to the second photoelectric conversion module via an optical fiber;

[0008] The second photoelectric conversion module is used to convert the second optical signal into a second digital electrical signal and transmit it to the digital-to-analog conversion module;

[0009] The digital-to-analog conversion module is used to convert the second digital electrical signal into an analog electrical signal.

[0010] In one embodiment, the signal processing module includes: an FPGA chip, a first photoelectric coupling unit, and a first electro-optical coupling unit;

[0011] The signal input end of the FPGA chip is connected to the output end of the first photoelectric coupling unit, the signal output end of the FPGA chip is connected to the input end of the first electro-optical coupling unit, the input end of the first photoelectric coupling unit is connected to the first photoelectric conversion module through an optical fiber, and the output end of the first electro-optical coupling unit is connected to the second photoelectric conversion module through an optical fiber;

[0012] The first photoelectric coupling unit is used to convert the first optical signal into a PAM4 electrical signal, and transmit the PAM4 electrical signal to the FPGA chip;

[0013] The FPGA chip is used to process the PAM4 electrical signal into an NRZ electrical signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal;

[0014] The first electro-optical coupling unit is used to convert the PAM4 electrical signal output by the FPGA chip into the second optical signal, and transmit the second optical signal to the second optoelectronic conversion module.

[0015] In one embodiment, the signal processing module further includes: a clock unit;

[0016] The first end of the clock unit is connected to the clock end of the FPGA chip, and the second end of the clock unit is connected to the system reference end of the FPGA chip;

[0017] The clock unit is used to output a clock signal and a system reference signal to the FPGA chip;

[0018] The FPGA chip is used to process the PAM4 electrical signal into an NRZ electrical signal based on the clock signal and the system reference signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal.

[0019] In one embodiment, the signal processing module further includes: a second electro-optical coupling unit;

[0020] The first input end of the second electro-optical coupling unit is connected to the first end of the clock unit, the first output end of the second electro-optical coupling unit is connected to the first photoelectric conversion module through an optical fiber, and the second output end of the second electro-optical coupling unit is connected to the second photoelectric conversion module through an optical fiber;

[0021] The second electro-optical coupling unit is used to convert the clock signal into a clock optical transmission signal, and transmit the clock optical transmission signal to the first photoelectric conversion module and the second photoelectric conversion module respectively;

[0022] The first photoelectric conversion module is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the analog-to-digital conversion module;

[0023] The analog-to-digital conversion module is further used to convert the analog signal into the first digital electrical signal based on the clock signal;

[0024] The second photoelectric conversion module is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the digital-to-analog conversion module;

[0025] The digital-to-analog conversion module is further used to convert the second digital electrical signal into the analog electrical signal based on the clock signal.

[0026] In one embodiment, the signal processing module further includes: a second photoelectric coupling unit;

[0027] The input end of the second photoelectric coupling unit is connected to the second photoelectric conversion module through an optical fiber, and the output end of the second photoelectric coupling unit is connected to the synchronous input end of the FPGA chip; the synchronous output end of the FPGA chip is also connected to the second input end of the second electro-optical coupling unit;

[0028] The digital-to-analog conversion module is further configured to generate a synchronization signal and output the synchronization signal to the second photoelectric conversion module upon receiving the clock signal;

[0029] The second photoelectric conversion module is further used to convert the synchronization signal into a synchronization optical transmission signal and transmit it to the second photoelectric coupling unit;

[0030] The second photoelectric coupling unit is used to convert the synchronization optical transmission signal into the synchronization signal and transmit it to the FPGA chip;

[0031] The FPGA chip is further used to transmit the synchronization signal to the second electro-optical coupling unit;

[0032] The second electro-optical coupling unit is further used to convert the synchronization signal into a synchronization optical transmission signal, and transmit the synchronization signal to the first photoelectric conversion module;

[0033] The first photoelectric conversion module is further used to convert the synchronous optical transmission signal into the synchronous signal, and transmit it to the analog-to-digital conversion module;

[0034] The synchronization signal is used to synchronize the timing of the clock signal received by the analog-to-digital conversion module, the digital-to-analog conversion module and the FPGA chip.

[0035] In one embodiment, the analog-to-digital conversion module includes: an analog-to-digital converter, a first DSP chip, and a first phase-locked loop;

[0036] The output end of the analog-to-digital converter is connected to the input end of the first DSP chip, the output end of the first DSP chip is connected to the first photoelectric conversion module, the synchronization end of the analog-to-digital converter is also connected to the first photoelectric conversion module, the clock end of the analog-to-digital converter is connected to the clock output end of the first phase-locked loop and the clock end of the first DSP chip, and the clock input end of the first phase-locked loop is also connected to the first photoelectric conversion module.

[0037] In one embodiment, the digital-to-analog conversion module includes: a digital-to-analog converter, a second DSP chip, and a second phase-locked loop;

[0038] The input end of the digital-to-analog converter is connected to the output end of the second DSP chip, the input end of the second DSP chip is connected to the second photoelectric conversion module, the synchronization end of the digital-to-analog converter is also connected to the second photoelectric conversion module, the clock end of the digital-to-analog converter is connected to the clock output end of the second phase-locked loop and the clock end of the second DSP chip, and the clock input end of the second phase-locked loop is also connected to the second photoelectric conversion module.

[0039] In one embodiment, the optical fiber includes an 825 nm wavelength optical channel, an 850 nm wavelength optical channel, a 910 nm wavelength optical channel, and a 1000 nm wavelength optical channel.

[0040] In addition, to achieve the above-mentioned purpose, the present application also provides a communication device, which adopts the communication circuit described above.

[0041] In addition, to achieve the above-mentioned purpose, the present application also provides a communication device, which adopts the communication apparatus as described above.

[0042] The embodiments of the present application provide a communication circuit, device and equipment, wherein the communication circuit includes: a signal processing module, an analog-to-digital conversion module, a digital-to-analog conversion module, a first photoelectric conversion module and a second photoelectric conversion module; the analog-to-digital conversion module is used to convert an analog signal into a first digital electrical signal and transmit it to the first photoelectric conversion module; the first photoelectric conversion module is used to convert the first digital electrical signal into a first optical signal and transmit it to the signal processing module via an optical fiber; the signal processing module is used to process the first optical signal and generate a second optical signal, and transmit it to the second photoelectric conversion module via an optical fiber; the second photoelectric conversion module is used to convert the second optical signal into a second digital electrical signal and transmit it to the digital-to-analog conversion module; the digital-to-analog conversion module is used to convert the second digital electrical signal into an analog electrical signal. By using optical fiber as a signal transmission channel between the first photoelectric conversion module, the signal processing module and the second photoelectric conversion module, the signals transmitted between the analog-to-digital conversion module and the signal processing module and the signals transmitted between the signal processing module and the digital-to-analog conversion module are converted into optical signals with less transmission loss, so that the analog-to-digital conversion module and the digital-to-analog conversion module can be freely set away from the signal processing module while ensuring stable and accurate signal transmission, which is convenient for free planning of the line, and can reduce space occupancy and circuit design costs. In addition, the system power consumption of the entire communication system can be reduced, and the communication capability can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0044] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0045] Figure 1 A structural connection diagram provided for the first embodiment of the communication circuit of the present application;

[0046] Figure 2 A structural connection diagram provided for the second embodiment of the communication circuit of the present application;

[0047] Figure 3 This is a structural connection diagram provided for the third embodiment of the communication circuit of the present application.

[0048] The purpose, features and advantages of this application will be further described in conjunction with the embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0049] It should be understood that the specific embodiments described herein are only used to explain the technical solutions of the present application and are not used to limit the present application.

[0050] In order to better understand the technical solution of the present application, a detailed description will be given below in conjunction with the accompanying drawings and specific implementation methods.

[0051] This application proposes a communication circuit of the first embodiment, please refer to Figure 1 , the communication circuit includes: a signal processing module 10, an analog-to-digital conversion module 20, a digital-to-analog conversion module 30, a first photoelectric conversion module 40 and a second photoelectric conversion module 50;

[0052] The analog-to-digital conversion module 20 is used to convert the analog signal into a first digital electrical signal and transmit it to the first photoelectric conversion module 40;

[0053] The first photoelectric conversion module 40 is used to convert the first digital electrical signal into a first optical signal and transmit it to the signal processing module 10 via an optical fiber;

[0054] The signal processing module 10 is used to process the first optical signal and generate a second optical signal, and transmit the second optical signal to the second photoelectric conversion module 50 via an optical fiber;

[0055] The second photoelectric conversion module 50 is used to convert the second optical signal into a second digital electrical signal and transmit it to the digital-to-analog conversion module 30;

[0056] The digital-to-analog conversion module 30 is used to convert the second digital electrical signal into an analog electrical signal.

[0057] It should be noted that the analog-to-digital conversion module 20 can receive analog signals transmitted from the outside. The analog signal received from the outside here refers to an original electrical signal with an analog wide frequency band. Its frequency range is wide, and the signal spectrum ranges from zero frequency to high frequency. The analog signal can carry the information to be transmitted in the form of analog data.

[0058] It is easy to understand that in this embodiment, due to the poor anti-interference ability of the analog signal containing information, it is susceptible to external electromagnetic interference and noise interference during the communication process. Therefore, the analog signal can be converted into a digital signal by the analog-to-digital conversion module 20 to obtain a corresponding digital quantity and a first digital electrical signal carrying the same information, and transmitted to the first photoelectric conversion module 40. The first photoelectric conversion module 40 can convert the received first digital electrical signal into a corresponding first optical signal, and transmit it to the signal processing module 10 through an optical fiber. The signal processing module 10 has photoelectric conversion, electro-optical conversion and digital signal processing functions, and can convert the first optical signal into a type of digital signal, and then process the type of digital signal into another type of digital signal, and finally convert the other type of digital signal obtained after processing into a second optical signal, and transmit it to the second photoelectric conversion module 50 through an optical fiber. The second photoelectric conversion module 50 converts the second optical signal into a corresponding second digital electrical signal, and transmits it to the digital-to-analog conversion module 30. The digital-to-analog conversion module 30 converts the second digital electrical signal into an analog electrical signal that can be recognized by the subsequent circuit, thereby completing the transmission of information, that is, completing the communication process.

[0059] It should be noted that, in the present embodiment, both the digital-to-analog conversion module 30 and the analog-to-digital conversion module 20 can perform high-speed sampling, for example, a sampling rate of 3 GHZ is achieved, and the bit width can be 16 bits. Correspondingly, high-speed signal transmission can be adopted between the analog-to-digital conversion module 20, the signal processing module 10 and the digital-to-analog conversion module 30, and specifically, JESD204B / JESD204C high-speed electrical signal transmission protocol or PCIe6.0 version protocol and other high-speed signal transmission protocols can be adopted for transmission. When transmitting through the high-speed transmission protocol, there will be certain losses on the printed circuit board, which is easy to cause errors in signal transmission. Generally speaking, in order to ensure the stability and accuracy of signal transmission, the signal routing design between the analog-to-digital conversion module 20 and the signal processing module 10 and between the signal processing module 10 and the digital-to-analog conversion module 30 cannot be too long, and needs to be closely arranged, which is not conducive to large-scale array settings, and the system power consumption is high and difficult to miniaturize.

[0060] In specific implementation, the embodiment of the present application is designed with a photoelectric conversion function and an electro-optical conversion function in the signal processing module 10, so that the signal processing module 10 can be first connected to the corresponding first photoelectric conversion module 40 and the second photoelectric conversion module 50 through optical fiber, and then connected to the analog-to-digital conversion module 20 through the first photoelectric conversion module 40, and connected to the digital-to-analog conversion module 30 through the second photoelectric conversion module 50. In this way, while ensuring stable and accurate signal transmission, the distance between the analog-to-digital conversion module 20, the signal processing module 10 and the digital-to-analog conversion module 30 can be longer, which is convenient for line design and can better reduce the overall volume of the product. At the same time, since optical signal transmission is more stable and consumes less power, it can also increase the accuracy and stability of the entire communication process, while reducing the power consumption of the communication process, and the communication capability of the product is better improved. When the bit error rate of the designed optical fiber optical path reaches 10 -9 At the same time, error-free and medium-distance transmission of analog-to-digital conversion modules and digital-to-analog conversion modules can be achieved, and the transmission distance can reach 100 meters, laying the foundation for the large-scale layout of analog-to-digital conversion modules and digital-to-analog conversion modules.

[0061] An embodiment of the present application provides a communication circuit, which includes: a signal processing module, an analog-to-digital conversion module, a digital-to-analog conversion module, a first photoelectric conversion module and a second photoelectric conversion module; the analog-to-digital conversion module is used to convert an analog signal into a first digital electrical signal and transmit it to the first photoelectric conversion module; the first photoelectric conversion module is used to convert the first digital electrical signal into a first optical signal and transmit it to the signal processing module via an optical fiber; the signal processing module is used to process the first optical signal and generate a second optical signal, and transmit it to the second photoelectric conversion module via an optical fiber; the second photoelectric conversion module is used to convert the second optical signal into a second digital electrical signal and transmit it to the digital-to-analog conversion module; the digital-to-analog conversion module is used to convert the second digital electrical signal into an analog electrical signal. By using optical fiber as a signal transmission channel between the first photoelectric conversion module, the signal processing module and the second photoelectric conversion module, the signals transmitted between the analog-to-digital conversion module and the signal processing module and the signals transmitted between the signal processing module and the digital-to-analog conversion module are converted into optical signals with less transmission loss, so that the analog-to-digital conversion module and the digital-to-analog conversion module can be freely set away from the signal processing module while ensuring stable and accurate signal transmission, which is convenient for free planning of the line, and can reduce space occupancy and circuit design costs. In addition, the system power consumption of the entire communication system can be reduced, and the communication capability can be improved.

[0062] Based on the first embodiment of the present application, in the second embodiment of the present application, the same or similar contents as those in the above-mentioned embodiment 1 can refer to the above introduction, and will not be repeated later. Figure 2 , the signal processing module 10 includes: an FPGA chip 11, a first photoelectric coupling unit 12 and a first electro-optical coupling unit 13;

[0063] The signal input end of the FPGA chip 11 is connected to the output end of the first photoelectric coupling unit 12, the signal output end of the FPGA chip 11 is connected to the input end of the first electro-optical coupling unit 13, the input end of the first photoelectric coupling unit 12 is connected to the first photoelectric conversion module 40 through an optical fiber, and the output end of the first electro-optical coupling unit 13 is connected to the second photoelectric conversion module 50 through an optical fiber;

[0064] The first photoelectric coupling unit 12 is used to convert the first optical signal into a PAM4 electrical signal, and transmit the PAM4 electrical signal to the FPGA chip 11;

[0065] The FPGA chip 11 is used to process the PAM4 electrical signal into an NRZ electrical signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal;

[0066] The first electro-optical coupling unit 13 is used to convert the PAM4 electrical signal output by the FPGA chip 11 into the second optical signal, and transmit the second optical signal to the second optoelectronic conversion module 50 .

[0067] It should be understood that NRZ electrical signal refers to Non-Return-to-Zero electrical signal, that is, non-return-to-zero coded signal, or it can be understood as a binary digital signal, which only uses two different amplitudes to indicate the information to be transmitted, and has low data transmission efficiency. Each state can only carry 1 bit of information, and signal loss may occur due to noise or attenuation during transmission, and the anti-noise ability is weak. PAM4 electrical signal is Pulse Amplitude Modulation 4 electrical signal, that is, four-level pulse amplitude modulation signal, which can represent 4 different states by changing the amplitude and phase of the signal. Each state can carry 2 bits of information, has better noise resistance, and can reduce signal loss.

[0068] It should be noted that, in this embodiment, the signal processing module 10 includes a first photoelectric coupling unit 12 with a photoelectric conversion function, a first electro-optical coupling unit 13 with an electro-optical conversion function, and an FPGA chip 11 with a signal processing function (or other processors that can be compiled and have data processing functions).

[0069] It is easy to understand that the first optical signal and the second optical signal can be PAM4 optical transmission signals. In this embodiment, the first optoelectronic coupling unit 12 can receive the first optical signal transmitted by the first optoelectronic conversion module 40 through an optical fiber, convert the first optical signal into a digital PAM4 electrical signal, and transmit it to the FPGA chip 11. The FPGA chip 11 can demodulate the 4-level digital PAM4 electrical signal, convert it into a 2-level digital NRZ electrical signal, and perform digital signal processing on the NRZ electrical signal (i.e., filter, transform, detect, estimate, modulate, demodulate, encode, decode, and perform one or more data processing operations on the NRZ electrical signal), and convert the NRZ electrical signal that has completed digital signal processing into a corresponding PAM4 electrical signal and transmit it to the first electro-optical coupling unit 13. The first electro-optical coupling unit 13 can convert the converted PAM4 electrical signal into a second optical signal, and transmit the second optical signal to the second optoelectronic conversion module 50 through an optical fiber.

[0070] It is worth noting that, in this embodiment, both the PAM4 electrical signal and the NRZ electrical signal can be multiple pairs of high-speed digital signals, which are transmitted at high speed through multiple signal transmission channels.

[0071] Furthermore, in this embodiment, the signal processing module 10 further includes: a clock unit 14;

[0072] A first end of the clock unit 14 is connected to a clock end of the FPGA chip 11, and a second end of the clock unit 14 is connected to a system reference end of the FPGA chip 11;

[0073] The clock unit 14 is used to output a clock signal and a system reference signal to the FPGA chip 11;

[0074] The FPGA chip 11 is used to process the PAM4 electrical signal into an NRZ electrical signal based on the clock signal and the system reference signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal.

[0075] It should be noted that, in this embodiment, the clock signal is a square wave or sine wave signal with a fixed period, which is used to provide a clock, which can ensure that the sending and receiving of the signal during high-speed transmission are consistent in time, and ensure that the signal is transmitted in the correct order and rate, thereby maintaining the integrity and accuracy of the signal, thereby avoiding the misalignment or loss of the signal during the entire communication process. The system reference signal is an electrical signal that can assist a processor with data processing capabilities such as the FPGA chip 11 to provide channel detection, and can assist the FPGA chip 11 in performing digital signal processing operations such as modulation or demodulation.

[0076] It is easy to understand that in this embodiment, the clock unit 14 can send a clock signal and a system reference signal to the FPGA chip 11, so that the FPGA chip 11 demodulates the PAM4 signal into an NRZ signal and processes the NRZ signal into a PAM4 signal based on the clock signal and the system reference signal according to a specific rate, cycle and channel, making the digital signal processing process more stable and reliable.

[0077] Furthermore, in this embodiment, the signal processing module 10 further includes: a second electro-optical coupling unit 15;

[0078] The first input end of the second electro-optical coupling unit 15 is connected to the first end of the clock unit 14, the first output end of the second electro-optical coupling unit 15 is connected to the first photoelectric conversion module 40 through an optical fiber, and the second output end of the second electro-optical coupling unit 15 is connected to the second photoelectric conversion module 50 through an optical fiber;

[0079] The second electro-optical coupling unit 15 is used to convert the clock signal into a clock optical transmission signal, and transmit it to the first photoelectric conversion module 40 and the second photoelectric conversion module 50 respectively;

[0080] The first photoelectric conversion module 40 is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the analog-to-digital conversion module 20;

[0081] The analog-to-digital conversion module 20 is further configured to convert the analog signal into the first digital electrical signal based on the clock signal;

[0082] The second photoelectric conversion module 50 is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the digital-to-analog conversion module 30;

[0083] The digital-to-analog conversion module 30 is further configured to convert the second digital electrical signal into the analog electrical signal based on the clock signal.

[0084] It should be noted that, in this embodiment, in order to ensure synchronization of the signal transmission process between the analog-to-digital conversion module 20 and the signal processing module 10 in the entire communication system, the clock signal output by the clock unit 14 can also be converted into a clock optical transmission signal in optical form by the second electro-optical coupling unit 15, and transmitted to the first photoelectric conversion module 40 and the second photoelectric conversion module 50 through the optical fiber. The first photoelectric conversion module 40 converts the clock optical transmission signal received through the optical fiber into the original clock signal, and then transmits it to the analog-to-digital conversion module 20 to provide the same clock for it; at the same time, the second photoelectric conversion module 50 converts the optical transmission signal received through the optical fiber into the original clock signal, and then transmits it to the digital-to-analog conversion module 30 to provide the same clock for it. At this time, the analog-to-digital conversion module 20 can convert the received analog signal into the first digital electrical signal according to the corresponding timing based on the received clock signal; correspondingly, the digital-to-analog conversion module 30 can convert the received second digital electrical signal into the analog electrical signal according to the corresponding timing based on the same clock signal received. Since the working clocks of the FPGA chip 11, the analog-to-digital conversion module 20 and the digital-to-analog conversion module 30 are all derived from the same clock signal, the entire communication system can be made more synchronous and stable.

[0085] Furthermore, in this embodiment, the signal processing module 10 further includes: a second photoelectric coupling unit 16;

[0086] The input end of the second photoelectric coupling unit 16 is connected to the second photoelectric conversion module 50 through an optical fiber, and the output end of the second photoelectric coupling unit 16 is connected to the synchronous input end of the FPGA chip 11; the synchronous output end of the FPGA chip 11 is also connected to the second input end of the second electro-optical coupling unit 15;

[0087] The digital-to-analog conversion module 30 is further configured to generate a synchronization signal and output the synchronization signal to the second photoelectric conversion module 50 when receiving the clock signal;

[0088] The second photoelectric conversion module 50 is further used to convert the synchronization signal into a synchronization optical transmission signal and transmit it to the second photoelectric coupling unit 16;

[0089] The second photoelectric coupling unit 16 is used to convert the synchronization optical transmission signal into the synchronization signal and transmit it to the FPGA chip 11;

[0090] The FPGA chip 11 is further used to transmit the synchronization signal to the second electro-optical coupling unit 15;

[0091] The second electro-optical coupling unit 15 is further used to convert the synchronization signal into a synchronization optical transmission signal, and transmit it to the first photoelectric conversion module 40;

[0092] The first photoelectric conversion module 40 is further used to convert the synchronization optical transmission signal into the synchronization signal, and transmit it to the analog-to-digital conversion module 20;

[0093] The synchronization signal is used to synchronize the timing of the clock signals received by the analog-to-digital conversion module 20 , the digital-to-analog conversion module 30 , and the FPGA chip 11 .

[0094] It is easy to understand that the synchronization signal is a signal that feeds back the clock synchronization status, and can be used to help increase the synchronization of the working timing (clock) between the digital-to-analog conversion module 30, the analog-to-digital conversion module 20 and the FPGA chip 11.

[0095] In this embodiment, when receiving the clock signal, the digital-to-analog conversion module 30 can also generate an electrically transmitted synchronization signal, and correct the clock provided by the received clock signal based on the synchronization signal. The digital-to-analog conversion module 30 can also convert the synchronization signal into a synchronous optical transmission signal for optical transmission through the second photoelectric conversion module 50, and transmit it to the signal processing module 10 through the optical fiber. The second photoelectric coupling unit 16 in the signal processing module 10 can convert the synchronous optical transmission signal into an electrically transmitted synchronization signal, and transmit it to the FPGA chip 11. The FPGA chip 11 can correct the clock provided by the received clock signal based on the synchronization signal. In addition, the FPGA chip 11 can also convert the received synchronization signal into an optically transmitted synchronous optical transmission signal through the second electro-optical coupling unit 15, and transmit it to the analog-to-digital conversion module 20 through the optical fiber. The analog-to-digital conversion module 20 converts the synchronous optical transmission signal into an electrically transmitted synchronization signal, and transmits it to the analog-to-digital conversion module 20, so that the analog-to-digital conversion module 20 also corrects the clock provided by the received clock signal based on the synchronization signal. Since most of the transmission process of the synchronization signal between the digital-to-analog conversion module 30, the FPGA chip 11 and the analog-to-digital conversion module 20 is completed in the form of optical signals, the problems of signal attenuation and noise interference are also reduced. Therefore, the stability and reliability of the synchronization signal can be guaranteed, and the clocks obtained by the digital-to-analog conversion module 30, the FPGA chip 11 and the analog-to-digital conversion module 20 can be more synchronized.

[0096] Based on the first embodiment and / or the second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as those of the above-mentioned first and second embodiments can refer to the above introduction, and will not be repeated later. Figure 3 , the analog-to-digital conversion module 20 includes: an analog-to-digital converter 21, a first DSP chip 22 and a first phase-locked loop 23;

[0097] The output end of the analog-to-digital converter 21 is connected to the input end of the first DSP chip 22, the output end of the first DSP chip 22 is connected to the first photoelectric conversion module 40, the synchronization end of the analog-to-digital converter 21 is also connected to the first photoelectric conversion module 40, the clock end of the analog-to-digital converter 21 is connected to the clock output end of the first phase-locked loop 23 and the clock end of the first DSP chip 22, and the clock input end of the first phase-locked loop 23 is also connected to the first photoelectric conversion module 40.

[0098] It should be noted that, in this embodiment, the analog-to-digital conversion module 20 mainly includes an analog-to-digital converter 21, a first DSP chip 22 and a first phase-locked loop 23, wherein the analog-to-digital converter 21 is used to convert the analog signal of the analog quantity into a digital NRZ electrical signal, and the first DSP chip 22 is used to process the converted NRZ electrical signal into a PAM4 electrical signal (first digital electrical signal) with better noise resistance and transmit it to the first photoelectric conversion module 40, and finally converted into a first optical signal of PAM4 by the first photoelectric conversion module 40 for transmission, thereby realizing optical modulation of the PAM4 electrical signal. In this way, the transmission bit rate of the first optical signal is twice the transmission bit rate of the NRZ electrical signal.

[0099] It is worth noting that the first phase-locked loop 23 can be connected to the second electro-optical coupling unit 15 in the signal processing module 10 through the first photoelectric conversion module 40 and the optical fiber, so that the clock signal output by the clock unit 14 can be received through the second electro-optical coupling unit 15. In addition, the analog-to-digital converter 21 can be connected to the FPGA chip 11 through the first photoelectric conversion module 40, the optical fiber and the second electro-optical coupling unit 15, so that the synchronization signal output by the FPGA chip 11 can be received. In the above process, the first phase-locked loop 23 transmits the received clock signal to the analog-to-digital converter 21 and the first DSP chip 22, so that the analog-to-digital converter 21 and the first DSP chip 22 work with the same clock provided by the same clock signal, so that the analog-to-digital conversion process can be completed more accurately. The analog-to-digital converter 21 can also correct the clock signal based on the received synchronization signal, so that the timing of the above process is more accurate.

[0100] It is easy to understand that, since the clock signal has gone through a round of conversion from electrical signal to optical signal to electrical signal, thermal noise will be introduced into the optical path during transmission in the form of an optical signal, and phase noise may occur in the clock signal. Even when it is restored to the form of an electrical signal, the phase noise and swing of the restored clock signal may not necessarily meet the requirements of the analog-to-digital converter 21. Therefore, the clock signal restored to the form of an electrical signal can be processed by the first phase-locked loop 23 to reduce the phase noise of the restored clock signal, and then transmitted to the analog-to-digital converter 21 and the first DSP chip 22, thereby ensuring that the working clocks of the analog-to-digital converter 21 and the first DSP chip 22 are more accurate.

[0101] It is worth noting that the analog-to-digital converter 21 also has a system reference terminal and is connected to the system reference terminal of the first phase-locked loop 23. The first phase-locked loop 23 can also obtain the corresponding system reference signal based on the received clock signal, and transmit the system reference signal to the analog-to-digital converter 21 to assist the analog-to-digital converter 21 in performing analog-to-digital conversion through the corresponding channel and modulation method.

[0102] Further, in this embodiment, the digital-to-analog conversion module 30 includes: a digital-to-analog converter 31, a second DSP chip 32 and a second phase-locked loop 33;

[0103] The input end of the digital-to-analog converter 31 is connected to the output end of the second DSP chip 32, the input end of the second DSP chip 32 is connected to the second photoelectric conversion module 50, the synchronization end of the digital-to-analog converter 31 is also connected to the second photoelectric conversion module 50, the clock end of the digital-to-analog converter 31 is connected to the clock output end of the second phase-locked loop 33 and the clock end of the second DSP chip 32, and the clock input end of the second phase-locked loop 33 is also connected to the second photoelectric conversion module 50.

[0104] It should be noted that, in this embodiment, the digital-to-analog conversion module 30 mainly includes a digital-to-analog converter 31, a second DSP chip 32 and a second phase-locked loop 33.

[0105] Among them, the second photoelectric conversion module 50 converts the PAM4 optical signal (second optical signal) output by the signal processing module 10 into a PAM4 electrical signal for electrical transmission and transmits it to the second DSP chip 32. The second DSP chip 32 is used to convert the PAM4 electrical signal (second digital electrical signal) transmitted by the second photoelectric conversion module 50 into an NRZ electrical signal, and transmit the NRZ electrical signal to the digital-to-analog converter 31, thereby realizing the demodulation of the PAM4 signal. The digital-to-analog converter 31 then converts the NRZ electrical signal into an analog electrical signal and outputs it to the subsequent circuit to complete the communication process. In this way, the transmission bit rate of the NRZ electrical signal is half of the transmission bit rate of the second optical signal.

[0106] It is worth noting that the second phase-locked loop 33 can be connected to the second electro-optical coupling unit 15 in the signal processing module 10 through the second photoelectric conversion module 50 and the optical fiber, so that the clock signal output by the clock unit 14 can be received through the second electro-optical coupling unit 15. In the above process, the second phase-locked loop 33 transmits the received clock signal to the second DSP chip 32 and the digital-to-analog converter 31, so that the second DSP chip 32 and the digital-to-analog converter 31 work with the same clock provided by the same clock signal, so that the process of digital-to-analog conversion can be completed more accurately. In addition, the synchronization end of the digital-to-analog converter 31 is also connected to the FPGA chip 11 through the second photoelectric conversion module 50, the optical fiber and the second photoelectric coupling unit 16, so that after the synchronization signal is generated based on the clock signal, the synchronization signal can be transmitted to the FPGA chip 11 through the above connection loop, so that the FPGA chip 11 corrects the received clock signal based on the synchronization signal.

[0107] It is easy to understand that, similar to the above, since the clock signal also undergoes a round of conversion from electrical signal to optical signal to electrical signal, thermal noise will be introduced into the optical path during transmission in the form of an optical signal, and phase noise may occur in the clock signal. Even when it is restored to the form of an electrical signal, the phase noise and swing of the restored clock signal may not meet the requirements of the digital-to-analog converter 31. Therefore, the clock signal restored to the form of an electrical signal can be processed by the second phase-locked loop 33 to reduce the phase noise of the restored clock signal, and then transmitted to the second DSP chip 32 and the digital-to-analog converter 31, thereby ensuring that the working clocks of the second DSP chip 32 and the digital-to-analog converter 31 are more accurate.

[0108] It is worth noting that the digital-to-analog converter 31 also has a system reference terminal and is connected to the system reference terminal of the second phase-locked loop 33. The second phase-locked loop 33 can also generate a corresponding system reference signal based on the received clock signal, and transmit the system reference signal to the digital-to-analog converter 31 to assist the digital-to-analog converter 31 in performing digital-to-analog conversion through the corresponding channel and modulation method.

[0109] Furthermore, in this embodiment, the optical fiber includes an 825 nm wavelength optical channel, an 850 nm wavelength optical channel, a 910 nm wavelength optical channel, and a 1000 nm wavelength optical channel.

[0110] It should be noted that, in the present embodiment, the first photoelectric conversion module 40 and the second photoelectric conversion module 50 both include a photoelectric coupling unit and an electro-optical coupling unit (the specific circuit structures of the first photoelectric conversion module 40 and the second photoelectric conversion module 50 are not shown in the figure), wherein the minimum functional unit in the electro-optical coupling unit is similar to the specific structure of the minimum functional unit of the first electro-optical coupling unit 13 or the second electro-optical coupling unit 15 described above, and can be composed of a multi-channel driver and a plurality of vertical cavity surface emitting lasers (Vertical Cavity Surface Emitting Laser, Vcsel), each channel of the driver corresponds to a Vcsel, and each Vcsel is coupled to the first electro-optical coupling inside the signal processing module 10 through an optical fiber to form an optical path. The models of each Vcsel are different, so an optical signal of a corresponding wavelength can be generated based on the driving current output by the driver, and each wavelength of light corresponds to an optical channel, which can specifically include an 825nm wavelength optical channel, an 850nm wavelength optical channel, a 910nm wavelength optical channel, and a 1000nm wavelength optical channel. Correspondingly, the minimum functional unit in the photoelectric coupling unit is similar to the first photoelectric coupling unit and the second photoelectric coupling unit 16 described above, and can be composed of a multi-channel high-speed transimpedance amplifier and multiple high-speed photodiodes (PDs). Each PD also corresponds to a channel, and can receive the optical signal generated by Vcsel of the corresponding wavelength, and generate the corresponding current, which is then amplified by the high-speed transimpedance amplifier and output, thereby realizing optical communication.

[0111] It is easy to understand that the photoelectric coupling unit in the first photoelectric conversion module 40 can be connected to the second electro-optical coupling unit 15 in the signal processing module 10 through an optical fiber, and the electro-optical coupling unit in the first photoelectric conversion module 40 can be connected to the first photoelectric coupling unit 12 in the signal processing module 10 through an optical fiber; the photoelectric coupling unit in the second photoelectric conversion module 50 can be connected to the first electro-optical coupling unit 13 in the signal processing module 10 through an optical fiber, and the electro-optical coupling unit in the second photoelectric conversion module 50 can be connected to the second photoelectric coupling unit 16 in the signal processing module 10 through an optical fiber. Through the above connection relationship, the transmission of optical signals such as the clock optical transmission signal, the first optical signal, the second optical signal, and the synchronization optical transmission signal can be realized, and the communication quality of the entire communication system is better. Since there are multiple optical channels in the optical path of the same optical fiber, and each optical channel can transmit optical signals at the same time, the wavelength division multiplexing function can be realized to improve the signal transmission capacity.

[0112] It is worth noting that since the first digital electrical signal and the second digital electrical signal are both high-speed signals, the optoelectronic coupling unit or electro-optical coupling unit at both ends of the optical fiber used to transmit the first optical signal or the second optical signal is preferably an AC coupling device; the clock signal is a medium-to-high frequency signal, and the optoelectronic coupling unit or electro-optical coupling unit at both ends of the optical fiber used to transmit the clock optical signal is also preferably an AC coupling device; and the synchronization signal is a low-speed high-low level digital signal, and the optoelectronic coupling unit or electro-optical coupling unit at both ends of the optical fiber used to transmit the synchronization optical transmission signal is preferably a DC coupling device.

[0113] In addition, to achieve the above objectives, the present application also proposes a communication device, which adopts all the embodiments of the communication circuit described above, and therefore should have the beneficial effects brought by the various embodiments of the above communication circuit, which will not be described one by one here.

[0114] In addition, to achieve the above-mentioned purpose, the present application also proposes a communication device, which adopts all the embodiments of the communication device described above, and therefore should have the beneficial effects brought by the various embodiments of the above-mentioned communication device, which will not be described one by one here.

[0115] The above are only preferred embodiments of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent processing scope of the present application.

Claims

1. A communication circuit, characterized in that: The communication circuit comprises: a signal processing module, an analog-to-digital conversion module, a digital-to-analog conversion module, a first photoelectric conversion module and a second photoelectric conversion module; The analog-to-digital conversion module is used to convert the analog signal into a first digital electrical signal and transmit it to the first photoelectric conversion module; The first photoelectric conversion module is used to convert the first digital electrical signal into a first optical signal, and transmit the first optical signal to the signal processing module via an optical fiber; The signal processing module is used to process the first optical signal and generate a second optical signal, and transmit the second optical signal to the second photoelectric conversion module via an optical fiber; The second photoelectric conversion module is used to convert the second optical signal into a second digital electrical signal and transmit it to the digital-to-analog conversion module; The digital-to-analog conversion module is used to convert the second digital electrical signal into an analog electrical signal.

2. The communication circuit according to claim 1, characterized in that The signal processing module includes: an FPGA chip, a first photoelectric coupling unit and a first electro-optical coupling unit; The signal input end of the FPGA chip is connected to the output end of the first photoelectric coupling unit, the signal output end of the FPGA chip is connected to the input end of the first electro-optical coupling unit, the input end of the first photoelectric coupling unit is connected to the first photoelectric conversion module through an optical fiber, and the output end of the first electro-optical coupling unit is connected to the second photoelectric conversion module through an optical fiber; The first photoelectric coupling unit is used to convert the first optical signal into a PAM4 electrical signal, and transmit the PAM4 electrical signal to the FPGA chip; The FPGA chip is used to process the PAM4 electrical signal into an NRZ electrical signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal; The first electro-optical coupling unit is used to convert the PAM4 electrical signal output by the FPGA chip into the second optical signal, and transmit the second optical signal to the second optoelectronic conversion module.

3. The communication circuit according to claim 2, characterized in that The signal processing module further includes: a clock unit; The first end of the clock unit is connected to the clock end of the FPGA chip, and the second end of the clock unit is connected to the system reference end of the FPGA chip; The clock unit is used to output a clock signal and a system reference signal to the FPGA chip; The FPGA chip is used to process the PAM4 electrical signal into an NRZ electrical signal based on the clock signal and the system reference signal, perform digital signal processing on the NRZ electrical signal, and convert the processed NRZ electrical signal into a corresponding PAM4 electrical signal.

4. The communication circuit according to claim 3, characterized in that: The signal processing module further includes: a second electro-optical coupling unit; The first input end of the second electro-optical coupling unit is connected to the first end of the clock unit, the first output end of the second electro-optical coupling unit is connected to the first photoelectric conversion module through an optical fiber, and the second output end of the second electro-optical coupling unit is connected to the second photoelectric conversion module through an optical fiber; The second electro-optical coupling unit is used to convert the clock signal into a clock optical transmission signal, and transmit the clock optical transmission signal to the first photoelectric conversion module and the second photoelectric conversion module respectively; The first photoelectric conversion module is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the analog-to-digital conversion module; The analog-to-digital conversion module is further used to convert the analog signal into the first digital electrical signal based on the clock signal; The second photoelectric conversion module is further used to convert the clock optical transmission signal into the clock signal, and transmit it to the digital-to-analog conversion module; The digital-to-analog conversion module is further used to convert the second digital electrical signal into the analog electrical signal based on the clock signal.

5. The communication circuit according to claim 4, characterized in that: The signal processing module further includes: a second photoelectric coupling unit; The input end of the second photoelectric coupling unit is connected to the second photoelectric conversion module through an optical fiber, and the output end of the second photoelectric coupling unit is connected to the synchronous input end of the FPGA chip; the synchronous output end of the FPGA chip is also connected to the second input end of the second electro-optical coupling unit; The digital-to-analog conversion module is further configured to generate a synchronization signal and output the synchronization signal to the second photoelectric conversion module upon receiving the clock signal; The second photoelectric conversion module is further used to convert the synchronization signal into a synchronization optical transmission signal and transmit it to the second photoelectric coupling unit; The second photoelectric coupling unit is used to convert the synchronization optical transmission signal into the synchronization signal and transmit it to the FPGA chip; The FPGA chip is further used to transmit the synchronization signal to the second electro-optical coupling unit; The second electro-optical coupling unit is further used to convert the synchronization signal into a synchronization optical transmission signal, and transmit the synchronization signal to the first photoelectric conversion module; The first photoelectric conversion module is further used to convert the synchronous optical transmission signal into the synchronous signal, and transmit it to the analog-to-digital conversion module; The synchronization signal is used to synchronize the timing of the clock signal received by the analog-to-digital conversion module, the digital-to-analog conversion module and the FPGA chip.

6. The communication circuit according to claim 5, characterized in that The analog-to-digital conversion module includes: an analog-to-digital converter, a first DSP chip and a first phase-locked loop; The output end of the analog-to-digital converter is connected to the input end of the first DSP chip, the output end of the first DSP chip is connected to the first photoelectric conversion module, the synchronization end of the analog-to-digital converter is also connected to the first photoelectric conversion module, the clock end of the analog-to-digital converter is connected to the clock output end of the first phase-locked loop and the clock end of the first DSP chip, and the clock input end of the first phase-locked loop is also connected to the first photoelectric conversion module.

7. The communication circuit according to claim 5, characterized in that The digital-to-analog conversion module includes: a digital-to-analog converter, a second DSP chip and a second phase-locked loop; The input end of the digital-to-analog converter is connected to the output end of the second DSP chip, the input end of the second DSP chip is connected to the second photoelectric conversion module, the synchronization end of the digital-to-analog converter is also connected to the second photoelectric conversion module, the clock end of the digital-to-analog converter is connected to the clock output end of the second phase-locked loop and the clock end of the second DSP chip, and the clock input end of the second phase-locked loop is also connected to the second photoelectric conversion module.

8. The communication circuit according to any one of claims 1 to 7, characterized in that: The optical fiber includes an 825 nm wavelength optical channel, an 850 nm wavelength optical channel, a 910 nm wavelength optical channel and a 1000 nm wavelength optical channel.

9. A communication device, characterized in that: The communication device adopts the communication circuit as claimed in any one of claims 1-8.

10. A communication device, characterized in that: The communication device adopts the communication apparatus according to claim 9.

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