Chip structure and wafer level packaging method

Abstract

The invention discloses a chip structure and a wafer level packaging method.The chip structure comprises a first base layer, a metal structure and a thin film layer, the first base layer comprises a first surface, the first surface comprises a first area and a second area, the metal structure is located in the first area, and the thin film layer is located in the second area. The thin film layer covers the surface, deviating from the first region, of the metal structure and extends to the second region; therefore, the film layer is prevented from being damaged during forming.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging and testing, and in particular to a chip structure and a wafer-level packaging method. Background Art

[0002] In the prior art, the packaging structure of an image sensor chip usually includes a cover plate, a chip and a support dam. The support dam is generally a mixed support dam of organic materials and metal materials. The cost of all-metal production is too high. The metal support dam improves airtightness, and the organic support dam provides more support.

[0003] When the optical performance of the image sensor chip needs to be improved, an optical film, such as IR or AR film, will be coated on the glass cover to increase the transmittance of certain bands, or reduce the transmittance of certain bands / cut off certain bands of light. The thickness of the optical film is related to the increased or cut-off bands, and in the process of coating the glass cover and making the metal support dam, the film will come into contact with various acidic and alkaline solutions, which can easily be damaged, resulting in a decrease in optical performance. Summary of the invention

[0004] One of the purposes of the present invention is to provide a chip structure to solve the technical problem in the prior art that the optical performance is affected by damage to the optical film.

[0005] One of the objectives of the present invention is to provide a wafer-level packaging method.

[0006] To achieve one of the above-mentioned purposes of the invention, one embodiment of the present invention provides a chip structure, including a first base layer, a metal structure and a thin film layer, the first base layer includes a first surface, the first surface includes a first area and a second area, the metal structure is located in the first area, and the thin film layer covers the surface of the metal structure away from the first area and extends to the second area.

[0007] As a further improvement of one embodiment of the present invention, the chip structure includes a second base layer arranged opposite to the first base layer, the metal structure includes a metal support dam for bonding the first base layer and the second base layer, and the thin film layer located on the metal support dam away from the first surface is connected to the second base layer.

[0008] As a further improvement of an embodiment of the present invention, the metal support dam is in a ring shape, and the metal structure includes at least two circles of metal support dams.

[0009] As a further improvement of an embodiment of the present invention, the second base layer includes a functional area arranged on its functional surface, the functional surface faces the first surface, and the metal support dam is located outside the functional area.

[0010] As a further improvement of one embodiment of the present invention, the second base layer includes a functional area arranged on its functional surface and a pad area located outside the functional area, the functional surface faces the first surface, and the metal support dam includes a second metal support dam located in the pad area.

[0011] As a further improvement of an embodiment of the present invention, the chip structure includes a heat dissipation column penetrating the first base layer along its thickness direction, and the heat dissipation column passes through the first surface and is connected to the second metal support dam.

[0012] As a further improvement of an embodiment of the present invention, the first base layer includes a second surface arranged opposite to the first surface, the chip structure includes a heat sink arranged on the second surface, and the heat dissipation column passes through the second surface and is connected to the heat sink.

[0013] As a further improvement of an embodiment of the present invention, the film layer covers the surface of the heat sink facing away from the first base layer.

[0014] As a further improvement of an embodiment of the present invention, the metal structure includes a metal shading sheet, the first base layer includes a second surface arranged opposite to the first surface, and the metal shading sheet is arranged on the first surface and / or the second surface.

[0015] As a further improvement of one embodiment of the present invention, the chip structure includes a second base layer arranged opposite to the first base layer, a metal support dam and / or an organic support dam for bonding the first base layer and the second base layer, and the metal shading film is thinner than the metal support dam and / or the organic support dam.

[0016] To achieve one of the above-mentioned purposes of the invention, an embodiment of the present invention provides a wafer-level packaging method, comprising the following steps:

[0017] Providing a first wafer and a second wafer, and manufacturing a metal structure on the first wafer;

[0018] Fabricating a thin film on the surface of the first wafer and the metal structure;

[0019] The first wafer and the second wafer are bonded together.

[0020] As a further improvement of an embodiment of the present invention, “making a metal structure” includes:

[0021] forming a metal seed layer on the surface of the first wafer;

[0022] Fabricating a metal structure on the surface of the metal seed layer;

[0023] The metal seed layer is removed from the remaining areas outside the metal structure.

[0024] As a further improvement of an embodiment of the present invention, “forming a metal seed layer on the surface of the first wafer” includes:

[0025] A through hole is opened in the first wafer, and metal is plated on the surface of the first wafer and in the through hole to form a metal seed layer located on the surface of the first wafer and a heat dissipation column located in the through hole.

[0026] As a further improvement of an embodiment of the present invention, “making a metal structure” includes:

[0027] Applying photoresist on the surface of the metal seed layer and patterning it to form a transition layer and a through groove, wherein the through groove exposes the metal seed layer;

[0028] Electroplating to form a metal structure in the through groove;

[0029] The transition glue layer is removed.

[0030] As a further improvement of an embodiment of the present invention, “making a metal structure” includes:

[0031] Applying photoresist on the surface of the metal seed layer for the first time and patterning the surface to form a first transitional resist layer and a first through-groove, wherein the first through-groove exposes the metal seed layer;

[0032] Forming a metal light shielding sheet by electroplating in the first through groove for the first time;

[0033] Applying photoresist for a second time on the surface of the metal light shielding sheet and the first transition glue layer and patterning them to form a second transition glue layer and a second through groove, wherein the second through groove exposes the metal light shielding sheet;

[0034] A metal support dam is formed by a second electroplating in the second through groove; the metal structure includes the metal light shielding sheet and the metal support dam.

[0035] The first transition adhesive layer and the second transition adhesive layer are removed.

[0036] As a further improvement of an embodiment of the present invention, “making a metal structure” includes:

[0037] Manufacturing discontinuously arranged peeling layers and filling grooves between adjacent peeling layers, wherein the filling grooves expose the surface of the first wafer;

[0038] Fabricating a metal structure on the surface of the peeling layer and in the filling groove;

[0039] The peeling layer is peeled off, and the metal structure on the surface of the peeling layer is removed.

[0040] As a further improvement of an embodiment of the present invention, the filling groove is in a trapezoidal shape, and has a first opening located on the first surface and a second opening away from the first surface, and the first opening is larger than the second opening.

[0041] As a further improvement of an embodiment of the present invention, “bonding the first wafer and the second wafer” includes: bonding the thin film on the surface of the metal structure and the second wafer.

[0042] As a further improvement of an embodiment of the present invention, the step of bonding the first wafer and the second wafer includes:

[0043] An organic support dam is manufactured between the first wafer and the second wafer, wherein the organic support dam connects the thin film on the surface of the first wafer and the second wafer.

[0044] As a further improvement of an embodiment of the present invention, “making an organic support dam” includes: making an organic support dam on the surface of the film by a 3D printing method, or coating a photoresist on the surface of the second wafer and patterning it to form an organic support dam.

[0045] As a further improvement of an embodiment of the present invention, the step of “bonding the first wafer and the second wafer” includes:

[0046] Making metal bumps on the surface of the second wafer facing away from the first wafer, wherein the metal bumps are electrically connected to the pad area of ​​the second wafer to form a wafer-level packaging structure;

[0047] The wafer-level packaging structure is cut to form a single chip structure.

[0048] As a further improvement of an embodiment of the present invention, the step of “bonding the first wafer and the second wafer” includes:

[0049] Fabricating a metal structure on a surface of the second wafer facing away from the first wafer;

[0050] A third wafer is provided, and the third wafer and the metal structure are bonded and connected.

[0051] Compared with the prior art, the present invention provides a chip structure and a wafer-level packaging method, wherein a metal structure first covers a first surface, and a thin film layer then covers the surface of the metal structure, thereby preventing the thin film layer from being damaged during formation and ensuring the optical performance of the thin film layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 Schematic diagram of the chip structure in the first embodiment of the present invention.

[0053] Figure 2 Schematic diagram of the chip structure in the second embodiment of the present invention.

[0054] Figure 3 Schematic diagram of the chip structure in the third embodiment of the present invention.

[0055] Figure 4 Schematic diagram of the chip structure in the fourth embodiment of the present invention.

[0056] Figure 5 It is a schematic diagram of the chip structure in other embodiments of the present invention.

[0057] Figure 6-7 Schematic diagram of the steps of a wafer-level packaging method in one embodiment of the present invention.

[0058] Figure 8-10 Schematic diagram of the steps of a wafer-level packaging method in another embodiment of the present invention.

[0059] Fig.11 1 is a schematic diagram of the steps of a wafer-level packaging method in another embodiment of the present invention. DETAILED DESCRIPTION

[0060] The present invention will be described in detail below in conjunction with the specific embodiments shown in the accompanying drawings. However, these embodiments do not limit the present invention, and any structural, methodological, or functional changes made by a person skilled in the art based on these embodiments are all within the scope of protection of the present invention.

[0061] It should be noted that the term "comprises" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device that includes a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In addition, the terms "first", "second", "third", "fourth", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0062] The terms "connected", "connected to" or any other variants are intended to cover various relative positions in a connection relationship, so as to include direct connection or indirect connection. Among them, the direct connection can be formed by a gas pipeline, the indirect connection can be a connection relationship established by a device such as a valve body, a sensor, etc., can be a connection relationship established by a gas circuit component such as a brake control unit, or can be a connection relationship established by any other medium such as air.

[0063] See also Figure 1 , which is a schematic structural diagram of a chip structure 1000 provided in the first embodiment of the present invention.

[0064] The chip structure 1000 includes a first base layer 10, a metal structure 40 and a thin film layer 50. The first base layer 10 includes a first surface, the first surface includes a first area and a second area, the metal structure 40 is located in the first area, and the thin film layer 50 covers the surface of the metal structure 40 away from the first area and extends to the second area.

[0065] In the prior art, a thin film layer 50 usually covers the first surface, and then the metal structure 40 is covered on the thin film layer 50 . Since the metal structure 40 undergoes a chemical etching process during the manufacturing process, it will affect the thin film layer 50 and further affect the optical performance of the chip structure 100 .

[0066] In this case, the metal structure 40 is manufactured and covers the first area, and then the thin film layer 50 is formed to ensure that the thin film layer 50 has good optical properties.

[0067] The chip structure 1000 includes a second base layer 20 disposed opposite to the first base layer 10, the metal structure 40 includes a metal support dam 41 for bonding the first base layer 10 and the second base layer 20, and the thin film layer located on the metal support dam 41 away from the first surface is connected to the second base layer 20. In this way, the metal support dam 41 and the thin film layer 50 on the surface thereof are surrounded to form a sealing area 401.

[0068] The first base layer 10 may be a cover base layer, the second base layer 20 may be a device base layer, the base layer 20 includes an electrically coupled functional area 21 and a pad area 22 , and the sealing area 401 is used to cover the functional area 21 .

[0069] The metal support dam 41 is in a ring shape. It should be noted that the metal support dam 41 can be a continuous ring structure or a discontinuous ring structure. The metal structure 40 includes at least two circles of metal support dams 41. Figure 5 It can be seen that the continuous annular metal support dam 41 structure provides better air tightness, while the discontinuous annular metal support dam 41 structure is suitable for being arranged in the welding area 22 to dissipate heat while preventing the intervally arranged welding pad areas 22 from forming a loop.

[0070] The second base layer 20 includes a functional surface facing the first surface. The functional area 21 is arranged on the functional surface. The metal support dam 41 is located outside the functional area 21 and mainly plays a role of sealing the functional area 21 .

[0071] Combination Figure 1 As shown, the metal support dam 41 includes a first metal support dam 411 located outside the pad area 22 , close to the outer periphery of the chip structure 1000 , and sealed near the outer side to prevent moisture and water vapor from entering.

[0072] Combination Figure 3 As shown, the metal support dam 41 includes a second metal support dam 412 located in the pad area 22, which is not only used to strengthen support, but also to enhance heat dissipation. In the third embodiment of the present case, the second metal support dam 412 is exactly arranged in the pad area 22. Since the surface of the second metal support dam 412 facing the functional surface is covered with a thin film layer 50, the second metal support dam 412 will not be electrically connected to the pad area 22, but can conduct the heat dissipated by the pad area 22, and the second metal support dam 412 can be selected to be set as a continuous ring or an intermittent ring. It can be understood that in other technical solutions, if the second metal support dam 412 is electrically connected to the pad area 22, then the second metal support dam 412 can only be set as an intermittent ring structure.

[0073] The chip structure 1000 includes a heat dissipation column 42 that penetrates the first base layer 10 along its thickness direction. The heat dissipation column 42 passes through the first surface and is connected to the second metal support dam 412. Figure 3 , heat cannot be dissipated only through the second metal support dam 412 , so the heat dissipation column 42 penetrates the first base layer 10 to conduct the heat out of the first base layer 10 .

[0074] The first base layer 10 includes a second surface disposed opposite to the first surface, the chip structure 1000 includes a heat sink 43 disposed on the second surface, and the heat sink 42 passes through the second surface and is connected to the heat sink 43. Figure 3 The cross section of the heat dissipation column 42 is circular, and the heat dissipation area is small. Connecting one end of the heat dissipation column 43 to a heat sink 43 with a larger area is more conducive to auxiliary heat dissipation.

[0075] The film layer 50 covers the surface of the heat sink 43 facing away from the first base layer 10 . Similarly, in order to protect the better optical performance of the film layer 50 , the heat sink 43 is configured to be formed on the second surface first, and then the film layer 50 is formed on the surface of the heat sink 43 .

[0076] The metal structure 40 includes a metal light shielding sheet 44, and the metal light shielding sheet 44 is disposed on the first surface and / or the second surface of the first base layer 10. Figure 2 As shown, in the second embodiment of the present case, in order to improve the optical performance, it is sometimes necessary to make a light shielding layer on the periphery of the first base layer 10 (corresponding to the outer side of the functional area 21 of the second base layer 20) to block the entry of stray light and other light that has a negative effect on imaging. For the optical film layer 50, the metal light shielding film needs to be processed on the film layer 50, which has the risk of damage. Therefore, the metal structure 40 can also be made first, and then the film layer 50 can be made.

[0077] Combination Figure 2It is more common for the metal light shielding film 44 to be disposed on the second surface, but it is also possible to be disposed on both the first surface and the second surface.

[0078] It should be noted that the heat sink 43 located on the second surface in the third embodiment and the metal light shielding sheet 44 located on the second surface in the second embodiment have similar structures, the difference being that the heat sink 43 can be made of ordinary metal, can cover part of the second surface, or can completely cover the second surface, and the key point is that it must be connected to the heat dissipation column 42. The metal light shielding sheet 44 needs to have corresponding light shielding optical properties, and must be located outside the functional area 21, and cannot cover the sealing area 401.

[0079] It is understandable that if the heat sink 43 in the third embodiment is made of a metal with light-shielding optical properties and is disposed outside the functional area 21 , then the heat sink 43 may also be equivalent to the metal light-shielding sheet 44 .

[0080] Combination Figure 2 The chip structure 100 includes an organic support dam 30 for bonding the first base layer 10 and the second base layer 20 , and the metal light shielding film 44 is thinner than the organic support dam 30 .

[0081] It can be understood that in the second embodiment of the present case, the metal structure 40 includes a metal shading film 44 but does not include a metal support dam 41. The metal shading film 44 is too thin to serve as a bonding connection. Therefore, an organic support dam 30 needs to be provided between the first base layer 10 and the second base layer 20 for bonding connection.

[0082] It can be understood that the above three implementation modes do not conflict with each other and can be combined with each other in pairs.

[0083] Combination Figure 4 In the fourth embodiment of the present case, the above three embodiments are combined, and the metal structure 40 includes a metal support dam 41, a heat dissipation column 42, a heat sink 43 and a metal shading sheet 44.

[0084] Specifically, the metal support dam 41 includes a first metal support dam 411 and a second metal support dam 412. The heat sink 43 partially covers the second surface. If the heat sink 43 is to achieve a light shielding function, a metal with light shielding performance is selected and covers the outer side of the second surface. The metal light shielding sheet 44 is located on the inner side of the second metal support dam 412 and on the outer side of the functional area 21.

[0085] Combination Figure 4 The chip structure 1000 may also include an organic support dam 30 to form a hybrid support dam, thereby saving costs and enhancing sealing and support. In one embodiment, the organic support dam 30 is filled between a plurality of metal support dams 41 .

[0086] Combination Figure 5 As shown, in other embodiments, a plurality of hybrid support dams are arranged at intervals, or the organic support dam 30 and the metal support dam 41 are arranged at intervals from each other. In short, different arrangements can be made as needed, and this case is not further limited.

[0087] This case also protects a wafer-level packaging method, combined with Figure 6-7 As shown, the chip structure 1000 is manufactured by the wafer-level packaging method. The wafer-level packaging method includes the following steps:

[0088] A first wafer 100 and a second wafer 200 are provided, and a metal structure 40 is fabricated on the first wafer 100. The first wafer 100 is a cover wafer, and the second wafer 200 is a device wafer. The second wafer 200 includes an electrically coupled functional area 21 and a pad area 22. The metal structure 40 is located on the surface of the first wafer 100.

[0089] The thin film 500 is formed on the surface of the first wafer 100 and the metal structure 40. The thin film 500 can be formed by sputtering, evaporation, etc. The thin film 500 covers the surface of the metal structure 40 and the surface of the first wafer 100 except the metal structure 40.

[0090] The first wafer 100 and the second wafer 200 are bonded to each other.

[0091] In this way, the use of liquid etching in the process of manufacturing the metal structure 40 will not affect the thin film 500 manufactured later, thereby ensuring the optical performance of the thin film 500.

[0092] The “fabrication of the metal structure 40” includes:

[0093] Combination Figure 6 As shown in FIG. 1 , a metal seed layer 110 is formed on the surface of the first wafer 100. The metal seed layer 110 is usually thin and can be formed by sputtering, evaporation, chemical plating, etc. The metal seed layer 110 basically covers the first surface of the first wafer 100. In another embodiment, referring to Figure 8 b. The metal seed layer 110 may also cover two opposite surfaces of the first wafer 100 .

[0094] Combination Figure 6 As shown in b-6c, a metal structure 40 is manufactured on the surface of the metal seed layer 110 , and the metal seed layer 110 is conducive to the growth of the metal structure 40 .

[0095] Combination Figure 6 As shown in FIG. 4 , the metal seed layer 110 in the remaining area outside the metal structure is removed, and the metal structure 40 is retained. The metal seed layer 110 is generally removed by etching.

[0096] It is understandable that before manufacturing the metal structure 40 in any embodiment, a metal seed layer 110 needs to be manufactured first, which also facilitates the subsequent growth of the metal structure 40 .

[0097] Combination Figure 6 As shown in b-6d, "making metal structure 40" also includes:

[0098] A photoresist is coated on the surface of the metal seed layer 110 and patterned to form a transition glue layer 120 and a through groove, wherein the through groove exposes the metal seed layer 110; the position exposed by the through groove is the position where the metal structure 40 needs to be made;

[0099] The metal structure 40 is formed in the through groove by electroplating. Furthermore, a thickened metal structure 40 is made on the metal seed layer 110 by electroplating.

[0100] The transition glue layer 120 is removed.

[0101] In the first embodiment, the metal structure 40 includes a metal support dam 41 .

[0102] In the second embodiment, the metal structure 40 includes a metal light shielding sheet 44 .

[0103] The above method for manufacturing the metal structure 40 is applicable to both the metal support dam 41 in the first embodiment and the metal light shielding film 44 in the second embodiment. It should be noted that when manufacturing the metal light shielding film 44 located on the second surface, the metal seed layer 110 can also be formed on the second surface of the first wafer 100 and patterned before manufacturing the metal light shielding film 44.

[0104] In other embodiments, if both the metal support dam 41 and the metal light shielding film 44 are needed, the above manufacturing steps can be repeated once, and the metal light shielding film 44 is manufactured first and then the metal support dam 41 is manufactured.

[0105] In other embodiments, when the metal structure 40 includes a metal support dam 41 or a metal light shielding sheet 44, the metal structure 40 can also be combined with the metal support dam 41 or the metal light shielding sheet 44 by peeling. Fig.11 As shown, “fabrication of metal structure 40” includes:

[0106] Reference Fig.11 a. Fabricate discontinuously arranged peeling layers 120' and filling grooves between adjacent peeling layers 120', wherein the filling grooves expose the surface of the first wafer 100. Similarly, the exposed position of the filling grooves is the position where the metal structure 40 needs to be fabricated.

[0107] Reference Fig.11b. A metal structure 40 is made on the surface of the peeling layer 120' and in the filling groove. The metal structure 40 of the required thickness can be obtained by evaporation or sputtering. Due to the process and the filling groove, more metal is plated in the vertical direction and less in the horizontal direction. There is no metal on the inner wall of the filling groove and close to the first wafer 100.

[0108] Reference Fig.11 c. Peel off the peeling layer 120', and remove the metal structure 40 on the surface of the peeling layer. The metal structure 40 in the filling groove is retained to form the required metal support dam 41 or metal light shielding sheet 44.

[0109] The above stripping method is not suitable for metal structures 40 with higher thickness, because the height of the metal structure 40 needs to be smaller than the height of the stripping layer 120'. However, the higher the height of the metal structure 40, the more difficult it is for the stripping solution to flow into the inner sidewall area of ​​the filling groove (the area without metal coverage), and the more difficult it is to strip.

[0110] The “making of the discontinuously arranged peeling layer 120 ′ and the filling groove” includes: making a peeling adhesive on the surface of the first wafer 100 and patterning the peeling adhesive to form the peeling layer 120 ′ and the filling groove. The peeling adhesive can be made by coating or filming.

[0111] The filling groove is in a trapezoidal shape and has a first opening located on the first surface and a second opening away from the first surface, wherein the first opening is larger than the second opening.

[0112] Combination Figure 8 As shown, in the third embodiment, “forming a metal seed layer 110 on the surface of the first wafer 100” includes:

[0113] Reference Figure 8 a-8b, opening a through hole in the first wafer 100, and plating metal on the surface of the first wafer 100 and in the through hole to form a metal seed layer 110 located on the surface of the first wafer and a heat dissipation column 42 located in the through hole.

[0114] Since a penetrating heat dissipation column 42 needs to be formed, the heat dissipation column 42 needs to be formed before the metal support dam 41 is formed in this embodiment.

[0115] In the third embodiment, the step of “forming a metal seed layer 110 ” includes:

[0116] The metal seed layer 110 is patterned to form a metal heat sink 43 located on the surface of the first wafer 100 away from the second wafer 200, while the metal seed layer 110 on the surface of the first wafer 100 close to the second wafer 200 is retained. Fig. 9a. Add a step of patterning the metal seed layer 110 so that one side of the first wafer 100 is formed into a metal heat sink 43 or a metal heat sink 43 can be made, and the other side is still the structure of the metal seed layer 110. The metal heat sink 43 is located on the periphery of the first wafer 100. If the metal heat sink 43 is required to completely cover the first wafer 100, this step is not required.

[0117] In the third embodiment, “fabricating the metal structure 40” includes:

[0118] A photoresist is coated on the surface of the metal seed layer 110 and patterned to form a transition glue layer 120 and a through groove, wherein the through groove exposes the metal seed layer 110; the position exposed by the through groove is the position where the metal structure 40 needs to be made; Figure 6 steps.

[0119] Electroplating to form a metal structure 40 in the through groove;

[0120] The transition glue layer 120 is removed.

[0121] It can be understood that the metal structure 40 here is a second metal support dam 412 for connecting to the heat dissipation column 42 .

[0122] In the fourth embodiment, combining Figure 9-10 As shown, “fabrication of metal structure 40” includes:

[0123] Reference Fig. 9 b. Apply photoresist to the surface of the metal seed layer 110 for the first time and pattern it to form a first transition layer 112 and a first through groove, wherein the first through groove exposes the metal seed layer 110. The position exposed by the first through groove is the position where the metal light shielding film 44 needs to be made.

[0124] The metal light shielding film 44 is formed by a first electroplating process in the first through groove.

[0125] Reference Fig. 9 c. A second photoresist is coated and patterned on the metal light shielding sheet 11 and the first transition glue layer 121 to form a second transition glue layer 122 and a second through groove, wherein the second through groove exposes the metal light shielding sheet 44. The position exposed by the second through groove is the position where the metal support dam 41 needs to be made.

[0126] A second electroplating is performed in the second through groove to form a metal support dam 41 ; the metal structure 40 includes the metal light shielding sheet 44 and the metal support dam 41 .

[0127] Reference Fig. 9 d. Remove the first transition adhesive layer 121 and the second transition adhesive layer 122.

[0128] It can be understood that the completed metal support dam 41 includes a first metal support dam 411 located outside the solder pad area 22 and a second metal support dam 412 located in the solder pad area 22, and the second metal support dam 412 is connected to the heat dissipation column 42. The manufacturing method of the heat dissipation column 42 and the metal heat sink 43 refers to the third embodiment and will not be repeated here.

[0129] It should be noted that the metal structure 40 formed in any of the above embodiments and the optical film 500 are made in the same manner. Figure 7 a, 10a; bonding the first wafer 100 and the second wafer 200 is also the same, refer to Figure 7 c. 10c.

[0130] In one embodiment, the “bonding the first wafer 100 and the second wafer 200” includes: bonding the thin film on the surface of the metal structure 40 to the second wafer 200. When the metal structure 40 includes a metal support dam 41, the connection between the first wafer 100 and the second wafer 200 can be achieved through the metal support dam 41.

[0131] In one embodiment, the “bonding the first wafer 100 and the second wafer 200” includes:

[0132] An organic support dam 30 is fabricated between the first wafer 100 and the second wafer 200, and the organic support dam 30 connects the thin film on the surface of the first wafer 100 and the second wafer 200. When the metal structure 40 does not include a metal support dam but only includes a metal light shielding sheet 44, an organic support dam 30 needs to be further fabricated to connect the first wafer 100 and the second wafer 200.

[0133] Alternatively, even if the metal structure 40 includes the metal support dam 41, an organic support dam 30 may be further fabricated, see 7b and 10b.

[0134] The “fabrication of the organic support dam 30 ” includes: fabricating the organic support dam on the surface of the film 500 by a 3D printing method, or coating and patterning the surface of the second wafer 200 with photoresist to form an organic support dam to protect the film on the surface of the first wafer 100 .

[0135] In one embodiment, after “bonding the first wafer 100 and the second wafer 200”, the following steps are included: referring to 7d and 10c, a metal bump 60 is made on the surface of the second wafer 200 away from the first wafer 100, and the metal bump 60 is electrically connected to the pad area 22 of the second wafer 200 to form a wafer-level packaging structure. The metal bump 60 is used to electrically connect to an external circuit.

[0136] The wafer-level packaging structure is cut to form a single chip structure.

[0137] In other embodiments, after “bonding the first wafer 100 and the second wafer 200”, the step of: manufacturing a metal structure 40 on a surface of the second wafer 200 facing away from the first wafer 100 may be further included.

[0138] A third wafer is provided, and the third wafer and the metal structure are bonded and connected, specifically: the second wafer 200 and the third wafer are connected through a metal support dam 41. The metal structure 40 is suitable for a multi-wafer structure arranged in a stack. The third wafer is located on a side of the second wafer away from the first wafer, and the first wafer, the second wafer, and the third wafer are stacked.

[0139] “Fabricating a metal structure 40 on a surface of the second wafer 200 facing away from the first wafer 100” includes:

[0140] A through groove is formed on the surface of the second wafer 200 facing away from the first wafer, and the through groove exposes the bonding pad area 22 of the second wafer.

[0141] A welding column 61 is made in the through groove to connect to the welding pad area 22 .

[0142] A metal structure 40 is fabricated on a side of the second wafer facing away from the first wafer. The metal structure at least includes a second metal support dam 412 .

[0143] The third wafer also includes a functional area and a pad area outside the functional area. The metal structure 40 includes a second metal support dam 412 for electrically connecting the welding column 61. The second metal support dam 412 electrically connects the welding column 61 and the pad area of ​​the third wafer to achieve electrical connection between adjacent wafers, which is suitable for a multi-wafer stacking structure that requires the metal structure 40 to achieve electrical connection.

[0144] The beneficial effects of the present invention are: firstly manufacturing the metal structure 40, and then forming a thin film layer 50 on the surface of the metal structure 40, so as to avoid damage to the thin film layer 50 when manufacturing the metal structure 40, and ensure the good optical performance of the thin film layer 50; the metal structure 40 includes a metal support dam 41, which can realize the functions of sealing connection and / or metal heat dissipation; the metal structure 40 includes a metal shading sheet 44, which can achieve a good shading effect.

[0145] It can be formed by referring to any of the technical solutions provided above, and will not be described in detail here.

[0146] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0147] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A chip structure, characterized in that: include: It includes a first base layer, a metal structure and a thin film layer, wherein the first base layer includes a first surface, the first surface includes a first area and a second area, the metal structure is located in the first area, and the thin film layer covers the surface of the metal structure away from the first area and extends to the second area.

2. The chip structure according to claim 1, characterized in that: The chip structure includes a second base layer arranged opposite to the first base layer, the metal structure includes a metal support dam for bonding the first base layer and the second base layer, and the thin film layer located on the metal support dam away from the first surface is connected to the second base layer.

3. The chip structure according to claim 2, characterized in that: The metal support dam is in a ring shape, and the metal structure includes at least two circles of metal support dams.

4. The chip structure according to claim 2, characterized in that: The second base layer includes a functional area arranged on a functional surface thereof, the functional surface faces the first surface, and the metal support dam is located outside the functional area.

5. The chip structure according to claim 2, characterized in that: The second base layer includes a functional area arranged on its functional surface and a pad area located outside the functional area, the functional surface faces the first surface, and the metal support dam includes a second metal support dam located in the pad area.

6. The chip structure according to claim 5, characterized in that: The chip structure includes a heat dissipation column penetrating the first base layer along a thickness direction thereof, and the heat dissipation column passes through the first surface and is connected to the second metal support dam.

7. The chip structure according to claim 6, characterized in that: The first base layer includes a second surface arranged opposite to the first surface, the chip structure includes a heat sink arranged on the second surface, and the heat dissipation column passes through the second surface and is connected to the heat sink.

8. The chip structure according to claim 7, characterized in that: The film layer covers a surface of the heat sink facing away from the first base layer.

9. The chip structure according to claim 1, characterized in that: The metal structure includes a metal light shielding sheet, the first base layer includes a second surface arranged opposite to the first surface, and the metal light shielding sheet is arranged on the first surface and / or the second surface.

10. The chip structure according to claim 9, characterized in that: The chip structure includes a second base layer arranged opposite to the first base layer, a metal support dam and / or an organic support dam for bonding the first base layer and the second base layer, and the metal light shielding sheet is thinner than the metal support dam and / or the organic support dam.

11. A wafer-level packaging method, characterized in that: The following steps are involved: Providing a first wafer and a second wafer, and manufacturing a metal structure on the first wafer; Fabricating a thin film on the surface of the first wafer and the metal structure; The first wafer and the second wafer are bonded together.

12. The wafer-level packaging method according to claim 11, characterized in that: "Fabrication of metal structures" includes: forming a metal seed layer on the surface of the first wafer; Fabricating a metal structure on the surface of the metal seed layer; The metal seed layer is removed from the remaining areas outside the metal structure.

13. The wafer level packaging method according to claim 12, characterized in that: “Preparing a metal seed layer on the surface of the first wafer” includes: A through hole is opened in the first wafer, and metal is plated on the surface of the first wafer and in the through hole to form a metal seed layer located on the surface of the first wafer and a heat dissipation column located in the through hole.

14. The wafer-level packaging method according to claim 12, characterized in that: "Fabrication of metal structures" includes: Applying photoresist on the surface of the metal seed layer and patterning it to form a transition layer and a through groove, wherein the through groove exposes the metal seed layer; Electroplating to form a metal structure in the through groove; The transition glue layer is removed.

15. The wafer level packaging method according to claim 12, characterized in that: "In the making of metal structures" includes: Applying photoresist on the surface of the metal seed layer for the first time and patterning the surface to form a first transitional resist layer and a first through-groove, wherein the first through-groove exposes the metal seed layer; Forming a metal light shielding sheet by electroplating in the first through groove for the first time; Applying photoresist for a second time on the surface of the metal light shielding sheet and the first transition glue layer and patterning them to form a second transition glue layer and a second through groove, wherein the second through groove exposes the metal light shielding sheet; A metal support dam is formed by a second electroplating in the second through groove; the metal structure includes the metal light shielding sheet and the metal support dam. The first transition adhesive layer and the second transition adhesive layer are removed.

16. The wafer level packaging method according to claim 11, characterized in that: "Fabrication of metal structures" includes: Manufacturing discontinuously arranged peeling layers and filling grooves between adjacent peeling layers, wherein the filling grooves expose the surface of the first wafer; Fabricating a metal structure on the surface of the peeling layer and in the filling groove; The peeling layer is peeled off, and the metal structure on the surface of the peeling layer is removed.

17. The wafer-level packaging method according to claim 16, characterized in that: The filling groove is in a trapezoidal shape and has a first opening located on the first surface and a second opening away from the first surface, wherein the first opening is larger than the second opening.

18. The wafer level packaging method according to claim 11, characterized in that: "Bonding the first wafer and the second wafer" includes: bonding the thin film on the surface of the metal structure and the second wafer.

19. The wafer-level packaging method according to claim 11, characterized in that: “Bonding the first wafer and the second wafer together” includes: An organic support dam is manufactured between the first wafer and the second wafer, wherein the organic support dam connects the thin film on the surface of the first wafer and the second wafer.

20. The wafer level packaging method according to claim 19, characterized in that: "Making an organic support dam" includes: using a 3D printing method to make an organic support dam on the surface of the film, or coating a photoresist on the surface of the second wafer and patterning it to form an organic support dam.

21. The wafer level packaging method according to claim 11, characterized in that: The step of "bonding the first wafer and the second wafer" includes: Making metal bumps on the surface of the second wafer facing away from the first wafer, wherein the metal bumps are electrically connected to the pad area of ​​the second wafer to form a wafer-level packaging structure; The wafer-level packaging structure is cut to form a single chip structure.

22. The wafer level packaging method according to claim 11, characterized in that: The step of "bonding the first wafer and the second wafer" includes: Fabricating a metal structure on a side of the second wafer facing away from the first wafer; A third wafer is provided, and the third wafer is bonded to the metal structure.

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