Wafer processing method and chip

Abstract

The invention provides a wafer processing method and a chip, and the method comprises the steps: providing a wafer which is provided with a to-be-cut region; a metal layer with the target thickness is formed on the back face of the wafer, the metal layer is provided with an opening, and the opening exposes the to-be-cut area; and cutting the wafer along the opening, wherein the opening is formed through a photoetching process. According to the wafer processing method provided by the invention, the metal layer with the target thickness is formed on the back surface of the wafer to increase the strength of the wafer, so that the reliability of a device can be improved, the metal layer does not influence the on-resistance of the device, and further, the scribing of the metal layer part is realized by utilizing a photoetching process, so that the yield of the device is improved. The equipment cost for scribing the metal layer can be reduced, and meanwhile the machining efficiency can be improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer processing method and a chip. Background Art

[0002] For power devices, there are two extremely important parameters, one is the on-resistance and the other is the breakdown voltage. For applications, it is hoped that the on-resistance is as small as possible.

[0003] In the prior art, the power device has a lower on-resistance by thinning the wafer. After the wafer is thinned, the wafer strength decreases, resulting in an increase in the fragmentation rate during the process, increasing the manufacturing cost of the device and reducing the reliability of the device. Summary of the invention

[0004] The object of the present invention is to provide a wafer processing method and a chip to solve one or more problems in the prior art.

[0005] In order to solve the above technical problems, the present invention provides a wafer processing method, comprising:

[0006] Providing a wafer, wherein the wafer has a region to be cut;

[0007] forming a metal layer of target thickness on the back side of the wafer, wherein the metal layer has an opening, and the opening exposes the area to be cut; and

[0008] cutting the wafer along the opening;

[0009] Wherein, the opening is formed by a photolithography process.

[0010] Optionally, in the wafer processing method, a method for forming the opening includes:

[0011] A patterned mask layer is formed on the surface of the metal layer, and the metal layer is etched using the patterned mask layer as a mask to form the opening.

[0012] Optionally, in the wafer processing method, the mask layer includes a first photoresist layer.

[0013] Optionally, in the wafer processing method, a method for forming the opening includes:

[0014] forming a sacrificial layer on the back side of the wafer;

[0015] Etching the sacrificial layer by using a photolithography process so that the sacrificial layer only covers the area to be cut; and,

[0016] When forming the metal layer, the metal layer is formed on the back side of the wafer in an area other than the area where the sacrificial layer is located, and then the sacrificial layer is removed to form the opening.

[0017] Optionally, in the wafer processing method, the sacrificial layer includes a second photoresist layer.

[0018] Optionally, in the wafer processing method, the thickness of the wafer is 20 μm to 45 μm.

[0019] Optionally, in the wafer processing method, the wafer is obtained by thinning treatment.

[0020] Optionally, in the wafer processing method, the target thickness is 5 μm to 60 μm.

[0021] Optionally, in the wafer processing method, a method for cutting the wafer includes: cutting with a diamond blade.

[0022] The present invention also provides a chip, wherein the chip is processed by the wafer processing method as described in any of the preceding items.

[0023] In summary, the wafer processing method provided by the present invention includes: providing a wafer, the wafer having an area to be cut; forming a metal layer of a target thickness on the back of the wafer, the metal layer having an opening, the opening exposing the area to be cut; and cutting the wafer along the opening; wherein the opening is formed by a photolithography process. The wafer processing method provided by the present invention can improve the reliability of the device by forming a metal layer of a target thickness on the back of the wafer to increase the strength of the wafer, and the metal layer will not affect its on-resistance. Furthermore, the slicing of the metal layer portion is achieved by a photolithography process, so that the equipment cost for slicing the metal layer can be reduced, and the processing efficiency can also be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 A schematic diagram of a process flow of a wafer processing method provided by an embodiment of the present invention;

[0025] Figure 2 A schematic diagram of the process flow of a wafer processing method provided in Embodiment 1 of the present invention;

[0026] Figure 3 to Figure 6 for Figure 2 The structural schematic diagram corresponding to each step shown in;

[0027] Figure 4 A schematic diagram of a process flow of a wafer processing method provided in Embodiment 2 of the present invention;

[0028] Figure 5 to Figure 11 for Figure 4 The structural schematic diagram corresponding to each step shown in;

[0029] The descriptions of the reference numerals are as follows:

[0030] 10-wafer; 20-metal layer; 30-mask layer;

[0031] 100-opening;

[0032] 40-Sacrificial layer. DETAILED DESCRIPTION

[0033] In order to make the purpose, advantages and features of the present invention clearer, the present invention is described in detail in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis required to be shown in each drawing is different, and sometimes different proportions are used. It should be recognized that relative terms such as "above", "below", "top", "bottom", "above" and "below" shown in the drawings can be used to describe the relationship between various elements. These relative terms are intended to cover different orientations of elements other than the orientations depicted in the drawings. For example, if the device is inverted relative to the view in the drawings, for example, an element described as "above" another element will now be below the element. It should also be understood that, unless otherwise specified or indicated, the terms "first", "second", "third" and the like in the specification are only used to distinguish between the various components, elements, steps, etc. in the specification, rather than to represent the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0034] [Example 1]

[0035] like Figure 1 As shown, this embodiment provides a wafer processing method, comprising the following steps:

[0036] S1, providing a wafer, wherein the wafer has a region to be cut;

[0037] S2, forming a metal layer of target thickness on the back side of the wafer, wherein the metal layer has an opening, the opening is formed by a photolithography process, and the opening exposes the area to be cut; and

[0038] S3, cutting the wafer along the opening.

[0039] In step S1, in order to make the power device have a lower on-resistance, the wafer is a wafer that has been thinned. After the thinning process, the thickness of the wafer can be reduced from 50 μm to 100 μm to 20 μm to 45 μm.

[0040] It can be understood that the area to be cut refers to the area where the wafer is subsequently sliced ​​(cut) to form a plurality of chips.

[0041] By thinning the wafer, the on-resistance of the device can be reduced, but this will also reduce the strength of the wafer.

[0042] In step S2, see Figure 2 By forming a metal layer 20 of a target thickness on the back side of the wafer 10 to increase the strength of the wafer 10 , the reliability of the device can be improved, and the metal layer 20 will not affect the on-resistance of the device.

[0043] Optionally, the metal layer 20 is formed on the back side of the wafer 10 by chemical vapor deposition (CVD), physical vapor deposition (PVD), chemical plating, electroplating, or the like.

[0044] Preferably, the target thickness may be specifically 5 μm to 60 μm. Within this thickness range, it can be ensured that the formation of the metal layer can increase the wafer strength, thereby improving the device reliability. The specific value of the target thickness may be adjusted according to actual needs.

[0045] Furthermore, the technicians of the present invention have found that the increase in the thickness of the metal layer will increase the difficulty of overall scribing. Specifically, the wafer is generally cut with a diamond blade. When the thickness of the metal layer on the back of the wafer is less than 3μm, the diamond blade can be used to directly scribing the wafer and the metal layer together. In this process, the metal layer is thin and not easy to adhere to the diamond blade; but when the thickness of the metal layer is greater than 5μm, the excessively thick metal will adhere to the diamond blade, causing the diamond blade to fail to scribing normally. If pure laser scribing or a combination of blade and laser scribing is used, it is necessary to add special laser scribing equipment, which will increase the equipment cost, and the processing efficiency is much lower than that of diamond blade scribing, which will eventually lead to increased costs. In addition, when the thickness of the metal layer is greater than 35μm, the process difficulty of laser scribing will also increase significantly. Conventional laser scribing equipment has been difficult to cope with, and it is difficult to achieve stable wafer scribing. It is necessary to purchase additional higher-power laser scribing equipment, which will further increase costs.

[0046] That is to say, if laser scribing equipment is used for scribing, more expensive laser scribing equipment needs to be introduced, and new immature processes are also needed. However, when the above-mentioned wafer processing method provided in this embodiment is used and the photolithography process is used to complete the scribing of the metal layer part, only the photolithography equipment and mature photolithography process generally required by the wafer factory need to be used. The equipment cost can be reduced and the processing efficiency can be improved.

[0047] Please combine Figure 4-5 In this embodiment, the method of forming the opening specifically includes:

[0048] After a metal layer 20 with a target thickness is formed on the back side of the wafer 10 , a patterned mask layer 30 is formed on the surface of the metal layer 20 , and the metal layer 20 is etched using the patterned mask layer 30 as a mask to form the opening 100 .

[0049] That is, Figure 2 As shown in , the wafer processing method provided in this embodiment specifically includes the following steps:

[0050] S1, providing a wafer 10, wherein the wafer 10 has a region to be cut;

[0051] S21, forming a metal layer 20 with a target thickness on the back side of the wafer 20;

[0052] S22, performing a photolithography process to form a patterned mask layer 30 on the surface of the metal layer 20, and etching the metal layer 20 using the patterned mask layer 30 as a mask to form an opening 100, wherein the opening 100 exposes the cutting area;

[0053] S3 , cutting the wafer 10 along the opening 100 .

[0054] The wafer processing method provided in this embodiment may further include a step of removing the mask layer 30, which may be performed before cutting the wafer 10 (i.e., after step S22) or after cutting the wafer 10 (i.e., after step S3). In this way, the processing of the wafer 10 is completed.

[0055] In this embodiment, the mask layer 30 may specifically include a first photoresist layer. After the opening 100 is formed, the first photoresist layer can be removed by an ashing process, which is simple to operate. In other embodiments, the mask layer 30 also includes an anti-reflection layer, etc. The anti-reflection layer is formed on the surface of the metal layer 20, and the first photoresist layer covers the anti-reflection layer. After the opening 100 is formed, the anti-reflection layer and the first photoresist layer can be removed by a conventional process.

[0056] In step S3 , since the metal layer 20 has formed the opening 100 , the wafer can be cut using only a diamond blade.

[0057] This embodiment also provides a chip, which is processed by the wafer processing method described in this embodiment. Therefore, the chip provided in this embodiment has a chip thickness of 20μm to 45μm, and a thickness of the back metal layer thereof is 5μm to 60μm. Therefore, when the chip is applied to a power device, the reliability of the power device is guaranteed and has a lower on-resistance.

[0058] [Example 2]

[0059] Please combine Figure 8 to Figure 10 , which is different from the first embodiment, in this embodiment, the method of forming the opening 100 specifically includes:

[0060] forming a sacrificial layer 40 on the back side of the wafer 10;

[0061] Etching the sacrificial layer 40 by using a photolithography process so that the sacrificial layer 40 only covers the area to be cut; and,

[0062] When forming the metal layer 20 , the metal layer 20 is formed on the back side of the wafer 10 except for the area where the sacrificial layer 40 is located, and then the sacrificial layer 40 is removed to form the opening 100 .

[0063] That is, Figure 3 As shown, the wafer processing method provided by the embodiment of the present invention specifically includes the following steps:

[0064] S1, providing a wafer 10, wherein the wafer 10 has a region to be cut;

[0065] S20, forming a sacrificial layer 40 on the back side of the wafer 10, and etching the sacrificial layer 40 by using a photolithography process so that the sacrificial layer 40 only covers the area to be cut;

[0066] S21, forming a metal layer 20 of a target thickness on the back side of the wafer 10, wherein the metal layer 20 is formed in an area on the back side of the wafer 10 except for an area where the sacrificial layer 40 is located;

[0067] S23, removing the sacrificial layer 40 to form the opening 100;

[0068] S3 , cutting the wafer 10 along the opening 100 .

[0069] In this example, the sacrificial layer 40 may specifically include a second photoresist layer. The second photoresist layer may be removed by an ashing process to form the opening 100, which is simple to operate. In some other embodiments, the sacrificial layer 40 may further include a second anti-reflection layer, etc. The second anti-reflection layer covers the area to be cut, the second photoresist layer covers the second anti-reflection layer, and both the second anti-reflection layer and the second photoresist layer may be removed by a conventional process to obtain the opening 100.

[0070] This embodiment also provides a chip, which is processed by the wafer processing method described in this embodiment. Therefore, similarly, the chip provided in this embodiment has a chip thickness of 20 μm to 45 μm, and a thickness of the back metal layer of 5 μm to 60 μm. When the chip is applied to a power device, the reliability of the power device is guaranteed and has a lower on-resistance.

[0071] In summary, the wafer processing method provided by the embodiment of the present invention includes: providing a wafer, the wafer having an area to be cut; forming a metal layer of a target thickness on the back of the wafer, the metal layer having an opening, the opening exposing the area to be cut; and cutting the wafer along the opening; wherein the opening is formed by a photolithography process. The wafer processing method provided by the present invention can improve the reliability of the device by forming a metal layer of a target thickness on the back of the wafer to increase the strength of the wafer, and the metal layer will not affect its on-resistance. Furthermore, the slicing of the metal layer portion is achieved by a photolithography process, so that the equipment cost for slicing the metal layer can be reduced, and the processing efficiency can also be improved.

[0072] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0073] In addition, it should be recognized that the above description is only a description of the preferred embodiment of the present invention, and is not any limitation to the scope of the present invention. Any changes and modifications made by ordinary technicians in the field of the present invention based on the above disclosure are within the scope of protection of the claims.

Claims

1. A wafer processing method, characterized in that: include: Providing a wafer, wherein the wafer has a region to be cut; forming a metal layer of target thickness on the back side of the wafer, wherein the metal layer has an opening, and the opening exposes the area to be cut; as well as, cutting the wafer along the opening; Wherein, the opening is formed by a photolithography process.

2. The wafer processing method according to claim 1, characterized in that: The method of forming the opening comprises: A patterned mask layer is formed on the surface of the metal layer, and the metal layer is etched using the patterned mask layer as a mask to form the opening.

3. The wafer processing method according to claim 1, characterized in that: The mask layer includes a first photoresist layer.

4. The wafer processing method according to claim 1, characterized in that: The method of forming the opening comprises: forming a sacrificial layer on the back side of the wafer; Etching the sacrificial layer by using a photolithography process so that the sacrificial layer only covers the area to be cut; and, When forming the metal layer, the metal layer is formed on the back side of the wafer in an area other than the area where the sacrificial layer is located, and then the sacrificial layer is removed to form the opening.

5. The wafer processing method according to claim 4, characterized in that: The sacrificial layer includes a second photoresist layer.

6. The wafer processing method according to claim 1, characterized in that: The thickness of the wafer is 20 μm to 45 μm.

7. The wafer processing method according to claim 1, characterized in that: The wafer is obtained by thinning.

8. The wafer processing method according to claim 1, characterized in that: The target thickness is 5 μm to 60 μm.

9. The wafer processing method according to claim 1, wherein: The method for cutting the wafer includes: cutting with a diamond blade.

10. A chip, characterized in that: The chip is processed by the wafer processing method according to any one of claims 1 to 9.

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