Instruction processing method and device, electronic equipment and readable medium

Abstract

The embodiment of the invention provides an instruction processing method and device, electronic equipment and a readable medium, and relates to the technical field of computers.The method comprises the steps that an instruction sequence obtained by compiling a compiled function and a jump instruction list are obtained; for any conditional jump instruction recorded in the jump instruction list, under the condition that the jump interval of the conditional jump instruction exceeds the upper limit of the set interval of the conditional jump instruction, determining a machine instruction corresponding to the conditional jump instruction in the instruction sequence as a first instruction to be expanded; the first to-be-expanded instruction is used for realizing the jump function of the condition jump instruction. Setting an expansion space in a space outside the instruction sequence, and adding a first target instruction in the expansion space to replace the first to-be-expanded instruction for skipping; the first target instruction comprises a jump instruction of which the set interval upper limit is greater than the set interval upper limit of the first to-be-expanded instruction. In this way, the overall probability of occurrence of subsequent function operation errors caused by the jump range exceeding the upper limit of the set interval can be reduced.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an instruction processing method, device, electronic device and readable medium. Background Art

[0002] At present, it is often necessary to compile the source program to convert the source program into machine instructions. In the virtual machine (VM) scenario, the source program needs to be converted into intermediate representation (IR) instructions through the Just In Time (JIT) compiler at the back end of the virtual machine, and then the IR instructions are assembled into machine instructions. Among them, the source program can be composed of multiple functions. During the compilation process, it is specifically necessary to convert the code statements included in each function into IR instructions first, and then convert the IR instructions into machine instructions. For the conditional jump instructions in the IR instructions, the range of instruction intervals that can be jumped is often limited. For example, the upper limit of the interval that the conditional jump instructions of the arm64 architecture can jump is 2 19 -1 instruction, while the upper limit of the jump interval of conditional jump instructions in some architectures is 2 16 -1 instruction. In this way, the jump interval of the conditional jump instruction will exceed the upper limit of the established jump interval, which will cause errors in the subsequent function execution. Summary of the invention

[0003] The embodiments of the present invention provide an instruction processing method, device, electronic device and readable medium, which can process conditional jump instructions to reduce the probability of a jump interval exceeding a predetermined upper limit of a jumpable interval, thereby causing errors in subsequent function execution.

[0004] In order to solve the above problem, an embodiment of the present invention discloses an instruction processing method, the method comprising:

[0005] Obtaining an instruction sequence and a jump instruction table obtained by compiling a compiled function; the jump instruction table is used to record a conditional jump instruction for a backward jump in the compiled function;

[0006] For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded; the first instruction to be expanded is used to implement the jump function of the conditional jump instruction;

[0007] An expansion space is set outside the instruction sequence, and a first target instruction is added to the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose predetermined interval upper limit is greater than the predetermined interval upper limit of the first instruction to be expanded.

[0008] On the other hand, an embodiment of the present invention discloses an instruction processing device, the device comprising:

[0009] An acquisition module, used for acquiring an instruction sequence and a jump instruction table obtained by compiling a compiled function; the jump instruction table is used for recording a conditional jump instruction for a backward jump in the compiled function;

[0010] A first determination module is used for determining, for any conditional jump instruction recorded in the jump instruction table, a machine instruction corresponding to the conditional jump instruction in the instruction sequence as a first instruction to be expanded when a jump interval of the conditional jump instruction exceeds a predetermined interval upper limit of the conditional jump instruction; the first instruction to be expanded is used to implement a jump function of the conditional jump instruction;

[0011] The first expansion module is used to set an expansion space in the space outside the instruction sequence, and add a first target instruction in the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded.

[0012] On the other hand, an embodiment of the present invention discloses an electronic device, comprising: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the aforementioned method.

[0013] The embodiment of the present invention further discloses a machine-readable medium on which instructions are stored. When executed by one or more processors, the processors are enabled to execute the method described above.

[0014] The embodiment of the present invention includes the following advantages: In the instruction processing method provided by the embodiment of the present invention, an instruction sequence and a jump instruction table obtained by compiling the compiled function are obtained; the jump instruction table is used to record the conditional jump instruction of the backward jump in the compiled function. For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded. Finally, an expansion space is set in the space outside the instruction sequence, and a first target instruction is added to the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded. In this way, the jump interval of the conditional jump instruction of the backward jump can be avoided from exceeding the established interval upper limit of the jumpable jump by expansion, thereby reducing the overall probability of subsequent function operation errors caused by excessive jump range.

[0015] In the embodiment of the present invention, by adding the first target instruction in the expansion space outside the instruction sequence, it is avoided to affect other conditional jump instructions. For example, after obtaining the instruction sequence, if the first target instruction is added inside the instruction sequence, the number of instructions included in the instruction sequence will be increased, and then the number of instructions between the instruction address and the destination address of other conditional jump instructions may be increased. In this way, the conditional jump instruction whose original jump interval is not greater than the established interval upper limit of the conditional jump instruction may have a situation where the jump interval is not greater than the established interval upper limit of the conditional jump instruction, thereby causing the need to judge again whether the conditional jump instruction that was previously determined to not need to be expanded needs to be expanded, and causing the problem of introducing more conditional jump instructions that need to be expanded. Therefore, by adding the first target instruction in the expansion space outside the instruction sequence, expansion can be realized simply and quickly. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for describing the embodiments of the present invention are briefly introduced below.

[0017] Figure 1 is a flowchart of a method for processing instructions provided by an embodiment of the present invention;

[0018] Figure 2 is a partial schematic diagram of an instruction sequence provided by an embodiment of the present invention;

[0019] Figure 3 It is a schematic diagram of a processing flow of a compiled function provided by an embodiment of the present invention;

[0020] Figure 4 is a schematic diagram of another processing flow of a compiled function provided by an embodiment of the present invention;

[0021] Figure 5 is a partial schematic diagram of another instruction sequence provided by an embodiment of the present invention;

[0022] Figure 6 It is a schematic diagram of a processing flow of a conditional jump instruction provided by an embodiment of the present invention;

[0023] Figure 7 is a block diagram of an instruction processing device provided by an embodiment of the present invention;

[0024] Figure 8 It is a structural schematic diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0026] Reference Figure 1 , shows a flowchart of a method for processing instructions provided by an embodiment of the present invention, which can be applied to electronic devices. Figure 1 As shown, the instruction processing method specifically includes the following steps:

[0027] Step 101, obtaining an instruction sequence and a jump instruction table obtained by compiling a compiled function; the jump instruction table is used to record conditional jump instructions for backward jumps in the compiled function;

[0028] In the embodiment of the present invention, the compiled function may be any function in the compiled source program. The instruction sequence may be obtained by compiling the compiled function. Exemplarily, the code statements included in the compiled function may be first converted into IR instructions, and then the IR instructions may be converted into machine instructions one by one. Accordingly, the converted machine instructions constitute the instruction sequence of the compiled function.

[0029] The jump instruction table can be recorded in the process of generating the instruction sequence. Specifically, in the process of generating the instruction sequence, the conditional jump instruction for jumping backward in the IR instruction can be recorded, and the IR instruction can be converted into a first machine instruction to obtain the jump instruction table. In this way, all conditional jump instructions for jumping backward in the compiled function can be located based on the jump instruction table. Among them, the conditional jump instruction can be divided into a conditional jump instruction for jumping backward and a conditional jump instruction for jumping forward. In the destination address formed after the jump, the backward jump indicates that the destination address of the conditional jump instruction is greater than the instruction address, and the forward jump indicates that the destination address of the conditional jump instruction is less than the instruction address.

[0030] Step 102: For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded; the first instruction to be expanded is used to implement the jump function of the conditional jump instruction.

[0031] Among them, the machine instruction corresponding to the conditional jump instruction refers to: the machine instruction converted from the conditional jump instruction, which is essentially also a conditional jump instruction, which can realize the jump function of the conditional jump instruction, but the representation form is converted into the form of machine code, that is, the machine instruction corresponding to the conditional jump instruction is a conditional jump instruction in the form of machine code. The jump interval can also be called the jump instruction interval, and the jump interval is used to characterize the number of instructions between the destination address where the conditional jump instruction is located after the jump and the instruction address where the conditional jump instruction is located before the jump, that is, the jump interval is used to characterize the number of instructions that the conditional jump instruction jumps across when it jumps. The destination address of the conditional jump instruction points to an instruction in the instruction sequence, and the instruction address of the conditional jump instruction points to the position of the machine instruction corresponding to the conditional jump instruction in the instruction sequence. The established interval upper limit can also be called the maximum instruction interval, which is used to characterize the maximum number of instructions between the destination address and the instruction address supported by the conditional jump instruction, that is, the established interval upper limit is used to characterize the maximum number of instructions supported when the conditional jump instruction jumps, which is determined by the definition of the instruction architecture.

[0032] At present, conditional jump instructions are used for jumps within the function to be compiled, but the range of instruction intervals that the conditional jump instruction can jump to is limited, and there is a predetermined upper limit on the interval. In this way, when the function to be compiled is large, that is, when the number of instructions contained is large, it is easy for the jump interval of the conditional jump instruction to exceed the predetermined upper limit. For example, assuming that the destination address of the conditional jump instruction is 0x00090000, the instruction address is 0x00000000, and the number of instructions between the destination address 0x00090000 and the instruction address 0x00000000 is 2 18 Article 2 18 Greater than the upper limit of the established interval 2 17 Therefore, the jump interval of the conditional jump instruction exceeds the established interval upper limit.

[0033] Among them, the upper limit of the established interval of the instruction is determined by the instruction architecture followed. Under the same instruction architecture, there are jump instructions with different upper limits of the established interval. Exemplarily, the beq instruction definition in the instruction architecture is: beq rj, rd, offs16. Among them, offs16 represents a 16-bit immediate number, rj, and rd represent registers. When this instruction is executed, it realizes the function of comparing the value of register rj with the value of rd. If the two are equal (that is, the conditions defined by the instruction are met), jump to the destination address to execute the instruction of the destination address, otherwise execute the next instruction of the instruction sequentially.

[0034] The destination address of the beq instruction can be obtained by shifting the immediate value represented by offs16 2 bits to the left and adding the address value of the beq instruction (i.e. the instruction address). The upper limit of the interval that the beq instruction can jump to is 2. 16 -1. The instruction architecture also defines the b instruction. Specifically, the instruction architecture defines the jump instruction b instruction as: b offs26. Among them, offs26 represents a 26-bit immediate value, and the b instruction is used to jump directly to the destination address. The destination address of the b instruction is obtained by shifting the immediate value represented by offs26 to the left by 2 bits and adding the address value where the b instruction is located. The upper limit of the interval that the b instruction can jump is 2 26 -1. The range of jumps that can be made by the b instruction is larger and wider, and the upper limit of the established interval is larger.

[0035] Specifically, for any conditional jump instruction recorded in the jump instruction table, the destination address and instruction address of the conditional jump instruction can be determined first, and then the number of instructions between the destination address and the instruction address can be counted. Exemplarily, when the instruction length is fixed, the difference between the destination address and the instruction address of the conditional jump instruction can be calculated, and then the ratio of the difference to the address length occupied by a single instruction can be calculated to obtain the jump interval of the conditional jump instruction. Then, based on the operation code of the conditional jump instruction, the established interval upper limit corresponding to the operation code can be found from the preset operation code and the interval upper limit correspondence relationship. Then the established interval upper limit of the conditional jump instruction is obtained. The jump interval of the conditional jump instruction is compared with the established interval upper limit of the conditional jump instruction. If the jump interval of the conditional jump instruction is greater than the established interval upper limit, it can be determined that the jump interval of the instruction exceeds the established interval upper limit, and it can be determined that the conditional jump instruction cannot jump to the destination address normally. The conditional jump instruction needs to be expanded, and expansion space is set in the space outside the instruction sequence. Accordingly, the machine instruction corresponding to the conditional jump instruction can be used as the first expansion instruction and subsequently expanded to ensure that the jump function of jumping normally to the destination address of the conditional jump instruction can be realized when the instruction sequence is subsequently executed.

[0036] Step 103, setting an expansion space outside the instruction sequence, and adding a first target instruction in the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded.

[0037] Among them, the expansion space can be a first target instruction added to replace the first instruction to be expanded to implement the jump function of the first instruction to be expanded, and space can be applied for at the end of the instruction sequence as the expansion space. Specifically, a block of memory space can be applied for as the expansion space starting from the end address of the memory space occupied by the instruction sequence. Among them, the size of the expansion space can be no less than the space required for the first target instruction to be added to ensure that the first target instruction can be added normally. Among the jump instructions included in the first target instruction, there is a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded. Exemplarily, the first instruction to be expanded can be the above-mentioned beq instruction, and the established interval upper limit of the beq instruction is 2 16 -1, the first target instruction may include the above b instruction, and the upper limit of the interval of the b instruction is 2 26 Since the upper limit of the predetermined interval of the jump instruction in the first target instruction is larger, the jump function of the first instruction to be expanded is realized by means of the first target instruction, and the same jump interval as the first instruction to be expanded is realized, which can ensure normal jump to a certain extent.

[0038] The number of the first target instructions is not unique. For example, the number of the first target instructions can be multiple, that is, the jump function of the first instruction to be expanded is realized by multiple instructions, and the limit of the established interval upper limit of the first instruction to be expanded is released, so that the jump function of the first instruction to be expanded can be realized, and the address that jumps to the address that exceeds the established interval upper limit of the first instruction to be expanded is realized. In this way, it is equivalent to realizing the expansion of the first instruction to be expanded. Among them, the jump function of the first instruction to be expanded refers to: jumping to the destination address for execution or jumping to the next instruction for execution under different circumstances. Exemplarily, it can be to jump to the destination address for execution when the conditions defined by the instruction are met, and to jump to the next instruction of the instruction for execution when the conditions are not met. A jump instruction with a predetermined interval upper limit greater than the predetermined interval upper limit of the first instruction to be expanded can be selected in the instruction architecture to be followed as the first target instruction. Among them, the instruction architecture to be followed can be set in advance as needed. Exemplarily, the instruction architecture to be followed can be a Reduced Instruction Set Computer (RISC) architecture.

[0039] In summary, in the instruction processing method provided by the embodiment of the present invention, the instruction sequence and the jump instruction table obtained by compiling the compiled function are obtained; the jump instruction table is used to record the conditional jump instruction of the backward jump in the compiled function. For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded; the first instruction to be expanded is used to implement the jump function of the conditional jump instruction. Finally, an expansion space is set in the space outside the instruction sequence, and a first target instruction is added to the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded, which is used to replace the first instruction to be expanded to implement the jump function of the first instruction to be expanded. In this way, it can be avoided that the jump interval of the conditional jump instruction of the backward jump exceeds the established interval upper limit that can be jumped, thereby reducing the overall probability of subsequent function operation errors caused by the jump range exceeding the established interval upper limit.

[0040] In the embodiment of the present invention, by adding the first target instruction in the expansion space outside the instruction sequence, it is avoided to affect other conditional jump instructions. For example, after obtaining the instruction sequence, if the first target instruction is added inside the instruction sequence, the number of instructions included in the instruction sequence will be increased, and then the number of instructions between the instruction address and the destination address of other conditional jump instructions may be increased. In this way, the conditional jump instruction whose original jump interval is not greater than the established interval upper limit of the conditional jump instruction may have a situation where the jump interval is not greater than the established interval upper limit of the conditional jump instruction, thereby causing the need to judge again whether the conditional jump instruction that was previously determined to not need to be expanded needs to be expanded, and causing the problem of introducing more conditional jump instructions that need to be expanded. Therefore, by adding the first target instruction in the expansion space outside the instruction sequence, expansion can be realized simply and quickly.

[0041] Optionally, in an embodiment of the present invention, the above instruction sequence includes machine instructions converted based on the IR instructions corresponding to the compiled function. In the instruction sequence generation stage, the instruction sequence and the jump instruction table in an embodiment of the present invention can be generated based on the following steps:

[0042] Step S21: In the case where any of the IR instructions is a conditional jump instruction, if the IR instruction is used for a backward jump, the IR instruction is converted into a first machine instruction, and the IR instruction is associated with the first machine instruction to generate the jump instruction table. If the IR instruction is used for a forward jump, the IR instruction is converted into a second machine instruction.

[0043] Step S22: When any of the IR instructions is not a conditional jump instruction, convert the IR instruction into a third machine instruction to generate the instruction sequence.

[0044] In an embodiment of the present invention, a jump instruction table and an instruction sequence can be generated based on the above steps S21 to S22. Accordingly, in the above step 101, the jump instruction table and the instruction sequence obtained based on steps S21 to S22 can be obtained, that is, the jump instruction table and the instruction sequence can be generated first, and then the generated jump instruction table and the instruction sequence can be directly read to implement the acquisition operation in step 101. Alternatively, the jump instruction table and the instruction sequence can also be directly generated according to the generation method of the above steps S21 to S22, and then the acquisition operation in step 101 can be implemented, and the embodiment of the present invention does not limit this. Among them, in the compilation link of the compiled function, the compiled function can be first converted into IR instructions. Then enter the stage of converting the IR instructions into machine instructions, that is, start to execute the above steps S21 to S22.

[0045] The IR instructions corresponding to the compiled function include the IR instructions obtained by converting the compiled function. The IR instructions corresponding to the compiled function can be converted into machine instructions, and the converted machine instructions constitute an instruction sequence. Specifically, the IR instructions corresponding to the compiled function can be traversed, that is, processed one by one to convert the IR instructions into machine instructions. For any IR instruction corresponding to the compiled function that is traversed. It can be determined whether the IR instruction is a conditional jump instruction. Exemplarily, the opcode of the IR instruction can be read from the instruction register first. Then the opcode is compared with the preset opcode set. Among them, the opcode set includes the opcodes of all conditional jump instructions in the instruction architecture. If the opcode set includes the read opcode, it can be determined that the IR instruction is a conditional jump instruction. Assume that the opcode of the IR instruction read from the instruction register is 0001, and the preset opcode set includes the opcode: 0001. Then it can be determined that the IR instruction is a conditional jump instruction. Further, the operand of the IR instruction can be read, and based on the operand read and the preset jump direction rule, it can be determined whether the IR instruction is used for forward jump or backward jump. Specifically, if the operand read meets the jump direction rule corresponding to the forward jump, it can be determined that the IR instruction is used for forward jump. If the operand read meets the jump direction rule corresponding to the backward jump, it can be determined that the IR instruction is used for backward jump. If the opcode is not included in the opcode set, it can be determined that the IR instruction is not a conditional jump instruction.

[0046] Specifically, if the instruction address and the destination address are read, and the offset between the destination address and the instruction address is a positive number, it can be determined that the operand read meets the jump direction rule corresponding to the forward jump, and the IR instruction is used for the forward jump; otherwise, it can be directly determined that the operand read meets the jump direction rule corresponding to the backward jump, and the IR instruction is used for the backward jump. Exemplarily, it is assumed that the operands include the instruction address: 0x00400100 and the destination address 0x00400200.

[0047] Since the offset between the read destination address and the instruction address = 0x00400200-0x00400100 = 0x100, the offset is a positive number, therefore, it can be determined that the read operand complies with the jump direction rule corresponding to the forward jump, and the IR instruction is used for forward jump.

[0048] Further, if the IR instruction is a conditional jump instruction and is used for backward jump, the conditional jump instruction can be converted into a machine instruction to obtain a first machine instruction. Then the conditional jump instruction is recorded in a preset record table. Wherein, the preset record table represents a table for recording the conditional jump instruction of backward jump, and the preset record table is empty in the initial state. Exemplarily, the preset record table can adopt data structures such as arrays and queues. Since it is still in the instruction sequence generation stage at this time, the instruction sequence has not been generated, and the machine instruction after the conditional jump instruction has not been determined. Therefore, for the conditional jump instruction of backward jump, it is not possible to fully determine whether it is necessary to expand the capacity, that is, it is impossible to fully determine the number of instructions between the destination address and the instruction address, which leads to the inability to determine whether the expansion condition is met: the jump interval exceeds the established interval upper limit of the conditional jump instruction, then in the instruction sequence generation stage, only the conditional jump instruction of backward jump is added to the preset record table, after all IR instructions are converted into machine instructions, that is, after the complete instruction sequence of the compiled function is obtained, the conditional jump instruction of backward jump is processed.

[0049] Specifically, the relevant information of the conditional jump instruction can be recorded in the preset record table, for example, the first machine instruction, instruction name, instruction address, etc. corresponding to the conditional jump instruction can be recorded, so as to associate the conditional jump instruction. If the IR instruction is not a conditional jump instruction, or is a conditional jump instruction but is used for forward jump, then there is no need to expand backward, and the IR can be converted into a machine instruction without recording it in the preset record table.

[0050] Specifically, the operation of converting IR instructions into machine instructions can be implemented by JIT based on a preset conversion logic. Wherein, when the IR instruction is not a conditional jump instruction, the converted machine instruction can be regarded as a third machine instruction. When the IR instruction is a conditional jump instruction but is used to jump forward, the converted machine instruction can be regarded as a second machine instruction. The machine instructions converted from each IR instruction constitute an instruction sequence corresponding to the compiled function. The preset record table can be a pre-created list for storing conditional jump instructions for backward jumps in the function to be compiled, and the preset record table can also be called a branch jump list. The preset record table can correspond to the function to be compiled one by one to avoid confusing the conditional jump instructions for backward jumps in different functions to be compiled, thereby facilitating processing. Exemplarily, an array can be created as a preset record table. Wherein, an element in the array can store relevant information of a conditional jump instruction for backward jump, and the storage space occupied by an element can be set to the upper limit value of the relevant information of the conditional jump instruction to ensure normal storage.

[0051] After all IR instructions corresponding to the compiled function are processed according to the above steps S21 to S22, that is, after all IR instructions corresponding to the compiled function are converted into machine instructions, a complete instruction sequence is obtained, and the preset record table records all the conditional jump instructions for backward jumps in the compiled function. The jump interval of these conditional jump instructions for backward jumps may exceed the established interval upper limit. Accordingly, the current preset record table can be directly determined as the jump instruction table.

[0052] In the embodiment of the present invention, in the process of generating an instruction sequence, for any IR instruction corresponding to the compiled function, if the IR instruction is a conditional jump instruction and is used for a backward jump, the IR instruction is converted into a machine instruction, so as to record the IR instruction while generating the instruction sequence. That is, in the process of generating the instruction sequence, the conditional jump instruction for the backward jump is first added to the jump instruction table, so that the conditional jump instruction for the backward jump in the compiled function can be easily known based on the jump instruction table, thereby facilitating the expansion of the conditional jump instruction for the backward jump.

[0053] Optionally, if the IR instruction is used to jump forward, after converting the IR instruction into a second machine instruction, the embodiment of the present invention may further include the following steps:

[0054] Step S23: If the IR instruction is used to jump forward and the jump interval exceeds the established interval upper limit of the IR instruction, the second machine instruction is determined as the second instruction to be expanded; the second instruction to be expanded is used to implement the jump function of the IR instruction.

[0055] Step S24: adding a second target instruction based on the second instruction to be expanded to replace the second instruction to be expanded for jumping; the second target instruction includes a jump instruction whose predetermined interval upper limit is greater than the predetermined interval upper limit of the second instruction to be expanded.

[0056] In the embodiment of the present invention, after generating the second machine instruction, for the conditional jump instruction of jumping forward, since the conditional jump instruction is a forward jump, the previous machine instruction has been determined. Therefore, for the conditional jump instruction of jumping forward, the destination address of the conditional jump instruction of jumping forward is known at this time, and the number of instructions spaced between the destination address and the instruction address can be fully determined at present, thereby leading to the judgment whether the expansion condition is met. Therefore, in the instruction sequence generation stage, the conditional jump instruction of jumping forward can be processed. That is, during the conversion period of the conversion operation of the IR instruction in the compiled function, the conditional jump instruction of jumping forward can be expanded according to the second target instruction. Among the jump instructions included in the second target instruction, there is a jump instruction whose established interval upper limit is greater than the established interval upper limit of the second instruction to be expanded.

[0057] For example, the second to-be-expanded instruction may be the beq instruction, and the upper limit of the interval of the beq instruction is 2. 16 -1, the second target instruction may include the above b instruction, the upper limit of the interval of the b instruction is 2 26 -1. Since the upper limit of the established interval of the jump instruction in the second target instruction is larger, the jump function corresponding to the second instruction to be expanded is realized by means of the second target instruction, and the same jump interval as the second instruction to be expanded is realized, which can ensure normal jump to a certain extent and reduce the probability of errors in the subsequent function operation.

[0058] Specifically, it is possible to determine in the instruction sequence generation stage whether the jump interval of the conditional jump instruction that jumps forward is greater than the established interval upper limit of the instruction. The destination address and the instruction address of the conditional jump instruction can be determined first, and then the number of instructions spaced between the destination address and the instruction address can be counted. Exemplarily, when the instruction length is fixed, the difference between the destination address and the instruction address of the conditional jump instruction can be calculated, and then the ratio of the difference to the address length occupied by a single instruction can be calculated to obtain the jump interval of the conditional jump instruction. Then, the established interval upper limit corresponding to the operation code of the conditional jump instruction can be searched from the preset operation code and the interval upper limit corresponding relationship based on the operation code of the conditional jump instruction. Then the established interval upper limit of the conditional jump instruction is obtained. The jump interval of the conditional jump instruction is compared with the established interval upper limit of the conditional jump instruction. If the jump interval is greater than the established interval upper limit, it can be determined that the conditional jump instruction cannot jump to the destination address normally, and the conditional jump instruction needs to be expanded. Accordingly, the second machine instruction converted from the conditional jump instruction can be used as the second expansion instruction and expanded to ensure that the jump function of jumping normally to the destination address of the conditional jump instruction can be realized when the instruction sequence is subsequently executed.

[0059] Among them, the number of second target instructions is not unique, for example, the number of second target instructions can be multiple. That is, the jump function of the second instruction to be expanded is realized by multiple instructions, and the restriction of the established interval upper limit of the second instruction to be expanded is released, so that the second instruction to be expanded jumps to an address exceeding the established interval upper limit of the second instruction to be expanded. In this way, it is equivalent to realizing the expansion of the second instruction to be expanded. Among them, the jump function of the second instruction to be expanded refers to jumping to the destination address for execution or jumping to the next instruction for execution under different circumstances. Exemplarily, it can be to jump to the destination address for execution when the conditions defined by the instruction are met, and to jump to the next instruction of the instruction for execution when the conditions are not met. A jump instruction with a predetermined interval upper limit greater than the predetermined interval upper limit of the second instruction to be expanded can be selected in the instruction architecture followed.

[0060] In an embodiment of the present invention, when an IR instruction is used to jump forward and the jump interval exceeds the established upper limit of the interval of the IR instruction, the second machine instruction corresponding to the IR instruction is used as the second instruction to be expanded. A second target instruction is added based on the second instruction to be expanded, wherein the second target instruction includes a jump instruction whose established upper limit of the interval is greater than the established upper limit of the interval of the second instruction to be expanded, and the second target instruction is used to replace the second instruction to be expanded to implement the jump function of the second instruction to be expanded. In this way, it is possible to avoid the jump interval of the conditional jump instruction for jumping forward from exceeding the established upper limit of the jumpable interval, thereby reducing the overall probability of subsequent function execution errors caused by the jump range exceeding the established upper limit of the interval.

[0061] Optionally, the adding of the second target instruction based on the second to-be-expanded instruction may specifically include:

[0062] Step S25a: Generate a first direct jump instruction having the same destination address as the second instruction to be expanded.

[0063] Step S25b: adding the first direct jump instruction after the second instruction to be expanded.

[0064] Step S25c: Generate a fourth machine instruction whose jump condition is opposite to that of the second instruction to be expanded and whose destination address is the instruction address of the next instruction of the first direct jump instruction.

[0065] Step S25b: Use the fourth machine instruction to replace the second instruction to be expanded in the instruction sequence; wherein the second target instruction includes the first direct jump instruction and the fourth machine instruction.

[0066] In an embodiment of the present invention, the second target instruction may include the above-mentioned fourth machine instruction and the first direct jump instruction. Specifically, the destination address of the second instruction to be expanded can be obtained, and a direct jump instruction in the form of a machine instruction can be generated based on the obtained destination address as the first direct jump instruction. And the first direct jump instruction is added after the second instruction to be expanded. Specifically, the first direct jump instruction can be added after the second instruction to be expanded in the instruction sequence. That is to say, the instruction sequence finally generated in the embodiment of the present invention includes machine instructions converted from the IR instructions corresponding to the compiled function, and machine instructions added to achieve the expansion of the conditional jump instruction for forward jump.

[0067] When generating the fourth machine instruction, the operation code of the third machine instruction may be obtained first, and then the jump mode corresponding to the operation code of the third machine instruction may be found in the architecture manual of the instruction architecture to obtain the jump mode of the third machine instruction. In the embodiment of the present invention, the first machine instruction, the second machine instruction, the third machine instruction and the fourth machine instruction respectively represent: a machine instruction converted from a conditional jump instruction for a backward jump, a machine instruction converted from a conditional jump instruction for a forward jump, a machine instruction converted from an unconditional jump instruction, and a machine instruction generated to implement the jump function of the second instruction to be expanded.

[0068] The jump mode may include: a first jump mode: if the condition defined by the instruction is met, the execution is jumped to the destination address, and if not, the next instruction is executed in sequence. And a second jump mode: if the condition defined by the instruction is not met, the execution is jumped to the destination address, and if it is met, the next instruction is executed in sequence. The first jump mode is opposite to the jump condition of the second jump mode in that the execution is jumped to the destination address and the execution is executed in sequence.

[0069] Specifically, the jump conditions for executing the jump to the destination address in the first jump mode and the second jump mode are: satisfying the condition defined by the instruction, and not satisfying the condition defined by the instruction. The jump conditions for sequentially executing the next instruction in the first jump mode and the second jump mode are: not satisfying the condition defined by the instruction, and satisfying the condition defined by the instruction.

[0070] Accordingly, when the jump mode of the third machine instruction is the first jump mode, a jump instruction whose jump mode is the second jump mode and whose operand type is consistent with the operand type of the second instruction to be expanded can be selected as a replacement instruction. The replacement instruction can be in the form of a machine instruction, and the condition defined by the replacement instruction is consistent with the condition content defined by the second instruction to be expanded. The value of each operand in the replacement instruction is set according to the value of each operand of the third machine instruction. Finally, the destination address of the replacement instruction is modified to the instruction address of the next instruction of the first direct jump instruction to obtain a fourth machine instruction.

[0071] For example, assuming that the second instruction to be expanded is a beq instruction, the jump mode of the beq instruction is the first jump mode, that is, if the condition defined by the instruction is met (the value of rj is equal to the value of rd), it jumps to the destination address for execution, and if it is not met, the next instruction is executed sequentially. Then the bne instruction with the second jump mode can be selected.

[0072] Among them, when the bne instruction is executed, if the condition defined by the instruction is met (the value of rj is equal to the value of rd), the next instruction is executed in sequence; if not, the instruction jumps to the destination address for execution. For the beq instruction and the bne instruction, the conditions defined by the instruction are both: the value of rj is equal to the value of rd. However, the jump conditions used by the two to execute the jump to the destination address are opposite. Specifically, the jump condition used by the beq instruction to execute the jump to the destination address is: the condition defined by the instruction is met, that is, the value of rj is equal to the value of rd. The jump condition used by the bne instruction to execute the jump to the destination address is: the condition defined by the instruction is not met, that is, the value of rj is not equal to the value of rd. The jump condition used by the beq instruction to execute the next instruction in sequence is: the condition defined by the instruction is not met, that is, the value of rj is not equal to the value of rd. The jump condition used by the bne instruction to execute the next instruction in sequence is: the condition defined by the instruction is met, that is, the value of rj is equal to the value of rd.

[0073] Furthermore, the second instruction to be expanded in the instruction sequence can be replaced by the fourth machine instruction. In this way, the fourth machine instruction combined with the first direct jump instruction can realize the jump function of the second instruction to be expanded, thereby replacing the second instruction to be expanded to realize the jump function of the second instruction to be expanded. Specifically, taking the address length occupied by a single instruction as 4, rj as $r4, and rd as $r5 as an example, Figure 2 is a partial schematic diagram of an instruction sequence provided by an embodiment of the present invention, such as Figure 2 As shown, the part above the dotted line represents the local instruction sequence before expansion, and the part below the dotted line represents the local instruction sequence after expansion. Assuming that the destination address of the second instruction to be expanded is L1', the instruction address of the second instruction to be expanded is L1, wherein the destination address L1' is before the instruction address L1, and the number of instructions between the destination address L1' and the instruction address L1 is greater than the predetermined interval upper limit of the second instruction to be expanded. Each instruction size is 4, so in the conventional process of generating an instruction sequence, the next instruction of the second instruction to be expanded (the machine instruction converted from the next IR instruction of the IR instruction corresponding to the second instruction to be expanded) is stored at the L1+4 position. N1 represents the next instruction of the second instruction to be expanded, and the condition defined by the second instruction to be expanded is rj=rd. Then the jump function of the second instruction to be expanded that needs to be implemented is: if rj=rd, jump to the destination address L1' to execute X1, otherwise (i.e. rj≠rd), execute the next instruction of the second instruction to be expanded sequentially, i.e. execute: N1 at the L1+4 position.

[0074] Taking the first direct jump instruction as instruction b as an example, the first direct jump instruction can be expressed as b L1'. In order to expand the second instruction to be expanded, it is necessary to add the first direct jump instruction after the second instruction to be expanded. At this time, the instruction at the position of L1+4 becomes the added first direct jump instruction: b L1'. Accordingly, because the first direct jump instruction is inserted into the instruction sequence, the position of the next instruction N1 of the second instruction to be expanded becomes L1+8, that is, the next instruction of the first direct jump instruction: bL1', which is actually the next instruction N1 of the second instruction to be expanded.

[0075] Since the jump condition of the fourth machine instruction is opposite to that of the second instruction to be expanded, and the destination address is the instruction address of the next instruction of the first direct jump instruction, that is, the destination address of the fourth machine instruction is L1+8, the jump function of the fourth machine instruction is: if rj=rd, then execute the next instruction in sequence: the first direct jump instruction at the position of L1+4: b L1'. Otherwise (that is, rj≠rd), jump to the destination address: L1+8 for execution, that is, execute the next instruction of the first direct jump instruction: N1.

[0076] In the case of using the fourth machine instruction to replace the second instruction to be expanded, if the fourth machine instruction is executed, if rj=rd, then jump to execute the first direct jump instruction: b L1', by executing the first direct jump instruction: b L1', jump to the destination address L1' of the second instruction to be expanded for execution. If rj≠rd, then jump to the destination address L1+8 position of the fourth machine instruction to execute N1. In this way, through the fourth machine instruction and the first direct jump instruction, it is achieved that: if rj=rd, then jump to the destination address L1' of the second instruction to be expanded for execution, otherwise (that is, rj≠rd) the next instruction of the second instruction to be expanded is executed sequentially: N1. In this way, even if additional machine instructions are introduced due to expansion, the execution logic is still consistent with that before expansion, so the impact on the instruction sequence is small.

[0077] Specifically, suppose that in the process of generating an instruction sequence, if the IR instruction corresponding to the instruction address L1 position is traversed (the IR instruction can be the above-mentioned beq instruction), after judging that the destination address L1' of the IR instruction corresponding to the instruction address L1 position is less than the instruction address L1, and the number of instructions between the destination address L1' and the instruction address L1 is greater than the established interval upper limit, it means that the IR instruction needs to be expanded, and then it can be expanded. Among them, the IR instruction corresponding to the instruction address L1 position refers to: the storage location of the converted machine instruction is L1. Specifically, after the expansion, beq$r4$r5L1' at the instruction address L1 position is replaced by Figure 2 The fourth machine instruction in the part below the dotted line: bne$r4$r5 L1+8, and the first direct jump instruction: b L1' is added at the L1+4 position. The position of the original next instruction N1 of the second instruction to be expanded is changed to the instruction address L1+8. By executing the fourth machine instruction at the L1 position: bne$r4$r5 L1+8, if $r4=$r5, it jumps to execute the first direct jump instruction at the L1+4 position: b L1', and then jumps to the destination address L1' of the second instruction to be expanded to execute instruction X1. If $r4≠$r5, it jumps to the destination address L1+8 of the fourth machine instruction to execute N1. It can then be executed in sequence.

[0078] In an embodiment of the present invention, in the process of generating an instruction sequence, when expanding the capacity for a conditional jump instruction that jumps forward, a fourth machine instruction is generated and replaces the second instruction to be expanded in the instruction sequence, and a first direct jump instruction is generated and added after the second instruction to be expanded. Adding a new instruction after the machine instruction (i.e., the second instruction to be expanded) corresponding to the conditional jump instruction that jumps forward will not increase the number of instructions before the second instruction to be expanded due to expansion. In this way, the instruction before the second instruction to be expanded will not be affected, and the conditional jump instruction before the second instruction to be expanded can be avoided, because the expansion causes the jump interval to be greater than the established interval upper limit, resulting in the need to judge again whether the conditional jump instruction that was previously determined to not need to be expanded needs to be expanded, and more conditional jump instructions that need to be expanded are introduced, thereby causing the problem of increased time complexity.

[0079] Optionally, in the embodiment of the present invention, the following steps may also be included:

[0080] Step S31, if the expansion mark of the function to be compiled is a first specified value, the IR instruction is directly converted into a machine instruction, indicating that there is no need to detect whether the IR instruction is a conditional jump instruction; the first specified value is used to indicate that the number of instructions corresponding to the function to be compiled is less than the minimum predetermined interval upper limit corresponding to the preset instruction architecture.

[0081] Step S32: If the expansion mark of the function to be compiled is a second specified value, then when the IR instruction belongs to a preset instruction set, the IR instruction is determined to be a conditional jump instruction to indicate that the jump direction of the IR instruction needs to be detected; the second specified value is used to indicate that the number of instructions is greater than the maximum predetermined interval upper limit of the instructions in the preset instruction set.

[0082] The number of instructions corresponding to the function to be compiled refers to the number of IR instructions converted from the function to be compiled. Exemplarily, after the instruction block corresponding to the compiled function is generated based on the code of the compiled function, the instruction block corresponding to the compiled function can be traversed to count the number of instructions included in the instruction block corresponding to the compiled function to obtain the number of instructions corresponding to the function to be compiled. The preset instruction architecture can be the instruction architecture followed by the function to be compiled.

[0083] The minimum established interval upper limit corresponding to the instruction architecture may be different, wherein the minimum established interval upper limit corresponding to the instruction architecture refers to the minimum value of the interval upper limit of the conditional jump instruction in the instruction architecture. The second specified value may have at least one value, and the number of the second specified values ​​is consistent with the type of the established interval upper limit of the conditional jump instruction in the instruction architecture. A second specified value corresponds to a predetermined interval upper limit. Accordingly, the preset instruction set corresponding to the second specified value includes an instruction identifier of a conditional jump instruction whose established interval upper limit is not greater than the established interval upper limit corresponding to the second specified value. Among them, the instruction identifier can be set as needed, and illustratively, the instruction identifier can be an instruction name. The second specified value is specifically used to indicate: the number of instructions is greater than the maximum established interval upper limit of the instructions in the preset instruction set corresponding to the second specified value, and is not greater than the maximum established interval upper limit of the instructions in the target preset instruction set. Among them, the maximum established interval upper limit of the instructions in the target preset instruction set is greater than the maximum established interval upper limit of the instructions in the preset instruction set corresponding to the second specified value. The maximum established interval upper limits of the instructions in the preset instruction set corresponding to different second specified values ​​are different.

[0084] For example, it is assumed that the conditional jump instructions in the preset instruction architecture include: beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction, bgeu instruction, beqz instruction, bnez instruction, bceqz instruction and bcnez instruction. Among them, the upper limit of the predetermined interval of beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction and bgeu instruction is 2. 16 -1, the upper limit of the interval of beqz, bnez, bceqz and bcnez instructions is 2 21 -1. That is, there are two conditional jump instructions in the instruction architecture with a certain interval limit: 2 16 -1 and 2 21 -1. Among them, 2 16 -1 is the minimum upper limit of the predetermined interval. Accordingly, the second specified value includes two values ​​corresponding to the two upper limits of the predetermined interval. Accordingly, the preset instruction set corresponding to the two second specified values ​​includes the upper limits of the predetermined interval being no greater than 2. 16 -1, and 2 21 -1. There are two preset instruction sets, one of which includes instruction identifiers of beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction and bgeu instruction, and the other preset instruction set includes instruction identifiers of beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction, bgeu instruction, beqz instruction, bnez instruction, bceqz instruction and bcnez instruction.

[0085] 0 represents the first specified value, 1 represents the corresponding 216 The second specified value of -1, 2 means corresponding to 2 21 The second specified value of -1. The preset instruction set corresponding to 1 includes: beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction and bgeu instruction, and the preset instruction set corresponding to 2 includes: beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction, bgeu instruction, beqz instruction, bnez instruction, bceqz instruction and bcnez instruction. After determining the number of instructions corresponding to each function to be compiled, the expansion mark can be set for each function to be compiled based on the number of instructions corresponding to each function to be compiled.

[0086] Specifically, for any function to be compiled, the number of instructions corresponding to the function to be compiled can be compared with the minimum established interval upper limit. If the number of instructions is less than the minimum established interval upper limit, the first specified value is set as an expansion mark, so that the jump interval of the conditional jump instruction in the function to be compiled can be conveniently known based on the expansion mark in the future. It will not exceed the established interval upper limit. If the number of instructions is not less than the minimum established interval upper limit, the number of instructions can be compared with the established interval upper limits corresponding to various second specified values. If the number of instructions is greater than the established interval upper limit corresponding to the second specified value, and is not greater than the established interval upper limit corresponding to the previous second specified value, the second specified value is set as an expansion mark, so that the jump interval of the conditional jump instruction in the function to be compiled may exceed the established interval upper limit in the future. The established interval upper limit corresponding to the previous second specified value refers to the minimum value of the established interval upper limits that are greater than the target interval upper limit, and the target interval upper limit is the established interval upper limit corresponding to the second specified value, indicating the maximum established interval upper limit of the instruction in the preset instruction set corresponding to the second specified value.

[0087] For example, if the number of instructions corresponding to the function to be compiled is less than 2 16 -1, the first specified value 0 is set as the expansion mark of the function to be compiled. If the number of instructions corresponding to the function to be compiled is greater than the established interval upper limit 2 corresponding to the second specified value 16 -1 and not greater than the upper limit of the interval corresponding to the second specified value 2 21 -1, then set the second specified value 1 as the expansion mark of the function to be compiled. If the number of instructions corresponding to the function to be compiled is greater than the established interval upper limit 2 corresponding to the previous second specified value 21 -1, then set the second specified value 2 as the expansion mark of the function to be compiled. Exemplarily, the function identifier of each compiled function and the expansion mark of the compiled function can be stored correspondingly to achieve setting the expansion mark for each compiled function.

[0088] Correspondingly, if the expansion mark of the function to be compiled is 0, it means that the jump interval of the conditional jump instruction in the function to be compiled will not exceed the range, and there is no need to expand the capacity, so the IR instruction can be directly converted into a machine instruction without judgment. By directly converting the IR instruction into a machine instruction, it can be indicated that there is no need to detect whether the IR instruction is a conditional jump instruction. If the expansion mark of the function to be compiled is a second specified value (1 or 2), it means that the jump interval of the conditional jump instruction in the preset instruction set corresponding to the second specified value in the function to be compiled may exceed the range. If the expansion mark of the function to be compiled is a second specified value, it means that the number of instructions corresponding to the function to be compiled is greater than the maximum established interval upper limit of the instructions in the preset instruction set, and the IR instruction belongs to the preset instruction set, then the established interval upper limit of the IR instruction is not enough to support the jump of the IR instruction inside the function to be compiled.

[0089] For example, assume that the number of instructions corresponding to the function to be compiled is 2 19 , where the number of instructions corresponding to the function to be compiled is the number of IR instructions obtained by converting the function to be compiled. The number of instructions is related to the function to be compiled. Specifically, the larger the code volume of the function to be compiled and the more complex the code logic, the more IR instructions are obtained after conversion. The maximum interval limit of instructions in the preset instruction set is 2 16 -1, where the upper limit of the interval of the IR command in the preset command set is 2 15 -1. Since the number of instructions corresponding to the function to be compiled is greater, it is 2 19 , then the jump range of the IR instruction exceeds the established interval upper limit of the IR instruction 2 15 -1, therefore, in the to-be-compiled function, the jump interval of the conditional jump instruction in the preset instruction set corresponding to the second specified value may exceed the range.

[0090] Therefore, it is possible to detect whether the IR instruction belongs to the preset instruction set corresponding to the second specified value, so as to determine whether the IR instruction is a conditional jump instruction. By determining that the IR instruction is a conditional jump instruction, it can be indicated that the jump direction of the IR instruction needs to be detected, that is, to detect whether the IR instruction is used for forward jump or backward adjustment. Specifically, if the expansion mark of the function to be compiled is 1, it means that the upper limits of the established intervals of beq instruction, bne instruction, blt instruction, bge instruction, bltu instruction and bgeu instruction are all 2. 16 -1 may need to be expanded. If the expansion flag of the function to be compiled is 2, it means that the upper limit of the established intervals of beq, bne, blt, bge, bltu, bgeu, beqz, bnez, bceqz, and bcnez are all 2. 16 -1 and 221 The -1 command may need to be expanded.

[0091] In the embodiment of the present invention, by presetting the expansion mark, it is possible to conveniently determine whether it is necessary to determine whether the IR instruction is a conditional jump instruction based on the specific value of the expansion mark. In this way, unnecessary determination operations can be avoided, thereby improving operation efficiency.

[0092] Figure 3 is a schematic diagram of a processing flow of a compiled function provided by an embodiment of the present invention, such as Figure 3 As shown, the number of instructions corresponding to the compiled function can be determined first. An expansion flag is set for the compiled function based on the number of instructions. Then, the IR instructions in the compiled function are converted to machine instructions. During the conversion, the conditional jump instructions for forward jumps are expanded, and the conditional jump instructions for backward jumps are added to a preset array. After completing the conversion operation of all IR instructions in the compiled function, the recorded conditional jump instructions for backward jumps are processed.

[0093] Figure 4 is a schematic diagram of another processing flow of a compiled function provided by an embodiment of the present invention, such as Figure 4 As shown, the first IR instruction in the compiled function can be taken and assigned to the ins variable, which represents the IR instruction currently traversed and processed. Determine whether the expansion mark of the compiled function is 0. If so, directly convert the instruction represented by the ins variable into a machine instruction. If not, you can further determine whether the expansion mark is 1. If so, you can determine whether the IR instruction represented by the ins variable belongs to the first preset instruction set. If it does not belong to the first preset instruction set, directly convert the IR instruction to a machine instruction. If the expansion mark is not 1 (that is, the expansion mark of the compiled function is 2), it can be determined whether the IR instruction represented by the ins variable belongs to the second preset instruction set. If it does not belong to the second preset instruction set, directly convert the IR instruction to a machine instruction.

[0094] If it belongs to the first preset instruction set or the second preset instruction set, it can be determined whether it is a forward jump. If it is not a forward jump, the IR instruction can be recorded in the preset record table, and then the IR instruction can be converted into a machine instruction. If it is a forward jump, it can be determined whether the jump interval exceeds the established interval upper limit. If it exceeds, the IR instruction can be converted into a machine instruction, and the machine instruction corresponding to the IR instruction can be expanded. If it does not exceed, the IR instruction can be directly converted into a machine instruction. Then, the next IR instruction can be assigned to the ins variable. Determine whether the ins variable is empty. If it is empty, it can be determined that the IR instructions corresponding to the compiled function have all been processed, and accordingly, the processing flow can be ended. Conversely, if it is not empty, processing can continue.

[0095] Optionally, the step of adding a first target instruction in the expansion space may specifically include:

[0096] Step 1031: sequentially add a target jump instruction, a second direct jump instruction, and a third direct jump instruction to the expansion space; the destination address of the second direct jump instruction is the instruction address of the next instruction of the first instruction to be expanded, the destination address of the third direct jump instruction is the destination address of the first instruction to be expanded, the jump condition of the target jump instruction is the same as that of the first instruction to be expanded, and the destination address of the target jump instruction is the instruction address of the third direct jump instruction;

[0097] Step 1032: Replace the first instruction to be expanded with a fourth direct jump instruction, wherein the destination address of the fourth direct jump instruction is the instruction address of the target jump instruction; wherein the first target instruction includes the target jump instruction, the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction.

[0098] In the embodiment of the present invention, after the instruction sequence is generated, that is, after the complete instruction sequence of the compiled function is obtained, since the instruction address destination address of the corresponding machine instruction of the conditional jump instruction of the backward jump in the instruction sequence has been determined at this time. Therefore, the jump record table can be traversed, and for each conditional jump instruction of the backward jump traversed, it is determined whether expansion is needed, that is, whether the jump interval of the conditional jump instruction is greater than the established interval upper limit. And in the case of expansion, expansion operation is performed. It should be noted that there may be multiple conditional jump instructions that need to be expanded in the jump record table, and the expansion space applied for each conditional jump instruction that needs to be expanded can be continuous. Specifically, for the first conditional jump instruction that needs to be expanded, the expansion space of the conditional jump instruction is adjacent to the end position of the instruction sequence. For other conditional jump instructions that need to be expanded, the expansion space of the conditional jump instruction is adjacent to the expansion space of the previous conditional jump instruction that needs to be expanded. After traversing the jump record table, all instructions in the expansion space and instructions in the instruction sequence constitute the final instruction sequence.

[0099] For example, assume that there are two conditional jump instructions recorded in the jump record table: conditional jump instruction 1 and conditional jump instruction 2. The end position of the instruction sequence is L4, the next adjacent position of L4 is L5, and the size of the expansion space is 12 bytes. Then for the first conditional jump instruction that needs to be expanded: conditional jump instruction 1, the expansion space applied can be from L5 to L5+12. L6 represents the next adjacent position of L5+12, then for the second conditional jump instruction that needs to be expanded: conditional jump instruction 2, the expansion space applied can be from L6 to L6+12.

[0100] Further, the first target instruction may include the above-mentioned target jump instruction, the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction. Specifically, the destination address of the first instruction to be expanded and the instruction address of the next instruction of the first instruction to be expanded can be obtained. Then, a direct jump instruction in the form of a machine instruction is generated as the third direct jump instruction based on the obtained destination address, and a direct jump instruction in the form of a machine instruction is generated as the second direct jump instruction based on the instruction address of the next instruction obtained. The instruction content of the first instruction to be expanded can be obtained, and the instruction content, the second direct jump instruction and the third direct jump instruction are sequentially added to the expansion space corresponding to the first expansion instruction. Then, the destination address in the instruction content in the expansion space is modified to the instruction address of the third direct jump instruction. Alternatively, the sum of the first address of the expansion space and the address length of the two instructions can be calculated as the instruction address of the third direct jump instruction. The instruction content of the first instruction to be expanded is obtained, and the destination address in the instruction content is modified to the instruction address of the third direct jump instruction to obtain the target jump instruction. Afterwards, the target jump instruction, the second direct jump instruction and the third direct jump instruction are sequentially added to the expansion space corresponding to the first expansion instruction. In the embodiment of the present invention, the first direct jump instruction, the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction respectively represent: an instruction for jumping to the destination address of the second instruction to be expanded, an instruction for jumping to the location of the next instruction of the first instruction to be expanded, an instruction for jumping to the destination address of the first instruction to be expanded, and an instruction for jumping to the location of the above-mentioned target jump instruction. The first direct jump instruction is an instruction used to implement the expansion of the second instruction to be expanded, and the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction are instructions used to implement the expansion of the first instruction to be expanded.

[0101] Further, the instruction address of the target jump instruction can be obtained. For example, the first address of the expansion space can be directly read as the instruction address of the target jump instruction. Then, based on the instruction address of the target jump instruction obtained, a direct jump instruction in the form of a machine instruction is generated as the fourth direct jump instruction. And the first instruction to be expanded in the instruction sequence is replaced with the fourth direct jump instruction. In this way, the fourth direct jump instruction combines the target jump instruction, the second direct jump instruction and the third direct jump instruction to realize the jump function of the first instruction to be expanded, thereby replacing the first instruction to be expanded to realize the jump function of the second instruction to be expanded.

[0102] Exemplarily, assuming that the first instruction to be expanded is a beq instruction, the jump mode of the beq instruction is to jump to the destination address for execution if the condition defined by the instruction is met (the value of rj is equal to the value of rd), and to execute the next instruction in sequence if it is not met. The target jump instruction is also a beq instruction, and the jump condition of the target jump instruction is the same as that of the first instruction to be expanded. Therefore, the jump mode of the target jump instruction is also: if the condition defined by the instruction is met (the value of rj is equal to the value of rd), jump to the destination address for execution, and if it is not met, execute the next instruction in sequence.

[0103] Specifically, take rj as $r4 and rd as $r5 as an example. Figure 5 is a partial schematic diagram of another instruction sequence provided by an embodiment of the present invention, such as Figure 5 As shown, the part above the dotted line represents the local instruction sequence before expansion, and the part below the dotted line represents the local instruction sequence after expansion. Assuming that the destination address of the first instruction to be expanded is L2', the instruction address of the first instruction to be expanded is L2, wherein the destination address L2' is after the specified address L2, and the number of instructions between the destination address L2' and the instruction L2 is greater than the established interval upper limit of the first instruction to be expanded. Each instruction size is 4, so the instruction address of the next instruction of the first instruction to be expanded is stored at the position L2+4. N2 represents the next instruction of the first instruction to be expanded, and the condition of the corresponding conditional jump instruction defined by the first instruction to be expanded is rj=rd. Then the jump function of the first instruction to be expanded that needs to be implemented is: if rj=rd, jump to the destination address L2' of the first instruction to be expanded to execute instruction X2, otherwise (i.e. rj≠rd) sequentially execute the next instruction of the first instruction to be expanded at the position L2+4: N2.

[0104] Take the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction as b instructions for example, assuming that the instruction address of the target jump instruction is L3, L3 is the first address of the expansion space of the first instruction to be expanded, and the address range occupied by the target jump instruction can be the first address of the expansion space + 4. Correspondingly, the second direct jump instruction can be stored starting from the first address + 4, that is, the instruction address of the second direct jump instruction can be the first address + 4, the second direct jump instruction is L3 + 4, and the third direct jump instruction is L3 + 8. The second direct jump instruction can be expressed as b L2 + 4, the third direct jump instruction can be expressed as b L2 ', and the fourth direct jump instruction can be expressed as b L3. Among them, the third direct jump instruction has the same destination address as the first instruction to be expanded, and the destination address of the target jump instruction is the instruction address of the third direct jump instruction. That is, the destination address of the target jump instruction is the same as the address where the third direct jump instruction is located.

[0105] Since the jump condition of the target jump instruction is the same as that of the first instruction to be expanded, and the destination address is the instruction address of the third direct jump instruction, that is, the destination address of the target jump instruction is L3+8. Therefore, when the fourth direct jump instruction is used to replace the first instruction to be expanded, if the fourth direct jump instruction is executed, it will first jump directly to the L3 position to execute the target jump instruction: beq$r4$r5 L3+8. By executing the target jump instruction, if rj=rd, it will jump to the L3+8 position to execute the third direct jump instruction: b L2', and by executing the third direct jump instruction: b L2', it will jump to the destination address L2' of the first instruction to be expanded to execute X2. If rj≠rd, the second direct jump instruction at the L3+4 position: b L2+4 will be executed in sequence, and by executing the second direct jump instruction: b L2+4, it will jump to the L2+4 position to execute the next instruction of the first instruction to be expanded: N2.

[0106] In this way, the fourth direct jump instruction is combined with the target jump instruction, the second direct jump instruction and the third direct jump instruction to achieve: if rj=rd, then jump to L2' for execution, otherwise (i.e. rj≠rd), sequentially execute N2 at the position of L2+4. In this way, even if the first instruction to be expanded is replaced due to expansion, the execution logic is still consistent with that before expansion, so the impact on the instruction sequence is small.

[0107] Specifically, assuming that when traversing to the IR instruction corresponding to the instruction address L2 position in the jump instruction table, after judging that the number of instructions between the destination address L2' of the IR instruction corresponding to the instruction address L2 position and the instruction address L2 is greater than the established interval upper limit, expansion can be performed. Specifically, after expansion, the instruction address L2 position: beq$r4$r5 L2' is replaced with the fourth direct jump instruction: b L3. By executing b L3 at the L2 position, jump to the L3 position to execute the target jump instruction: beq$r4$r5 L3+8. If $r4=$r5, jump to execute b L2' at the L3+8 position, and then jump to the destination address L2' of the first instruction to be expanded to execute instruction X2. If $r4≠$r5, execute b L2+4 at the L3+4 position in sequence, and then jump to the L2+4 position to execute the next instruction of the first instruction to be expanded: N2. Subsequent execution can be carried out in sequence. The portion after L2' below the dotted line represents expansion space.

[0108] In an embodiment of the present invention, by sequentially adding a target jump instruction, a second direct jump instruction and a third direct jump instruction in the expansion space, and replacing the first instruction to be expanded with the fourth direct jump instruction, the expansion operation for the backward jump instruction can be implemented with high expansion efficiency.

[0109] Furthermore, the embodiments of the present invention can be specifically applied to miniaturized virtual machine scenarios. Specifically, the above instruction processing method can be used in a scenario where the JIT at the back end of a miniaturized fast virtual machine compiles a to-be-compiled function. The above compiled function can be a function in a source program that needs to be run on the virtual machine. In miniaturized virtual machine scenarios, people are often more concerned about whether instruction expansion can be implemented simply and quickly. If it is to be implemented simply and quickly, non-precise expansion is performed directly. For example, regardless of whether the jump interval of the conditional jump instruction exceeds the established interval upper limit, expansion is performed directly when the number of instructions corresponding to the to-be-compiled function exceeds the established interval upper limit of the conditional jump instruction. This will introduce more conditional jump instructions that need to be expanded, resulting in poor performance of the virtual machine.

[0110] In the embodiment of the present invention, in the process of JIT generating an instruction sequence, the conditional jump instruction of forward jump is expanded when the jump interval is greater than the upper limit of the established interval. For the conditional jump instruction of backward jump, the conditional jump instruction of backward jump is first recorded in the jump instruction table, and after the instruction sequence is generated, when the jump interval is greater than the upper limit of the established interval, the conditional jump instruction of backward jump is expanded based on the expansion space at the end of the instruction sequence. In this way, it is possible to avoid the conditional jump instruction whose original jump interval is not greater than the upper limit of the established interval, because the increase of expansion causes the jump interval to be greater than the upper limit of the established interval, resulting in the need to judge again whether the conditional jump instruction that was previously determined to be unnecessary to expand needs to be expanded, and, resulting in the introduction of more conditional jump instructions that need to be expanded, thereby causing the problem of time complexity becoming higher, and the conditional jump instruction required to be expanded can be accurately determined when the time complexity is O (n). At the same time, since each time the expansion is performed when the jump interval is greater than the upper limit of the established interval, it is equivalent to accurately expanding the conditional jump instruction. Therefore, accurate capacity expansion can be achieved simply and quickly while the time complexity is O(n), thereby improving the performance of miniaturized virtual machines.

[0111] Figure 6 FIG. 1 is a schematic diagram of a processing flow of a conditional jump instruction provided by an embodiment of the present invention, such as Figure 6As shown, for the jump instruction table, it can be determined whether the jump instruction table is empty. If it is empty, the processing flow can be terminated directly. If it is not empty, the first conditional jump instruction for backward jump in the jump instruction table can be taken and assigned to the cb_ins variable. Then it is determined whether the jump interval of the instruction represented by the cb_ins variable exceeds the established interval upper limit. If it does not exceed, the next instruction in the jump instruction table can be assigned to the cb_ins variable. Then it is determined whether the cb_ins variable is empty. If it is empty, it can be determined that all the instructions in the jump instruction table have been processed. Accordingly, the processing flow can be terminated. On the contrary, if it is not empty, the processing can be continued. If it exceeds, the machine instruction corresponding to the instruction represented by the cb_ins variable can be expanded. Then enter the step of assigning the next instruction in the jump instruction table to the cb_ins variable and continue to execute.

[0112] Reference Figure 7 , shows a block diagram of an instruction processing device provided by an embodiment of the present invention, such as Figure 7 As shown, the instruction processing device specifically includes:

[0113] The acquisition module 201 is used to acquire the instruction sequence and jump instruction table obtained by compiling the compiled function; the jump instruction table is used to record the conditional jump instructions for backward jump in the compiled function;

[0114] A first determining module 202 is configured to determine, for any conditional jump instruction recorded in the jump instruction table, a machine instruction corresponding to the conditional jump instruction in the instruction sequence as a first instruction to be expanded when a jump interval of the conditional jump instruction exceeds a predetermined interval upper limit of the conditional jump instruction; the first instruction to be expanded is used to implement a jump function of the conditional jump instruction;

[0115] The first expansion module 203 is used to set an expansion space in the space outside the instruction sequence, and add a first target instruction in the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded.

[0116] Optionally, the instruction sequence includes machine instructions converted based on IR instructions corresponding to the compiled function; the instruction sequence and the jump instruction table are generated by the following modules:

[0117] A first conversion module is used for, when any of the IR instructions is a conditional jump instruction, if the IR instruction is used for a backward jump, converting the IR instruction into a first machine instruction, and associating the IR instruction based on the first machine instruction to generate the jump instruction table; if the IR instruction is used for a forward jump, converting the IR instruction into a second machine instruction;

[0118] The second conversion module is used to convert the IR instruction into a third machine instruction to generate the instruction sequence when any of the IR instructions is not a conditional jump instruction.

[0119] Optionally, the device further comprises:

[0120] a third conversion module, configured to directly convert the IR instruction into a machine instruction if the expansion mark of the function to be compiled is a first specified value, indicating that it is not necessary to detect whether the IR instruction is a conditional jump instruction; the first specified value is used to indicate that the number of instructions corresponding to the function to be compiled is less than a minimum predetermined interval upper limit corresponding to a preset instruction architecture;

[0121] The second determination module is used to determine that the IR instruction is a conditional jump instruction if the expansion mark of the function to be compiled is a second specified value, when the IR instruction belongs to a preset instruction set, to indicate that the jump direction of the IR instruction needs to be detected; the second specified value is used to indicate that the number of instructions is greater than the maximum predetermined interval upper limit of the instructions in the preset instruction set.

[0122] Optionally, the device further includes:

[0123] A third determination module is used for, after the second conversion module executes the conversion of the IR instruction into a second machine instruction if the IR instruction is used for forward jumping and the jumping interval exceeds the upper limit of the predetermined interval of the IR instruction, determining the second machine instruction as a second instruction to be expanded; the second instruction to be expanded is used to implement the jump function of the IR instruction;

[0124] The second expansion module is used to add a second target instruction based on the second instruction to be expanded to replace the second instruction to be expanded for jumping; the second target instruction includes a jump instruction whose predetermined interval upper limit is greater than the predetermined interval upper limit of the second instruction to be expanded.

[0125] Optionally, the second expansion module is specifically used to:

[0126] Generate a first direct jump instruction having a destination address identical to that of the second instruction to be expanded;

[0127] generating a first direct jump instruction having the same destination address as the second instruction to be expanded;

[0128] Adding the first direct jump instruction after the second to-be-expanded instruction;

[0129] Generate a fourth machine instruction whose jump condition is opposite to that of the second instruction to be expanded and whose destination address is the instruction address of the next instruction of the first direct jump instruction;

[0130] Using the fourth machine instruction to replace the second instruction to be expanded in the instruction sequence;

[0131] The second target instruction includes the first direct jump instruction and the fourth machine instruction.

[0132] Optionally, the first expansion module 203 is specifically configured to:

[0133] A target jump instruction, a second direct jump instruction, and a third direct jump instruction are sequentially added to the expansion space; the destination address of the second direct jump instruction is the instruction address of the next instruction of the first instruction to be expanded, the destination address of the third direct jump instruction is the destination address of the first instruction to be expanded, the jump condition of the target jump instruction is the same as that of the first instruction to be expanded, and the destination address of the target jump instruction is the instruction address of the third direct jump instruction;

[0134] Replacing the first instruction to be expanded with a fourth direct jump instruction, wherein the destination address of the fourth direct jump instruction is the instruction address of the target jump instruction;

[0135] The first target instruction includes the target jump instruction, the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction.

[0136] In summary, the instruction processing device provided by the embodiment of the present invention obtains the instruction sequence and the jump instruction table obtained by compiling the compiled function; the jump instruction table is used to record the conditional jump instruction of the backward jump in the compiled function. For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded; the first instruction to be expanded is used to implement the jump function of the conditional jump instruction. Finally, an expansion space is set in the space outside the instruction sequence, and a first target instruction is added to the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded. In this way, it is possible to avoid the jump interval of the conditional jump instruction of the backward jump exceeding the established interval upper limit that can be jumped, thereby reducing the overall probability of subsequent function operation errors caused by the jump range exceeding the established interval upper limit.

[0137] In the embodiment of the present invention, by adding the first target instruction in the expansion space outside the instruction sequence, it is avoided to affect other conditional jump instructions. For example, after obtaining the instruction sequence, if the first target instruction is added inside the instruction sequence, the number of instructions included in the instruction sequence will be increased, and then the number of instructions between the instruction address and the destination address of other conditional jump instructions may be increased. In this way, the conditional jump instruction whose original jump interval is not greater than the established interval upper limit of the conditional jump instruction may have a situation where the jump interval is not greater than the established interval upper limit of the conditional jump instruction, thereby causing the need to judge again whether the conditional jump instruction that was previously determined to be not required to be expanded needs to be expanded, and, causing the problem of introducing more conditional jump instructions that need to be expanded. Therefore, by adding the first target instruction in the expansion space outside the instruction sequence, expansion can be realized simply and quickly. At the same time, by only expanding when it is determined that the jump interval is greater than the interval upper limit, therefore, accurate expansion can be realized.

[0138] Reference Figure 8 , is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. Figure 8 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the instruction processing method of the above embodiment. The executable instructions can form a program.

[0139] An embodiment of the present invention provides a machine-readable medium on which instructions are stored. When executed by one or more processors, the processors are enabled to execute the instruction processing method of the aforementioned embodiment.

[0140] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0141] The above is a detailed introduction to an instruction processing method, an instruction processing device, an electronic device and one or more readable media provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for a person skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A command processing method, characterized in that: The method comprises: Obtaining an instruction sequence and a jump instruction table obtained by compiling a compiled function; the jump instruction table is used to record a conditional jump instruction for a backward jump in the compiled function; For any conditional jump instruction recorded in the jump instruction table, when the jump interval of the conditional jump instruction exceeds the established interval upper limit of the conditional jump instruction, the machine instruction corresponding to the conditional jump instruction in the instruction sequence is determined as the first instruction to be expanded; the first instruction to be expanded is used to implement the jump function of the conditional jump instruction; An expansion space is set outside the instruction sequence, and a first target instruction is added to the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose predetermined interval upper limit is greater than the predetermined interval upper limit of the first instruction to be expanded.

2. The method according to claim 1, characterized in that The instruction sequence includes machine instructions converted based on the IR instructions corresponding to the compiled function; the instruction sequence and the jump instruction table are generated in the following manner: In the case where any of the IR instructions is a conditional jump instruction, if the IR instruction is used for a backward jump, converting the IR instruction into a first machine instruction, and associating the IR instruction based on the first machine instruction to generate the jump instruction table; If the IR instruction is used to jump forward, converting the IR instruction into a second machine instruction; In the case that any of the IR instructions is not a conditional jump instruction, the IR instruction is converted into a third machine instruction to generate the instruction sequence.

3. The method according to claim 2, characterized in that The method further comprises: If the expansion mark of the function to be compiled is a first specified value, the IR instruction is directly converted into a machine instruction, indicating that there is no need to detect whether the IR instruction is a conditional jump instruction; the first specified value is used to indicate that the number of instructions corresponding to the function to be compiled is less than the minimum predetermined interval upper limit corresponding to the preset instruction architecture; If the expansion mark of the function to be compiled is a second specified value, then when the IR instruction belongs to a preset instruction set, the IR instruction is determined to be a conditional jump instruction to indicate that the jump direction of the IR instruction needs to be detected; the second specified value is used to indicate that the number of instructions is greater than the maximum predetermined interval upper limit of the instructions in the preset instruction set.

4. The method according to claim 2, characterized in that: If the IR instruction is used to jump forward, after converting the IR instruction into a second machine instruction, the method further includes: If the IR instruction is used to jump forward and the jump interval exceeds the upper limit of the predetermined interval of the IR instruction, the second machine instruction is determined as a second instruction to be expanded; the second instruction to be expanded is used to implement the jump function of the IR instruction; A second target instruction is added based on the second instruction to be expanded to replace the second instruction to be expanded for jumping; the second target instruction includes a jump instruction whose predetermined interval upper limit is greater than the predetermined interval upper limit of the second instruction to be expanded.

5. The method according to claim 4, characterized in that The adding a second target instruction based on the second instruction to be expanded includes: generating a first direct jump instruction having the same destination address as the second instruction to be expanded; Adding the first direct jump instruction after the second to-be-expanded instruction; Generate a fourth machine instruction whose jump condition is opposite to that of the second instruction to be expanded and whose destination address is the instruction address of the next instruction of the first direct jump instruction; Using the fourth machine instruction to replace the second instruction to be expanded in the instruction sequence; The second target instruction includes the first direct jump instruction and the fourth machine instruction.

6. The method according to claim 1, characterized in that The adding a first target instruction in the expansion space includes: A target jump instruction, a second direct jump instruction, and a third direct jump instruction are sequentially added to the expansion space; the destination address of the second direct jump instruction is the instruction address of the next instruction of the first instruction to be expanded, the destination address of the third direct jump instruction is the destination address of the first instruction to be expanded, the jump condition of the target jump instruction is the same as that of the first instruction to be expanded, and the destination address of the target jump instruction is the instruction address of the third direct jump instruction; Replacing the first instruction to be expanded with a fourth direct jump instruction, wherein the destination address of the fourth direct jump instruction is the instruction address of the target jump instruction; The first target instruction includes the target jump instruction, the second direct jump instruction, the third direct jump instruction and the fourth direct jump instruction.

7. An instruction processing device, characterized in that: The device comprises: An acquisition module, used for acquiring an instruction sequence and a jump instruction table obtained by compiling a compiled function; the jump instruction table is used for recording a conditional jump instruction for a backward jump in the compiled function; A first determination module is used for determining, for any conditional jump instruction recorded in the jump instruction table, a machine instruction corresponding to the conditional jump instruction in the instruction sequence as a first instruction to be expanded when a jump interval of the conditional jump instruction exceeds a predetermined interval upper limit of the conditional jump instruction; the first instruction to be expanded is used to implement a jump function of the conditional jump instruction; The first expansion module is used to set an expansion space in the space outside the instruction sequence, and add a first target instruction in the expansion space to replace the first instruction to be expanded for jumping; the first target instruction includes a jump instruction whose established interval upper limit is greater than the established interval upper limit of the first instruction to be expanded.

8. The device according to claim 7, characterized in that The instruction sequence includes machine instructions converted based on the IR instructions corresponding to the compiled function; the instruction sequence and the jump instruction table are generated by the following modules: A first conversion module is used for, when any of the IR instructions is a conditional jump instruction, if the IR instruction is used for a backward jump, converting the IR instruction into a first machine instruction, and associating the IR instruction based on the first machine instruction to generate the jump instruction table; if the IR instruction is used for a forward jump, converting the IR instruction into a second machine instruction; The second conversion module is used to convert the IR instruction into a third machine instruction to generate the instruction sequence when any of the IR instructions is not a conditional jump instruction.

9. An electronic device, characterized in that: include: A processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other via the communication bus; The memory is used to store executable instructions, and the executable instructions enable the processor to execute the method according to any one of claims 1 to 6.

10. One or more machine-readable media, characterized in that Instructions are stored thereon, which, when executed by one or more processors, cause the processors to perform the method according to any one of claims 1 to 6.

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