Chip simulation verification method and device, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a chip simulation verification method and device, electronic equipment and a storage medium. The method relates to the technical field of chip simulation and is applied to a simulation platform. The method comprises the following steps: inputting a monitoring signal into a to-be-monitored chip, and obtaining monitoring data describing a signal state of the to-be-monitored chip in a current time period; and writing a signal value and a timestamp included in the monitoring data into a memory, so that the software platform reads and analyzes the monitoring data from the memory, and determines the performance state of the chip to be monitored. By applying the scheme provided by the embodiment of the invention, the performance analysis efficiency of the chip can be improved.

Description

Technical Field

[0001] The present application relates to the field of chip simulation technology, and in particular to a chip simulation verification method, device, electronic device and storage medium. Background Art

[0002] As the complexity of chips continues to increase, after the chip is designed, it is usually necessary to use a simulation platform to simulate the actual operating state of the chip in order to analyze the performance of the chip. In related technologies, the simulation platform running on the server inputs external stimuli into the simulated chip to generate a signal waveform, and the general signal analysis platform converts the signal waveform into a recognizable format to perform chip performance analysis.

[0003] During the above chip performance analysis process, the simulation platform stores the acquired signal waveform in the hard disk, and the signal analysis platform uses server resources to convert the signal waveform into a recognizable format. Long signal waveforms require more server resources and a hard disk with a larger capacity. However, the resources of the server and the hard disk are limited, so the simulation platform cannot obtain long signal waveforms. When obtaining signal waveforms, the simulation platform needs to obtain signal waveforms for short periods of time multiple times and then analyze them offline, which results in low efficiency in chip performance analysis. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a chip simulation verification method, device, electronic device and storage medium to improve the efficiency of chip performance analysis. The specific technical solution is as follows:

[0005] In a first aspect of an embodiment of the present application, a chip simulation verification method is first provided, which is applied to a simulation platform. The method includes:

[0006] Inputting a monitoring signal into the chip to be monitored, and obtaining monitoring data describing the signal state of the chip to be monitored in the current time period;

[0007] The signal value and timestamp contained in the monitoring data are written into the memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

[0008] In a possible embodiment, writing the signal value and the timestamp included in the monitoring data into a memory includes:

[0009] For the first moment of the current time period, writing a timestamp representing the moment and a signal value at the moment into a memory;

[0010] For each moment except the first moment in the current time period, if the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are written into the memory; if the signal value at that moment in the monitoring data is the same as the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are not recorded.

[0011] In a possible embodiment, the memory includes a primary partition and a backup partition, and writing the signal value and the timestamp included in the monitoring data into the memory includes:

[0012] Writing the signal value and timestamp contained in the monitoring data into the primary partition;

[0013] When the storage space of the primary partition is full, the monitoring data that has not been written into the primary partition continues to be written into the backup partition until the free storage space of the backup partition is zero.

[0014] In a possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein each register value stored in the register is used to describe the signal state of a group of monitoring signals.

[0015] In a possible embodiment, the memory includes a static random access memory in the chip to be monitored and an external memory outside the chip to be monitored, and writing the signal value and timestamp included in the monitoring data into the memory includes:

[0016] Writing the signal value and the timestamp contained in the monitoring data into the static random access memory;

[0017] When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory continues to be written into the external memory.

[0018] In a second aspect of an embodiment of the present application, a chip simulation verification method is provided, which is applied to a software platform, and the method includes:

[0019] Reading monitoring data describing the signal state of the chip to be monitored in the current time period from the memory; wherein the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored, and the monitoring data includes a signal value and a timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value;

[0020] The monitoring data is analyzed to determine the performance status of the chip to be monitored.

[0021] In a possible embodiment, the step of reading the monitoring data describing the signal state of the chip to be monitored in the current time period from the memory includes:

[0022] The monitoring data describing the signal status of the chip to be monitored in the current time period is read from the memory and removed.

[0023] In a third aspect of an embodiment of the present application, a chip simulation verification device is provided, which is applied to a simulation platform, and the device includes:

[0024] A data acquisition module, used to input the monitoring signal into the chip to be monitored, and obtain monitoring data describing the signal state of the chip to be monitored in the current time period;

[0025] A data writing module is used to write the signal value and timestamp contained in the monitoring data into a memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

[0026] In a possible embodiment, the data writing module is specifically used to:

[0027] For the first moment of the current time period, writing a timestamp representing the moment and a signal value at the moment into a memory;

[0028] For each moment except the first moment in the current time period, if the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are written into the memory; if the signal value at that moment in the monitoring data is the same as the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are not recorded.

[0029] In a possible embodiment, the memory includes a primary partition and a backup partition, and the data writing module is specifically used to:

[0030] Writing the signal value and timestamp contained in the monitoring data into the primary partition;

[0031] When the storage space of the primary partition is full, the monitoring data that has not been written into the primary partition continues to be written into the backup partition until the free storage space of the backup partition is zero.

[0032] In a possible embodiment, if the memory is a static random access memory within the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein each register value stored in the register is used to describe the signal state of a group of monitoring signals.

[0033] In a possible embodiment, the memory includes a static random access memory in the chip to be monitored and an external memory outside the chip to be monitored, and the data writing module is specifically used for:

[0034] Writing the signal value and the timestamp contained in the monitoring data into the static random access memory;

[0035] When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory continues to be written into the external memory.

[0036] In a fourth aspect of the embodiments of the present application, a chip simulation verification device is provided, which is applied to a software platform, and the device includes:

[0037] A data reading module is used to read monitoring data describing the signal status of the chip to be monitored in the current time period from the memory; wherein the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored, and the monitoring data includes a signal value and a timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value;

[0038] The data analysis module is used to analyze the monitoring data and determine the performance status of the chip to be monitored.

[0039] In a possible embodiment, the data reading module is specifically used to:

[0040] The monitoring data describing the signal status of the chip to be monitored in the current time period is read from the memory and removed.

[0041] In a fifth aspect of the embodiments of the present application, there is further provided an electronic device, including a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus;

[0042] Memory, used to store computer programs;

[0043] The processor is used to implement the method steps described in any one of the first aspect or the second aspect when executing the program stored in the memory.

[0044] In another aspect of the embodiments of the present application, a computer-readable storage medium is provided, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method steps of any one of the first aspect or the second aspect are implemented.

[0045] Beneficial effects of the embodiments of the present application:

[0046] In the chip simulation verification method provided in the embodiment of the present application, the simulation platform obtains monitoring data describing the signal state of the chip to be monitored in the current time period when the monitoring signal is input to the chip to be monitored, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0047] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0048] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0050] Figure 1 A schematic diagram of the process flow of the first chip simulation verification method provided in the embodiment of the present application;

[0051] Figure 2 A schematic diagram of a second chip simulation verification method provided in an embodiment of the present application;

[0052] Figure 3 A schematic diagram of a third chip simulation verification method provided in an embodiment of the present application;

[0053] Figure 4 A schematic diagram of a primary partition and a backup partition provided for an embodiment of the application;

[0054] Figure 5 A schematic diagram of a fourth chip simulation verification method provided in an embodiment of the present application;

[0055] Figure 6A schematic diagram of a fifth chip simulation verification method provided in an embodiment of the present application;

[0056] Figure 7 A schematic diagram of a sixth chip simulation verification method provided in an embodiment of the present application;

[0057] Figure 8 A schematic diagram of the structure of a first chip simulation verification device provided in an embodiment of the present application;

[0058] Fig. 9 A schematic diagram of the structure of a second chip simulation verification device provided in an embodiment of the present application;

[0059] Fig.10 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0060] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.

[0061] The present application embodiment provides a chip simulation verification method, which is applied to a simulation platform, see Figure 1 , is a flow chart of the first chip simulation verification method provided in an embodiment of the present application, and the above method includes S101-S102.

[0062] S101, inputting a monitoring signal into a chip to be monitored, and acquiring monitoring data describing a signal state of the chip to be monitored in a current time period.

[0063] In S101, the chip to be monitored may include multiple modules, and different modules correspond to different monitoring signals. The signal state of the monitoring signal can reflect the working state or performance index of each module. For example, the monitoring signal corresponding to the message receiving module can be an experimental clock signal, a counter or a cardinality signal, and the counter indicates the number of received messages.

[0064] Before chip simulation verification, the signal path of the monitoring signal needs to be set in the monitoring program. The monitoring program includes .tcl files and .sv / .v files. The .sv / .v file is the monitoring program of a module of the chip to be monitored, and the .tcl file is an instantiation provided by the integrated .sv / .v file and defines a set of monitoring signals.

[0065] For example, the performance status of the first module in the chip to be monitored is determined using the first .sv file and the first monitoring signal, and the performance status of the second module in the chip to be monitored is determined using the first .v file and the second monitoring signal. The .tcl file integrates the first .sv file with the first .v file and defines a monitoring signal set, which includes the first monitoring signal and the second monitoring signal.

[0066] S102, writing the signal value and timestamp included in the monitoring data into the memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored.

[0067] Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value.

[0068] In S102, the monitoring data in the memory may be stored in the form of a data file, and the data file is named with a timestamp when the monitoring data is written to a deadline.

[0069] The software platform is a program specifically used to process monitoring data, which includes signal values ​​and timestamps. The software platform may include a data acquisition unit, a data processing unit, and a data display unit.

[0070] Among them, the data acquisition unit is used to read the monitoring data from the memory and store it in the local memory, wherein the local memory can be DDR (Double Data Rate Synchronous Dynamic Random Access Memory); the data processing unit is used to determine the signal value corresponding to each timestamp in the monitoring data; the data display module displays the chip performance data in a graphical manner, such as a line graph, a heat map, etc. The staff can determine the performance status of the chip to be monitored, such as storage rate, delay, jitter, etc. according to the displayed content.

[0071] For example, the horizontal axis in the line graph represents the timestamp, the vertical axis represents the signal value, and the line represents the changing trend of the signal value at different times. In the thermal map, different color levels are mapped to different modules of the chip. The darker the color, the higher the temperature or the greater the communication load.

[0072] In addition, the software platform can be run remotely on other devices, connected to the simulation platform through a network or other connection methods, or run on the same server as the simulation platform.

[0073] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0074] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0075] In one possible embodiment, see Figure 2 , is a flow chart of a second chip simulation verification method provided in an embodiment of the present application, which is similar to the aforementioned Figure 1 Compared with the embodiment shown, the above S102 can be implemented by S102A-S102B.

[0076] S102A: For the first moment of the current time period, write the timestamp representing the moment and the signal value at the moment into the memory.

[0077] Exemplarily, assuming that the first moment of the current time period is t0 and the signal value at t0 is 1, the timestamp representing the moment t0 and the signal value 1 at the moment are written into the memory.

[0078] S102B, for each moment except the first moment in the current time period, if the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are written into the memory; if the signal value at that moment in the monitoring data is the same as the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are not recorded; so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored.

[0079] For example, assume that the signal value at time t0 is 1, the signal value at time t1 is 0, the signal value at time t2 is 0, the signal value at time t3 is 0, the signal value at time t4 is 1, the signal value at time t5 is 1, the signal value at time t6 is 1, the signal value at time t7 is 1, the signal value at time t8 is 1, and the signal value at time t9 is 0.

[0080] Since the signal value at time t1 is different from the signal value at time t0, the timestamp indicating time t1 and the signal value 0 at that time are written into the memory. Since the signal value at time t2 is the same as the signal value at time t1, the timestamp indicating time t2 and the signal value 0 at time t2 are not recorded.

[0081] Similarly, the timestamp indicating time t3 and the signal value 0 at time t3, and the timestamp indicating time t4 and the signal value 0 at time t4 are not recorded.

[0082] Since the signal value at time t5 is different from the signal value at time t4, the timestamp indicating time t5 and the signal value 1 at that time are written into the memory. Since the signal value at time t6 is the same as the signal value at time t5, the timestamp indicating time t6 and the signal value 1 at time t6 are not recorded.

[0083] Similarly, the timestamp indicating time t7 and the signal value 1 at time t7, and the timestamp indicating time t8 and the signal value 1 at time t8 are not recorded.

[0084] Since the signal value at time t9 is different from the signal value at time t8, the timestamp indicating time t9 and the signal value 0 at that time are written into the memory.

[0085] The above process can be called incremental compression. The monitoring data before incremental compression is shown in Table 1, and the monitoring data after incremental compression is shown in Table 2.

[0086] See Table 1, which is monitoring data before incremental compression provided in an embodiment of the present application.

[0087] Table 1

[0088] See Table 2, which is a type of incrementally compressed monitoring data provided in an embodiment of the present application.

[0089] Table 2

[0090] By selecting the above embodiment, for the first moment of the current time period, the timestamp representing the moment and the signal value at the moment are written into the memory, and the signal value collected at the first moment of the current time period can be stored; since the frequency of change of the signal value within a certain period of time is low, for each moment except the first moment in the current time period, the timestamp representing the moment and the signal value at the moment are written into the memory only when the signal value at the moment in the monitoring data is different from the signal value of the previous moment, which can greatly remove redundant data and improve the storage space utilization of the memory.

[0091] In a possible embodiment, the memory includes a primary partition and a backup partition. Figure 3 , is a flow chart of a third chip simulation verification method provided in an embodiment of the present application, which is similar to the aforementioned Figure 1Compared with the embodiment shown, the above S102 can be implemented by S102C and S102D.

[0092] S102C, write the signal value and timestamp included in the monitoring data into the primary partition.

[0093] In S102C, the storage space size of the primary partition is the same as the storage space size of the backup partition. After the simulation platform obtains the monitoring data, it first writes the monitoring data into the primary partition until the storage space of the primary partition is full.

[0094] S102D, when the storage space of the primary partition is full, the monitoring data that has not been written to the primary partition will continue to be written to the backup partition until the free storage space of the backup partition is 0; so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored.

[0095] In S102D, when the storage space of the primary partition is full, the data write descriptor is switched to the backup partition, so that the monitoring data not written into the primary partition continues to be written into the backup partition, wherein the data write descriptor can be understood as an offset address.

[0096] Specifically, the address of each signal in the memory = the offset address of the primary partition / backup area + the offset address of the signal in the partition. By changing the offset address of the primary partition / backup area, data can be written into the corresponding partition.

[0097] In addition, each partition can be further divided into two segments: single segment (single signal segment) and reg segment (register segment). The data stored in each storage space in the single segment is arranged according to the set signal. For example, SingleA stores the timestamp and signal value corresponding to signal A, SingleB stores the timestamp and signal value corresponding to signal B, and so on. The data stored in each storage space in the reg segment is arranged according to the set register. For example, regA stores the timestamp and signal value corresponding to register A, regB stores the timestamp and signal value corresponding to register B, and so on. The signal values ​​in each signal or register are arranged according to the timestamp.

[0098] See also Figure 4 , is a schematic diagram of a primary partition and a backup partition provided in an application embodiment.

[0099] The white part is the main partition, and the gray part is the backup partition. Each partition is divided into two sections: the single signal section and the register section.

[0100] In the single signal segment of the main partition, single signal segment A, single signal segment B, ..., single signal segment N correspond to signal A, signal B, ..., signal N respectively. Single signal segment A stores the timestamp and signal value corresponding to signal A, single signal segment B stores the timestamp and signal value corresponding to signal B, and so on. Single signal segment N stores the timestamp and signal value corresponding to signal N. The signal values ​​of single signal segment B are arranged according to the timestamps, where the signal value at time t0 is 1, the signal value at time t1 is 0, and the signal value at time tn is 1.

[0101] By selecting the above embodiment, the signal value and timestamp contained in the monitoring data are written into the primary partition. When the storage space of the partition is full, the data write descriptor is switched to the backup partition. This can avoid problems with the monitoring data in the backup area when the primary partition is damaged.

[0102] In a possible embodiment, the memory includes a static random access memory in the chip to be monitored and an external memory outside the chip to be monitored, see Figure 5 , is a flow chart of a fourth chip simulation verification method provided in an embodiment of the present application, which is similar to the aforementioned Figure 1 Compared with the embodiment shown, the above S102 can be implemented by S102E and S102F.

[0103] S102E, write the signal value and timestamp included in the monitoring data into a static random access memory.

[0104] In S102E, static random access memory is SRAM (Static Random Access Memory). Compared with external memory, SRAM has fast read and write speed and low data transmission delay, which is suitable for storing data that needs to be accessed frequently. Therefore, the signal value and timestamp contained in the monitoring data are written into the static random access memory first.

[0105] S102F, when the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory continues to be written into the external memory; so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored.

[0106] The external memory may be a hard disk, a USB flash drive, or an optical disk. Different external memories may have different storage space sizes. For example, the capacity of a mechanical hard disk is usually between 500GB and 10TB, the capacity of a solid-state hard disk is usually between 120GB and 4TB, and the capacity of a USB flash drive is usually between 8GB and 1TB. The capacity of an optical disk is relatively small, such as the capacity of a CD-ROM is 700MB.

[0107] The above embodiment is selected. Since the SRAM has a fast read and write speed and a low data transmission delay, the signal value and timestamp contained in the monitoring data are preferentially written into the static random access memory, which can speed up the read and write speed of the monitoring data, thereby improving the chip simulation verification efficiency. When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory will continue to be written into the external memory. Since the storage space of the external memory is large, the monitoring data that has not been written into the static random access memory can be prevented from being lost due to insufficient storage space.

[0108] In a possible embodiment, if the memory is a static random access memory in the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein each register value stored in the register is used to describe the signal state of a set of monitoring signals.

[0109] Specifically, the storage space size of the static random access memory can be calculated using the following formula.

[0110]

[0111] in, Indicates the storage space size of static random access memory, Indicates the number of monitoring signals, Indicates the number of bits occupied by the timestamp, Indicates the number of registers, Indicates the number of bits occupied by each register, Indicates the frequency of the clock signal.

[0112] In addition, since the static random access memory includes a primary partition and a backup partition, the final static random access memory size is twice as much.

[0113] By selecting the above embodiment, a memory with suitable storage space can be selected based on at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal, thereby avoiding waste of storage space of the memory.

[0114] The embodiment of the present invention also provides a chip simulation verification method, which is applied to a software platform, see Figure 6 , is a flow chart of the fifth chip simulation verification method provided in an embodiment of the present application, and the above method includes S601-S602.

[0115] S601, reading monitoring data describing the signal status of the chip to be monitored in the current time period from the memory;

[0116] Among them, the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored. The monitoring data includes signal value and timestamp. Each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

[0117] S602, analyzing the monitoring data to determine the performance status of the chip to be monitored.

[0118] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0119] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0120] In one possible embodiment, see Figure 7 , is a flow chart of the sixth chip simulation verification method provided in the embodiment of the present application, which is similar to the aforementioned Figure 6 Compared with the embodiment shown, the above S601 can be implemented by S601A.

[0121] S601A, reading and removing monitoring data describing the signal status of the chip to be monitored in the current time period from the memory.

[0122] In S601, after the software platform reads the monitoring data describing the signal status of the chip to be monitored in the current time period from the memory, the monitoring data that has been read in the memory will be deleted, and the vacated storage space is used to store new monitoring data.

[0123] By selecting the above embodiment, the software platform can read and remove the monitoring data as quickly as possible, so that the monitoring data stays in the memory for a shorter time, reducing the occupation of memory resources. Therefore, the simulation platform can reuse the memory with smaller storage space and continuously store the monitoring data collected over a long period of time in the memory, so that the simulation platform can continuously obtain the monitoring data over a long period of time, thereby improving the performance analysis efficiency of the chip.

[0124] Corresponding to the aforementioned chip simulation verification method, the present application embodiment also provides a chip simulation verification device, which is applied to a simulation platform, see Figure 8, is a schematic diagram of the structure of a first chip simulation verification device provided in an embodiment of the present application, the device comprising:

[0125] The data acquisition module 801 is used to input the monitoring signal into the chip to be monitored and obtain monitoring data describing the signal state of the chip to be monitored in the current time period;

[0126] The data writing module 802 is used to write the signal value and timestamp contained in the monitoring data into the memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

[0127] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0128] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0129] In a possible embodiment, the data writing module 802 is specifically used for:

[0130] For the first moment of the current time period, write the timestamp representing the moment and the signal value at the moment into the memory;

[0131] For each moment except the first moment in the current time period, if the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment will be written into the memory; if the signal value at that moment in the monitoring data is the same as the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment will not be recorded.

[0132] By selecting the above embodiment, for the first moment of the current time period, the timestamp representing the moment and the signal value at the moment are written into the memory, and the signal value collected at the first moment of the current time period can be stored; since the frequency of change of the signal value within a certain period of time is low, for each moment except the first moment in the current time period, the timestamp representing the moment and the signal value at the moment are written into the memory only when the signal value at the moment in the monitoring data is different from the signal value of the previous moment, which can greatly remove redundant data and improve the storage space utilization of the memory.

[0133] In a possible embodiment, the memory includes a primary partition and a backup partition, and the data writing module 802 is specifically used for:

[0134] Write the signal value and timestamp contained in the monitoring data into the primary partition;

[0135] When the storage space of the primary partition is full, the monitoring data that has not been written into the primary partition will continue to be written into the backup partition until the free storage space of the backup partition is 0.

[0136] By selecting the above embodiment, the signal value and timestamp contained in the monitoring data are written into the primary partition. When the storage space of the partition is full, the data write descriptor is switched to the backup partition. This can avoid problems with the monitoring data in the backup area when the primary partition is damaged.

[0137] In a possible embodiment, if the memory is a static random access memory in the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein each register value stored in the register is used to describe the signal state of a set of monitoring signals.

[0138] By selecting the above embodiment, a memory with suitable storage space can be selected based on at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal, thereby avoiding waste of storage space of the memory.

[0139] In a possible embodiment, the memory includes a static random access memory in the chip to be monitored and an external memory outside the chip to be monitored, and the data writing module 802 is specifically used for:

[0140] Writing the signal value and timestamp contained in the monitoring data into the static random access memory;

[0141] When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory continues to be written into the external memory.

[0142] The above embodiment is selected. Since the SRAM has a fast read and write speed and a low data transmission delay, the signal value and timestamp contained in the monitoring data are preferentially written into the static random access memory, which can speed up the read and write speed of the monitoring data, thereby improving the chip simulation verification efficiency. When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory will continue to be written into the external memory. Since the storage space of the external memory is large, the monitoring data that has not been written into the static random access memory can be prevented from being lost due to insufficient storage space.

[0143] Corresponding to the aforementioned chip simulation verification method, the present application embodiment also provides a chip simulation verification device, which is applied to the software platform, see Fig. 9 , is a schematic diagram of the structure of a second chip simulation verification device provided in an embodiment of the present application, the device comprising:

[0144] The data reading module 901 is used to read the monitoring data describing the signal status of the chip to be monitored in the current time period from the memory; wherein the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored, and the monitoring data includes a signal value and a timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value;

[0145] The data analysis module 902 is used to analyze the monitoring data and determine the performance status of the chip to be monitored.

[0146] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0147] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0148] In a possible embodiment, the data reading module 901 is specifically used for:

[0149] The monitoring data describing the signal status of the chip to be monitored in the current time period is read from the memory and removed.

[0150] By selecting the above embodiment, the software platform can read and remove the monitoring data as quickly as possible, so that the monitoring data stays in the memory for a shorter time, reducing the occupation of memory resources. Therefore, the simulation platform can reuse the memory with smaller storage space and continuously store the monitoring data collected over a long period of time in the memory, so that the simulation platform can continuously obtain the monitoring data over a long period of time, thereby improving the performance analysis efficiency of the chip.

[0151] The present application also provides an electronic device, such as Fig.10 As shown, it includes a processor 1001 , a communication interface 1002 , a memory 1003 and a communication bus 1004 , wherein the processor 1001 , the communication interface 1002 , and the memory 1003 communicate with each other via the communication bus 1004 .

[0152] Memory 1003, used for storing computer programs;

[0153] The processor 1001 is used to implement any method step of the above chip simulation verification method when executing the program stored in the memory 1003.

[0154] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0155] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0156] The communication bus mentioned in the above electronic device can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.

[0157] The communication interface is used for communication between the above electronic device and other devices.

[0158] The memory may include a random access memory (RAM) or a non-volatile memory (NVM), such as at least one disk memory. Optionally, the memory may also be at least one storage device located away from the aforementioned processor.

[0159] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components.

[0160] In another embodiment provided in the present application, a computer-readable storage medium is provided, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned chip simulation verification methods are implemented.

[0161] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0162] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0163] In another embodiment provided in the present application, a computer program product including instructions is also provided, which, when executed on a computer, enables the computer to execute any chip simulation verification method in the above embodiments.

[0164] In the above embodiment, when the simulation platform inputs the monitoring signal to the chip to be monitored, it obtains the monitoring data describing the signal state of the chip to be monitored in the current time period, and writes the signal value and timestamp contained in the monitoring data into the memory. The software platform reads and analyzes the monitoring data from the memory to determine the performance state of the chip to be monitored, thereby completing the performance analysis of the chip.

[0165] Moreover, the format of the monitoring data in the present application is different from that of the signal waveform in the related technology. The software platform can directly analyze the monitoring data, eliminating the process of converting the signal waveform into a recognizable format by the signal analysis platform in the related technology, thereby reducing the utilization of server resources and improving the performance analysis efficiency of the chip.

[0166] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website site, a computer, a server or a data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) mode to another website site, computer, server or data center. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive Solid State Disk (SSD)), etc.

[0167] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0168] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device, electronic device, and storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.

[0169] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims

1. A chip simulation verification method, characterized in that: Applied to a simulation platform, the method comprises: Inputting a monitoring signal into the chip to be monitored, and obtaining monitoring data describing the signal state of the chip to be monitored in the current time period; The signal value and timestamp contained in the monitoring data are written into the memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

2. The method according to claim 1, characterized in that Writing the signal value and timestamp contained in the monitoring data into a memory includes: For the first moment of the current time period, writing a timestamp representing the moment and a signal value at the moment into a memory; For each moment except the first moment in the current time period, if the signal value at that moment in the monitoring data is different from the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are written into the memory; if the signal value at that moment in the monitoring data is the same as the signal value at the previous moment, the timestamp representing the moment and the signal value at that moment are not recorded.

3. The method according to claim 1, characterized in that The memory includes a primary partition and a backup partition, and writing the signal value and the timestamp included in the monitoring data into the memory includes: Writing the signal value and timestamp contained in the monitoring data into the primary partition; When the storage space of the primary partition is full, the monitoring data that has not been written into the primary partition continues to be written into the backup partition until the free storage space of the backup partition is zero.

4. The method according to any one of claims 1 to 3, characterized in that If the memory is a static random access memory in the chip to be monitored, the storage space size of the static random access memory is related to at least one of the number of monitoring signals, the number of registers, the number of bits occupied by the timestamp describing the current time period, and the frequency of the clock signal; wherein each register value stored in the register is used to describe the signal state of a group of monitoring signals.

5. The method according to claim 1, characterized in that The memory includes a static random access memory in the chip to be monitored and an external memory outside the chip to be monitored, and writing the signal value and the timestamp included in the monitoring data into the memory includes: Writing the signal value and the timestamp contained in the monitoring data into the static random access memory; When the storage space of the static random access memory is full, the monitoring data that has not been written into the static random access memory continues to be written into the external memory.

6. A chip simulation verification method, characterized in that: Applied to a software platform, the method comprises: Reading monitoring data describing the signal state of the chip to be monitored in the current time period from the memory; wherein the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored, and the monitoring data includes a signal value and a timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value; The monitoring data is analyzed to determine the performance status of the chip to be monitored.

7. The method according to claim 6, characterized in that The step of reading the monitoring data describing the signal state of the chip to be monitored in the current time period from the memory includes: The monitoring data describing the signal status of the chip to be monitored in the current time period is read from the memory and removed.

8. A chip simulation verification device, characterized in that: Applied to a simulation platform, the device comprises: A data acquisition module, used to input the monitoring signal into the chip to be monitored, and obtain monitoring data describing the signal state of the chip to be monitored in the current time period; A data writing module is used to write the signal value and timestamp contained in the monitoring data into a memory, so that the software platform reads and analyzes the monitoring data from the memory to determine the performance status of the chip to be monitored; wherein each signal value corresponds to a timestamp, and the corresponding timestamp indicates the collection time of the signal value.

9. A chip simulation verification device, characterized in that: Applied to a software platform, the device comprises: A data reading module is used to read monitoring data describing the signal status of the chip to be monitored in the current time period from the memory; wherein the monitoring data is obtained after the simulation platform inputs the monitoring signal into the chip to be monitored, and the monitoring data includes a signal value and a timestamp, each signal value corresponds to a timestamp, and the corresponding timestamp indicates the acquisition time of the signal value; The data analysis module is used to analyze the monitoring data and determine the performance status of the chip to be monitored.

10. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other through the communication bus; Memory, used to store computer programs; A processor, for implementing the method steps described in any one of claims 1-5 or 6-7 when executing a program stored in a memory.

11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method steps described in any one of claims 1-5 or 6-7 are implemented.

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