Semiconductor substrate, manufacturing method therefor, and manufacturing apparatus

Abstract

The disclosure relates to a semiconductor substrate, a method of manufacturing the same, and a manufacturing apparatus. Provided is a method for manufacturing a semiconductor substrate with low cost and high quality. A graphene layer is formed on the Si surface of a SiC single crystal substrate, a SiC epitaxial growth layer is formed on the graphene layer, a stress layer is formed on the SiC epitaxial growth layer, a graphite substrate of a temporary substrate is attached to the stress layer, the graphene layer and the SiC epitaxial growth layer are peeled off, a SiC polycrystal growth layer is formed on the C surface of the SiC epitaxial growth layer after the graphene layer is peeled off, and the graphite substrate is removed. And at least one of the step of forming the graphene layer and the step of forming the SiC epitaxial growth layer includes a fluorine atmosphere.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor substrate, a manufacturing method and a manufacturing device thereof. Background Art

[0002] In recent years, silicon carbide (SiC) semiconductors have attracted much attention because they can achieve a wider bandgap energy, high electric field withstand voltage performance, high withstand voltage, high current, low on-resistance, high efficiency, low power consumption, and high-speed switching compared to Si semiconductors and GaAs semiconductors. The development of SiC power devices for power control purposes, such as Schottky barrier diodes (SBD), MOSFETs (metal oxide semiconductor field effect transistors), and IGBTs (insulated gate bipolar transistors), is advancing. In order to reduce manufacturing costs or provide the required physical properties, the SiC semiconductor substrate that forms such SiC power devices is sometimes made by bonding a single crystal SiC semiconductor substrate to a polycrystalline SiC semiconductor substrate by room temperature bonding or diffusion bonding (for example, refer to Patent Document 1).

[0003] [Background Technology Literature]

[0004] [Patent Document]

[0005] [Patent Document 1] U.S. Patent No. 8916451 Specification [Summary] However, the cost of polishing to ensure the surface roughness required to attach a single-crystalline SiC semiconductor substrate to a polycrystalline SiC semiconductor substrate is high, and defects generated at the bonding interface may sometimes lead to a decrease in yield. Summary of the invention

[0006] The present disclosure is proposed in view of the above-mentioned facts, and its purpose is to provide a low-cost and high-quality semiconductor substrate, a manufacturing method and a manufacturing device thereof.

[0007] The manufacturing method of the semiconductor substrate disclosed in the present invention includes the following steps: forming a graphene layer on the Si surface of a SiC single crystal substrate; forming a SiC epitaxial growth layer on the graphene layer; forming a stress layer on the SiC epitaxial growth layer; attaching a temporary substrate to the stress layer; peeling off the graphene layer and the SiC epitaxial growth layer; forming a SiC polycrystalline growth layer on the C surface of the SiC epitaxial growth layer after peeling off the graphene layer; and removing the temporary substrate; and at least one of the steps of forming the graphene layer and forming the SiC epitaxial growth layer is an atmosphere containing fluorine. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 A cross-sectional view of a SiC single crystal substrate is shown.

[0009] Figure 2A A top view illustrating a crystal plane of a SiC wafer is shown.

[0010] Figure 2B A side view illustrating a crystal plane of a SiC wafer is shown.

[0011] Figure 3A A bird's-eye view showing a unit cell group of 4H-SiC crystal.

[0012] Figure 3B A diagram showing the structure of a two-layer portion of a 4H-SiC crystal.

[0013] Figure 3C A diagram showing the structure of the four-layer portion of a 4H-SiC crystal.

[0014] Figure 4 Indicates observation from directly above the (0001) plane Figure 3A The structure diagram of the unit group of 4H-SiC crystal shown.

[0015] Figure 5 A cross-sectional view showing a first composite body in which a graphene layer is formed on a SiC single crystal substrate.

[0016] Figure 6 A bird's-eye view showing an example of a graphene layer having a structure in which a plurality of layers are stacked.

[0017] Figure 7 This is a flow chart showing a series of steps for forming a graphene layer.

[0018] Figure 8 It is a cross-sectional view showing a semiconductor manufacturing apparatus.

[0019] Fig. 9 : is a flowchart showing a series of steps for forming a graphene layer according to a modification example.

[0020] Fig.10 A cross-sectional view showing a second composite body in which a SiC epitaxial growth layer is formed on a graphene layer.

[0021] Fig.11 1 is a flow chart showing a series of steps for forming a SiC epitaxial growth layer.

[0022] Fig.12 It is a cross-sectional view of a semiconductor manufacturing apparatus showing a modified example.

[0023] Fig.13 A cross-sectional view showing a third composite body in which a stress layer is formed on the second composite body.

[0024] Fig.14 A cross-sectional view of a fourth composite body in which a graphite substrate is bonded to the stress layer of the third composite body via an adhesive layer.

[0025] Fig.15 A cross-sectional view of a fifth composite body in which stress layers of a second composite body are attached to both surfaces of a graphite substrate via adhesive layers.

[0026] Fig.16 A cross-sectional view of the fifth composite body cut at the interface between the graphene layer and the SiC epitaxial growth layer is shown.

[0027] Fig.17 The sixth composite body is shown in which SiC epitaxial growth layers are stacked on both surfaces of a graphite substrate via adhesive layers.

[0028] Fig.18 A cross-sectional view of a seventh composite body showing a SiC polycrystalline growth layer formed on the sixth composite body by CVD (Chemical Vapor Deposition) method.

[0029] Fig.19 A cross-sectional view of the 8th complex after grinding the outer periphery of the 7th complex.

[0030] Fig. 20 A cross-sectional view of the ninth composite body after the stress layer, the graphite substrate, and the carbonized adhesive layer are removed from the eighth composite body by annealing.

[0031] Fig.21 A cross-sectional view of a SiC composite substrate is shown.

[0032] Fig. 22 A bird's-eye view of a SiC composite substrate (wafer) is shown.

[0033] Fig.23 A cross-sectional view showing a structure in which a high-concentration doped layer is provided at the interface between a SiC epitaxial growth layer and a SiC polycrystalline growth layer.

[0034] Fig.24 A cross-sectional view of the tenth composite body in which a stress layer according to a modified example is formed on a SiC epitaxial growth layer.

[0035] Fig.25 A cross-sectional view of an eleventh composite body showing a variation of the tenth composite body in which a graphite substrate is bonded to a stress layer via an adhesive layer.

[0036] Fig.26 A cross-sectional view of a twelfth composite body in which stressor layers according to a variation of the tenth composite body are attached to both surfaces of a graphite substrate via adhesive layers.

[0037] Fig. 27 A cross-sectional view of the thirteenth composite body in which the graphite substrate and the carbonized adhesive layer are removed from the twelfth composite body by annealing.

[0038] Fig.28 A cross-sectional view showing a Schottky barrier diode.

[0039] Fig.29 A cross-sectional view of a trench gate TMOSFET (Trench Metal Oxide Semiconductor Field Effect Transistor) is shown.

[0040] Fig.30 A cross-sectional view showing a planar gate type MOSFET. DETAILED DESCRIPTION

[0041] Next, the embodiments are described with reference to the accompanying drawings. In the description of the drawings described below, the same or similar parts are marked with the same or similar symbols. The drawings are schematic. In addition, the embodiments shown below are examples of devices and methods for implementing technical ideas, and are not materials, shapes, structures, configurations, etc. of specific parts. Various changes can be made to the embodiments.

[0042] (Method for manufacturing semiconductor substrate)

[0043] A method for manufacturing a semiconductor substrate according to an embodiment will be described. Figure 1 1 is a cross-sectional view of a SiC single crystal substrate (SiCSB) 11 that serves as a seed crystal substrate. There are crystallographic polymorphs in SiC, but the cubic crystal (3C) is called β-SiC, and the other high-temperature stable polymorphs are called α-SiC. The SiC single crystal substrate 11 of the embodiment is, for example, a 4H-SiC substrate of α-SiC, and its thickness is, for example, about 300 μm to 600 μm. In addition, Figure 1 In FIG. 1 , [C] represents the C plane of SiC, and [S] represents the Si plane of SiC. The same is true in the following figures.

[0044] Figure 2A and Figure 2B FIG. 1 is a diagram for explaining the crystal plane of a SiC wafer 100 that can be used as a SiC single crystal substrate 11. Figure 2A The top view shows the Si surface 103 of the SiC wafer 100 forming the primary orientation flat 101 and the secondary orientation flat 102. Figure 2B In the side view observed in the [-1100] orientation, a Si plane 103 in the

[0001] orientation is formed on the upper surface, and a C plane 104 in the [000-1] orientation is formed on the lower surface.

[0045] A schematic overhead view of a unit group of 4H-SiC crystal applicable to the embodiment is as follows: Figure 3A As shown in FIG. 1 , the schematic structure of the two-layer portion of the 4H-SiC crystal is as follows: Figure 3B As shown in FIG. 1 , the schematic structure of the 4-layer portion of the 4H-SiC crystal is as follows: Figure 3C In addition, when viewed from directly above the (0001) plane, Figure 3A The schematic structure of the unit group of the crystal structure of 4H-SiC is shown in FIG. Figure 4 As shown.

[0046] like Figures 3A to 3C As shown, the crystal structure of 4H-SiC can be approximated by a hexagonal system, with 4 C atoms bonded to 1 Si atom. The 4 C atoms are located at the 4 vertices of a regular tetrahedron with the Si atom in the center. Of these 4 C atoms, 1 C atom is located on the

[0001] axis relative to the Si atom, and the other 3 C atoms are located on the [000-1] axis side relative to the Si atom. Figure 3A In the embodiment, the deviation angle θ is, for example, approximately 4 degrees or less.

[0001] The [000-1] axis and the [000-1] axis are along the axial direction of the hexagonal prism, and the surface with the

[0001] axis as the normal (the top surface of the hexagonal prism) is the (0001) surface (Si surface). On the other hand, the surface with the [000-1] axis as the normal (the lower surface of the hexagonal prism) is the (000-1) surface (C surface). In addition, the directions perpendicular to the

[0001] axis and passing through the non-adjacent vertices of the hexagonal prism when viewed from directly above the (0001) surface are the a1 axis [2-1-10], the a2 axis [-12-10] and the a3 axis [-1-120]. like Figure 4 As shown, the direction through the vertex between the a1 axis and the a2 axis is the [11-20] axis, the direction through the vertex between the a2 axis and the a3 axis is the [-2110] axis, and the direction through the vertex between the a3 axis and the a1 axis is the [1-210] axis. Between each of the six axes passing through each vertex of the hexagonal prism, the axes that are inclined at an angle of 30° relative to each axis on both sides and become the normals of each side surface of the hexagonal prism are the [10-10] axis, [1-100] axis, [0-110] axis, [-1010] axis, [-1100] axis, and [01-10] axis in clockwise order from the a1 axis to the [11-20] axis. Each face (side surface of the hexagonal prism) with these axes as normals is a crystal plane at right angles to the (0001) plane and the (000-1) plane. Then, if Figure 5As shown, a graphene layer (GR) 12 of several molecular layers is formed on the (0001) Si surface of the SiC single crystal substrate 11 to form a first composite body 81. By annealing the SiC single crystal substrate 11 at about 1700° C. in an argon atmosphere at atmospheric pressure, for example, the graphene layer 12 can be formed on the Si surface of the SiC single crystal substrate 11 by thermal decomposition. Alternatively, the graphene layer 12 can be formed by stacking on the SiC single crystal substrate 11 by chemical vapor deposition (CVD). The graphene layer 12 that can be applied to the embodiment is as follows: Figure 6 As shown. The graphene layer 12 has a stacked structure of graphite sheets 121, 122, 123...12n. The graphite sheets 121, 122, 123...12n on each side of the n-layer stacked crystal structure have multiple covalent bonds of hexagonal carbon (C), and the graphite sheets 121, 122, 123...12n on each side are bonded by van der Waals forces. In an embodiment, it can also be a single-layer structure, or a 0-layer bonded to the SiC single crystal substrate 11 as a buffer layer. Figure 7 1 is a flowchart showing a series of steps for forming the first composite body 81 by laminating the graphene layer 12 on the Si surface of the SiC single crystal substrate 11 . (Semiconductor manufacturing equipment) Figure 8 The reactor 210 is a semiconductor manufacturing device that constitutes an embodiment of the film formation of the graphene layer 12. The reactor 210 has a longitudinal tubular furnace chamber 211, and the furnace chamber 211 can store one or more film-forming substrates 200 stacked with a predetermined interval in the vertical direction on a support not shown. The side and top of the furnace chamber 211 are surrounded in sequence from the furnace surface 212 to the outside by a base 215 of a mixed material, a heater 216 of a resistive heating of a carbon-based resistance heating and an infrared reflector containing a high melting point metal such as tungsten (W), molybdenum (Mo), tantalum (Ta), etc., a carbon-based heat insulating material 217, and a metal vacuum bell-shaped water-cooling chamber 218 such as stainless steel. The base 215 is composed of a mixed material obtained by applying silicon carbide coating to silicon carbide ceramics or graphite molded bodies. The space between the base 215 and the water-cooling chamber 218 can be evacuated using a dry vacuum pump to improve thermal insulation. A gas supply hole for supplying gas 201 to the furnace chamber 211 and an exhaust hole for exhausting exhaust gas 202 from the furnace chamber 211 are formed on the bottom plate 213 of the furnace chamber 211. Since the furnace chamber 211 of the reaction furnace 210 extends in a vertical tubular shape, it is possible to store one or more film-forming substrates 200 by a support and perform film-forming processing, so it is also called a batch type vertical tubular furnace. The furnace chamber 211 can be heated from 1500°C to 1800°C. In addition, in the furnace chamber 211, at least one gas of fluorine gas, inert gas such as argon gas, hydrocarbon gas, carbon fluoride gas, nitrogen gas and hydrogen gas can be flowed at a constant flow rate, while the pressure of the internal space can be made independent and controlled at 50Pa to 50kPa. In addition, in the state where no gas is flowing, a turbo pump and a dry vacuum pump can be used to evacuate to a high vacuum of 1×10 -5 Pa. In addition, there is a vacuum pre-loading chamber that can store all the supports in the lower part of the furnace chamber 211 and is made of a material with high high temperature resistance, that is, a pre-chamber that can be evacuated and a lifting mechanism for the supports. These structures have a structure that can infinitely cut off the intrusion of external gas. There is an infrared heater in the vacuum pre-loading chamber, which can heat the supports and the film-forming substrate 200 mounted on the supports to more than 100°C while using a turbo pump and a dry vacuum pump to evacuate to a high vacuum of 1×10 -5 Pa until now. The SiC single crystal substrate 11 to be the film-forming substrate 200 in the reaction furnace 210 is pre-cleaned, dried, and stored in the furnace chamber 211. The SiC single crystal substrate 11 can be cleaned by using a modified RCA method commonly used in semiconductor cleaning. The furnace chamber 211 storing the SiC single crystal substrate 11 is evacuated to a vacuum of 1×10 -5 Below Pa. refer to Figure 7 According to the flowchart, the process of forming a graphene layer 12 on a SiC single crystal substrate 11 is roughly divided into the following processes: surface thermal etching A, which includes steps S12 to S15, in which silicon is etched on the Si surface of the SiC single crystal substrate to leave carbon; and surface thermal decomposition B, which includes steps S16 to S20, in which silicon is sublimated on the Si surface of the SiC single crystal substrate 11 to crystallize the remaining carbon to form the graphene layer 12. according to Figure 7 The flowchart is described in sequence. In the initial step S11, argon (Ar) is supplied to the furnace chamber 211 of the reaction furnace 210 as a carrier gas. In step S12, the atmosphere of the furnace chamber 211 is pressurized in the range of 100Torr to 700Torr, that is, in the range of 13000Pa to 93000Pa, and the furnace chamber 211 is heated. The furnace chamber 211 can also be heated rapidly at a rate of more than 50°C / second using a fast thermal processor. The furnace chamber 211 can be heated by a resistance-heated heater 216 provided in the reaction furnace 210, but it can also be heated by infrared irradiation, and high-frequency induction heating and infrared irradiation heating can also be used. In addition, it is also possible to heat the SiC single crystal substrate 11 rapidly by conveying it in the furnace chamber 211 that has been heated to a high temperature. After the temperature of the furnace chamber 211 reaches 1400° C. from 1200° C., the process proceeds to step S13, and silicon fluoride gas is introduced into the furnace chamber 211. In step S14, silicon (Si) on the Si surface of the SiC single crystal substrate 11 is selectively etched by the silicon fluoride gas to form a carbon (C) layer. Here, from the viewpoint of reaction Gibbs energy, active species suitable for selectively etching Si on the Si surface of the SiC single crystal substrate 11 to form a C layer are studied. First, the reactivity of graphene (C) with various active species is studied. Tables 1 to 4 show the reactivity of graphene with chlorine (Cl2), hydrogen chloride (HCl), hydrogen (H2) and silicon tetrafluoride (SiF 4) The reaction Gibbs energy Gr of the reaction formula. In each table, the standard formation enthalpy ΔH, standard entropy S, and standard formation Gibbs energy Gf corresponding to each substance in the reaction formula are also shown. The standard formation Gibbs energy Gf and the reaction Gibbs energy Gr are values ​​at 25°C and 1500°C, respectively. [Table 1] [Table 2] [Table 3] [Table 4] Referring to Tables 1 to 4, it is observed that the reaction Gibbs energies Gr at 1500°C are all positive and increase in the order of H2, HCl, Cl2, and SiF4, with H2 and HCl being relatively close values. Based on these results, it is inferred that the reactivity with graphene (C) is in the following order. H2≥HCl>Cl2>SiF4 Similarly, for silicon (Si), the reactivity with various active species is also studied by reaction Gibbs energy. Tables 5 to 8 show the reaction Gibbs energy Gr based on the reaction formula of silicon with chlorine (Cl2), hydrogen chloride (HCl), hydrogen (H2) and silicon tetrafluoride (SiF4). [Table 5] [Table 6] [Table 7] [Table 8] Referring to Tables 5 to 8, it is observed that the reaction Gibbs energy Gr at 1500° C. is positive in H 2 , but negative in HCl, Cl 2 , and SiF 4 , and increases in the order of SiF 4 , Cl 2 , HCl , and H 2 . Based on these results, the reactivity with Si is inferred to be in the following order. SiF4>Cl2>HCl>H2 The substances that easily cause graphene etching are also studied from the perspective of reaction Gibbs energy. Tables 9 to 14 below show the reaction Gibbs energy Gr for graphene based on the reaction formula with water (H2O), hydroxyl radicals (OH), oxygen (O2), nitrogen (N2), hydrogen fluoride (HF), dichlorosilane (SiH2Cl2), chlorine (Cl2), hydrogen chloride (HCl), hydrogen (H2), silicon tetrafluoride (SiF4), methane (CH4) and monosilane (SiH4). [Table 9] [Table 10] [Table 11] [Table 12] [Table 13] [Table 14] [Table 15] [Table 16] [Table 17] [Table 18] [Table 19] [Table 20] Referring to Tables 9 to 12, it is observed that the reaction Gibbs energy Gr at 1500° C. is negative in O2, OH, H2O, SiH4, and SiH2Cl2, and increases in sequence, and is positive in H2, N2, CH4, HF, HCl, Cl2, and SiF4 and increases in sequence, H2, N2, CH4, and HF are relatively close values, and HF and HCl are almost the same value. Therefore, it is inferred that the reactivity of the substances with graphene is in the following order. O2>OH>H2O>SiH4>SiH2Cl2>H2≧N2≧CH4≥HF=HCl>Cl2>SiF4 In order to selectively etch the silicon (Si) on the Si surface of the SiC single crystal substrate 11 and form a carbon (C) layer, a substance with high reactivity with Si and low reactivity with graphene is more suitable. After studying the chemical reactivity from the perspective of the reaction Gibbs energy, it is clear that silicon tetrafluoride (SiF4) meets this requirement. It is believed that other silicon fluorides such as disilicon hexafluoride (Si2F6) with similar chemical properties can also be used in the same manner. In addition, higher-order silicon fluoride gases above trisilicon octafluoride (Si3F8) have the property that the higher the compound, the lower the thermal decomposition temperature, and the easier it is to release Si atoms and fluorine atoms. When used to form a carbon layer, although a mechanism is used to selectively etch Si from the surface of the SiC substrate by fluorine atoms to leave carbon, because the higher-order silicon fluoride gas causes the Si partial pressure or vapor pressure in the gas phase to increase excessively, it is easy to produce a reaction called Si vapor pressure etching, that is, the residual carbon reacts with Si to produce a secondary reaction in which Si2C or SiC2 becomes a sublimable compound, and the phenomenon of carbon being etched and disappearing occurs easily, so it is difficult to control. For this reason, in the embodiment, in view of practicality, it is limited to using low-order silicon fluoride gases up to disilicon hexafluoride gas. In addition, although chlorine gas (Cl2) has properties close to those of silicon tetrafluoride (SiF4), when used to form a carbon layer, the reaction Gibbs energy of Cl2's C etching is 624 kJ / mol, compared to 2149 kJ / mol for SiF4. Since the carbon layer needs to be controlled at the atomic level, Cl2 is difficult to use and is considered unsuitable. return Figure 7 In step S13, in the reaction furnace 210 called a batch type vertical tubular furnace, since the heat-averaging length in the furnace chamber 211 is relatively long, it is considered to gradually thermally decompose SiF4 in the furnace chamber 211, and Si2F6 monomer can be used for silicon fluoride, or the mixing ratio of the mixed gas of SiF4 and Si2F6 can be adjusted. In step S14, the Si surface of the SiC single crystal substrate 11 is thermally etched by the silicon fluoride gas introduced into the furnace chamber 211 in step S13 to form a carbon layer. The etching amount of the Si surface is controlled by the introduction time and temperature of the silicon fluoride, and the temperature and gas exposure time conditions are set according to the target number of graphene layers to be formed. When the desired etching amount and number of graphene layers are reached, the supply of silicon fluoride gas to the furnace chamber 211 is stopped in step S15. After the Si surface of the SiC single crystal substrate 11 is etched to form a carbon layer through a surface thermal etching process including steps S12 to S15, the carbon remaining in the Si surface of the SiC single crystal substrate 11 is crystallized by sublimating silicon through a surface thermal decomposition process including steps S16 to S20 to form a graphene layer 12. In step S16, the pressure of the Ar gas atmosphere supplied to the furnace chamber 211 is re-adjusted to 700 Torr, that is, 93000 Pa, and the temperature of the furnace chamber 211 is heated from 1650°C to 1700°C. As in step S12, a rapid thermal processor can be used to quickly increase the temperature at a rate of more than 100°C / second. In addition, as in step S12, the furnace chamber 211 can be heated by the resistance heating heater 216 provided in the reaction furnace 210, but infrared irradiation heating can also be used in combination, and high-frequency induction heating and infrared irradiation heating can also be used. In addition, it is also possible to quickly heat the SiC single crystal substrate 11 in the furnace chamber 211 that has been heated to a high temperature. Thus, by rapidly heating the SiC single crystal substrate 11 in step S16, step-bunching of the SiC single crystal substrate 11 toward the Si layer surface is minimized. By rapidly forming a low-defect O layer (buffer layer) at this stage, sublimation of silicon (Si) can be minimized, maintaining a smooth surface with less progress of bundling. After the temperature of the furnace chamber 211 reaches 1700°C from 1650°C, the process proceeds to step S17, and silicon fluoride gas is introduced into the furnace chamber 211. As described above, in the reaction furnace 210 called a batch type vertical tubular furnace, since the heat-averaging length in the furnace chamber 211 is relatively long, it is considered that SiF4 is gradually thermally decomposed in the furnace chamber 211, and Si2F6 monomer can be used for silicon fluoride, or the mixing ratio of a mixed gas of SiF4 and Si2F6 can be adjusted. In step S18, the Si surface of the SiC single crystal substrate 11 is thermally decomposed by silicon fluoride gas, silicon (Si) is sublimated, and the remaining carbon layer is crystallized and converted into a graphene layer. In this way, the first composite body 81 in which the graphene layer is stacked on the Si surface of the SiC single crystal substrate 11 is formed. When the graphene of the carbon layer is completed, the process proceeds to step S17 and the supply of silicon fluoride gas is stopped. Furthermore, the furnace chamber 211 is cooled in step S20, the supply of Ar gas is stopped in step S21, and then the first composite body 81 is taken out from the furnace chamber 211. In this way, after etching the Si surface of the SiC single crystal substrate 11 by surface thermal etching A including steps S12 to S15 to form a carbon layer, a process including steps S16 to S20 is implemented to crystallize the carbon remaining in the Si surface of the SiC single crystal substrate 11 by sublimating silicon and converting it into a surface thermal decomposition B of the graphene layer 12, thereby forming the first composite body 81 in which the graphene layer is stacked on the Si surface of the SiC single crystal substrate 11. Fig. 9 1 is a flowchart showing a series of steps of forming a first composite body 81 by laminating a graphene layer 12 on the Si surface of a SiC single crystal substrate 11. Figure 7 In the series of steps for forming the graphene layer shown, the step of surface thermal etching A including steps S12 to S15 is omitted, and the step of surface thermal decomposition B including steps S16 to S20 is included, in which the carbon remaining in the Si surface of the SiC single crystal substrate 11 is crystallized and converted into the graphene layer 12. according to Fig. 9 The flowchart of Fig. 9 In a series of processes, Figure 7 The steps from S11 to S21 shown in the figure are marked with common reference symbols, and detailed description is omitted. In step S11, Ar gas is supplied to the furnace chamber 211 of the reaction furnace 210 as a carrier gas. In step S16, the atmosphere of the Ar gas supplied to the furnace chamber 211 is re-adjusted to 700 Torr, that is, 93000 Pa, and the temperature of the furnace chamber 211 is heated from 1650°C to 1700°C. After the temperature of the furnace chamber 211 reaches 1700°C from 1650°C, the process proceeds to step S17, and silicon fluoride gas is introduced into the furnace chamber 211. Silicon fluoride can also be used as Si2F6 monomer, or by adjusting the mixing ratio of a mixed gas of SiF4 and Si2F6. In step S18, the Si surface of the SiC single crystal substrate 11 is thermally decomposed by silicon fluoride gas, silicon (Si) is sublimated, and the remaining carbon layer is crystallized and converted into a graphene layer. The graphene layer can be a single layer or 0 layers (buffer layer). The process proceeds to step S19 and the supply of silicon fluoride gas is stopped, and in step S20 the furnace chamber 211 is cooled, and in step S21 the supply of Ar gas is stopped, and then the first composite body 81 in which the graphene layer is stacked on the Si surface of the SiC single crystal substrate 11 is taken out from the furnace chamber 211. Then, if Fig.10 As shown, in Figure 5 The second composite body 82 is formed by stacking a SiC epitaxial growth layer (SiC-epi) 13 on the graphene layer 12 of the first composite body 81 shown. The SiC epitaxial growth layer 13 is formed on the graphene layer 12 formed on the Si surface of the SiC single crystal substrate 11 by the van der Waals epitaxial growth method. The SiC epitaxial growth layer 13 is a single crystal SiC thin film of α-SiC. The surface of the SiC epitaxial growth layer 13 in contact with the graphene layer 12 becomes the C surface, and the surface of the SiC epitaxial growth layer 13 becomes the Si surface. Fig.11 1 is a flowchart showing a series of steps for forming a second composite body 82 by stacking a SiC epitaxial growth layer 13 on a graphene layer 12 of a first composite body 81. In this series of steps, the semiconductor manufacturing apparatus of the embodiment, that is, the reactor 210 is also used. The film-forming substrate 200 in the reaction furnace 210 is a first composite body 81 in which a graphene layer 12 is layered on the Si surface of a SiC single crystal substrate 11. The graphene layer 12 may be a single layer or zero layer (buffer layer). The furnace chamber 211 storing the first composite body 81 is evacuated to 1×10 -5 Below Pa. In the initial step S21, Ar gas is supplied as a carrier gas to the furnace chamber 211 of the reaction furnace 210. In step S22, the atmosphere of the furnace chamber 211 is adjusted to about 800 Torr, that is, about 110,000 Pa, and heated from 1500°C to 1600°C. The temperature is determined according to the required growth rate and film quality. In the first composite 81, the Si surface of the SiC single crystal substrate 11 is covered with a graphene layer 12, and the graphene layer 12 suppresses the sublimation of Si without step bunching. Therefore, rapid heating is not required, and the heater 216 for resistance heating provided in the reaction furnace can also be used for heating. After the temperature of the furnace chamber 211 reaches 1600°C from 1500°C, the process proceeds to step S23, and silicon fluoride gas and hydrocarbon gas or carbon fluoride gas are introduced into the furnace chamber 211 as material gases for forming the SiC epitaxial growth layer 13. In step S24, the SiC epitaxial growth layer 13 is van der Waals grown on the Si surface of the SiC single crystal substrate 11 with the intervening graphene layer 12 by these material gases. Here, based on the viewpoint of reaction Gibbs energy, the types of material gases suitable for forming SiC epitaxial growth layers are studied. First, the reactivity of silicon tetrafluoride (SiF4) with various carbon fluorides is studied. Tables 21 to 25 show the reactivity of SiF4 with tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4) and fluorinated acetylene (C2HF ) The reaction Gibbs energy Gr of the reaction equation. [Table 21] [Table 22] [Table 23] [Table 24] [Table 25] As shown in Tables 21 to 25, the reaction Gibbs energies at 1500°C based on the reaction equations of SiF4 with CF4, C2F6, C3F8, C2F4 and C2HF are all positive numbers. Therefore, it is estimated that the reaction of SiF4 with these carbon fluorides to form silicon carbide on the right is not likely to occur. The reactivity of silicon tetrafluoride (SiF4) with various hydrocarbons was also studied. Tables 26 to 30 show the reaction Gibbs energies Gr based on the reaction equations of SiF4 with methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4) and acetylene (C2H2). [Table 26] [Table 27] [Table 28] [Table 29] [Table 30] As shown in Tables 26 to 30, the reaction Gibbs energies Gr at 1500°C based on the reaction equations of SiF4 with CH4, C2H6, C3H8, C2H4, and C2H2 are all positive numbers. Therefore, it is inferred that the reaction of SiF4 with these hydrocarbons to generate silicon carbide on the right is not likely to occur. Next, the reactivity of silicon hexafluoride (Si2F6) with various carbon fluorides was studied. Tables 31 to 35 show the reaction Gibbs energies based on the reaction formulas of Si2F6 with tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4) and fluorinated acetylene (C2HF). [Table 31] [Table 32] [Table 33] [Table 34] [Table 35] As shown in Tables 31 to 35, the reaction Gibbs energies Gr at 1500°C based on the reaction equations of Si2F6 with CF4, C2F6, C3F8, C2F4 and C2HF are all positive numbers. Therefore, it is inferred that the reaction of SiF4 with these hydrocarbons to generate silicon carbide on the right is not likely to occur. The reactivity of Si2F6 with various hydrocarbons was also studied. Tables 36 to 40 show the reaction Gibbs energies Gr based on the reaction equations of Si2F6 with methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4) and acetylene (C2H2). [Table 36] [Table 37] [Table 38] [Table 39] [Table 40] As shown in Tables 36 to 40, if CH4 is excluded, the reaction Gibbs energy Gr at 1500°C based on the reaction formulas of Si2F6 with C2H6, C3H8, C2H4, and C2H2 is positive. Therefore, it is considered that the reaction of Si2F6 with these hydrocarbons to generate silicon carbide on the right is not likely to occur. In the case of CH4, since the reaction Gibbs energy with Si2F6 at 1500°C is negative, the reaction to generate silicon carbide on the right side of the reaction formula may proceed. Therefore, when using a combination of Si2F6 and CH4 for the material gas, research is required. Thus, when studying chemical reactivity based on the viewpoint of reaction Gibbs energy, it is clear that the reaction Gibbs energy of silicon tetrafluoride (SiF4) and silicon hexafluoride (Si2F6) with various carbon fluorides or hydrocarbons is approximately positive at a temperature of about 1500°C for forming SiC epitaxial growth layer 13, and the reaction to generate silicon carbide does not proceed spontaneously. Therefore, in the furnace chamber 211 of the reaction furnace 210, even if SiF4 and Si2F6 are used with various carbon fluorides or hydrocarbons as material gases in an atmosphere of about 1500°C, the reaction to generate silicon carbide does not occur, and it is believed that on the Si surface of the SiC single crystal substrate 11, the single crystal gradually grows epitaxially at the interface of the intervening graphene layer 12. return Fig.11 In step S23, when silicon fluoride and hydrocarbon are introduced into the furnace chamber 211 as material gases for forming the SiC epitaxial growth layer 13, in the reaction furnace 210 called a batch type vertical tubular furnace, since the heat soaking length in the furnace chamber 211 is relatively long, it is considered to gradually thermally decompose silicon tetrafluoride (SiF4) in the furnace chamber 211, and silicon hexafluoride (Si2F6) monomer can be used for silicon fluoride, or the mixing ratio of the mixed gas of SiF4 and Si2F6 can be adjusted. Methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4) and acetylene (C2H2) can also be used for hydrocarbons. Although a combination of silicon fluoride and hydrocarbon has been shown as a material gas, a combination of silicon fluoride and carbon fluoride may be used instead of or in addition to the combination. Tetrafluoromethane (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), tetrafluoroethylene (C2F4), fluoroacetylene (C2HF), etc. may also be used for carbon fluoride. In addition, silicon fluoride is not limited to silicon tetrafluoride (SiF4), and other silicon fluorides such as disilicon hexafluoride (Si2F6) may also be used. In addition, as mentioned above, higher-order silicon fluoride gases above octasilicon fluoride (Si3F8) have the property that the higher the compound, the lower the thermal decomposition temperature, and the easier it is to release Si atoms and fluorine atoms. When used for SiC epitaxial growth, Si precursor gas (silicon fluoride gas) and carbon precursor gas (carbon fluoride gas) are used to adjust the composition ratio of the grown SiC single crystal to Si:C=1:1 (stoichiometric composition ratio = stoichiometry). However, higher-order silicon fluoride gases above octasilicon fluoride gas are easy to decompose at relatively low temperatures. In contrast, it is necessary to balance the carbon supply from the carbon fluoride gas, and the carbon silicon gas needs to use a higher-order compound. In this case, the decomposition process of each gas in the furnace becomes easy to proceed, and the optimization adjustment of the batch and surface uniformity of the stoichiometry becomes difficult. In this case, if the growth temperature is lowered, it is easy to perform optimization adjustment, but on the contrary, due to the increase of polymorphic mixing = inclusions, the crystal quality of SiC is easy to decline. For such reasons, in the embodiment, the use of low-order silicon fluoride gases up to disilicon hexafluoride gas is limited in view of practicality. In addition, as mentioned above, although chlorine (Cl2) has properties close to silicon tetrafluoride (SiF4), when used for SiC epitaxial growth, Cl2 is a compound that does not contain Si or C and cannot be used as a deposition gas. Although it can also be considered as an added gas, since deposition gases such as SiF4 or C2F6 are less likely to etch carbon than Cl2 and are easy to store, it is believed that there is almost no advantage in adding Cl2. In step S24, when the SiC epitaxial growth layer 13 grown on the graphene layer 12 reaches the required thickness and the second composite body 82 in which the SiC epitaxial growth layer 13 is stacked on the SiC single crystal substrate 11 with the graphene layer 12 interposed therebetween is formed, the supply of the material gas is immediately stopped in step S25. In addition, the furnace chamber 211 is cooled in step S26, the supply of the Ar gas is stopped in step S27, and then the second composite body 82 is taken out from the furnace chamber 211. In addition, the Ar gas of the carrier gas may be switched to hydrogen gas in the middle of forming the SiC epitaxial growth layer 13. Thus, useless deposits on the inner wall of the furnace chamber 211, etc. can be almost completely suppressed, so that the maintenance cycle and the life of the fixture in the furnace can be extended. (Semiconductor Manufacturing Apparatus According to Modification Example) Fig.12 FIG. 2 is a diagram showing a reactor 220 of a modified example. Figure 7 and Fig. 9 The series of steps for forming the first composite body 81 shown in FIG. Fig.11 In the step of forming the second composite body shown in FIG. Figure 8 The reactor 210 shown is also called a batch type vertical tubular furnace, but it can also be used Fig.12A reaction furnace 220 of a modified example is shown as a semiconductor manufacturing apparatus of a modified example. In the furnace chamber 221 of the reaction furnace 220 of the variation, a workbench 225 capable of placing a plurality of film-forming substrates 200 on the top surface and a shield 226 facing the workbench 225 with a predetermined gap above the workbench 225 are supported by pillars extending from the bottom plate 223 and the top plate 224 of the furnace chamber 221, respectively. A gas supply hole for supplying a gas 201 is provided at the approximate center of the bottom surface of the shield 226. In addition, an exhaust port for exhausting an exhaust gas 202 from the furnace chamber 221 is provided at the bottom plate 223 of the furnace chamber 221. The workbench 225 and the shield 226 each have a heater 227 for resistance heating. The surfaces of the workbench 225 and the shield 226 and the furnace wall 222 are formed by a SiC susceptor 231, and are further surrounded by a heat insulating material 232 and a water cooling chamber 233. The surfaces of the workbench 225 and the shield 226 are also covered by the SiC susceptor. The reaction furnace 220 of the variation is also called a semi-batch reactor. In the reactor 220 of the modified example, similarly to the reactor 210 of the embodiment, Figure 7 and Fig. 9 The series of steps shown in FIG. 8 forms the first composite body 81. Fig.11 The series of steps shown in FIG. 1 forms the second composite body 82. However, the reactor 220 of the modified example called a semi-batch reactor has a shorter soaking length than the reactor 210 of the embodiment called a batch type vertical tubular furnace. Therefore, it is possible to use silicon tetrafluoride (SiF4) alone for the silicon fluoride gas without considering the loss caused by the decomposition of silicon tetrafluoride (SiF4). like Fig.13 As shown, a stress layer 14 is formed on the SiC epitaxial growth layer 13 of the second composite body 82 to form a third composite body 83. The stress layer 14 generates stress between the graphene layer 12 and the SiC epitaxial growth layer 13, making it easy to peel the graphene layer 12 and the SiC epitaxial growth layer 13. The stress layer 14 of the embodiment is composed of a carbon film. The carbon film is composed of a polycrystalline diamond film or a diamond-like carbon film. In the case where the carbon film is a polycrystalline diamond film, it can be obtained by a microwave chemical vapor deposition (CVD) device or the like, and in the case where it is a diamond-like carbon film, it can be obtained by an RF (Radio Frequency) plasma chemical vapor deposition (CVD) device or the like. When the carbon film is formed, a negative potential is applied to the film-forming substrate side at the initial stage of film formation to impart ion impact to the film-forming side, so that the desired film adhesion can be obtained. like Fig.14As shown, an adhesive layer 16 is formed on the stress layer 14 of the third composite body 83, and a fourth composite body 84 is formed by overlapping and attaching the coated surface of the adhesive layer 16 to a single surface of a temporary substrate graphite substrate 19 having an outer dimension slightly larger than that of the SiC single crystal substrate 11. In the embodiment, a carbon adhesive is used for the adhesive layer 16. The carbon adhesive is an adhesive that has a phenolic resin, which is a thermosetting resin, as a main component and is blended with a solid carbon component and the like, and can maintain bonding strength even at high temperatures by carbonizing the adhesive itself. The graphite substrate 19 may have a glassy carbon film on the surface. Since the glassy carbon film has a strong adhesive force with the carbon adhesive, the SiC epitaxial growth layer 13 can be easily peeled off from the graphene layer 12 and the SiC single crystal substrate 11, and the yield can be improved. As the graphite substrate 19 of the temporary substrate having a larger outer dimension, for example, if the SiC single crystal substrate 11 has a diameter of about 10 cm, then a graphite substrate 19 having an outer dimension of about 11 cm, which is about 10 mm larger, is used. For example, if the SiC single crystal substrate 11 has a diameter of about 15 cm, then a graphite substrate 19 having an outer dimension of about 16 cm is used. When the temporary substrate (graphite substrate 19) having a size larger than that of the SiC single crystal substrate 11 is inserted and arranged neatly in the wafer boat slot of the batch type vertical CVD furnace, there is an advantage that the wafer boat support mark is located outside the effective area of ​​the substrate. like Fig.15 As shown, the stress layer 14 of the third composite 83 may be attached to both surfaces of the graphite substrate 19 of the temporary substrate via the adhesive layer 16 to form the fifth composite 85. In this case, the adhesive layer 16 is formed on the stress layer 14 of each third composite 83, and is attached from both surfaces to the graphite substrate 19 of the temporary substrate whose outer dimensions are slightly larger than the SiC single crystal substrate 11. Regarding the fifth composite 85, an adhesive having a thermosetting resin such as a carbon adhesive as a main component and a solid carbon component as a blend is used for the adhesive layer 16, and the adhesive layer 16 is dried and cured by heating in a vacuum annealing furnace or the like. Regarding the fifth composite 85, the graphite substrate 19 of the temporary substrate may also have a glassy carbon film on the surface, which is similar to Fig.14 The fourth composite body 84 shown is the same. In the following, although the fifth composite body 85 in which the third composite body 83 is attached to both sides of the graphite substrate 19 of the temporary substrate is described, the manufacturing method can also be applied to the fourth composite body 84 in which the third composite body 83 is attached to only one side of the graphite substrate 19 of the temporary substrate. like Fig.16 As shown, in Fig.15After the fifth composite 85 is solidified, the SiC epitaxial growth layer 13 is physically peeled off from the interface of the graphene layer 12 using an adhesive peeling tape, a debonding device, etc. on both sides of the fifth composite 85 to separate it. After removing the SiC single crystal substrate 11 and the graphene layer 12 separated from the fifth composite 85, the sixth composite 86 is formed. The graphene layer 12 is removed from the stack of the SiC single crystal substrate 11 and the graphene layer 12 removed from the fifth composite body 85 by etching or polishing. In the process of etching the graphene layer 12, plasma ashing by oxygen plasma, for example, can be applied. In the Si surface of the SiC single crystal substrate 11 where the graphene layer 12 is etched by oxygen plasma, wet etching with hydrogen fluoride (HF) is performed because the surface is oxidized. In addition, in the process of polishing the graphene layer 12, the graphene layer 12 is removed by, for example, chemical mechanical polishing (CMP). Here, in the Si surface of the SiC single crystal substrate 11, the average roughness Ra of the surface in the wet etching process is, for example, less than about 1 nm. As a result, the SiC single crystal substrate 11 can be reused. Fig.17 The sixth composite body 86 is shown. The sixth composite body 86 is heated in an annealing furnace in a vacuum or inert gas atmosphere to carbonize the adhesive layer 16. The carbon adhesive constituting the adhesive layer 16 can obtain a suitable adhesive strength after the carbonization treatment. like Fig.18 As shown, a SiC polycrystalline growth layer (SiC-poly) 17 is formed on the C-face of the SiC epitaxial growth layer 13 of the sixth composite 86. For example, the SiC polycrystalline growth layer 17 can be formed by CVD technology. The SiC polycrystalline growth layer 17 has a 3C (cubic crystal) structure, also known as α-SiC. By forming the SiC polycrystalline growth layer 17 on the C-face of the SiC epitaxial growth layer 13, a matrix layer of the device wafer structure is formed. Because the C-face of the SiC epitaxial growth layer 13 becomes the back side of the device wafer structure, the surface flatness requirement is not high. Therefore, the SiC polycrystalline growth layer 17 can be formed by a simple grinding process. The SiC polycrystalline growth layer 17 is deposited to a thickness that can obtain the mechanical strength required as a substrate for a SiC-based semiconductor device, forming the seventh composite body 87. The film thickness of the SiC polycrystalline growth layer 17 is expected to be about 150 μm to 500 μm, and the thickness of the completed SiC composite substrate (SiC polycrystalline growth layer 17 + SiC epitaxial growth layer 13) is adjusted to about 150 μm to 500 μm as needed. By reducing the film thickness of the SiC polycrystalline growth layer 17, thermal conductivity is improved. In addition, the deposition temperature of the SiC polycrystalline growth layer 17 is expected to be in the range of 1300°C to 1600°C. like Fig.19As shown, the SiC polycrystalline growth layer 17 formed on the periphery of the seventh composite body 87 and the useless portion of the graphite substrate 19 of the temporary substrate are ground and removed by a peripheral grinding device, thereby forming an eighth composite body 88 in which the SiC epitaxial growth layer 13, the stress layer 14, the adhesive layer 16 and the graphite substrate 19 are exposed. In the eighth composite body 88, by exposing the graphite substrate 19, etc., the graphite substrate 19, etc. can be removed by burning. Fig.19 In the figure, the outer periphery of the 8th composite body 88 has a unique contour in the direction of stacking of each layer. like Fig. 20 As shown, the eighth composite 88 is heated in a thermal annealing furnace in air or oxygen atmosphere, and the graphite substrate 19 and the carbonized bonding layer 16 are removed by oxidation combustion. The stress layer 14 composed of a carbon film is also removed by oxidation combustion to form a ninth composite 89. The ninth composite 89 is composed of two blocks of a SiC composite substrate 10, and the SiC composite substrate 10 has a SiC epitaxial growth layer 13 and a SiC polycrystalline growth layer 17 arranged on the C surface of the SiC epitaxial growth layer 13. At Fig.21 1 is a cross-sectional view of SiC composite substrate 10. Fig. 22 1 shows a bird's-eye view of the SiC composite substrate 10. In the SiC composite substrate 10, the surface of the SiC epitaxial growth layer 13 is a Si plane of α-SiC in the

[0001] orientation of 4H-SiC, and the C plane is a plane of 4H-SiC in the [000-1] orientation. The thickness of the SiC polycrystalline growth layer 17 is, for example, about 150 μm to about 500 μm, and the thickness of the SiC epitaxial growth layer 13 is, for example, about 4 μm to about 100 μm. In addition, if Fig.23 As shown, in the SiC epitaxial growth layer 13, a high concentration doping layer 13a may also be formed toward the C-face of the SiC epitaxial growth layer 13 in contact with the SiC polycrystalline growth layer 17. The high concentration doping layer 13a can suppress the expansion of the depletion layer expanding in the SiC epitaxial growth layer 13, and easily form an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C-face of the SiC epitaxial growth layer 13. The high-concentration doped layer 13a can be formed using, for example, a high-dose ion implantation technique. For example, in the case of an n-type semiconductor, phosphorus (P) ions are implanted at a high dose to form the high-concentration doped layer 13a. In the case of formation by P ion implantation, although the crystallinity of the C surface of the SiC epitaxial growth layer 13 into which the P ions are implanted is affected, the Si surface that becomes the device surface is already formed, and the crystallinity of the Si surface is preserved. Also available in Fig.10When forming the SiC epitaxial growth layer (SiC-epi) 13, a high concentration doped layer 13a is formed by forming a high concentration nitrogen (N) doped epitaxial growth layer in the initial stage. In the high concentration nitrogen (N) doped epitaxial growth layer, although there is an influence on the crystallinity due to the lattice constant mismatch, the process is relatively easy because it is formed by self-doping in the initial stage of epitaxial growth. (Semiconductor Manufacturing Method According to Modification Example) In the embodiment, the stress layer 14 is composed of a carbon film such as a polycrystalline diamond film or a diamond-like carbon film, but in a modified example, a silicon nitride film is used as the stress layer 15 of the modified example. like Fig.24 As shown, a stress layer 15 of a modified example is stacked on the SiC epitaxial growth layer 13 of the second composite 82 to form a tenth composite 90. The stress layer 15 of the modified example also generates stress between the graphene layer 12 and the SiC epitaxial growth layer 13, making it easy to peel the graphene layer 12 and the SiC epitaxial growth layer 13. like Fig.25 As shown, an adhesive layer 16 is formed on the stress layer 15 of the variation of the tenth composite body 90, and the coated surface of the adhesive layer 16 is overlapped and attached to one side of the graphite substrate 19 of the temporary substrate to form an eleventh composite body 91. The eleventh composite body 91 is heated in a vacuum annealing furnace or the like to dry and cure the adhesive layer 16. like Fig.26 As shown, the stress layers 15 of the modified example of the tenth composite body 90 may be attached to both surfaces of the graphite substrate 19 of the temporary substrate via the adhesive layers 16 to form the twelfth composite body 92. The twelfth composite body 92 is heated in a vacuum annealing furnace to dry and cure the adhesive layers 16. In the case of the 11th composite body 91 in which the 10th composite body 90 is attached to one side of the graphite substrate 19 as a temporary substrate, or in the case of the 12th composite body 92 in which the 10th composite body 90 is attached to both sides of the graphite substrate 19, the following is the same as in the embodiment, that is, the graphite substrate 19 can have a glassy carbon film on the surface by using a carbon adhesive for the adhesive layer 16, and by using the graphite substrate 19 as a temporary substrate whose outer dimensions are slightly larger than those of the SiC single crystal substrate 11, there is an advantage that the wafer boat support mark is located outside the substrate effective area when inserted and aligned in the wafer boat slot of the batch type vertical CVD furnace. In the following, although the 12th composite body 92 in which the 10th composite body 90 is attached to both sides of the graphite substrate 19 is used for explanation, the same is true for the 11th composite body 91 in which the 10th composite body 90 is attached to only one side of the graphite substrate 19. By implementing the 12th complex 92 Figure 16 to Figure 19 The same process as shown in the embodiment is formed Fig. 27The 13th composite body 93 shown. In detail, the SiC epitaxial growth layer 13 is physically peeled off and separated from the interface of the graphene layer 12 to remove the SiC single crystal substrate 11 and the graphene layer 12, the remaining composite body is heated and the bonding layer 16 is carbonized, and then the SiC polycrystalline growth layer 17 is formed on the C surface of the SiC epitaxial growth layer 13. In addition, the SiC polycrystalline growth layer 17 formed on the periphery and the useless part of the graphite substrate 19 of the temporary substrate are ground and removed by a peripheral grinding device, and the graphite substrate 19 and the carbonized bonding layer 16 are heated in the air or oxygen atmosphere. Oxidation combustion and removal. Because the stress layer 15 of the variation is composed of silicon nitride, unlike the stress layer 14 formed by the carbon film of the embodiment, the graphite substrate 19 and the carbonized bonding layer 16 remain after being removed by oxidation combustion. The stress layer 15 of the modified example made of silicon nitride in the 13th composite body 93 is removed by an appropriate method such as etching or grinding. Etching can be performed by dry etching using carbon fluoride gas plasma or wet etching using hot phosphoric acid. Fig. 20 Similarly to the ninth composite body 89 of the embodiment shown, two blocks of the SiC composite substrate 10 including the SiC epitaxial growth layer 13 and the SiC polycrystalline growth layer 17 arranged on the C-plane of the SiC epitaxial growth layer 13 can be obtained. (Semiconductor Substrate) The semiconductor substrate of the embodiment is as follows Fig.13 As shown in the third composite 83, a graphene layer 12 is arranged on the Si surface of the SiC single crystal substrate 11, a SiC epitaxial growth layer 13 is arranged on the graphene layer 12, and a stress layer 14 is further arranged on the SiC epitaxial growth layer 13. The stress layer can be composed of a carbon film such as a polycrystalline diamond film or a diamond-like carbon film, and can also be formed of a silicon nitride film. The semiconductor substrate of this embodiment forms a SiC epitaxial growth layer 13 in an atmosphere containing fluorine such as silicon fluoride or carbon fluoride. The SiC epitaxial growth layer 13 contains fluorine. In the conventional SiC epitaxial growth, nitrogen in the atmosphere mainly enters the C site of the SiC crystal structure (C and N substitution), usually at a concentration of 10 mol / cm3. 15 to 10 18 However, in the semiconductor substrate of the embodiment, since the reactivity of fluorine with Si is higher than that of nitrogen, a part of the nitrogen impurity concentration is replaced by fluorine. The fluorine concentration is about 10 per cubic centimeter. 15 From the semiconductor substrate of this embodiment, the manufacturing method of the semiconductor substrate according to the embodiment can obtain Fig.21 The SiC composite substrate 10 is shown. In detail, you can Fig.14As shown, the stress layer 14 of the third composite 83 is attached to one side of the graphite substrate 19 of the temporary substrate via the adhesive layer 16, or as shown in FIG. Fig.15 As shown, the stress layer 14 of the third composite body 83 is attached to both sides of the graphite substrate 19 via the adhesive layer 16 to form the fifth composite body 85. The outer dimensions of the graphite substrate 19 can be larger than the SiC single crystal substrate 11, and it can also have a glassy carbon film on the surface. The adhesive layer 16 can also be composed of a carbon adhesive. Taking the fifth composite body 85 as an example, after the adhesive layer 16 is cured, Fig.16 As shown, the SiC epitaxial growth layer 13 is physically peeled off and separated from the interface of the graphene layer 12, and the SiC single crystal substrate 11 and the graphene layer 12 are removed to form the sixth composite 86. Then, as shown in Fig.18 As shown in FIG. 1 , a SiC polycrystalline growth layer 17 is formed on the C surface of the SiC epitaxial growth layer 13 of the sixth composite body 86, and after grinding the periphery, the graphite substrate 19, the adhesive layer 16 and the stress layer 14 of the temporary substrate are removed. Fig. 20 As in the ninth composite body 89 shown, a SiC composite substrate 10 can be obtained in the upper and lower blocks. (Semiconductor components) The SiC composite substrate 10 manufactured by the manufacturing method of the semiconductor substrate of the embodiment or the SiC composite substrate 10 manufactured from the semiconductor substrate of the embodiment can be used, for example, for the manufacture of various SiC-based semiconductor elements. As an example thereof, the following describes an example of SiC-SBD, SiC trench gate (T: Trench) type TMOSFET, and SiC planar gate type MOSFET. (SiC-SBD) As a semiconductor device made using a SiC composite substrate, SiC-SBD20 Fig.28 As shown, there is a SiC composite substrate 10 including a SiC polycrystalline growth layer (SiC-poly) 17 and a SiC epitaxial growth layer (SiC-epi) 13. In addition, a high concentration doping layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. Here, the high concentration doping layer 13a can suppress the expansion of the depletion layer expanding in the SiC epitaxial growth layer 13, and easily form an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C surface of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 is a drift layer, the high concentration doping layer 13a is a buffer layer, and the SiC polycrystalline growth layer 17 is a matrix layer. The SiC polycrystalline growth layer 17 is doped with n + type (impurity density is, for example, about 1×10 18 cm -3 To about 1×10 21 cm -3), the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 To about 5×10 16 cm -3 The high-concentration doped layer 13 a is doped at a higher concentration than the SiC epitaxial growth layer 13 . In addition, the SiC epitaxial growth layer 13 may have any crystal structure of 4H-SiC, 6H-SiC, or 2H-SiC. As the n-type dopant impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used. As the p-type dopant impurity, for example, B (boron), Al (aluminum), or the like can be applied. The back surface ((000-1) C surface) of the SiC polycrystalline growth layer 17 includes a cathode electrode 21 covering the entire surface thereof. The cathode electrode 21 is connected to a cathode terminal K. The front surface 13 b (eg, (0001) Si surface) of the SiC epitaxial growth layer 13 includes a contact hole 23 for exposing a portion of the SiC epitaxial growth layer 13 as an active region 22 , and a field insulating film 25 is formed in a field region 24 surrounding the active region 22 . The field insulating film 25 includes SiO2 (silicon dioxide), but may also include other insulating materials such as silicon nitride (SiN). An anode electrode 26 is formed on the field insulating film 25, and the anode electrode 26 is connected to the anode terminal A. A p-type JTE (Junction Termination Extension) structure 27 is formed near the front surface 13b (surface portion) of the SiC epitaxial growth layer 13 so as to be in contact with the anode electrode 26. The JTE structure 27 is formed along the contour of the contact hole 23 so as to extend across the inside and outside of the contact hole 23 of the field insulating film 25. (SiC-TMOSET) As a semiconductor device manufactured using the SiC composite substrate 10 of the embodiment, a trench gate type TMOSFET 30 is shown. Fig.29 As shown, a SiC composite substrate 10 including a SiC polycrystalline growth layer 17 and a SiC epitaxial growth layer 13 is provided. In addition, a high concentration doping layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. Here, the high concentration doping layer 13a can suppress the expansion of the depletion layer expanding in the SiC epitaxial growth layer 13, and easily form an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C surface of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 is a drift layer, the high concentration doping layer 13a is a buffer layer, and the SiC polycrystalline growth layer 17 is a matrix layer. The SiC polycrystalline growth layer 17 is doped with n + type (impurity density is, for example, about 1×10 18 cm -3 To about 1×10 21 cm -3 ), the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 To about 5×10 16 cm -3 The high-concentration doped layer 13 a is doped at a higher concentration than the SiC epitaxial growth layer 13 . In addition, the SiC epitaxial growth layer 13 may have any crystal structure of 4H-SiC, 6H-SiC, or 2H-SiC. As the n-type dopant impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used. As the p-type dopant impurity, for example, B (boron), Al (aluminum), or the like can be applied. The back surface ((000-1)C surface) of the SiC polycrystalline growth layer 17 includes a drain electrode 31 that covers the entire surface thereof. The drain electrode 31 is connected to a drain terminal D. A p-type (impurity density of, for example, about 1×10 16 cm -3 To about 1×10 19 cm -3 ) of the main body region 32. In the SiC epitaxial growth layer 13, the portion on the SiC polycrystalline growth layer 17 side relative to the main body region 32 is an n-type portion that maintains the state of the SiC epitaxial growth layer 13. - Type drain region 33 (13). A gate trench 34 is formed in the SiC epitaxial growth layer 13. The gate trench 34 penetrates the body region 32 from the surface 13b of the SiC epitaxial growth layer 13, and its deepest portion reaches the drain region 33 (13). A gate insulating film 35 is formed on the inner surface of the gate trench 34 and the surface 13b of the SiC epitaxial growth layer 13 so as to cover the entire inner surface of the gate trench 34. Furthermore, by filling the inner side of the gate insulating film 35 with polysilicon, for example, a gate electrode 36 is buried in the gate trench 34. The gate terminal G is connected to the gate electrode 36. In the surface layer portion of the body region 32, an n-type layer which forms a part of the side surface of the gate trench 34 is formed. + Type source region 37. In addition, in the SiC epitaxial growth layer 13, a p-type electrode connected to the body region 32 is formed from the surface 13b thereof through the source region 37. + type (impurity density is, for example, about 1×10 18 cm -3 To about 1×10 21 cm -3 )'s main body contact area 38. An interlayer insulating film 41 made of SiO 2 is formed on the SiC epitaxial growth layer 13. The source electrode 43 is connected to the source region 37 and the body contact region 38 via a contact hole 42 formed in the interlayer insulating film 41. The source terminal S is connected to the source electrode 43. By applying a predetermined voltage (a voltage higher than the gate threshold voltage) to the gate electrode 36 while a predetermined potential difference is generated between the source electrode 43 and the drain electrode 31 (between the source and the drain), a channel can be formed near the interface between the body region 32 and the gate insulating film 35 by the electric field from the gate electrode 36. Thus, a current can flow between the source electrode 43 and the drain electrode 31, and the SiC-TMOSPET 30 can be turned on. (SiC planar gate MOSFET) As a semiconductor device manufactured using the SiC composite substrate 10, a planar gate type MOSFET 50 is shown in FIG. Fig.30 As shown, a SiC composite substrate 10 including a SiC polycrystalline growth layer 17 and a SiC epitaxial growth layer 13 is provided. In addition, a high concentration doping layer 13a may be interposed between the SiC polycrystalline growth layer 17 and the SiC epitaxial growth layer 13. Here, the high concentration doping layer 13a can suppress the expansion of the depletion layer expanding in the SiC epitaxial growth layer 13, and easily form an ohmic contact with the SiC polycrystalline growth layer 17 formed on the C surface of the SiC epitaxial growth layer 13. The SiC epitaxial growth layer 13 is a drift layer, the high concentration doping layer 13a is a buffer layer, and the SiC polycrystalline growth layer 17 is a matrix layer. The SiC polycrystalline growth layer 17 is doped with n + type (impurity density is, for example, about 1×10 18 cm -3 To about 1×10 21 cm -3 ), the SiC epitaxial growth layer 13 is doped with n - type (impurity density is, for example, about 5×10 14 cm -3 To about 5×10 16 cm -3 ). In addition, the SiC epitaxial growth layer 13 may have any crystal structure of 4H-SiC, 6H-SiC, or 2H-SiC. As the n-type dopant impurity, for example, N (nitrogen), P (phosphorus), As (arsenic), etc. can be used. As the p-type dopant impurity, for example, B (boron), Al (aluminum), or the like can be applied. A drain electrode 51 is formed on the back surface ((000-1) C plane) of the SiC composite substrate 10 so as to cover the entire area, and a drain terminal D is connected to the drain electrode 51 . In the vicinity (surface portion) of the front surface 13 b ((0001) Si plane) of the SiC epitaxial growth layer 13, p-type (impurity density is, for example, about 1×10 16 cm -3 To about 1×10 19 cm -3 ) is formed in a well shape. In the SiC epitaxial growth layer 13, the portion on the SiC composite substrate 10 side relative to the body region 52 is n-shaped to maintain the state after epitaxial growth. - Type drain region 53 (13). On the surface layer of the main body region 52, n + Type source region 54. Inside the source region 54, p + type (impurity density is, for example, about 1×10 18 cm -3 To about 1×10 21 cm -3 ) of the main body contact region 55. The main body contact region 55 penetrates the source region 54 in the depth direction and is connected to the main body region 52. A gate insulating film 56 is formed on the surface 13 b of the SiC epitaxial growth layer 13 . The gate insulating film 56 covers a portion of the body region 52 surrounding the source region 54 (the peripheral edge of the body region 52 ) and the outer peripheral edge of the source region 54 . A gate electrode 57 made of, for example, polysilicon is formed on the gate insulating film 56. The gate electrode 57 faces the peripheral portion of the body region 52 via the gate insulating film 56. The gate terminal G is connected to the gate electrode 57. An interlayer insulating film 58 made of SiO2 is formed on the SiC epitaxial growth layer 13. A source electrode 62 is connected to the source region 54 and the body contact region 55 via a contact hole 61 formed in the interlayer insulating film 58. A source terminal S is connected to the source electrode 62. By applying a predetermined voltage (a voltage higher than the gate threshold voltage) to the gate electrode 57 while a predetermined potential difference is generated between the source electrode 62 and the drain electrode 51 (between the source and the drain), a channel can be formed near the interface between the body region 52 and the gate insulating film 56 by the electric field from the gate electrode 57. Thus, a current can flow between the source electrode 62 and the drain electrode 51, and the planar gate type MOSFET 50 can be turned on. As described above, according to the embodiment, the step of thermally etching A on the surface (refer to Figure 7 ), a silicon fluoride gas that selectively performs thermal etching on the surface of silicon (Si) is introduced into the atmosphere. As a result, Si is etched from the SiC surface to form an amorphous carbon layer that serves as a graphene precursor. Subsequently, by thermally decomposing B on the surface (refer to Figure 7 ) is heated to above 1600°C, and the carbon concentration on the surface is further increased by selective Si sublimation, and the amorphous carbon layer formed in advance is supplied with sufficient carbon during graphene crystallization, so that a low-defect graphene layer 12 can be formed. In addition, silicon fluoride gas can be introduced into the atmosphere during the process of surface thermal decomposition B. Thus, according to the embodiment, a low-defect graphene layer 12 can be formed. Therefore, when the SiC epitaxial growth layer 13 is formed by the van der Waals epitaxial growth method in the next step, the resistance to graphene etching by residual air components and Si precursor decomposition products existing in the furnace chamber 211 can be improved. Alternatively, the surface thermal etching step A may be omitted and the surface thermal decomposition step B may be performed from the beginning. In the surface decomposition step B, silicon fluoride gas may be used to form graphene (see Fig. 9 ). In this case, since the process of surface thermal etching A is not necessary and the process of surface thermal decomposition B is sufficient, the man-hours are reduced and the manufacturing cost is also reduced. In the embodiment, since Ar gas, which is an inert gas, is used as a carrier gas when forming the SiC epitaxial growth layer 13 by the van der Waals epitaxial growth method, parasitic accumulation is generated on the furnace wall 211 of the reaction furnace 210, or the formation of gas phase nuclei and particles increases, there is a concern that the crystal quality of the SiC epitaxial growth layer 13 will be reduced. However, in the embodiment, since the silicon fluoride gas used as the material gas of silicon (Si) in the van der Waals epitaxial growth method has the characteristic of strongly reacting with Si and removing it, the increase of parasitic accumulation and the formation of gas phase nuclei and particles can be strongly suppressed. In an embodiment, silicon fluoride gas is used as the material gas of Si for the SiC epitaxial growth layer 13 using the van der Waals epitaxial growth method, and hydrocarbon gas is used as the material gas of C. Among them, silicon fluoride gas hardly reacts with C, but in the case of the coexistence of silicon fluoride gas, there is a reaction path that produces hydrogen fluoride (HF) that reacts weakly with graphene as a secondary reaction of their decomposition products. However, because the fluorine (F, F2) released from the decomposition of silicon fluoride gas is highly reactive with Si, in general, the use of silicon fluoride gas can better suppress the etching of graphene than the case where silane (SiH4) or dichlorosilane (Si2H2Cl2) is used as the material gas of Si. In addition, as the material gas of C, carbon fluoride gas is sometimes used together with or instead of hydrocarbon gas, but in this case, the etching of graphene can also be suppressed. According to an embodiment, before forming the SiC polycrystalline growth layer 17 by CVD, by separating the SiC single crystal substrate 11 and replacing it with a temporary substrate of a highly heat-resistant graphite substrate 19, useless attachment of polycrystalline SiC to the SiC single crystal substrate 11 can be prevented, thereby maximizing the reusability of the SiC single crystal substrate 11 and further reducing costs. In the embodiment, the stress layer 14 is formed of a carbon film (polycrystalline diamond film or diamond-like carbon film). In a variation, the stress layer 15 is formed by a silicon nitride film, and the internal stress and thermal stress of the film are used to make it easy to peel the SiC epitaxial growth layer 13 from the graphene layer 12. In addition, this can avoid metal contamination that is a problem when using a metal stress film. The carbon film or silicon nitride film has the characteristics of good adhesion to the substrate, excellent high heat resistance, and the ability to obtain a large stress. According to the embodiment, by setting the graphite substrate 19 to be slightly larger than the SiC single crystal substrate 11, it is possible to use a batch type vertical tubular furnace or other epitaxial growth device to perform single-sided or double-sided epitaxial growth, reasonably increase the growth rate, and achieve high-yield and low-cost production. In addition, the graphite substrate 19 and the carbonized bonding layer 16 can be removed cheaply by only firing in an oxidation furnace or the like. According to the embodiment, since the SiC is subjected to van der Waals epitaxial growth through the graphene formed on the SiC single crystal substrate, and a SiC polycrystalline growth layer is formed thereon by a direct CVD method, substrate bonding is not required, and defects caused by substrate bonding can be eliminated. In addition, since the epitaxial growth layer is formed through the graphene, separation of the SiC single crystal substrate and the epitaxial growth layer becomes easy, the process steps become simple, and expensive processes such as ion implantation and stripping are not required. According to the implementation method, after removing the SiC single crystal substrate, each highly heat-resistant operating substrate is placed in a high-temperature LP-CVD device to allow the SiC polycrystalline growth layer to grow directly on the epitaxial growth layer. As a result, there is no need for a process of transporting the epitaxial growth layer with a film thickness of several μm from the operating substrate to the supporting substrate, and a process of bonding it to the supporting substrate. This can avoid defects such as wrinkles, crystal transfer, and bubbles caused by thin film transport and bonding. According to the embodiment, the graphene layer formed on the SiC single crystal substrate 11 is not transferred but is directly epitaxially grown thereon. This can avoid defects such as wrinkles and cracks caused by the transfer of graphene. According to the embodiment, since the SiC single crystal substrate 11 is used as the base, hexagonal SiC with less crystallinity degradation can be obtained. In addition, although the SiC single crystal substrate 11 is difficult to remove by grinding or etching and is expensive, the obtained high-performance single crystal, that is, the SiC epitaxial growth layer 13 is easily separated by van der Waals epitaxial growth using the interposed graphene layer 12 without removal by grinding or etching. Since the expensive SiC single crystal substrate 11 can be reused after separation, a great advantage can also be obtained in terms of cost. Although the embodiment has been described above, it is also possible to implement in other forms. For example, although not shown in the figure, it is also possible to manufacture a MOS capacitor using the SiC composite substrate 10. In the MOS capacitor, the yield and reliability can be improved. In addition, although not shown in the figure, bipolar transistors can also be manufactured using the SiC composite substrate 10. In addition, the SiC composite substrate 10 of the embodiment can also be used to manufacture SiC-pn diodes, SiCIGBTs, SiC complementary MOSFETs, etc. The SiC composite substrate 10 can also be applied to other types of devices such as LEDs (light emitting diodes) and semiconductor optical amplifiers (Semiconductor Optical Amplifiers: SOAs). The SiC epitaxial growth layer 13 may include at least one or more selected from the group consisting of a Group IV element semiconductor, a Group III-V compound semiconductor, and a Group II-VI compound semiconductor. Furthermore, the SiC composite substrate 10 and the SiC epitaxial growth layer 13 may be made of any one of 4H-SiC, 6H-SiC, and 2H-SiC. In addition, the SiC single crystal substrate 11 and the SiC epitaxial growth layer 13 may include at least one selected from the group consisting of GaN, BN, AlN, Al2O3, Ga2O3, diamond, carbon, and graphite as other material systems other than SiC. The semiconductor device including the SiC composite substrate 10 may include any of GaN-based, AlN-based, and gallium oxide-based IGBTs, diodes, MOSFETs, and thyristors in addition to SiC-based ones. The semiconductor device including the SiC composite substrate 10 may include any one of a one-in-one module, a two-in-one module, a four-in-one module, a six-in-one module, a seven-in-one module, an eight-in-one module, a twelve-in-one module, or a fourteen-in-one module. According to SiC composite substrate 10 , for example, low-cost SiC polycrystalline growth layer 17 can be used as a substrate material instead of high-cost SiC single crystal substrate 11 . (Note 1) The method for manufacturing a semiconductor substrate includes the following steps: forming a graphene layer 12 on the Si surface of a SiC single crystal substrate 11; forming a SiC epitaxial growth layer 13 on the graphene layer 12; forming a stress layer 14 on the SiC epitaxial growth layer 13; attaching a graphite substrate 19 as a temporary substrate on the stress layer 14; peeling off the graphene layer 12 and the SiC epitaxial growth layer 13; forming a SiC polycrystalline growth layer 17 on the C surface of the SiC epitaxial growth layer 13 after peeling off the graphene layer 12; and removing the graphite substrate 19; and at least one of the steps of forming the graphene layer 12 and the steps of forming the SiC epitaxial growth layer 13 is an atmosphere containing fluorine. By performing thermal surface etching and thermal surface decomposition on the SiC single crystal substrate 11 in an atmosphere containing fluorine, a high-quality graphene layer 12 can be formed. In addition, since the generation of silicon carbide is not easy to proceed in an atmosphere containing fluorine, a high-quality SiC epitaxial growth layer 13 can be formed. (Note 2) According to the method for manufacturing a semiconductor substrate described in Appendix 1, the step of forming a graphene layer 12 on the Si surface of a SiC single crystal substrate includes the following steps: the atmosphere includes silicon fluoride gas, and the Si surface of the SiC single crystal substrate 11 is subjected to surface thermal decomposition in the atmosphere including silicon fluoride gas to form the graphene layer 12. By thermally decomposing the Si surface, silicon is sublimated, and carbon is crystallized, so that a high-quality graphene layer 12 can be formed. (Note 3) The method for manufacturing a semiconductor substrate according to Supplement 2, wherein the silicon fluoride gas contains at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride. Although the silicon fluoride gas has high reactivity with silicon, it has low reactivity with graphene. (Note 4) The method for manufacturing a semiconductor substrate according to Appendix 2 or 3 includes a step of performing surface thermal etching on the Si surface of the SiC single crystal substrate 11 in an atmosphere containing silicon fluoride gas before performing surface thermal decomposition on the Si surface of the SiC single crystal substrate 11 to form the graphene layer 12. By etching the silicon on the Si surface to form a carbon-rich surface, the quality of the graphene layer 12 can be improved. (Note 5) In the method for manufacturing a semiconductor substrate according to any one of Appendixes 1 to 4, in the step of forming the SiC epitaxial growth layer 13, the atmosphere contains at least one of silicon fluoride gas, hydrocarbon gas and carbon fluoride gas, and the SiC epitaxial growth layer 13 is grown from the atmosphere. A material gas is supplied to the SiC epitaxial growth layer 13. (Note 6) According to the method for manufacturing a semiconductor substrate as described in Supplementary Note 5, the silicon fluoride gas includes at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride. The amount of silicon fluoride can be set according to the soaking length of the reaction furnaces 210 and 220, and the like. (Note 7) According to the method for manufacturing a semiconductor substrate as described in Supplementary Note 5 or 6, wherein the hydrocarbon gas includes at least one of methane, ethane, propane, ethylene, and acetylene, carbon can be supplied to the SiC epitaxial growth layer 13 . (Note 8) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 5 to 7, wherein the carbon fluoride gas contains at least one of tetrafluoromethane, hexafluoroethane, octafluoropropane, vinyl fluoride, and fluoroacetylene, so that carbon can be supplied to the SiC epitaxial growth layer 13 . (Note 9) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 8, wherein the atmosphere containing fluorine further contains an inert gas. The inert gas can be used as a carrier gas. (Note 10) According to the method for manufacturing a semiconductor substrate as described in Supplementary Note 9, the inert gas is argon gas. Argon gas is easily available. (Note 11) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 10, wherein the step of forming the graphene layer 12 forms a graphene buffer layer or a single-layer graphene layer 12. The van der Waals epitaxial growth method is suitable. (Note 12) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 11, wherein the stress layer 14 comprises a carbon film or a silicon nitride film. Since the stress layer 14 does not contain metal, metal contamination does not occur. (Note 13) The method for manufacturing a semiconductor substrate according to Supplementary Note 12, wherein the carbon film comprises a polycrystalline diamond film or a diamond-like carbon film, which is suitable for generating stress. (Note 14) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 13, wherein the graphite substrate 19 of the temporary substrate contains graphite and the graphite substrate 19 can be removed by burning. (Note 15) According to the method for manufacturing a semiconductor substrate as described in Supplement 14, the graphite substrate 19 of the temporary substrate has a larger outer dimension than the SiC single crystal substrate 11. When inserted and aligned in a wafer boat slot of a batch type vertical CVD furnace, the wafer boat support mark can be located outside the substrate effective area. (Note 16) According to the method for manufacturing a semiconductor substrate as described in Supplementary Note 14 or 15, the graphite substrate 19 of the temporary substrate includes a glassy carbon film formed on the surface. The glassy carbon film has a strong adhesive force with the carbon adhesive of the adhesive layer 16. (Note 17) According to the method for manufacturing a semiconductor substrate as described in any one of Supplementary Notes 14 to 16, the step of removing the graphite substrate 19 of the temporary substrate is to burn and remove the graphite substrate 19. The graphite substrate 19 can be burned and removed in an air atmosphere. (Note 18) According to the method for manufacturing a semiconductor substrate described in Appendix 14, in the step of attaching a graphite substrate 19 as a temporary substrate on the stress layer 14, the stress layer 14 and the graphite substrate 19 are attached via an adhesive layer 16 of a carbon adhesive. The carbon adhesive has a strong adhesive force and can maintain the bonding force even at high temperatures through carbonization. (Note 19) The method for manufacturing a semiconductor substrate described in Supplementary Note 18 further includes a step of burning and removing the adhesive layer 16. The adhesive layer 16 can be burned and removed together with the graphite substrate 19 in an air atmosphere or the like. (Note 20) The method for manufacturing a semiconductor substrate according to any one of Supplementary Notes 1 to 19, wherein before the step of removing the graphite substrate 19 of the temporary substrate, the method further comprises the step of grinding and removing the SiC polycrystalline growth layer 17 and the graphite substrate 19 protruding toward the periphery of the composite body including the graphite substrate 19, the stress layer 14, and the SiC epitaxial growth layer 13 in the step of forming the SiC polycrystalline growth layer 17, so as to expose the periphery of the graphite substrate 19. By exposing the graphite substrate 19 and the like, it is possible to burn them. (Note 21) The method for manufacturing a semiconductor substrate as described in any one of Supplementary Notes 1 to 20 further includes a step of forming a high-concentration doped layer 13a having an impurity concentration higher than that of the SiC epitaxial growth layer 13 on the C-surface of the SiC epitaxial growth layer 13 in contact with the SiC polycrystalline growth layer 17. The high-concentration doped layer 13a can suppress the expansion of the depletion layer expanding in the SiC epitaxial growth layer 13, and can easily form an ohmic contact with the SiC polycrystalline growth layer 7 formed on the C-surface of the SiC epitaxial growth layer 13. (Note 22) The semiconductor manufacturing apparatus includes reaction furnaces 210 and 220 for forming a graphene layer 12 on a SiC single crystal substrate 11 according to the method for manufacturing a semiconductor substrate as described in any one of Supplementary Notes 2 to 4. The graphene layer 12 can be formed in an atmosphere containing fluorine. (Note 23) The semiconductor manufacturing apparatus includes reactors 210 and 220 for forming a SiC epitaxial growth layer 13 on a SiC single crystal substrate 11 via a graphene layer 12 according to the semiconductor substrate manufacturing method described in any one of Supplementary Notes 5 to 8. The SiC epitaxial growth layer 13 can be formed in an atmosphere containing fluorine. (Note 24) The semiconductor manufacturing apparatus described in Supplementary Note 22 or 23 can accommodate a plurality of SiC single crystal substrates 11 supported and stacked in a reaction furnace 210. A plurality of SiC single crystal substrates 11 can be processed in batches. (Note 25) The semiconductor manufacturing apparatus described in Supplementary Note 22 or 23 can place a plurality of SiC single crystal substrates 11 on the stage 225 of the reactor 220 of the modified example. The plurality of SiC single crystal substrates 11 can be processed in a semi-batch manner. (Note 26) The semiconductor substrate includes: a SiC single crystal substrate 11; a graphene layer 12, arranged on the Si surface of the SiC single crystal substrate 11; a SiC epitaxial growth layer 13, arranged above the SiC single crystal substrate 11 via the graphene layer 12; and a stress layer 14, arranged on the Si surface of the SiC epitaxial growth layer 13; and the SiC epitaxial growth layer 13 contains fluorine. The SiC epitaxial growth layer 13 is formed with high quality in an atmosphere containing fluorine. (Note 27) The stressor layer 14 of the semiconductor substrate described in Supplementary Note 26 includes a carbon film or a silicon nitride film. Since it does not include metal, metal contamination does not occur. (Note 28) The semiconductor device has a semiconductor element structure formed on the C-surface of the SiC epitaxial growth layer of the SiC composite substrate formed by the semiconductor substrate described in Appendix 26 or 27 and having a SiC polycrystalline growth layer formed on the Si-surface of the SiC epitaxial growth layer. By using the low-cost and high-quality SiC composite substrate 10, a low-cost and high-quality semiconductor device can be provided. (Note 29) According to the semiconductor device described in Supplementary Note 28, wherein the semiconductor element includes at least one of a SiC Schottky barrier diode, a SiC-MOSFET, a SiC bipolar transistor, a SiC diode, a SiC thyristor, and a SiC insulated gate bipolar transistor, various useful SiC-based semiconductor elements can be provided. (Other Embodiments) As described above, although some embodiments have been described, it should be understood that the discussion and drawings that form part of the disclosure are illustrative and not limiting. A person skilled in the art will clearly understand various alternative embodiments, examples, and application techniques based on the disclosure. Therefore, the embodiments include various embodiments not described here. [Industrial Applicability] The present disclosure can be applied to various semiconductor module technologies such as IGBT modules, diode modules, MOS modules (SiC, GaN, AlN, gallium oxide), and can be applied to a wide range of application fields such as power modules for converter circuits that drive electric motors used as power sources for electric vehicles (including hybrid vehicles), trams, industrial robots, etc., and power modules for converter circuits that convert electricity generated by solar cells, wind turbines and other power generation devices (especially home power generation devices) into commercial power. [Explanation of Symbols] 10SiC composite substrate 11SiC single crystal substrate 12 graphene layers 13SiC epitaxial growth layer 14 Stress layer 16 Adhesive layer 17SiC polycrystalline growth layer 19Graphite substrate.

Claims

1. A method for manufacturing a semiconductor substrate, comprising the following steps: forming a graphene layer on the Si surface of the SiC single crystal substrate; forming a SiC epitaxial growth layer on the graphene layer; forming a stress layer on the SiC epitaxial growth layer; attaching a temporary substrate on the stress layer; Peeling off the graphene layer and the SiC epitaxial growth layer; forming a SiC polycrystalline growth layer on the C-surface of the SiC epitaxial growth layer after peeling off the graphene layer; and removing the temporary substrate; and At least one of the step of forming the graphene layer and the step of forming the SiC epitaxial growth layer is performed in an atmosphere containing fluorine.

2. The method for manufacturing a semiconductor substrate according to claim 1, wherein the step of forming a graphene layer on the Si surface of the SiC single crystal substrate comprises the following step: the atmosphere comprises silicon fluoride gas, and the Si surface of the SiC single crystal substrate is subjected to surface thermal decomposition in the atmosphere comprising the silicon fluoride gas to form the graphene layer. 3 . The method for manufacturing a semiconductor substrate according to claim 2 , wherein the silicon fluoride gas comprises at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride.

4. The method for manufacturing a semiconductor substrate according to claim 2 or 3, wherein before the step of performing surface thermal decomposition of the Si surface of the SiC single crystal substrate to form the graphene layer, it includes a step of performing surface thermal etching on the Si surface of the SiC single crystal substrate in an atmosphere containing the silicon fluoride gas.

5. The method for manufacturing a semiconductor substrate according to any one of claims 1 to 4, wherein in the step of forming the SiC epitaxial growth layer, the atmosphere includes at least one of silicon fluoride gas, hydrocarbon gas and carbon fluoride gas, so that the SiC epitaxial growth layer grows from the atmosphere. 6 . The method for manufacturing a semiconductor substrate according to claim 5 , wherein the silicon fluoride gas comprises at least one of silicon tetrafluoride, disilicon hexafluoride, and trisilicon octafluoride. 7 . The method for manufacturing a semiconductor substrate according to claim 5 , wherein the hydrocarbon gas includes at least one of methane, ethane, propane, ethylene and acetylene.

8. The method for manufacturing a semiconductor substrate according to any one of claims 5 to 7, wherein the carbon fluoride gas comprises at least one of tetrafluoromethane, hexafluoroethane, octafluoropropane, vinyl fluoride and fluoroacetylene. 9 . The method for manufacturing a semiconductor substrate according to claim 1 , wherein the atmosphere containing fluorine further contains an inert gas. 10 . The method for manufacturing a semiconductor substrate according to claim 9 , wherein the inert gas is argon gas. 11 . The method for manufacturing a semiconductor substrate according to claim 1 , wherein the step of forming the graphene layer forms a graphene buffer layer or a single-layer graphene layer. 12 . The method for manufacturing a semiconductor substrate according to claim 1 , wherein the stress layer comprises a carbon film or a silicon nitride film. 13 . The method for manufacturing a semiconductor substrate according to claim 12 , wherein the carbon film comprises a polycrystalline diamond film or a diamond-like carbon film. 14 . The method for manufacturing a semiconductor substrate according to claim 1 , wherein the temporary substrate comprises graphite. 15 . The method for manufacturing a semiconductor substrate according to claim 14 , wherein the temporary substrate has an outer dimension larger than that of the SiC single crystal substrate. 16 . The method for manufacturing a semiconductor substrate according to claim 14 , wherein the temporary substrate includes a glassy carbon film formed on a surface. 17 . The method for manufacturing a semiconductor substrate according to claim 14 , wherein the step of removing the temporary substrate removes the temporary substrate by burning the substrate. 18 . The method for manufacturing a semiconductor substrate according to claim 14 , wherein the step of attaching the temporary substrate to the stress layer includes attaching the stress layer and the temporary substrate via an adhesive layer of a carbon adhesive.

19. The method for manufacturing a semiconductor substrate according to claim 18, further comprising the step of removing the adhesive layer by burning.

20. The method for manufacturing a semiconductor substrate according to any one of claims 1 to 19, wherein before the process of removing the temporary substrate, the following process is also included: grinding and removing the SiC polycrystalline growth layer and the temporary substrate that protrude toward the periphery of the composite body including the temporary substrate, the stress layer and the SiC epitaxial growth layer in the process of forming the SiC polycrystalline growth layer, so that the periphery of the temporary substrate is exposed.

21. The method for manufacturing a semiconductor substrate according to any one of claims 1 to 20, further comprising the step of forming a high-concentration doping layer having an impurity concentration higher than that of the SiC epitaxial growth layer on a C-plane of the SiC epitaxial growth layer in contact with the SiC polycrystalline growth layer.

22. A semiconductor manufacturing apparatus comprising a reactor for forming the graphene layer on the SiC single crystal substrate according to the method for manufacturing a semiconductor substrate according to any one of claims 2 to 4.

23. A semiconductor manufacturing apparatus comprising a reactor for forming the SiC epitaxial growth layer on the SiC single crystal substrate with the graphene layer interposed therebetween according to the method for manufacturing a semiconductor substrate according to any one of claims 5 to 8. 24 . The semiconductor manufacturing apparatus according to claim 22 or 23 , wherein the plurality of SiC single crystal substrates supported in a stacked state can be accommodated in the reaction furnace. 25 . The semiconductor manufacturing apparatus according to claim 22 or 23 , wherein a plurality of the SiC single crystal substrates can be placed on a worktable of the reaction furnace.

26. A semiconductor substrate comprising: SiC single crystal substrate; A graphene layer is disposed on the Si surface of the SiC single crystal substrate; A SiC epitaxial growth layer, disposed above the SiC single crystal substrate through the graphene layer; and A stress layer is disposed on the Si surface of the SiC epitaxial growth layer; and The SiC epitaxial growth layer contains fluorine. The semiconductor substrate according to claim 26 , wherein the stress layer comprises a carbon film or a silicon nitride film.

28. A semiconductor device having a semiconductor element structure formed on the C-plane of the SiC epitaxial growth layer of a SiC composite substrate formed from the semiconductor substrate according to claim 26 or 27 and having a SiC polycrystalline growth layer formed on the Si-plane of the SiC epitaxial growth layer.

29. The semiconductor device according to claim 28, wherein the semiconductor element comprises at least one of a SiC Schottky barrier diode, a SiC-MOSFET, a SiC bipolar transistor, a SiC diode, a SiC thyristor, and a SiC insulated gate bipolar transistor.

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