Efficient high-voltage charge pump

Abstract

The invention relates to the technical field of charge pumps, and provides an efficient high-voltage charge pump which comprises a cross-coupling charge pump base structure. Each MOS tube in the cross-coupled charge pump base structure is provided with an auxiliary switch tube and a parasitic diode thereof. According to the invention, the parasitic diode formed by the auxiliary switch tube effectively prevents the current path of the parasitic PNP triode Q1, eliminates the substrate leakage of the main current path, and improves the conversion efficiency of the circuit.

Description

Technical Field

[0001] The present invention relates to the technical field of charge pumps, and in particular to an efficient high-voltage charge pump. Background Art

[0002] A charge pump is a circuit structure that uses the accumulation and release characteristics of charge on capacitor plates to achieve a voltage boost function. It is mainly composed of devices such as switching tubes, capacitors and diodes.

[0003] The traditional charge pump structure is as follows Figure 1 As shown, it uses the forward conduction characteristics of the diode to achieve energy transmission, and has the advantages of simple structure and easy design. However, the diode has a large conduction voltage drop. When the output is stable, the output voltage is:

[0004] V OUT =V IN +V DD -2V D

[0005] In the above formula, V IN is the input voltage, V DD For the logic high level of CLK_A and CLK_B, V D is the forward voltage drop of the diode. As can be seen from the above formula, the existence of the diode forward voltage drop leads to low transmission efficiency.

[0006] The cross-coupled charge pump uses switch tubes M1-M4 instead of diodes, which greatly reduces the conduction voltage drop and improves the transmission efficiency of the charge pump. Therefore, it has been widely used. The structure of the cross-coupled charge pump is as follows Figure 2 As shown in FIG. CLK_A and CLK_B are complementary clock signals generated by the clock generation circuit, M1-M4 are switch MOS tubes, and D1-D4 are parasitic diodes of the corresponding switch tubes.

[0007] Input voltage V IN After power-on, before the clock signal is generated, CLK_A and CLK_B are both low level. Input voltage V IN Capacitors C1 and C2 are charged through parasitic diodes D1 and D2, so that the voltages at points A and B increase.

[0008] After the complementary clock signals CLK_A and CLK_B are generated, the voltage difference between the two ends of the capacitor cannot change suddenly, so the voltages at points A and B follow the clock shift. When CLK_A is high, the voltage at point A is raised, MOS tube M1 is turned on, and the input voltage V IN The capacitor C1 is charged directly through the channel of MOS tube M1, and finally the voltage at point B is equal to the input voltage V IN equal.

[0009] When CLK_A is low and CLK_B is high, the voltage at point B is raised, the voltage at point A is lowered, and the NMOS tube M2 and the PMOS tube M4 are turned on. The input voltage V IN The charge of capacitor C1 is transferred to the load capacitor C1 through the channel of PMOS tube M4. LOAD , so that V OUT Rising, eventually, the output voltage V OUT is VIN+VDD.

[0010] Compared with the traditional charge pump structure, the cross-coupled charge pump achieves efficient voltage transmission, but it still has the problem of substrate leakage. In order to make the charge pump work properly under high-voltage applications, MOS tubes M1-M4 usually use high-voltage isolation devices. Taking NMOS tube M1 as an example, the cross-sectional structure of the commonly used high-voltage isolation device is as follows: Figure 3 shown.

[0011] To avoid the parasitic PN junction leakage of Bulk-Source, Source and Bulk are usually short-circuited. During the startup process, since the voltage at point A has not yet risen to the input voltage V IN , and the channel is not yet open, so PWELL and NISO form a forward-biased diode, and PSUB is the grounded substrate. Figure 3 The parasitic PNP transistor Q1 in the circuit forms a parasitic path, and the current flows from V IN Directly flows to PSUB, resulting in large leakage. This leakage can reach mA level at high temperature, resulting in excessive static current or low energy transfer efficiency. In addition, since the charge on capacitor C2 will flow to load capacitor C when CLK_A is high, LOAD As a result, the parasitic diode of PWELL to NISO will be turned on at the beginning of each cycle when CLK_A is at a low level, causing leakage to the substrate and reducing the energy transmission efficiency. Summary of the invention

[0012] The present invention aims to provide an efficient high-voltage charge pump to solve the problem of substrate leakage of a cross-coupled charge pump.

[0013] The present invention provides an efficient high-voltage charge pump, comprising:

[0014] Cross-coupled charge pump infrastructure;

[0015] Each MOS tube in the cross-coupled charge pump basic structure is configured with an auxiliary switch tube and its parasitic diode.

[0016] In some embodiments, the charge pump infrastructure includes a MOS transistor M1 and a parasitic diode D1 thereof, a MOS transistor M2 and a parasitic diode D2 thereof, a MOS transistor M3 and a parasitic diode D3 thereof, and a MOS transistor M4 and a parasitic diode D4 thereof.

[0017] In some embodiments, the auxiliary switch tube and its parasitic diode include an auxiliary switch tube M 1_A Its parasitic diode D 1_A 、Auxiliary switch tube M 2_A Its parasitic diode D 2_A 、Auxiliary switch tube M 3_A Its parasitic diode D 3_A 、Auxiliary switch tube M 4_A Its parasitic diode D 4_A .

[0018] In some embodiments, the input voltage V IN On the one hand, the source and drain of MOS tube M1 and auxiliary switch tube M 1_A The drain and source of the MOS tube M4, the drain and source of the auxiliary switch tube M 4_A The source and drain of the output voltage V OUT On the other hand, the source and drain of MOS tube M2, auxiliary switch tube M 2_A The drain and source of the MOS tube M3, the drain and source of the auxiliary switch tube M 3_A The source and drain of the output voltage V OUT ;

[0019] CLK_A and CLK_B are complementary clock signals, MOS tube M1, auxiliary switch tube M 1_A , MOS tube M4 and auxiliary switch tube M 4_A The gate of the MOS tube M2 and the auxiliary switch tube M 2_A , MOS tube M3 and auxiliary switch tube M 3_A The gate of is connected to CLK_A via capacitor C2.

[0020] In some embodiments, the MOS tube M1 and the auxiliary switch tube M 1_A A diode D6 is connected between the source of the MOS tube M2 and the auxiliary switch tube M 2_A A diode D5 is connected between the source electrodes.

[0021] In some embodiments, the diode D5 is connected in series with a resistor R1.

[0022] In some embodiments, the diode D6 is connected in series with a resistor R2.

[0023] In some embodiments, the output voltage VOUT A load capacitor C is also connected to LODA .

[0024] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0025] The present invention effectively blocks the current path of the parasitic PNP transistor Q1 by using a parasitic diode formed by an auxiliary switch tube, eliminates substrate leakage in the main current path, and improves the conversion efficiency of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a diagram of the traditional charge pump structure.

[0027] Figure 2 This is a diagram of the cross-coupled charge pump structure.

[0028] Figure 3 It is a cross-sectional structure diagram of a high-voltage NMOS device.

[0029] Figure 4 4 is a structural diagram of an efficient high-voltage charge pump in an embodiment of the present invention.

[0030] Figure 5 4 is a key waveform diagram of an efficient high-voltage charge pump in an embodiment of the present invention.

[0031] Figure 6 The MOS tube M1 and its auxiliary switch tube M1 in the efficient high-voltage charge pump in the embodiment of the present invention are 1_A Device cross-sectional structure diagram.

[0032] Figure 7 The MOS tube M1 and its auxiliary switch tube M1 in the efficient high-voltage charge pump in the embodiment of the present invention are 1_A A simplified structural diagram of . DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0035] Example

[0036] like Figure 4 As shown, this embodiment provides an efficient high-voltage charge pump, including:

[0037] MOS tube M1 and its parasitic diode D1, MOS tube M2 and its parasitic diode D2, MOS tube M3 and its parasitic diode D3, MOS tube M4 and its parasitic diode D4;

[0038] Auxiliary switch tube M 1_A Its parasitic diode D 1_A 、Auxiliary switch tube M 2_A Its parasitic diode D 2_A 、Auxiliary switch tube M 3_A Its parasitic diode D 3_A 、Auxiliary switch tube M 4_A Its parasitic diode D 4_A ;

[0039] Input voltage V IN On the one hand, the source and drain of MOS tube M1 and auxiliary switch tube M 1_A The drain and source of the MOS tube M4, the drain and source of the auxiliary switch tube M 4_A The source and drain of the output voltage V OUT On the other hand, the source and drain of MOS tube M2, auxiliary switch tube M 2_A The drain and source of the MOS tube M3, the drain and source of the auxiliary switch tube M 3_A The source and drain of the output voltage V OUT ; Output voltage V OUT A load capacitor C is also connected to LODA ;

[0040] CLK_A and CLK_B are complementary clock signals, MOS tube M1, auxiliary switch tube M 1_A , MOS tube M4 and auxiliary switch tube M 4_A The gate of the MOS tube M2 and the auxiliary switch tube M 2_A , MOS tube M3 and auxiliary switch tube M 3_A The gate of the MOS tube M1 and the auxiliary switch tube M 1_A The source of is connected with a resistor R2 and a diode D6; the MOS tube M2 and the auxiliary switch tube M 2_A A resistor R1 and a diode D5 are connected between the source electrodes.

[0041] That is to say, the efficient high-voltage charge pump of the present invention is Figure 2Based on the basic structure of the cross-coupled charge pump shown in the figure, M is added 1_A ,M 2_A ,M 3_A ,M 4_A As auxiliary switch tube of M1, M2, M3, M4, and provides parasitic diode D 1_A ,D 2_A ,D 3_A ,D 4_A Diode D5 and diode D6 are used to provide initial voltage for points A and B. Figure 5 It is the signal waveform of the key node of the circuit.

[0042] During the t0-t1 phase, the input voltage V IN Power on, input voltage V IN Capacitors C1 and C2 are charged through diodes D5 and D6. Resistors R1 and R2 are current limiting resistors to ensure that the current flowing through diodes D5 and D6 is small, reducing the substrate leakage of the diodes. Finally, the voltage at point A and point B is equal, and the voltage is V B =V A =V IN -V D , V D is the forward voltage drop of the diode.

[0043] During the t1-t2 phase, CLK_A is a high voltage and CLK_B is a low voltage. Since the voltage difference across the capacitor cannot change suddenly, the voltage at point A will be raised to V IN -V D +V DD , V DD The MOS tube M1 and its auxiliary switch tube M 1_A On, input voltage V IN Through MOS tube M1 and its auxiliary switch tube M 1_A The channel charges the capacitor C1, and finally the voltage at point B rises to the input voltage V IN At the same time, the MOS tube M3 and its auxiliary switch tube M3_A are turned on, and the charge of the capacitor C2 is transferred to the load capacitor C through the channel of the MOS tube M3 and its auxiliary switch tube M3_A. LOAD The voltage at point A decreases.

[0044] During the t2-t3 phase, when CLK_A is low and CLK_B is high, the voltage at point B is automatically bootstrapped to V IN +V DD To turn on the MOS tube M2 and its auxiliary switch tube M 2_A , input voltage V IN Through MOS tube M2 and its auxiliary switch tube M 2_A Charges capacitor C2, and finally V A=V IN At the same time, MOS tube M4 and its auxiliary switch tube M 4_A The charge at point B passes through the MOS tube M4 and its auxiliary switch tube M 4_A The channel is transferred to the load capacitor C LOAD On, so that the output voltage V OUT Increases, and the voltage at point B decreases.

[0045] During the t3-t4 phase, when CLK_A turns high again and CLK_B turns low, the charge at point B is input to voltage V IN Supplement, MOS tube M3 and its auxiliary switch tube M 3_A During this period of time, the charge of capacitor C2 passes through MOS tube M3 and its auxiliary switch tube M 3_A of the channel is transferred to the output.

[0046] At the beginning of the circuit startup, the voltage at point A has not yet risen to the input voltage V IN , and the MOS tube M1 and its auxiliary switch tube M 1_A , MOS tube M2 and its auxiliary switch tube M 2_A The channels of these four MOS tubes are not turned on yet. MOS tube M1 and its auxiliary switch tube M 1_A The cross-sectional diagram and connection relationship of the two devices are shown in Figure 6 As shown. Therefore, PWELL and NISO form a forward-biased diode, and PSUB is the substrate of the entire chip, so it is grounded. Figure 6 The parasitic PNP transistor Q1 in the 2_A The existence of the input voltage causes the current to be unable to pass through the parasitic diode D 2_A The current flows to capacitor C2, so the parasitic PNP transistor Q1 formed has no current path, and the current cannot flow to PSUB, so the leakage problem is solved. Figure 7 This is a simplified parasitic path. It can be seen that the base of the parasitic PNP transistor Q1 cannot generate a current path.

[0047] In summary, the present invention effectively blocks the current path of the parasitic PNP transistor Q1 by using the parasitic diode formed by the auxiliary switch tube, eliminates the substrate leakage of the main current path, and improves the conversion efficiency of the circuit.

[0048] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An efficient high-voltage charge pump, characterized in that: include: Cross-coupled charge pump infrastructure; Each MOS tube in the cross-coupled charge pump basic structure is configured with an auxiliary switch tube and its parasitic diode.

2. The efficient high-voltage charge pump according to claim 1, characterized in that: The charge pump basic structure includes a MOS tube M1 and a parasitic diode D1 thereof, a MOS tube M2 and a parasitic diode D2 thereof, a MOS tube M3 and a parasitic diode D3 thereof, and a MOS tube M4 and a parasitic diode D4 thereof.

3. The efficient high-voltage charge pump according to claim 2, characterized in that: The auxiliary switch tube and its parasitic diode include an auxiliary switch tube M 1_A Its parasitic diode D 1_A 、Auxiliary switch tube M 2_A Its parasitic diode D 2_A 、Auxiliary switch tube M 3_A Its parasitic diode D 3_A 、Auxiliary switch tube M 4_A Its parasitic diode D 4_A .

4. The efficient high-voltage charge pump according to claim 3, characterized in that: Input voltage V IN On the one hand, the source and drain of MOS tube M1 and auxiliary switch tube M 1_A The drain and source of the MOS tube M4, the drain and source of the auxiliary switch tube M 4_A The source and drain of the output voltage V OUT On the other hand, the source and drain of MOS tube M2, auxiliary switch tube M 2_A The drain and source of the MOS tube M3, the drain and source of the auxiliary switch tube M 3_A The source and drain of the output voltage V OUT ; CLK_A and CLK_B are complementary clock signals, MOS tube M1, auxiliary switch tube M 1_A , MOS tube M4 and auxiliary switch tube M 4_A The gate of the MOS tube M2 and the auxiliary switch tube M 2_A , MOS tube M3 and auxiliary switch tube M 3_A The gate of is connected to CLK_A via capacitor C2.

5. The efficient high-voltage charge pump according to claim 4, characterized in that: MOS tube M1 and auxiliary switch tube M 1_A A diode D6 is connected between the source of the MOS tube M2 and the auxiliary switch tube M 2_A A diode D5 is connected between the source electrodes.

6. The efficient high-voltage charge pump according to claim 5, characterized in that: The diode D5 is connected in series with a resistor R1.

7. The efficient high-voltage charge pump according to claim 5, characterized in that: The diode D6 is connected in series with a resistor R2.

8. The efficient high-voltage charge pump according to claim 4, characterized in that: Output voltage V OUT A load capacitor C is also connected to LODA .

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