Detection information acquisition system

Abstract

According to the detection information acquisition system, a high input impedance receiving circuit samples a field effect transistor in a differential form as an input stage to receive sensor detection information, line loss is compensated through an adjustable amplifier, finally, the information enters a controlled gain amplifier through isolation, and a wide-band amplifier is adopted for proportional amplification; the proportion amplification multiple is controlled by a difference value of an input signal of a broadband amplifier and an upper limit value of an allowable signal obtained by an equipment host, a change rate is multiplied by a sampling period, the amplified signal enters a normalization circuit and is normalized by dividing a full-scale signal by a divider, and the normalized signal is limited in a certain range or proportion required by equipment. Subsequent host processing or driving display is facilitated, and a detection truth value can be accurately received; the over-current protection circuit calculates a difference value between a detection current signal and a device allowable current, the positive difference value changes the resistance value of the JFET tube, the current entering the device signal is limited, the current entering the device signal is limited, and an over-current protection interface and a host can be prevented from being damaged.

Description

Technical Field

[0001] The present invention belongs to the technical field of detection acquisition, and in particular to a detection information acquisition system. Background Art

[0002] Hazardous substance content detection sensors play a vital role in many fields, such as environmental monitoring, food safety, industrial production, etc. These sensors can accurately detect the content of harmful substances in products such as air, water, soil, food, medicine, panels and baby carriages to ensure human health and environmental safety.

[0003] The information detected by the detection sensor needs to be conditioned and processed by analog-to-digital conversion before entering the host of the detection equipment through the interface. The host will further analyze and display it on the display screen. Because there will be loss when the detection information is transmitted to the host and different detection sensor types are suitable for different objects under test, the signal needs to be conditioned and quantified before entering the host so that the host can accurately receive the true value of the detection. Summary of the invention

[0004] In view of the above situation, in order to overcome the defects of the prior art, the present invention provides a detection information acquisition system, which can accurately receive the detection true value and protect the interface and the host from damage by high-impedance reception and gain amplification of the sensor detection information, and quantify it to the host receiving signal range.

[0005] The technical solution is to include a high input impedance receiving circuit, a controlled gain amplifier, a normalization circuit, and an overcurrent protection circuit. The high input impedance receiving circuit uses a differential field effect tube to access the detection information, then compensates for the line loss through an adjustable amplifier, and finally enters the controlled gain amplifier through photoelectric coupler isolation; The controlled gain amplifier uses a broadband amplifier for proportional amplification, the proportional amplification factor is controlled by the difference between the broadband amplifier input signal and the device acquisition signal, and the proportional amplification factor is adjusted by multiplying the rate of change of the isolated signal by the sampling period; The normalization circuit receives the proportionally amplified signal and the full-scale signal, divides them by a divider for normalization, limits the signal within a certain range required by the device, and enters the device; The overcurrent protection circuit detects the current entering the device signal, and the difference between the current signal and the device allowable current is calculated by the operational amplifier AR6. When the allowable current is exceeded, the positive difference changes the resistance of the JFET tube, thereby limiting the current entering the device signal.

[0006] Preferably, the high input impedance receiving circuit includes a field effect tube T1, the gate of the field effect tube T1, one end of the grounding resistor R1, and one end of the capacitor C1 are connected to the detection information, the drain of the field effect tube T1 is connected to the power supply +5V, the source of the field effect tube T1 is connected to one end of the resistor R2, the other end of the resistor R2 is respectively connected to the other end of the capacitor C1, one end of the resistor R3, and the drain of the field effect tube T2, the source of the field effect tube T2 is connected to the upper end of the potentiometer RW1, the lower end of the potentiometer RW1 is connected to the power supply -5V, the gate of the field effect tube T2 is connected to the adjustable end of the potentiometer RW1, the other end of the resistor R3 is respectively connected to the in-phase input end of the operational amplifier AR2, the first end of the resistor R5, and the negative electrode of the electrolytic capacitor E2, the inverting input end of the operational amplifier AR2 is connected to the ground through the resistor R6, and the other end of the resistor R5 is connected to the potentiometer R The left end of W2 and the right end of potentiometer RW2 are respectively connected to the positive electrode of electrolytic capacitor E2, the output end of operational amplifier AR2, and one end of resistor R7; the other end of resistor R7 is respectively connected to one end of resistor R8 and the inverting input end of operational amplifier AR1; the non-inverting input end of operational amplifier AR1 is connected to the gate of field effect transistor T1; the output end of operational amplifier AR1 is connected to one end of resistor R4; the other end of resistor R4 is respectively connected to the adjustable end of potentiometer RW2 and the positive electrode of grounded electrolytic capacitor E1; the other end of resistor R8 is respectively connected to pin 1 of photoelectric coupler OP1 and one end of grounded capacitor C2; pin 2 of photoelectric coupler OP1 is connected to ground; pin 4 of photoelectric coupler OP1 is connected to power supply +24V; pin 3 of photoelectric coupler OP1 and one end of grounded resistor R9 are the output signal of the high input impedance receiving circuit.

[0007] Preferably, the controlled gain amplifier includes a switch K1-1 and an operational amplifier AR3, the left end of the switch K1-1 and the in-phase input end of the operational amplifier AR3 are connected to pin 3 of the photoelectric coupler OP1, the right end of the switch K1-1 is respectively connected to the upper end of the bidirectional voltage regulator VS1 and one end of the resistor R11, the lower end of the bidirectional voltage regulator VS1 is connected to the ground, the other end of the resistor R11 is connected to the in-phase input end of the operational amplifier AR4, the inverting input end of the operational amplifier AR3 is respectively connected to one end of the resistor R10 and one end of the capacitor C3, and the output end of the operational amplifier AR3 is respectively connected to the resistor R10 and one end of the capacitor C3. The other end of R10, the other end of capacitor C3, and one end of resistor R12, the other end of resistor R12 is respectively connected to one end of switch K1-2 and the gate of field effect transistor T3, the other end of switch K1-2 is connected to the negative electrode of electrolytic capacitor E4, the positive electrode of electrolytic capacitor E4 is connected to the ground, the source of field effect transistor T3 is connected to the ground, the drain of field effect transistor T3 is connected to one end of resistor R13, the other end of resistor R13 is respectively connected to the inverting input end of operational amplifier AR4 and one end of resistor R14, the other end of resistor R14 and the output end of operational amplifier AR4 are the output signal of controlled gain amplifier.

[0008] Preferably, the normalization circuit includes a resistor R15, one end of which is connected to the output end of the operational amplifier AR4, the other end of which is respectively connected to the inverting input end of the operational amplifier AR5 and one end of the resistor R16, the non-inverting input end of the operational amplifier AR5 is connected to the ground through a resistor R17, the output end of the operational amplifier AR5 is respectively connected to one end of the resistor R18 and the pin Y of the multiplier D1, the pin X of the multiplier D1 is connected to the full-scale signal, the UO pin of the multiplier D1 is connected to the other end of the resistor R16, the other end of the resistor R18 enters the device, and the device is connected in series with a grounding resistor R21.

[0009] Preferably, the overcurrent protection circuit includes an operational amplifier AR7, the non-inverting input terminal of the operational amplifier AR7 is connected to the upper end of the resistor R21, the output terminal of the operational amplifier AR7 is connected to the positive electrode of the diode D4, the negative electrode of the diode D4 is respectively connected to the positive electrode of the grounded electrolytic capacitor E3, the inverting input terminal of the operational amplifier AR7, and the non-inverting input terminal of the operational amplifier AR6, the inverting input terminal of the operational amplifier AR6 is connected to the allowable current, the output terminal of the operational amplifier AR6 is connected to the positive electrode of the diode D3, the negative electrode of the diode D3 is respectively connected to one end of the resistor R19 and one end of the capacitor C4, the other end of the resistor R19 is respectively connected to one end of the grounded resistor R20, the adjustable end of the potentiometer RW3, and the gate of the field effect transistor T4, the drain of the field effect transistor T4 is connected to the other end of the resistor R18, and the source of the field effect transistor T4 is connected to the upper end of the potentiometer RW3.

[0010] The beneficial effects of the present invention are as follows: 1. The sensor detection information is received by a differential field effect tube as an input stage to improve the purity of the signal. After that, the line loss is compensated by an adjustable amplifier. The difference is calculated by taking the output voltage of the adjustable amplifier and the sensor detection information. The difference is fed back to the feedback resistor through charging to change the gain of the amplifier. Finally, it is isolated by the photoelectric coupler OP1. When the switch K1-1 is closed, the broadband amplifier performs proportional amplification. The proportional amplification multiple is controlled by the difference between the broadband amplifier input signal and the upper limit of the allowable signal obtained by the device host. The proportional amplification multiple is further slightly adjusted by multiplying the change rate of the isolated signal by the sampling period to compensate for the line loss. The signal is normalized by dividing it with the full-scale signal by a divider and limited to a certain range or ratio required by the device, so as to facilitate subsequent host processing or drive display. With this high-impedance reception and gain amplification conditioning, it is quantified within the host receiving signal range and can accurately receive and detect the true value. 2. Detect the current of the signal entering the device, obtain the peak value, and calculate the difference with the host allowable current of the device by operational amplifier AR6. When the current exceeds the allowable current, the positive difference changes the resistance of the JFET tube, thereby limiting the current of the signal entering the device, which can achieve overcurrent protection interface and host from damage. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a circuit structure block diagram of the present invention.

[0012] Figure 2 It is a circuit schematic diagram of the present invention. DETAILED DESCRIPTION

[0013] The technical solutions of various embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments.

[0014] The following is in conjunction with the instruction manual Figure 1 to Figure 2 The specific implementation modes of the present invention are described in further detail.

[0015] Embodiment 1, a detection information acquisition system, includes a high input impedance receiving circuit, a controlled gain amplifier, a normalization circuit, and an overcurrent protection circuit. In the high input impedance receiving circuit, the sensor detection information is received by a differential field effect transistor as an input stage. The differential access has the advantages of high common mode rejection ratio, high input impedance, and low noise, which improves the purity of the signal. Then, the line loss is compensated by the adjustable amplifier, and the difference between the adjustable amplifier output voltage and the sensor detection information is calculated. The difference is fed back to the feedback resistor through charging to change the gain of the amplifier, and finally isolated by the photoelectric coupler OP1 to prevent mutual interference between circuits. , enter the controlled gain amplifier, when switch K1-1 is closed, the broadband amplifier performs proportional amplification, and the proportional amplification multiple is controlled by the difference between the broadband amplifier input signal and the upper limit of the allowable signal obtained by the device host, which can be calculated by the subtractor, and the proportional amplification multiple is further slightly adjusted by multiplying the change rate of the isolated signal by the sampling period to compensate for the line loss, so that the amplifier can maintain stable amplification performance within a wider signal range, enter the normalization circuit, and the divider divides the full-scale signal for normalization, limiting it to a certain range or ratio required by the device, so as to facilitate subsequent host processing or drive display; The overcurrent protection circuit detects the current entering the device signal. In the figure, R is equivalent to the device host. The voltage generated by the current flowing through the resistor R21 of the series device is used to obtain the current signal, and the peak value is obtained through the operational amplifier AR7, the voltage regulator Z1, and the electrolytic capacitor E1. The difference with the host allowable current of the device is calculated by the operational amplifier AR6. When the allowable current is exceeded, the positive difference changes the resistance of the JFET tube, and then the current is shunted, thereby limiting the current entering the interface and host signal of the device, and protecting the interface and the host from damage. The current entering the device signal is detected, and the difference between the current signal and the device allowable current is calculated by the operational amplifier AR6. When the allowable current is exceeded, the positive difference changes the resistance of the JFET tube, thereby limiting the current entering the device signal.

[0016] Embodiment 2, on the basis of embodiment 1, the high input impedance receiving circuit adopts a differential field effect tube to access the sensor detection information. The types of sensors used in the detection of harmful substances in food, medicine, and plate materials are various, and the output signal forms are also different. In practical applications, it is necessary to select a suitable sensor type and output signal form according to the specific detection requirements and detection environment. For example, there are optical sensors, electrochemical sensors, and sensors for detecting harmful gases or volatile gases for detecting harmful components. The output forms are also different, such as voltage, current, frequency, etc., and the detection information is transmitted to the host, which needs to be uniformly quantified and displayed on the display screen to reflect the harmful components. In this way, the sensor detection information is received by a differential field effect tube (FET) as an input stage. The differential access has the advantages of high common mode rejection ratio, high input impedance, and low noise, which improves the purity of the signal. After that, the adjustable amplifier composed of operational amplifier AR2, input resistor R3, feedback resistor R5 and potentiometer RW2 compensates for the line loss. During the signal transmission process, due to the line resistance and capacitance factors, the signal will experience attenuation and distortion. Therefore, the operational amplifier AR1 is used to calculate the difference between the output voltage of the operational amplifier AR2 and the sensor detection information, and the difference is calculated by the resistor R4. , the electrolytic capacitor E1 charges and feeds back to the potentiometer RW2, and the resistance value of the potentiometer RW2 is adjusted to change the gain of the amplifier. Finally, it is isolated by the photoelectric coupler OP1 to prevent mutual interference between circuits and enter the controlled gain amplifier, including the field effect tube T1. The gate of the field effect tube T1, one end of the grounding resistor R1, and one end of the capacitor C1 are connected to the detection information. The drain of the field effect tube T1 is connected to the power supply +5V, the source of the field effect tube T1 is connected to one end of the resistor R2, and the other end of the resistor R2 is respectively connected to the other end of the capacitor C1, one end of the resistor R3, and the drain of the field effect tube T2. The source of the field effect tube T2 is connected to the upper end of the potentiometer RW1, the lower end of the potentiometer RW1 is connected to the power supply -5V, the gate of the field effect tube T2 is connected to the adjustable end of the potentiometer RW1, the other end of the resistor R3 is respectively connected to the in-phase input end of the operational amplifier AR2, one end of the resistor R5, and the negative electrode of the electrolytic capacitor E2, the inverting input end of the operational amplifier AR2 is connected to the ground through the resistor R6, the other end of the resistor R5 is connected to the left end of the potentiometer RW2, and the right end of the potentiometer RW2 is respectively connected to the positive electrode of the electrolytic capacitor E2, the output end of the operational amplifier AR2, and the negative electrode of the resistor R7. One end of the resistor R7 is connected to one end of the resistor R8 and the inverting input end of the operational amplifier AR1, the non-inverting input end of the operational amplifier AR1 is connected to the gate of the field effect tube T1, the output end of the operational amplifier AR1 is connected to one end of the resistor R4, the other end of the resistor R4 is connected to the adjustable end of the potentiometer RW2 and the positive electrode of the grounded electrolytic capacitor E1, the other end of the resistor R8 is connected to pin 1 of the photocoupler OP1 and one end of the grounded capacitor C2, the pin 2 of the photocoupler OP1 is connected to the ground, and the pin 4 of the photocoupler OP1 is connected to the power supply +24V.Pin 3 of the optocoupler OP1 and one end of the grounding resistor R9 are the output signals of the high input impedance receiving circuit.

[0017] Embodiment 3, on the basis of embodiment 1, when switch K1-1 is closed, that is, when the sampling cycle arrives, the controlled gain amplifier receives the signal after photoelectric isolation, and adopts a broadband amplifier composed of an operational amplifier AR4, a resistor R11, a resistor R13, a resistor R14, and a field effect transistor T3 for proportional amplification. The proportional amplification multiple is controlled by the difference between the input signal of the broadband amplifier and the upper limit value of the allowable signal obtained by the device host, and can be calculated by a subtractor to adjust within the range of the host receiving signal, and the proportional amplification multiple is further slightly adjusted by multiplying the change rate of the isolated signal by the sampling cycle. Specifically, the change rate is calculated by an integrator composed of an operational amplifier AR3, a resistor R10, and a capacitor C3, and the electrolytic capacitor E4 is reversely charged through the resistor R12 during the sampling cycle time of the switch K1-2. The reverse charging voltage changes the drain-source resistance of the field effect transistor T3, thereby adjusting the proportional amplification multiple. The multiple is adjusted based on the difference between the input signal and the upper limit value of the allowable signal and its change rate, and is further adjusted through the sampling cycle to compensate for line losses, so that the amplifier can maintain stable amplification performance within a wider signal range, including The switch K1-1 and the operational amplifier AR3 are included. The left end of the switch K1-1 and the in-phase input end of the operational amplifier AR3 are connected to the pin 3 of the photocoupler OP1. The right end of the switch K1-1 is respectively connected to the upper end of the bidirectional voltage regulator VS1 and one end of the resistor R11. The lower end of the bidirectional voltage regulator VS1 is connected to the ground. The other end of the resistor R11 is connected to the in-phase input end of the operational amplifier AR4. The inverting input end of the operational amplifier AR3 is respectively connected to one end of the resistor R10 and one end of the capacitor C3. The output end of the operational amplifier AR3 is respectively connected to the other end of the resistor R10. , the other end of capacitor C3, and one end of resistor R12, the other end of resistor R12 is respectively connected to one end of switch K1-2 and the gate of field effect transistor T3, the other end of switch K1-2 is connected to the negative electrode of electrolytic capacitor E4, the positive electrode of electrolytic capacitor E4 is connected to ground, the source of field effect transistor T3 is connected to ground, the drain of field effect transistor T3 is connected to one end of resistor R13, the other end of resistor R13 is respectively connected to the inverting input end of operational amplifier AR4 and one end of resistor R14, the other end of resistor R14 and the output end of operational amplifier AR4 are the output signal of controlled gain amplifier.

[0018] Embodiment 4, on the basis of embodiment 1, the normalization circuit receives the proportionally amplified signal and the full-scale signal (the host obtains the upper limit value of the allowed signal), and divides the signal by a divider composed of an operational amplifier AR5, a multiplier D1, and resistors R15-R18 to perform normalization, limiting it to a certain range or proportion required by the device, so as to facilitate subsequent host processing or drive display, including resistor R15, one end of the resistor R15 is connected to the output end of the operational amplifier AR4, the other end of the resistor R15 is respectively connected to the inverting input end of the operational amplifier AR5 and one end of the resistor R16, the non-inverting input end of the operational amplifier AR5 is connected to the ground through a resistor R17, the output end of the operational amplifier AR5 is respectively connected to one end of the resistor R18 and the pin Y of the multiplier D1, the pin X of the multiplier D1 is connected to the full-scale signal, the UO pin of the multiplier D1 is connected to the other end of the resistor R16, the other end of the resistor R18 enters the device, and the device is connected in series with a grounding resistor R21.

[0019] Embodiment 5, on the basis of embodiment 1, the overcurrent protection circuit detects the current of the signal entering the device, R in the figure is equivalent to the device host, the voltage generated by the current flowing through the resistor R21 of the series device is obtained, the current signal is obtained through the operational amplifier AR7, the voltage regulator Z1, and the electrolytic capacitor E1 to obtain the peak value, and the difference with the host allowable current of the device is calculated by the operational amplifier AR6. When the allowable current is exceeded, the positive difference changes the resistance of the JFET tube, and then the current is shunted, thereby limiting the current of the interface and host signal entering the device, and protecting the interface and the host from damage, including the operational amplifier AR7, the in-phase input terminal of the operational amplifier AR7 is connected to the upper end of the resistor R21, and the operational amplifier A The output end of R7 is connected to the positive electrode of diode D4, the negative electrode of diode D4 is respectively connected to the positive electrode of grounded electrolytic capacitor E3, the inverting input end of operational amplifier AR7, and the non-inverting input end of operational amplifier AR6, the inverting input end of operational amplifier AR6 is connected to the allowable current, the output end of operational amplifier AR6 is connected to the positive electrode of diode D3, the negative electrode of diode D3 is respectively connected to one end of resistor R19 and one end of capacitor C4, the other end of resistor R19 is respectively connected to one end of grounded resistor R20, the adjustable end of potentiometer RW3, and the gate of field effect tube T4, the drain of field effect tube T4 is connected to the other end of resistor R18, and the source of field effect tube T4 is connected to the upper end of potentiometer RW3.

Claims

1. A detection information acquisition system, comprising a high input impedance receiving circuit, a controlled gain amplifier, a normalization circuit, and an overcurrent protection circuit, characterized in that: The high input impedance receiving circuit uses a differential field effect tube to access the detection information, which is then compensated for line loss by an adjustable amplifier, and finally isolated by a photoelectric coupler to enter a controlled gain amplifier; The controlled gain amplifier uses a broadband amplifier for proportional amplification, the proportional amplification factor is controlled by the difference between the broadband amplifier input signal and the device acquisition signal, and the proportional amplification factor is adjusted by multiplying the rate of change of the isolated signal by the sampling period; The normalization circuit receives the proportionally amplified signal and the full-scale signal, divides them by a divider for normalization, limits the signal within a certain range required by the device, and enters the device; The overcurrent protection circuit detects the current entering the device signal, and the difference between the current signal and the device allowable current is calculated by the operational amplifier AR6. When the allowable current is exceeded, the positive difference changes the resistance of the JFET tube, thereby limiting the current entering the device signal.

2. The detection information acquisition system according to claim 1, characterized in that: The high input impedance receiving circuit includes a field effect tube T1, a gate of the field effect tube T1, one end of a grounding resistor R1, and one end of a capacitor C1 are connected to detection information, a drain of the field effect tube T1 is connected to a power supply of +5V, a source of the field effect tube T1 is connected to one end of a resistor R2, the other end of the resistor R2 is respectively connected to the other end of the capacitor C1, one end of a resistor R3, and the drain of the field effect tube T2, the source of the field effect tube T2 is connected to the upper end of a potentiometer RW1, the lower end of the potentiometer RW1 is connected to a power supply of -5V, the gate of the field effect tube T2 is connected to the adjustable end of the potentiometer RW1, the other end of the resistor R3 is respectively connected to the in-phase input end of an operational amplifier AR2, the first end of a resistor R5, and the negative electrode of an electrolytic capacitor E2, the inverting input end of the operational amplifier AR2 is connected to the ground through a resistor R6, and the other end of the resistor R5 is connected to the potentiometer RW2 The left end of the potentiometer RW2 is respectively connected to the positive electrode of the electrolytic capacitor E2, the output end of the operational amplifier AR2, and one end of the resistor R7. The other end of the resistor R7 is respectively connected to one end of the resistor R8 and the inverting input end of the operational amplifier AR1. The non-inverting input end of the operational amplifier AR1 is connected to the gate of the field effect tube T1. The output end of the operational amplifier AR1 is connected to one end of the resistor R4. The other end of the resistor R4 is respectively connected to the adjustable end of the potentiometer RW2 and the positive electrode of the grounded electrolytic capacitor E1. The other end of the resistor R8 is respectively connected to pin 1 of the photoelectric coupler OP1 and one end of the grounded capacitor C2. Pin 2 of the photoelectric coupler OP1 is connected to ground. Pin 4 of the photoelectric coupler OP1 is connected to the power supply +24V. Pin 3 of the photoelectric coupler OP1 and one end of the grounded resistor R9 are the output signal of the high input impedance receiving circuit.

3. The detection information acquisition system according to claim 1, characterized in that: The controlled gain amplifier comprises a switch K1-1 and an operational amplifier AR3. The left end of the switch K1-1 and the in-phase input end of the operational amplifier AR3 are connected to pin 3 of the photocoupler OP1. The right end of the switch K1-1 is respectively connected to the upper end of the bidirectional voltage regulator VS1 and one end of the resistor R11. The lower end of the bidirectional voltage regulator VS1 is connected to the ground. The other end of the resistor R11 is connected to the in-phase input end of the operational amplifier AR4. The inverting input end of the operational amplifier AR3 is respectively connected to one end of the resistor R10 and one end of the capacitor C3. The output end of the operational amplifier AR3 is respectively connected to the resistor R10 and one end of the capacitor C3. 0, the other end of capacitor C3, and one end of resistor R12. The other end of resistor R12 is respectively connected to one end of switch K1-2 and the gate of field effect tube T3. The other end of switch K1-2 is connected to the negative electrode of electrolytic capacitor E4, the positive electrode of electrolytic capacitor E4 is connected to ground, the source of field effect tube T3 is connected to ground, the drain of field effect tube T3 is connected to one end of resistor R13. The other end of resistor R13 is respectively connected to the inverting input end of operational amplifier AR4 and one end of resistor R14. The other end of resistor R14 and the output end of operational amplifier AR4 are the output signal of controlled gain amplifier.

4. The detection information acquisition system according to claim 1, characterized in that: The normalization circuit includes a resistor R15, one end of which is connected to the output end of the operational amplifier AR4, the other end of which is respectively connected to the inverting input end of the operational amplifier AR5 and one end of the resistor R16, the non-inverting input end of the operational amplifier AR5 is connected to the ground through a resistor R17, the output end of the operational amplifier AR5 is respectively connected to one end of the resistor R18 and the pin Y of the multiplier D1, the pin X of the multiplier D1 is connected to the full-scale signal, the UO pin of the multiplier D1 is connected to the other end of the resistor R16, the other end of the resistor R18 enters the device, and the device is connected in series with a grounding resistor R21.

5. The detection information acquisition system according to claim 1, characterized in that: The overcurrent protection circuit includes an operational amplifier AR7, a non-inverting input terminal of the operational amplifier AR7 is connected to the upper end of the resistor R21, an output terminal of the operational amplifier AR7 is connected to the positive electrode of the diode D4, a negative electrode of the diode D4 is respectively connected to the positive electrode of the grounded electrolytic capacitor E3, an inverting input terminal of the operational amplifier AR7, and a non-inverting input terminal of the operational amplifier AR6, an inverting input terminal of the operational amplifier AR6 is connected to the allowable current, an output terminal of the operational amplifier AR6 is connected to the positive electrode of the diode D3, a negative electrode of the diode D3 is respectively connected to one end of the resistor R19 and one end of the capacitor C4, the other end of the resistor R19 is respectively connected to one end of the grounded resistor R20, an adjustable end of the potentiometer RW3, and a gate of the field effect tube T4, a drain of the field effect tube T4 is connected to the other end of the resistor R18, and a source of the field effect tube T4 is connected to the upper end of the potentiometer RW3.

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