Bonding structure, manufacturing method thereof and micro light-emitting diode device

Abstract

The invention relates to a bonding structure, a manufacturing method thereof and a miniature light-emitting diode device, and the manufacturing method of the bonding structure comprises the steps: providing a first substrate which is provided with a first bonding surface, and the first bonding surface is provided with a first bonding groove; providing a second substrate, wherein the second substrate is provided with a second bonding surface; the first bonding surface and the second bonding surface are bonded, the first bonding groove of the first bonding surface and the second bonding surface are sealed to form a hollow sealed cavity, the bonding structure comprising the sealed cavity is obtained, the air pressure in the sealed cavity is smaller than one standard atmospheric pressure, and therefore the novel mixed bonding structure is provided. According to the invention, the defects (such as high process difficulty, high process cost and the like) of the existing hybrid bonding technology can be effectively avoided, and the advantages (such as high bonding reliability and the like) of the existing hybrid bonding technology can be continued.

Description

[Technical field]

[0001] The present application relates to the field of semiconductor light emitting technology, and in particular to a bonding structure and a manufacturing method thereof, and a micro light emitting diode device. [Background technology]

[0002] With the continuous development of semiconductor technology, the requirements for chip computing power and storage density are getting higher and higher, and multi-chip stacking has emerged; or display driver chips and display light-emitting chips (modules) are stacked vertically to achieve higher PPI (Pixels Per Inch) and higher reliability, faster data transmission speed, and lower power consumption requirements.

[0003] Various industries and fields of semiconductors, such as 3D chip stacking, heterogeneous integration, image sensors, automotive electronics, 5G communications, MEMS sensors, etc., have put forward higher requirements for chip (wafer) integration and chip (wafer) vertical stacking, especially the monolithic integration in the Micro-LED (Micro-Light Emitting Diode) field, which puts forward very high requirements on bonding reliability and bonding process cost.

[0004] However, existing bonding technologies have the problem of difficulty in balancing bonding reliability and bonding process costs. [Summary of the invention]

[0005] The embodiments of the present application provide a bonding structure and a manufacturing method thereof, as well as a micro light emitting diode device, so as to reduce the bonding process cost while ensuring high bonding reliability.

[0006] In order to solve the above problems, an embodiment of the present application provides a method for manufacturing a bonding structure, which includes: providing a first substrate, the first substrate having a first bonding surface, and the first bonding surface is provided with a first bonding groove; providing a second substrate, the second substrate having a second bonding surface; bonding the first bonding surface to the second bonding surface, and sealing the first bonding groove of the first bonding surface and the second bonding surface to form an internally hollow sealed cavity, so as to obtain a bonding structure including a sealed cavity, and the air pressure in the sealed cavity is less than 1 standard atmospheric pressure.

[0007] Wherein, providing a first substrate includes: providing a first original substrate, the first original substrate including one or more semiconductor structures; depositing a conductive material on the electrical interconnection area on the surface of the semiconductor structure of the first original substrate to form a first bonding layer provided with a first bonding groove, the first bonding layer being used to electrically connect the semiconductor structure of the first original substrate with the second substrate.

[0008] Wherein, a conductive material is deposited on the electrical interconnection area on the surface of the semiconductor structure of the first original substrate to form a first bonding layer with a first bonding groove, including: magnetron sputtering depositing metal material on the electrical interconnection area on the surface of the semiconductor structure of the first original substrate to form a first bonding layer with a first bonding groove.

[0009] Among them, the first bonding surface is bonded to the second bonding surface, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, so as to obtain a bonding structure including the sealed cavity, including: aligning and fitting the first bonding surface with the second bonding surface, and then applying pressure to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity; releasing the pressure.

[0010] Among them, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, including: in an environment where the air pressure is less than 1 standard atmospheric pressure, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

[0011] Among them, in an environment where the air pressure is less than or equal to 0.4 standard atmospheric pressure, the first bonding surface is aligned and fitted with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, including: in an environment where the air pressure is less than 1 standard atmospheric pressure, the first bonding surface is aligned and fitted with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity; releasing pressure, including: releasing pressure in an environment where the air pressure is 1 standard atmospheric pressure.

[0012] The first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, including: in an environment above room temperature, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

[0013] Wherein, in an environment above room temperature, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, including: heating the first substrate and the second substrate to 150-300°C, aligning the first bonding surface and the second bonding surface, and then applying pressure to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

[0014] The first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, including: placing the first substrate and the second substrate in a vacuum chamber, heating the first substrate and the second substrate to 150-300°C, aligning the first bonding surface and the second bonding surface, and then applying pressure to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity; wherein the air pressure in the vacuum chamber is less than or equal to 0.4 standard atmospheric pressure; releasing the pressure includes: inflating the vacuum chamber to 1 standard atmospheric pressure, cooling the first substrate and the second substrate to 5-75°C, and then releasing the pressure.

[0015] Among them, after the first bonding surface is bonded to the second bonding surface, the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, and a bonding structure including the sealed cavity is obtained, the method also includes: heating the bonding structure to a preset heating temperature so that the first substrate and the second substrate in the bonding structure are connected as a whole at the interface where the first bonding surface contacts the second bonding surface, wherein the preset heating temperature is 75 to 90°C.

[0016] Among them, the second bonding surface is provided with a second bonding groove; the first bonding groove of the first bonding surface and the second bonding surface are sealed to form an internal hollow sealed cavity, including: the first bonding groove of the first bonding surface and the second bonding groove of the second bonding surface are sealed and connected to form an internal hollow sealed cavity.

[0017] In order to solve the above problems, an embodiment of the present application also provides a bonding structure, which includes: a first substrate, the first substrate having a first bonding surface, the first bonding surface is provided with a first bonding groove; a second substrate, the second substrate having a second bonding surface, the second bonding surface is bonded to the first bonding surface, and the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, wherein the air pressure in the sealed cavity is less than 1 standard atmospheric pressure.

[0018] The first substrate includes a first original substrate and a first bonding layer provided with a first bonding groove, wherein the first original substrate includes one or more semiconductor structures, and the first bonding layer includes a conductive material and is provided on an electrical interconnection area on the surface of the semiconductor structure.

[0019] Wherein, the conductive material is a metal material.

[0020] Wherein, the first bonding groove runs through the first bonding layer.

[0021] Among them, the second bonding surface is provided with a second bonding groove; the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, including: the first bonding groove of the first bonding surface and the second bonding groove of the second bonding surface are sealed and connected to form an internal hollow sealed cavity.

[0022] The second substrate includes a second original substrate and a second bonding layer, the second bonding layer is arranged on one side of the second original substrate, and the second bonding surface is a surface of the second bonding layer facing away from the second original substrate.

[0023] In order to solve the above problems, an embodiment of the present application further provides a micro light emitting diode device, which includes a bonding structure manufactured by any of the above methods, or includes any of the above bonding structures.

[0024] The beneficial effects of the present application are as follows: the bonding structure and the manufacturing method thereof, as well as the micro-light emitting diode device provided by the present application, are provided by providing a first substrate, the first substrate having a first bonding surface, the first bonding surface being provided with a first bonding groove, and providing a second substrate, the second substrate having a second bonding surface, and then bonding the first bonding surface to the second bonding surface, the first bonding groove of the first bonding surface and the second bonding surface are sealed to form an internally hollow sealed cavity, thereby obtaining a bonding structure including a sealed cavity, and the air pressure in the sealed cavity is less than 1 standard atmospheric pressure, thereby providing a new type of hybrid bonding structure. The invention relates to a structure that realizes firmly connecting two substrates (for example, chips, wafers or wafer blocks) together through the suction force generated by the pressure difference between the inside and outside of the sealed cavity and the bonding force at the interface where the bonding surfaces of the two substrates contact each other. The bonding process has low difficulty and low process cost, and the two substrates in the bonding structure are always subjected to the suction force generated by the pressure difference, which greatly enhances the bonding strength and improves the bonding reliability. Therefore, the disadvantages of the existing hybrid bonding technology, such as high process difficulty and high process cost, can be effectively avoided, and the advantage of the existing hybrid bonding technology with high bonding reliability can be continued.

Brief Description of the Drawings

[0025] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0026] Figure 1 It is a schematic diagram of a process for manufacturing a bonding structure provided in an embodiment of the present application;

[0027] Figure 2 is a schematic diagram of the cross-sectional structure after step S13 provided in the embodiment of the present application is completed;

[0028] Figure 3 is a schematic diagram of a top view of the structure of a first substrate provided in an embodiment of the present application;

[0029] Figure 4 is along Figure 3 A schematic diagram of a cross-sectional structure taken along line O-O';

[0030] Figure 5 is another cross-sectional structural schematic diagram after step S13 provided in an embodiment of the present application is completed;

[0031] Figure 6 is another cross-sectional structural schematic diagram after step S13 provided in an embodiment of the present application is completed;

[0032] Figure 7 is a schematic diagram of a top view of the structure of a second substrate provided in an embodiment of the present application;

[0033] Figure 8 is along Figure 7 A schematic diagram of a cross-sectional structure taken along the line P-P' in FIG.

[0034] Fig. 9 is another cross-sectional structural schematic diagram after step S13 provided in an embodiment of the present application is completed;

[0035] Fig.10 is a schematic structural diagram of a micro light emitting diode device provided in an embodiment of the present application;

[0036] Fig.11 is another structural schematic diagram of a micro light emitting diode device provided in an embodiment of the present application;

[0037] Fig.12 It is a schematic diagram of the structure of the display device provided in an embodiment of the present application. [Specific implementation method]

[0038] The following is a further detailed description of the embodiments of the present application in conjunction with the accompanying drawings and examples. It is particularly noted that the following examples are only used to illustrate the embodiments of the present application, but do not limit the scope of the embodiments of the present application. Similarly, the following examples are only some embodiments of the embodiments of the present application rather than all embodiments, and all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the embodiments of the present application.

[0039] When describing the structure of a component, when a layer or a region is referred to as being "on" or "above" another layer or another region, it may mean being directly above the other layer or another region, or having other layers or regions between it and the other layer or another region. Also, if the component is turned over, the layer or the region will be "under" or "below" the other layer or another region. In addition, the features, structures, or characteristics described below may be combined in any suitable manner in one or more embodiments.

[0040] In addition, the directional terms mentioned in the embodiments of the present application, such as [up], [down], [front], [back], [left], [right], [inside], [outside], [side], etc., are only referenced to the directions of the attached drawings. Therefore, the directional terms used are used to illustrate and understand the embodiments of the present application, rather than to limit the embodiments of the present application. In each of the accompanying drawings, units with similar structures are represented by the same figure numbers. For clarity, the various parts in the drawings are not drawn to scale. In addition, certain related parts may not be shown in the drawings.

[0041] The following is a detailed description with reference to specific embodiments. It should be noted that the embodiments of the present application can be presented in various forms, some examples of which will be described below.

[0042] See also Figure 1 , Figure 1 : is a schematic diagram of a process for manufacturing a bonding structure provided in an embodiment of the present application. The specific process of the method for manufacturing the bonding structure may be as follows:

[0043] Step S11: providing a first substrate, wherein the first substrate has a first bonding surface, and the first bonding surface is provided with a first bonding groove.

[0044] Step S12: providing a second substrate, wherein the second substrate has a second bonding surface.

[0045] Step S13: Bond the first bonding surface to the second bonding surface, and seal the first bonding groove of the first bonding surface and the second bonding surface to form an internal hollow sealed cavity, thereby obtaining a bonding structure including the sealed cavity, and the air pressure in the sealed cavity is less than 1 standard atmosphere.

[0046] The cross-sectional structure diagram after step S13 is completed can be as follows: Figure 2 shown.

[0047] In this embodiment, if Figure 2 As shown, the air pressure in the sealed cavity 300 is less than 1 standard atmosphere, which causes an air pressure difference inside and outside the sealed cavity 300 under normal pressure (about 1 standard atmosphere), and the first substrate 100 and the second substrate 200 in the bonding structure 10 will always be subject to the suction force generated by the air pressure difference, and can be firmly connected together in a normal atmospheric environment, which greatly enhances the bonding strength and improves the bonding reliability.

[0048] Specifically, the lower the air pressure in the sealed cavity 300 and the greater the air pressure difference between the inside and outside of the sealed cavity 300 , the more conducive it is to form a firm connection between the first substrate 100 and the second substrate 200 in the bonding structure 10 , thereby improving the bonding reliability of the bonding structure 10 .

[0049] In some examples, 1 standard atmosphere is 1.0 atm, and the air pressure in the sealed cavity 300 can be less than 0.5 atm, so that the air pressure difference inside and outside the sealed cavity 300 can be greater than 0.5 atm, to ensure that the sealed cavity 300 can provide a sufficiently large suction force to fix the first substrate 100 and the second substrate 200.

[0050] In this embodiment, if Figure 2 As shown, in the bonding structure 10, the first bonding surface F1 can be connected to the second bonding surface F2 at the interface in contact with the second bonding surface F2 through intermolecular attraction and / or chemical bonds.

[0051] In some embodiments, during the process of bonding the first bonding surface F1 to the second bonding surface F2, a chemical bond (eg, a covalent bond) may be directly formed between the first bonding surface F1 and the second bonding surface F2, thereby connecting the first bonding surface F1 and the second bonding surface F2 together through a chemical bond.

[0052] In other embodiments, in the process of bonding the above-mentioned first bonding surface F1 and the second bonding surface F2, the first bonding surface F1 and the second bonding surface F2 can be connected together by the intermolecular attraction between the first bonding surface F1 and the second bonding surface F2. And, as time goes by, due to the diffusion of molecules, the molecules at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact will diffuse with each other until they are completely fused together. This process of diffusion and fusion enables the first substrate 100 and the second substrate 200 to be tightly combined at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact to form a whole. Therefore, in this way, not only can the bonding force between the first substrate 100 and the second substrate 200 be greatly improved, but also the strength of the bonding can be significantly improved, thereby enhancing the overall stability and durability.

[0053] Furthermore, in a specific implementation, after obtaining the above-mentioned bonding structure 10, that is, after the above-mentioned step S13, the above-mentioned bonding structure 10 can be left to stand for a period of time so that the molecules of the above-mentioned first substrate 100 and the second substrate 200 at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact can be fully diffused, so as to realize the first substrate 100 and the second substrate 200 being connected as a whole at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact.

[0054] In some specific embodiments, in view of the low molecular diffusion rate at room temperature, the bonding structure 10 needs to be left still for a long period of time before the first substrate 100 and the second substrate 200 can be connected as one at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact, which is not conducive to improving production efficiency. Therefore, in order to increase the molecular diffusion rate at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact, so as to more quickly connect the first substrate 100 and the second substrate 200 at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact, after the above step S13, the method for manufacturing the bonding structure may further include:

[0055] The bonding structure 10 is heated so that the first substrate 100 and the second substrate 200 in the bonding structure 10 are connected as one at the interface where the first bonding surface F1 and the second bonding surface F2 contact each other.

[0056] Specifically, the bonding structure 10 can be heated to a preset heating temperature and maintained for a preset heating time, so that the molecular diffusion rate at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact is accelerated as the temperature increases, thereby greatly shortening the time required to connect the first substrate 100 and the second substrate 200 in the bonding structure 10 at the interface where the first bonding surface F1 and the second bonding surface F2 are in contact as a whole, thereby improving production efficiency while improving bonding strength.

[0057] Furthermore, in a specific implementation, the selection of the preset heating temperature should satisfy the following requirement: after the bonding structure 10 is heated to the preset heating temperature, the sealed cavity 300 in the bonding structure 10 can still be stably in a sealed state. In some examples, the preset heating temperature can be 75 to 90° C., and the preset heating time can be 5 to 35 minutes.

[0058] In some embodiments, Figure 2 As shown, the above step S13 may include:

[0059] Step S131: aligning and bonding the first bonding surface F1 and the second bonding surface F2, and then applying pressure to the first substrate 100 and / or the second substrate 200, so that the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior.

[0060] Step S132: Release the pressure.

[0061] In some specific embodiments, Figure 2 As shown, in order to ensure that the air pressure in the sealed cavity 300 formed after bonding is less than 1 standard atmospheric pressure, the first substrate 100 and the second substrate 200 can be bonded in a vacuum environment (i.e., an environment with an air pressure less than 1 standard atmospheric pressure). Accordingly, the above step S131 may include: in an environment where the air pressure is a first preset air pressure, aligning and fitting the first bonding surface F1 and the second bonding surface F2, and then applying pressure to the first substrate 100 and / or the second substrate 200, so that the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior. Among them, the first preset air pressure is less than 1 standard atmospheric pressure, for example, it can be less than or equal to 0.4 standard atmospheric pressure.

[0062] Specifically, in the process of applying pressure to the first substrate 100 and / or the second substrate 200, the first bonding surface F1 and the second bonding surface F2 will be tightly attached together under the pressure, so that the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a hollow sealed cavity 300. In addition, the air pressure in the sealed cavity 300 can be equal to the ambient air pressure (i.e., the first preset air pressure) when the sealed cavity 300 is formed, so that the air pressure in the sealed cavity 300 is less than 1 standard atmospheric pressure, so that there is always a pressure difference between the inside and outside of the sealed cavity 300, and the first substrate 100 and the second substrate 200 are continuously pressed together, ensuring high bonding strength and high bonding reliability, thereby improving device reliability.

[0063] Furthermore, after the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form the sealed cavity 300 with a hollow interior, in order to ensure that the sealed cavity 300 can be stably in a sealed state, the pressure applied to the first substrate 100 and / or the second substrate 200 can be released in an environment where the air pressure is greater than or equal to 1 standard atmospheric pressure. Accordingly, the above step S132 can specifically include: releasing the pressure in an environment where the air pressure is a second preset air pressure. The second preset air pressure is greater than or equal to 1 standard atmospheric pressure.

[0064] In specific implementation, the first substrate 100 and the second substrate 200 can be placed in a vacuum chamber, the first bonding surface F1 and the second bonding surface F2 are aligned and bonded, and then pressure is applied to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior, wherein the air pressure in the vacuum chamber is less than or equal to 0.4 standard atmospheric pressure, and the vacuum chamber can be obtained by evacuating the sealed chamber. Then, the vacuum chamber can be inflated to 1 standard atmospheric pressure, and then the pressure is released, so that the bonding structure 10 including the sealed cavity 300 can be obtained, and there is a pressure difference of about 0.6 standard atmospheric pressure inside and outside the sealed cavity 300, and the first substrate 100 and the second substrate 200 are continuously pressed together, ensuring high bonding strength and high bonding reliability, thereby improving the mechanical strength and reliability of the device.

[0065] In addition, it should be noted that in the process of bonding the first substrate 100 and the second substrate 200 in a vacuum environment, the bonding temperature can be room temperature (for example, 20-75°C) or low temperature (for example, 5-15°C), and bonding at room temperature or low temperature can avoid problems such as device failure and thermal stress caused by bonding at high temperature, thereby improving product yield.

[0066] In some other specific embodiments, Figure 2 As shown, in order to ensure that the air pressure in the sealed cavity 300 formed after bonding is less than 1 standard atmosphere, the first substrate 100 and the second substrate 200 can also be bonded in a high temperature environment. Accordingly, the above step S131 can specifically include: in an environment of a first preset temperature, aligning and fitting the first bonding surface F1 and the second bonding surface F2, and then applying pressure to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior. Among them, the first preset temperature is higher than room temperature, for example, it can be 150-300°C.

[0067] Specifically, the first substrate 100 and the second substrate 200 can be heated to 150-300° C., the first bonding surface F1 and the second bonding surface F2 can be aligned and bonded, and then pressure is applied to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300.

[0068] It is understandable that, in the process of applying pressure to the first substrate 100 and / or the second substrate 200, the first bonding surface F1 and the second bonding surface F2 will be tightly attached together under the pressure, so that the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300. In addition, after the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300, in order to ensure that the sealed cavity 300 can be stably in a closed state, the pressure applied to the first substrate 100 and / or the second substrate 200 can be released at room temperature (e.g., 20 to 75°C) or low temperature (e.g., 5 to 15°C). Accordingly, the above step S132 can specifically include: releasing the pressure in an environment of a second preset temperature. The second preset temperature is lower than or equal to the room temperature. Specifically, the second preset temperature may be 5 to 75°C, for example, 20 to 75°C, or 5 to 15°C.

[0069] In specific implementation, the first substrate 100 and the second substrate 200 can be heated to 150-300°C at a preset heating rate (e.g., 0.5-3°C / s) in a normal atmospheric environment (i.e., an environment with an atmospheric pressure of 1 standard atmospheric pressure), the first bonding surface F1 and the second bonding surface F2 are aligned and bonded, and then pressure is applied to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior. Then, the first substrate 100 and the second substrate 200 can be cooled to room temperature at a preset cooling rate (e.g., 0.5-3°C / s), and then the pressure is released to obtain the above-mentioned bonding structure 10 including the sealed cavity 300.

[0070] In addition, it should be noted that, in a normal atmospheric environment, during the process of bonding the first substrate 100 and the second substrate 200 by heating the first substrate 100 and the second substrate 200, because the gas has different densities at different temperatures and the higher the gas temperature, the lower its density, at high temperature, a low-density gas atmosphere will be formed on the surfaces of the first substrate 100 and the second substrate 200, thereby achieving a gas pressure lower than normal pressure in the closed cavity 300 formed after bonding.

[0071] In addition, the inventors of the present application found in their research and development that the density of the gas at 25°C, 150°C and 300°C is 1.18 kg / cm 3 , 0.83kg / m 3 and 0.62kg / m 3, the gas pressures are 1.0atm, 0.70atm, and 0.52atm, respectively. Therefore, when the bonding temperature (i.e., the first preset temperature) is 150-300°C, and the second preset temperature is room temperature, and the room temperature is 25°C, the pressure difference between the inside and outside of the closed cavity 300 formed after bonding is 0.30-0.48 standard atmospheric pressure, and the gas density in the closed cavity 300 is about 0.31-0.50kgf / cm 2 .

[0072] It can be understood that because the sealed cavity 300 is formed in an environment with a relatively high temperature (i.e., the first preset temperature), the gas density in the sealed cavity 300 is relatively small. Therefore, after the ambient temperature drops to a relatively low temperature (i.e., the second preset temperature), the outside of the sealed cavity 300 is at normal pressure, the gas density is large, and when the temperature inside and outside the sealed cavity 300 is consistent, a pressure difference is formed inside and outside the sealed cavity 300, thereby forming a low-pressure sealed cavity 300, so that the above-mentioned first substrate 100 and the second substrate 200 are subjected to the pressure difference force and the bonding force between the bonding surfaces, thereby being firmly bonded.

[0073] In other specific embodiments, Figure 2 As shown, in order to ensure that the air pressure in the sealed cavity 300 formed after bonding is less than 1 standard atmospheric pressure, the first substrate 100 and the second substrate 200 can also be bonded in a high temperature environment and a vacuum environment. Accordingly, the above step S131 can specifically include: in an environment where the air pressure is a third preset air pressure and an environment where the air temperature is a third preset temperature, aligning and fitting the first bonding surface F1 with the second bonding surface F2, and then applying pressure to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form a sealed cavity 300 with a hollow interior. Among them, the third preset air pressure is less than 1 standard atmospheric pressure, for example, it can be less than or equal to 0.4 standard atmospheric pressure, and the third preset temperature is higher than room temperature, for example, it can be 150-300°C.

[0074] It is understandable that, in the process of applying pressure to the first substrate 100 and / or the second substrate 200, the first bonding surface F1 and the second bonding surface F2 will be tightly attached together under the pressure, so that the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300. In addition, after the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300, in order to ensure that the sealed cavity 300 can be stably in a closed state, the pressure applied to the first substrate 100 and / or the second substrate 200 can be released in an environment with an air pressure greater than or equal to 1 standard atmospheric pressure and an environment at room temperature or low temperature. Accordingly, the above step S132 can specifically include: releasing the pressure in an environment with an air pressure of a fourth preset air pressure and an environment at a fourth preset temperature. The fourth preset temperature is lower than or equal to room temperature, specifically, the fourth preset temperature may be 5-75° C., for example, 20-75° C., or 5-15° C. The fourth preset pressure is greater than or equal to 1 standard atmospheric pressure.

[0075] In a specific implementation, the first substrate 100 and the second substrate 200 can be placed in a vacuum chamber, and the temperature of the first substrate 100 and the second substrate 200 can be increased to 150-300°C at a preset heating rate (for example, 0.5-3°C / s), and the first bonding surface F1 and the second bonding surface F2 are aligned and bonded, and then pressure is applied to the first substrate 100 and / or the second substrate 200, and the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F2 are sealed to form an internal hollow sealed cavity 300, wherein the air pressure in the vacuum chamber is less than or equal to 0.4 standard atmospheric pressure. Next, the vacuum chamber can be filled with gas to 1 standard atmospheric pressure, and the first substrate 100 and the second substrate 20 can be cooled to 5-75°C at a preset cooling rate (for example, 0.5-3°C / s). The pressure is then released to obtain the above-mentioned bonding structure 10 including the sealed cavity 300, and the air pressure in the sealed cavity 300 is lower than the ambient air pressure when the sealed cavity 300 is formed (i.e., the above-mentioned third preset air pressure).

[0076] In addition, it should be noted that, compared with the scheme of bonding the first substrate 100 and the second substrate 200 in a vacuum environment or a high temperature environment, the scheme of bonding the first substrate 100 and the second substrate 200 in a vacuum environment and a high temperature environment in this embodiment is conducive to forming a sealed cavity 300 with a lower internal air pressure, further improving the bonding strength, and thus can further improve the mechanical strength and reliability of the device.

[0077] Specifically, in the above-mentioned embodiment in which the first substrate 100 and the second substrate 200 are bonded in a vacuum environment and / or a high temperature environment, an alignment mark may be provided on the above-mentioned first substrate 100 and / or the second substrate 200. Furthermore, the above-mentioned aligning and bonding the first bonding surface F1 with the second bonding surface F2 may include: aligning and bonding the first bonding surface F1 with the second bonding surface F2 according to the alignment mark.

[0078] Specifically, in the above-mentioned embodiment in which the first substrate 100 and the second substrate 200 are bonded in a vacuum environment and / or a high temperature environment, the above-mentioned application of pressure to the first substrate 100 and / or the second substrate 200 may include: applying pressure to the first substrate 100 and / or the second substrate 200 at a preset force application rate (for example, 0.1-0.5 kg / s) to a preset pressure, and maintaining it for a preset time, so that the first bonding surface F1 of the above-mentioned first substrate 100 is bonded with the second bonding surface F2 of the second substrate 200, and the above-mentioned sealed cavity 300 is formed. Among them, the preset pressure can be 0.01-0.6Mpa, the preset time can be 0.5-5min, and the direction of the bonding pressure (that is, the pressure applied to the above-mentioned first substrate 100 and / or the second substrate 200) can be perpendicular to the above-mentioned first substrate 100 and the second substrate 200.

[0079] Specifically, in the above-mentioned embodiment in which the first substrate 100 and the second substrate 200 are bonded in a vacuum environment and / or a high temperature environment, the above-mentioned release pressure may include: releasing the pressure applied to the above-mentioned first substrate 100 and / or the second substrate 200 at a preset release force rate (for example, 0.1 to 0.5 kg / s).

[0080] Moreover, in a specific implementation, during the process of bonding the first substrate 100 and the second substrate 200, the magnitude of the bonding pressure, the preset force application rate, and the specific values ​​of the force release rate can be optimized based on the size of the first substrate 100 and the second substrate 20, the distribution pattern and distribution density of the first bonding surface F1 and the second bonding surface F2, and the bonding equipment used.

[0081] In addition, the first bonding surface F1 and the second bonding surface F2 should be as flat and smooth as possible to ensure that the first substrate 100 and the second substrate 200 can be tightly contacted and bonded at the interface where the first bonding surface F1 and the second bonding surface F2 contact each other under the bonding pressure to form the sealed cavity 300.

[0082] In addition, it should be noted that, although the process technology of traditional metal hot pressing bonding is mature, its bonding strength and reliability are insufficient. After bonding, it is necessary to fill the bottom filler to increase the bonding strength. The introduction of the bottom filler will increase the stress and reduce the reliability. The chemical bonding or hybrid bonding in the current advanced integrated circuit packaging technology has good performance after bonding, but it has high requirements for equipment and process, and the technical difficulty is high. At present, chemical bonding and copper-copper bonding are generated by dielectric materials (such as silicon, silicon carbide, silicon nitride, silicon oxide, etc.) to form hybrid bonding. However, these chemical bonding or other hybrid bonding methods have relatively large technical difficulties. For example, in order to produce chemical bonds, the surface particles (<1μm) and flatness of the wafer are very high, the bonding time is long (>20mins), the bonding pressure is high (>1Mpa), and it needs to be treated at high temperature (>300℃), there are thermal stress problems, and the requirements for environmental cleanliness, bonding equipment, and process parameters are very high. Therefore, the existing bonding technology has the problem of being difficult to achieve both high bonding reliability and low bonding process difficulty.

[0083] In the present embodiment, the first substrate 100 and the second substrate 200 are bonded in a vacuum environment and / or a high temperature environment. The suction force generated by the pressure difference between the inside and outside of the sealed cavity and the bonding force at the interface where the first bonding surface F1 contacts the second bonding surface F2 are used to form a hybrid bonding. The bonding temperature can be room temperature (e.g., 20-75°C), low temperature (e.g., 5-15°C) or relatively high temperature (e.g., ≤300°C). This avoids problems such as device failure and thermal stress caused by bonding at high temperature (>300°C). The bonding reliability is high, the bonding process requirements are low, and the bonding process cost is low.

[0084] In addition, compared with the prior art solution of forming a hybrid bonding by first forming one bonding method and then forming another bonding method, in this embodiment, the bonding of the two bonding surfaces F1 / F2 and the formation of the sealing cavity 300 are carried out simultaneously, that is, two bonding methods can be formed in one step, thereby forming a hybrid bonding, thereby improving the bonding efficiency and shortening the production cycle.

[0085] In the above embodiment, if Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, the first substrate 100 may include a first original substrate 101 and a first bonding layer 102, the first bonding layer 102 is disposed on one side of the first original substrate 101, and the first bonding surface F1 may be a surface of the first bonding layer 102 facing away from the first original substrate 101. Accordingly, the step S11 may include:

[0086] Step S111: providing a first original substrate 101.

[0087] Specifically, the first original substrate 101 can be a chip, a wafer or a wafer block. Among them, the chip can be a driver chip, or can be a light-emitting diode chip (for example, a micro light-emitting diode chip). The wafer can be a driver wafer including multiple driver chips, or can be a light-emitting wafer including multiple light-emitting diode chips. The wafer block can be obtained by wafer cutting, each wafer block includes two or more driver chips, or each wafer block includes two or more light-emitting diode chips.

[0088] Step S112 : forming a first bonding layer 102 having a first bonding groove 103 on one side of the first original substrate 101 .

[0089] Specifically, a first bonding layer 102 having a first bonding groove 103 can be formed on one side of the first original substrate 101 by a deposition process and a photolithography process. The deposition process can include a variety of chemical or physical, gas phase or liquid phase deposition processes such as an electron beam deposition process, a magnetron sputtering deposition process, a thermal evaporation process, and an electroplating process.

[0090] In some examples, a bonding material (e.g., a metal material) may be deposited on one side of the first original substrate 101 by a deposition process (e.g., a magnetron sputtering deposition process) to form a bonding material layer. Then, the bonding material layer may be etched by a photolithography process to form a first bonding layer 102 having a first bonding groove 103.

[0091] In other examples, a patterned photoresist layer may be formed on one side of the first original substrate 101 by a photolithography process, and then a bonding material may be deposited on the side of the patterned photoresist layer away from the first original substrate 101 by a deposition process to form a bonding material layer. Next, the patterned photoresist layer and the bonding material layer on the surface thereof may be removed by a stripping process to form a first bonding layer 102 having a first bonding groove 103.

[0092] In some embodiments, the first bonding layer 102 may be electrically insulating. Accordingly, the material of the first bonding layer 102 may include insulating materials such as silicon oxide and / or silicon nitride. In some examples, the first bonding layer 102 may be a single-layer structure, for example, a silicon oxide layer. In other examples, the first bonding layer 102 may also be a laminated structure, for example, a laminated structure of silicon nitride / silicon oxide.

[0093] In other embodiments, the first bonding layer 102 may be conductive. Accordingly, the material of the first bonding layer 102 may include a conductive material, wherein the conductive material may be a metal material such as aluminum (Al), copper (Cu), gold (Au), titanium (Ti) and / or germanium (Ge). In some examples, the first bonding layer 102 may be a single-layer metal structure, for example, an aluminum layer, a copper layer or a gold layer. In other examples, the first bonding layer 102 may also be a composite multi-layer stacked metal structure, for example, a composite multi-layer stacked metal structure of Ti / Al, or a composite multi-layer stacked metal structure of Ge / Al / Ti / Au.

[0094] Moreover, in the above-mentioned embodiment in which the first bonding layer 102 is conductive, the first substrate 100 in the above-mentioned bonding structure 10 can be electrically connected to the second substrate 200 through the first bonding layer 102, so that the first bonding layer 102 can play a conductive role, electrically connecting the first substrate 100 and the second substrate 200, and realizing that the first bonding layer 102 has both conductive interconnection and bonding functions.

[0095] Specifically, Figure 5 As shown, the first original substrate 101 may include one or more first semiconductor structures 110 , wherein the surface of the first semiconductor structure 110 has a first electrical interconnection region, and the first electrical interconnection region refers to a region that needs to be electrically interconnected with the second substrate 200 .

[0096] Furthermore, the above step S112 may include: depositing a conductive material on the first electrical interconnection region on the surface of the first semiconductor structure 110 of the first original substrate 101 to form a first bonding layer 102 having a first bonding groove 103, wherein the first bonding layer 102 is used to electrically connect the first semiconductor structure 110 of the first original substrate 101 with the second substrate 200. In a specific implementation, a metal material may be deposited on the first electrical interconnection region on the surface of the first semiconductor structure 110 of the first original substrate 101 by magnetron sputtering to form the first bonding layer 102 having the first bonding groove 103.

[0097] Exemplarily, the first semiconductor structure 110 may be a driver chip, and the first electrically interconnected region on the surface of the first semiconductor structure 110 may be an electrode surface of the driver chip. Exemplarily, the first semiconductor structure 110 may be a light-emitting diode chip, and the first electrically interconnected region on the surface of the first semiconductor structure 110 may be an electrode surface of the light-emitting diode chip. Exemplarily, the first semiconductor structure 110 may be a partial structure of a driver chip, and the first semiconductor structure 110 may be an electrode of the driver chip electrically connected to the first semiconductor structure 110 (e.g., a pixel electrode or a common electrode). Exemplarily, the first semiconductor structure 110 may be a partial structure of a light-emitting diode chip, and the first semiconductor structure 110 may be an electrode of the light-emitting diode chip electrically connected to the first semiconductor structure 110 (e.g., an N-type electrode or a P-type electrode).

[0098] In some specific embodiments, Figure 5 As shown, the first original substrate 101 may include a plurality of first semiconductor structures 110. Furthermore, the first bonding layer 102 may be formed on the first electrical interconnection region on the surface of a part or all of the first semiconductor structures 110, so that all of the first semiconductor structures 110 on the first original substrate 101 can be electrically connected to the second substrate 200 through the first bonding layer 102, or a part of the first semiconductor structures 110 on the first original substrate 101 can be electrically connected to the second substrate 200 through the first bonding layer 102, and other first semiconductor structures 110 except the part of the first semiconductor structures 110 can be electrically connected to the second substrate 200 through other conductive structures (e.g., conductive pillars, pads, etc.).

[0099] In some embodiments, Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, the first bonding groove 103 may penetrate the first bonding layer 102, for example, may penetrate the first bonding layer 102 in a direction Z perpendicular to the first original substrate 101, thereby facilitating the formation of a larger sealed cavity 300 after bonding and further improving the bonding strength.

[0100] In some embodiments, Figure 2 , Figure 3 , Figure 4 and Figure 5 As shown, the first bonding layer 102 may include a plurality of first bonding blocks 102A distributed at intervals, and each first bonding block 102A is provided with at least one first bonding groove 103 on a side facing away from the first original substrate 101 .

[0101] Specifically, the plurality of first bonding blocks 102A included in the first bonding layer 102 may be evenly spaced and distributed to ensure uniform force on the first substrate 100 and the second substrate 200 in the bonding structure 10 .

[0102] In some examples, such as Figure 3 As described above, the plurality of first bonding blocks 102A included in the first bonding layer 102 may be evenly spaced and distributed in a rectangular array.

[0103] Specifically, in the above-mentioned embodiment where the first original substrate 101 includes one or more first semiconductor structures 110, as Figure 5 As shown, one or more first bonding blocks 102A may be formed on a first electrical interconnection region on a surface of a first semiconductor structure 110 , and the one or more first bonding blocks 102A have conductive properties to achieve electrical connection between the first semiconductor structure 110 and the second substrate 100 .

[0104] Specifically, in an embodiment in which a first bonding groove 103 is provided on a side of the first bonding block 102A facing away from the first original substrate 101, Figure 3 As shown, the first bonding groove 103 may penetrate the first bonding block 102A, for example, may penetrate the first bonding block 102A in a direction Z perpendicular to the first original substrate 101 .

[0105] In some examples, such as Figure 3 As shown, a first bonding groove 103 may be provided on the side of the first bonding block 102A facing away from the first original substrate 101, and the first bonding groove 103 may pass through the first bonding block 102A and may be located in the middle of the first bonding block 102A, so that the first bonding block 102A is a hollow annular structure.

[0106] In some examples, the opening shape of the first bonding groove 103 can be circular (eg Figure 3 The outer edge of the first bonding block 102 away from the surface of the first original substrate 101 may be in the shape of a circle (as shown in FIG. Figure 3 As shown), square, diamond, polygon or irregular shape.

[0107] In some examples, the height of the first bonding block 102A (or the first bonding layer 102 ) relative to the first original substrate 101 may be in the nanometer level, micrometer level, or millimeter level.

[0108] In some examples, the width of the first bonding block 102 away from the surface of the first original substrate 101 may be in the nanometer level, micrometer level, or millimeter level.

[0109] In some examples, the distance between the outer edge of the first bonding block 102 facing away from the surface of the first original substrate 101 and the opening edge of the first bonding groove 103 may be in the nanometer level, micrometer level or millimeter level.

[0110] In some specific embodiments, the first bonding block 102A and the first bonding groove 103 may be formed simultaneously.

[0111] For example, Figure 3 and Figure 4 As shown, the above-mentioned providing of the first substrate 100 may include: providing a first original substrate 101; forming a bonding material layer (for example, a metal material layer) on one side of the first original substrate 101 through a deposition process; etching the bonding material layer through a photolithography and etching process to form a plurality of first bonding blocks 102A and a first bonding groove 103 that are spaced apart, thereby obtaining the above-mentioned first substrate 100 including the first original substrate 101, the first bonding layer 102 and the first bonding groove 103.

[0112] For example, Figure 3 and Figure 4 As shown, the above-mentioned providing of the first substrate 100 may include: providing a first original substrate 101; forming a patterned photoresist layer on one side of the first original substrate 101 through a photolithography process; forming a bonding material layer (for example, a metal material layer) on the side of the patterned photoresist layer away from the first original substrate 101 through a deposition process; removing the patterned photoresist layer and the bonding material layer on the surface thereof through a stripping process to form a plurality of first bonding blocks 102A and a first bonding groove 103 that are distributed at intervals, thereby obtaining the above-mentioned first substrate 100 including the first original substrate 101, the first bonding layer 102 and the first bonding groove 103.

[0113] In the above embodiment, the cross-sectional structure diagram after the above step S13 is completed can also be as follows: Figure 6 and Fig. 9 As shown, that is, the second bonding surface F2 may be provided with a second bonding groove 203. Accordingly, the first bonding groove 103 of the first bonding surface F1 and the second bonding surface F1 are sealed to form an internally hollow sealed cavity 300, which may include: the first bonding groove 103 of the first bonding surface F1 and the second bonding groove 203 of the second bonding surface F2 are sealed and connected to form an internally hollow sealed cavity 300.

[0114] Specifically, the position of the second bonding groove 203 of the second bonding surface F2 can correspond to the position of the first bonding groove 103 of the first bonding surface F1 to ensure that after the first bonding surface F1 and the second bonding surface F2 are aligned and bonded, the second bonding groove 203 of the second bonding surface F2 can be connected with the first bonding groove 103 of the first bonding surface F1.

[0115] Furthermore, the opening size of the second bonding groove 203 should be compatible with the size of the first bonding surface F1, and the opening size of the first bonding groove 103 should be compatible with the size of the second bonding surface F2 to ensure that the second bonding groove 203 and the first bonding groove 103 can be sealed after the first bonding surface F1 and the second bonding surface F2 are bonded.

[0116] Exemplarily, the opening shape of the second bonding groove 203 may be the same as the opening shape of the first bonding groove 103, the opening size of the second bonding groove 203 may be the same as the opening size of the first bonding groove 103, and the second bonding surface F2 may have the same shape and size as the first bonding surface F1.

[0117] In some embodiments, Figure 6 , Figure 7 , Figure 8 and Fig. 9 As shown, the second substrate 200 may include a second original substrate 201 and a second bonding layer 202, the second bonding layer 202 is disposed on one side of the second original substrate 201, and the second bonding surface F2 may be a surface of the second bonding layer 202 facing away from the second original substrate 201. Accordingly, the step S12 may include:

[0118] Step S121: providing a second original substrate 201.

[0119] Specifically, the second original substrate 201 can be a chip, a wafer or a wafer block. Among them, the chip can be a driver chip, or can be a light-emitting diode chip (for example, a micro light-emitting diode chip). The wafer can be a driver wafer including a plurality of driver chips, or can be a light-emitting wafer including a plurality of light-emitting diode chips. The wafer block can be obtained by wafer cutting, each wafer block including two or more driver chips, or each wafer block including two or more light-emitting diode chips.

[0120] In some examples, the first substrate 100 and the second substrate 200 may both be chips, so as to apply the manufacturing method of the bonding structure to chip-to-chip (Die to Die) bonding.

[0121] In some other examples, the first substrate 100 and the second substrate 200 may both be wafers, so as to apply the manufacturing method of the bonding structure to wafer to wafer bonding.

[0122] In some other examples, the first substrate 100 and the second substrate 200 may both be wafer blocks, so as to apply the manufacturing method of the bonding structure to block-to-block bonding.

[0123] In other examples, one of the first substrate 100 and the second substrate 200 may be a chip, and the other may be a wafer block or a wafer, so as to apply the manufacturing method of the above-mentioned bonding structure to the bonding of chip to wafer block (Die to block), or to apply the manufacturing method of the above-mentioned bonding structure to the bonding of chip to wafer (Die to wafer).

[0124] In other examples, one of the first substrate 100 and the second substrate 200 may be a block, and the other may be a wafer, so as to apply the method for manufacturing the bonding structure to block to wafer bonding.

[0125] Step S122 : forming a second bonding layer 202 having a second bonding groove 203 on one side of the second original substrate 201 .

[0126] Specifically, a second bonding layer 202 having a second bonding groove 203 can be formed on one side of the second original substrate 201 by a deposition process and a photolithography process. The deposition process can include a variety of chemical or physical, gas phase or liquid phase deposition processes such as an electron beam deposition process, a magnetron sputtering deposition process, a thermal evaporation process, and an electroplating process.

[0127] In some examples, a bonding material (e.g., a metal material) may be deposited on one side of the second original substrate 201 by a deposition process (e.g., a magnetron sputtering deposition process) to form a bonding material layer. Then, the bonding material layer may be etched by a photolithography process to form a second bonding layer 202 having a second bonding groove 203.

[0128] In other examples, a patterned photoresist layer can be formed on one side of the second original substrate 201 by a photolithography process, and then a bonding material can be deposited on the side of the patterned photoresist layer facing away from the second original substrate 201 by a deposition process to form a bonding material layer. Then, the patterned photoresist layer and the bonding material layer on the surface can be removed by a stripping process to form a second bonding layer 202 with a second bonding groove 203.

[0129] In some embodiments, the second bonding layer 202 may be electrically insulating. Accordingly, the material of the second bonding layer 202 may include insulating materials such as silicon oxide and / or silicon nitride. In other embodiments, the second bonding layer 202 may be conductive. Accordingly, the material of the second bonding layer 202 may include conductive materials, and the conductive materials may be metal materials such as aluminum (Al), copper (Cu), gold (Au), titanium (Ti) and / or germanium (Ge).

[0130] Moreover, in the above-mentioned embodiment in which the second bonding layer 202 is conductive, the second substrate 200 in the above-mentioned bonding structure 10 can be electrically connected to the first substrate 100 through the second bonding layer 202, so that the second bonding layer 202 can play a conductive role, electrically connecting the first substrate 100 and the second substrate 200, and realizing that the second bonding layer 202 has both conductive interconnection and bonding functions.

[0131] Specifically, in the above-mentioned embodiment in which the first substrate 100 includes a first original substrate 101 and a first bonding layer 102, and the first original substrate includes one or more first semiconductor structures 110, as Fig. 9 As shown, the second original substrate 201 may include one or more second semiconductor structures 210 , wherein the surface of the second semiconductor structure 210 has a second electrical interconnection region, and the second electrical interconnection region refers to a region that needs to be electrically interconnected with the first substrate 100 .

[0132] Furthermore, the above step S122 may include: depositing a conductive material on the second electrical interconnection region on the surface of the second semiconductor structure 210 of the second original substrate 201 to form a second bonding layer 202 provided with a second bonding groove 203, wherein the second bonding layer 202 is used to electrically connect the second semiconductor structure 210 of the second original substrate 201 with the first semiconductor structure 110 of the first original substrate 101. In a specific implementation, a metal material may be deposited on the second electrical interconnection region on the surface of the second semiconductor structure 210 of the second original substrate 201 by magnetron sputtering to form the second bonding layer 202 provided with the second bonding groove 203.

[0133] Exemplarily, the second semiconductor structure 210 may be a driver chip, and the electrically interconnected region on the surface of the second semiconductor structure 210 may be an electrode surface of the driver chip. Exemplarily, the second semiconductor structure 210 may be a light-emitting diode chip, and the electrically interconnected region on the surface of the second semiconductor structure 210 may be an electrode surface of the light-emitting diode chip. Exemplarily, the second semiconductor structure 210 may be a partial structure of a driver chip, and the second semiconductor structure 210 may be an electrode of the driver chip electrically connected to the second semiconductor structure 210 (e.g., a pixel electrode or a common electrode). Exemplarily, the second semiconductor structure 210 may be a partial structure of a light-emitting diode chip, and the second semiconductor structure 210 may be an electrode of the light-emitting diode chip electrically connected to the second semiconductor structure 210 (e.g., an N-type electrode or a P-type electrode).

[0134] In some specific embodiments, Fig. 9 As shown, the second original substrate 201 may include a plurality of second semiconductor structures 210. Furthermore, the second bonding layer 202 may be formed on the second electrical interconnection region on the surface of a part or all of the second semiconductor structures 210, so that the second semiconductor structures 210 of the second original substrate 201 and the first semiconductor structures 110 of the first original substrate 101 may be electrically connected to each other through the second bonding layer 202 and the first bonding layer 102, or the second semiconductor structures 210 of the second original substrate 201 and the first semiconductor structures 110 of the first original substrate 101 may be electrically connected to each other through the second bonding layer 202 and the first bonding layer 102, and the second semiconductor structures 210 other than the part of the second semiconductor structures 210 may be electrically connected to the second substrate 200 through other conductive structures (e.g., conductive pillars, pads, etc.).

[0135] In some embodiments, Figure 6 , Figure 7 , Figure 8 and Fig. 9 As shown, the second bonding groove 203 may penetrate the second bonding layer 202, for example, may penetrate the second bonding layer 202 in a direction Z perpendicular to the second original substrate 201, thereby facilitating the formation of a larger sealed cavity 300 after bonding and further improving the bonding strength.

[0136] In some embodiments, Figure 6 , Figure 7 , Figure 8 and Fig. 9 As shown, the second bonding layer 202 may include a plurality of second bonding blocks 202A distributed at intervals, and each second bonding block 202A is provided with at least one second bonding groove 203 on a side facing away from the second original substrate 201 .

[0137] Specifically, Figure 7 As shown, the plurality of second bonding blocks 202A included in the second bonding layer 202 may be evenly spaced and distributed to ensure uniform force on the first substrate 100 and the second substrate 200 in the bonding structure 10 .

[0138] In some examples, such as Figure 7 As described above, the plurality of second bonding blocks 202A included in the second bonding layer 202 may be evenly spaced and distributed in a rectangular array.

[0139] Specifically, in the above-mentioned embodiment where the second original substrate 201 includes one or more second semiconductor structures 210, as Fig. 9 As shown, one or more second bonding blocks 202A may be formed on a second electrical interconnection region on the surface of a second semiconductor structure 210, and the one or more second bonding blocks 202A have conductive properties to achieve electrical connection between the second semiconductor structure 210 and the second substrate 100 (or the first semiconductor structure 110).

[0140] Specifically, in an embodiment in which a second bonding groove 203 is provided on a side of the second bonding block 202A facing away from the second original substrate 201, Figure 6 , Figure 7 and Figure 8 As shown, the second bonding groove 203 may penetrate the second bonding block 202A, for example, may penetrate the second bonding block 202A in a direction Z perpendicular to the second original substrate 201 .

[0141] In some examples, such as Figure 7 and Figure 8 As shown, a second bonding groove 203 may be provided on the side of the second bonding block 202A facing away from the second original substrate 201, and the second bonding groove 203 may pass through the second bonding block 202A and may be located in the middle of the second bonding block 202A, so that the second bonding block 202A is a hollow annular structure.

[0142] It should be noted that the specific implementation of the above-mentioned step S122 can refer to the specific implementation of the above-mentioned step S112, and it is only necessary to replace the first original substrate 101, the first semiconductor structure 110, the first electrical interconnection area, the first bonding layer 102, the first bonding block 102A and the second bonding groove 103 in the specific implementation of the above-mentioned step S112 with the second original substrate 201, the second semiconductor structure 210, the second electrical interconnection area, the second bonding layer 202, the second bonding block 202A and the second bonding groove 203 respectively, so as to obtain the specific implementation of the above-mentioned step S122, so it will not be repeated here.

[0143] As can be seen from the above, the method for manufacturing a bonding structure provided in an embodiment of the present application is provided by providing a first substrate, the first substrate having a first bonding surface, the first bonding surface being provided with a first bonding groove, and providing a second substrate, the second substrate having a second bonding surface, and then bonding the first bonding surface to the second bonding surface, the first bonding groove of the first bonding surface and the second bonding surface are sealed to form an internal hollow sealed cavity, and a bonding structure including a sealed cavity is obtained, and the air pressure in the sealed cavity is less than 1 standard atmospheric pressure, thereby providing a new type of hybrid bonding structure, which realizes bonding two substrates. The substrates (e.g., chips, wafers or wafer blocks) are firmly connected together by the suction force generated by the pressure difference inside and outside the sealed cavity and the bonding force at the interface where the bonding surfaces of the two substrates contact each other. The bonding process is low in difficulty and cost, and the two substrates in the bonding structure are always subjected to the suction force generated by the pressure difference, which greatly enhances the bonding strength and improves the bonding reliability. Therefore, the disadvantages of the existing hybrid bonding technology, such as high process difficulty and high process cost, can be effectively avoided, and the advantage of the existing hybrid bonding technology with high bonding reliability can be continued.

[0144] The bonding structure manufactured according to the above method embodiment of the present application is as follows: Figure 2 , Figure 5 , Figure 6 and Fig. 9 As shown, the bonding structure 10 may include a first substrate 100 and a second substrate 200, wherein the first substrate 100 has a first bonding surface F1, and the first bonding surface F1 is provided with a first bonding groove 103, the second substrate 200 has a second bonding surface F2, the second bonding surface F2 is bonded to the first bonding surface F1, and the second bonding surface F2 and the first bonding groove 103 of the first bonding surface F1 are sealed to form an internally hollow sealed cavity 300, wherein the air pressure in the sealed cavity 300 is less than 1 standard atmosphere (i.e., 1.0 atm).

[0145] In some embodiments, Figure 2 , Figure 5 , Figure 6 and Fig. 9 As shown, the air pressure in the sealed cavity 300 may be less than or equal to 0.5 standard atmospheric pressure.

[0146] In some embodiments, Figure 2 , Figure 5 , Figure 6 and Fig. 9 As shown, the first bonding surface F1 can be connected to the second bonding surface F2 through intermolecular attraction at the interface where the first bonding surface F1 contacts the second bonding surface F2.

[0147] In some embodiments, Figure 2 , Figure 5 , Figure 6 and Fig. 9 As shown, the first substrate 100 may include a first original substrate 101 and a first bonding layer 102 , the first bonding layer 102 is disposed on one side of the first original substrate 101 , and the first bonding surface F1 may be a surface of the first bonding layer 102 facing away from the first original substrate 101 .

[0148] Specifically, Figure 5 and Fig. 9 As shown, the first original substrate 101 may include one or more first semiconductor structures 110, and the first bonding layer 102 may include a conductive material and may be disposed on a first electrical interconnection region on the surface of the first semiconductor structure 110. In this way, the first semiconductor structure 110 of the first original substrate 101 can be electrically connected to the second substrate 200 through the first bonding layer 102.

[0149] In some specific embodiments, Figures 2 to 5 As shown, the first bonding layer 102 may include a plurality of first bonding blocks 102A distributed at intervals, and at least one first bonding groove 103 may be provided on the surface of each first bonding block 102A facing away from the first original substrate 101 .

[0150] Specifically, the plurality of first bonding blocks 102A included in the first bonding layer 102 may be evenly spaced and distributed.

[0151] For example, Figure 3 As shown, the plurality of first bonding blocks 102A may be evenly spaced and distributed in a rectangular array.

[0152] In some specific embodiments, Figures 2 to 5 As shown, the first bonding groove 103 may penetrate the first bonding block 102A (or the first bonding layer 102 ), for example, may penetrate the first bonding block 102A (or the first bonding layer 102 ) along a direction Z perpendicular to the first original substrate 101 .

[0153] Specifically, in the above-mentioned embodiment in which the first bonding groove 103 passes through the first bonding block 102A, a first bonding groove 103 can be provided on the surface of the first bonding block 102A facing away from the first original substrate 101, and the first bonding groove 103 can be located in the middle of the first bonding block 102A, so that the first bonding block 102A can have a hollow ring structure.

[0154] In the above embodiment, if Figure 6 and Fig. 9As shown, the second bonding surface F2 may be provided with a second bonding groove 203. Furthermore, the second bonding surface F2 and the first bonding groove 103 of the first bonding surface F1 are sealed to form an internally hollow sealed cavity 300, which may include: the first bonding groove 103 of the first bonding surface F1 and the second bonding groove 203 of the second bonding surface F2 are sealed and connected to form an internally hollow sealed cavity 300.

[0155] In some embodiments, Figures 6 to 9 As shown, the second substrate 200 may include a second original substrate 201 and a second bonding layer 202 . The second bonding layer 202 is disposed on one side of the second original substrate 201 , and the second bonding surface F2 may be a surface of the second bonding layer 202 facing away from the second original substrate 201 .

[0156] Specifically, the material of the second bonding layer 202 may include a conductive material, and the second substrate 200 may be electrically connected to the first substrate 100 through the second bonding layer 202 .

[0157] In some embodiments, Figures 6 to 9 As shown, the second bonding layer 202 may include a plurality of second bonding blocks 202A distributed at intervals, and each second bonding block 202A may be provided with at least one second bonding groove 203 on a surface facing away from the second original substrate 201 .

[0158] Specifically, Fig. 9 As shown, the second original substrate 201 may include one or more second semiconductor structures 210, and the second bonding layer 202 may include a conductive material and is disposed on the second electrical interconnection region on the surface of the second semiconductor structure 210. In this way, the second semiconductor structure 210 of the second original substrate 201 can be electrically connected to the first substrate 200 (or the first semiconductor structure 110 of the first original substrate 101) through the second bonding layer 202.

[0159] Specifically, the plurality of second bonding blocks 202A included in the second bonding layer 202 may be evenly spaced and distributed. Figure 7 As shown, the plurality of second bonding blocks 202A may be evenly spaced and distributed in a rectangular array.

[0160] In some specific embodiments, Figures 6 to 9 As shown, the second bonding groove 203 may penetrate the second bonding block 202A (or the second bonding layer 202 ), for example, may penetrate the second bonding block 202A (or the second bonding layer 202 ) along a direction Z perpendicular to the second original substrate 201 .

[0161] Specifically, in the above-mentioned embodiment in which the second bonding groove 103 passes through the second bonding block 202A, a second bonding groove 203 can be provided on the surface of the second bonding block 202A facing away from the second original substrate 201, and the second bonding groove 203 can be located in the middle of the second bonding block 202A, so that the second bonding block 202A can have a hollow ring structure.

[0162] In the above embodiment, the first substrate 100 (or the first original substrate 101) may be a chip, a wafer or a wafer block. The second substrate 200 (or the second original substrate 201) may be a chip, a wafer or a wafer block.

[0163] It should be noted that the various structures of the bonding structure 10 in this embodiment can refer to the specific implementation methods described in the above method embodiments, so they will not be described in detail here.

[0164] As can be seen from the above, the bonding structure provided in the embodiment of the present application includes a first substrate and a second substrate, wherein the first substrate has a first bonding surface, and the first bonding surface is provided with a first bonding groove, and the second substrate has a second bonding surface, the second bonding surface is bonded to the first bonding surface, and the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, wherein the air pressure in the sealed cavity is less than 1 standard atmospheric pressure, thereby providing a new type of hybrid bonding structure, which realizes that two substrates (for example, chips, wafers or wafer blocks) are firmly connected together through the suction generated by the air pressure difference inside and outside the sealed cavity, and the bonding force at the interface where the bonding surfaces of the two substrates are in contact, the bonding process difficulty is low, the process cost is low, and the two substrates in the bonding structure are always subjected to the suction generated by the air pressure difference, which greatly enhances the bonding strength and improves the bonding reliability, thereby effectively avoiding the disadvantages of the existing hybrid bonding technology such as high process difficulty and high process cost, and continuing the advantage of high bonding reliability of the existing hybrid bonding technology.

[0165] See also Fig.10 , Fig.10 Schematic diagram of the structure of the micro light emitting diode device provided in the embodiment of the present application. Fig.10 As shown, the micro light emitting diode device 20 may include a bonding structure 10 (such as Figure 2 , Figure 5 , Figure 6 and Fig. 9 ), or may include a bonding structure 10 (such as Figure 2 , Figure 5 , Figure 6 and Fig. 9 shown).

[0166] Specifically, Figure 2 , Figure 5 , Figure 6 and Fig. 9 As shown, the bonding structure 10 may include a first substrate 100 and a second substrate 200. In addition, the first substrate 100 has a first bonding surface F1, and the first bonding surface F1 is provided with a first bonding groove 103. The second substrate 200 has a second bonding surface F2, and the second bonding surface F2 is bonded to the first bonding surface F1, and the second bonding surface F2 and the first bonding groove 103 of the first bonding surface F1 are sealed to form a sealed cavity 300 with a hollow interior, wherein the air pressure in the sealed cavity 300 is less than 1 standard atmospheric pressure.

[0167] In some embodiments, Fig.10 As shown, one of the first substrate 100 and the second substrate 200 may include a micro-LED chip 21, and the other of the first substrate 100 and the second substrate 200 may include a driver chip 22. Moreover, the driver chip 22 is bonded to the micro-LED chip 21. Accordingly, one of the first bonding surface F1 and the second bonding surface F2 may include a surface of the micro-LED chip 21 bonded to the driver chip 22, and the other of the first bonding surface F1 and the second bonding surface F2 may include a surface of the driver chip 22 bonded to the micro-LED chip 21.

[0168] In some specific embodiments, Fig.10 As shown, the micro light emitting diode chip 21 may include a light emitting stack 211 , and the light emitting stack 211 may include a first semiconductor layer 2111 , a light emitting layer 2112 , and a second semiconductor layer 2113 which are sequentially stacked.

[0169] The light emitting layer 2112 may be a quantum well layer, for example, an indium gallium nitride quantum well layer, or an indium gallium nitride / gallium nitride multi-quantum well layer. The first semiconductor layer 2111 and the second semiconductor layer 2113 have different polarities. Specifically, the first semiconductor layer 2111 may be one of an N-type semiconductor layer and a P-type semiconductor layer, and the second semiconductor layer 2113 may be the other of an N-type semiconductor layer and a P-type semiconductor layer. Specifically, the N-type semiconductor layer may be an N-type gallium nitride layer or an N-type gallium arsenide layer, and the P-type semiconductor layer may be a P-type gallium nitride layer or a P-type aluminum gallium nitride layer.

[0170] Specifically, the light emitting stack 211 may be provided with a groove 211A at least penetrating the second semiconductor layer 2113 and the light emitting layer 2112 , and the bottom of the groove 211A is the first semiconductor layer 2111 , so as to expose the first semiconductor layer 2111 .

[0171] In some embodiments, Fig.10As shown, the micro-LED chip 21 may further include a first conductive layer 212, which is disposed on the first semiconductor layer 2111 at the bottom of the groove 211A, and a first groove 213 is disposed on the side of the first conductive layer 212 away from the first semiconductor layer 2111. Specifically, the micro-LED chip 21 may be bonded to the driving chip 22 through the first conductive layer 212, and the first groove 213 is sealed at the bonding interface between the driving chip 22 and the micro-LED chip 21 to form a sealed cavity 300.

[0172] The first conductive layer 212 and the first groove 213 may be provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, respectively, or may be provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, respectively. The light emitting stack 211 may be provided by the first semiconductor structure 110 in the above embodiment, or may be provided by the second semiconductor structure 210 in the above embodiment.

[0173] In some embodiments, Fig.10 As shown, the micro-LED chip 21 may further include a second conductive layer 214, which is disposed on a side of the second semiconductor layer 2113 away from the light-emitting layer 2112, and a second groove 215 is disposed on a side of the second semiconductor layer 214 away from the second semiconductor layer 2113. Specifically, the micro-LED chip 21 may be bonded to the driving chip 22 through the second conductive layer 214, and the second groove 215 is sealed at the bonding interface between the driving chip 22 and the micro-LED chip 21 to form a sealed cavity 300.

[0174] Specifically, in the above embodiment in which the first conductive layer 212 and the first groove 213 are respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, the second conductive layer 214 and the second groove 215 may also be respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment. Specifically, the above first conductive layer 212 may be a first bonding block 102A in the above embodiment, the above first groove 213 may be a first bonding groove 103 in the above embodiment, the above second conductive layer 214 may be a first bonding block 102A in the above embodiment, and the above second groove 215 may be a first bonding groove 102A in the above embodiment.

[0175] Specifically, in the above embodiment in which the first conductive layer 212 and the first groove 213 are respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, the second conductive layer 214 and the second groove 215 may also be respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment. Specifically, the above first conductive layer 212 may be a second bonding block 202A in the above embodiment, the above first groove 213 may be a second bonding groove 203 in the above embodiment, the above second conductive layer 214 may be a second bonding block 202A in the above embodiment, and the above second groove 215 may be a second bonding groove 202A in the above embodiment.

[0176] Specifically, the micro light emitting diode chip 21 may further include a first polarity electrode (not shown in the figure), and the first polarity electrode is disposed between the first conductive layer 212 and the first semiconductor layer 2111 .

[0177] Specifically, Fig.10 As shown, the micro-LED chip 21 may further include a second polarity electrode 216, which is disposed between the second conductive layer 214 and the second semiconductor layer 2113. Furthermore, the micro-LED chip 21 may further include a current diffusion layer 217, which is located between the second polarity electrode 216 and the second semiconductor layer 2113. Moreover, the current diffusion layer 217 can evenly distribute the current to the entire second semiconductor layer 2113 (for example, the P-type gallium nitride layer), thereby effectively improving the luminous efficiency of the micro-LED chip 21.

[0178] In some embodiments, Fig.10 As shown, the micro-LED chip 21 may further include a substrate 218, which is used to support the film structure thereon and may be located on a side of the light-emitting stack 211 away from the driver chip 22. Furthermore, the micro-LED chip 21 may further include a cache layer 219, which may be located between the substrate 218 and the light-emitting stack 211.

[0179] In some embodiments, Fig.11 As shown, the driving chip 22 may include a driving circuit layer 221 .

[0180] In some specific embodiments, Fig.11As shown, the driving chip 22 may further include a third conductive layer 222, which is disposed on one side of the driving circuit layer 221, and a third groove 223 is disposed on the side of the third conductive layer 222 away from the driving circuit layer 221. Specifically, the driving chip 22 may be bonded to the micro-LED chip 21 through the third conductive layer 222, and the third groove 223 is sealed at the bonding interface between the driving chip 22 and the micro-LED chip 21 to form a sealed cavity 300.

[0181] The third conductive layer 222 and the third groove 223 may be provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, or may be provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, respectively.

[0182] Specifically, in the above embodiment where the micro-LED chip 21 includes the first conductive layer 212, Fig.11 As shown, the first conductive layer 212 and the third conductive layer 222 may be bonded correspondingly to achieve a bonding connection between the driving chip 22 and the micro light emitting diode chip 21 .

[0183] Furthermore, in the above embodiment in which the first conductive layer 212 and the first groove 213 are respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, the above third conductive layer 222 and the third groove 223 can be respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment.

[0184] Furthermore, in the above embodiment in which the first conductive layer 212 and the first groove 213 are respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, the above third conductive layer 222 and the third groove 223 can be respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment.

[0185] In some specific embodiments, Fig.11 As shown, the driving chip 22 may further include a fourth conductive layer 224, which is disposed on one side of the driving circuit layer 221, and a fourth groove 225 is disposed on the side of the fourth conductive layer 224 away from the driving circuit layer 221. Specifically, the driving chip 22 may be bonded to the micro-LED chip 21 through the fourth conductive layer 224, and the fourth groove 225 is sealed at the bonding interface between the driving chip 22 and the micro-LED chip 21 to form a sealed cavity 300.

[0186] Exemplarily, one of the third conductive layer 222 and the fourth conductive layer 224 can be a pixel electrode (or anode) of the microchip 22 , and the other of the first conductive layer 212 and the second conductive layer 224 can be a common electrode (or cathode) of the driving chip 22 .

[0187] Exemplarily, one of the third conductive layer 222 and the fourth conductive layer 224 can be a pad of the driving chip 22 electrically connected to the pixel electrode, and the other of the first conductive layer 212 and the second conductive layer 224 can be a pad of the driving chip 22 electrically connected to the common electrode.

[0188] Specifically, in the above embodiment in which the third conductive layer 222 and the third groove 223 are respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, the fourth conductive layer 224 and the fourth groove 225 may also be respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment. Specifically, the third conductive layer 222 may be a first bonding block 102A in the above embodiment, the third groove 223 may be a first bonding groove 103 in the above embodiment, the fourth conductive layer 224 may be a first bonding block 102A in the above embodiment, and the fourth groove 225 may be a first bonding groove 102A in the above embodiment.

[0189] Specifically, in the above embodiment in which the third conductive layer 222 and the third groove 223 are respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, the fourth conductive layer 224 and the fourth groove 225 may also be respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment. Specifically, the third conductive layer 222 may be a second bonding block 202A in the above embodiment, the third groove 223 may be a second bonding groove 203 in the above embodiment, the fourth conductive layer 224 may be a second bonding block 202A in the above embodiment, and the fourth groove 225 may be a second bonding groove 202A in the above embodiment.

[0190] Specifically, in the above embodiment where the micro-LED chip 21 includes the second conductive layer 214, Fig.11 As shown, the second conductive layer 214 and the fourth conductive layer 224 may be bonded correspondingly to achieve a bonding connection between the driving chip 22 and the micro light emitting diode chip 21 .

[0191] Furthermore, in the above embodiment in which the second conductive layer 214 and the second groove 215 are respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment, the above fourth conductive layer 224 and the fourth groove 224 can be respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment.

[0192] Furthermore, in the above embodiment in which the second conductive layer 214 and the second groove 215 are respectively provided by the second bonding layer 202 and the second bonding groove 203 in the above embodiment, the above fourth conductive layer 224 and the fourth groove 225 can be respectively provided by the first bonding layer 102 and the first bonding groove 103 in the above embodiment.

[0193] In some examples, the micro-LED device 20 can be applied to any product with a display function, such as electronic paper, mobile phones, tablet computers, televisions, laptop computers, digital photo frames, wearable devices, or navigation devices.

[0194] It should be noted that the micro-light emitting diode device provided in the embodiment of the present application can achieve the beneficial effects that can be achieved by any bonding structure provided in the embodiment of the present application because the bonding structure provided in the embodiment of the present application is provided. Please refer to the previous embodiments for details and will not be repeated here.

[0195] See also Fig.12 , Fig.12 is a schematic diagram of the structure of the display device provided in the embodiment of the present application. Fig.12 As shown, the display device 30 may include a micro light emitting diode device 31 of any of the above embodiments.

[0196] Specifically, the micro light emitting diode device 31 may include a bonding structure manufactured by a method for manufacturing a bonding structure of any of the above embodiments, or may include a bonding structure of any of the above embodiments.

[0197] The bonding structure may include a first substrate and a second substrate. The first substrate has a first bonding surface, and the first bonding surface is provided with a first bonding groove. The second substrate has a second bonding surface, and the second bonding surface is bonded to the first bonding surface, and the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, wherein the air pressure in the sealed cavity is less than 1 standard atmospheric pressure.

[0198] In some examples, the display device 30 can be an electronic device such as an optical projection, a vehicle-mounted head-up display (HUD), or any device with a display screen such as a smart phone, a smart watch, a laptop computer, a tablet computer, a driving recorder, a navigator, a head-mounted device, etc.

[0199] It should be noted that the display device provided in the embodiment of the present application, since it is equipped with the micro-light emitting diode device provided in the embodiment of the present application, can achieve the beneficial effects that can be achieved by any micro-light emitting diode device provided in the embodiment of the present application. Please see the previous embodiments for details, which will not be repeated here.

[0200] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A method for manufacturing a bonding structure, characterized in that: include: Providing a first substrate, wherein the first substrate has a first bonding surface, and the first bonding surface is provided with a first bonding groove; providing a second substrate, the second substrate having a second bonding surface; The first bonding surface is bonded to the second bonding surface, and the first bonding groove of the first bonding surface is sealed to the second bonding surface to form an internal hollow sealed cavity, thereby obtaining a bonding structure including the sealed cavity, and the air pressure in the sealed cavity is less than 1 standard atmospheric pressure.

2. The method according to claim 1, characterized in that It is characterized in that The providing of a first substrate comprises: Providing a first original substrate, wherein the first original substrate includes one or more semiconductor structures; Conductive material is deposited on the electrical interconnection area on the surface of the semiconductor structure of the first original substrate to form a first bonding layer with a first bonding groove, wherein the first bonding layer is used to electrically connect the semiconductor structure of the first original substrate with the second substrate.

3. The method according to claim 2, characterized in that: The step of depositing a conductive material on the electrical interconnection region on the surface of the semiconductor structure of the first original substrate to form a first bonding layer having a first bonding groove comprises: A metal material is deposited by magnetron sputtering on the electrical interconnection region on the surface of the semiconductor structure of the first original substrate to form a first bonding layer having a first bonding groove.

4. The method according to claim 1, characterized in that: The first bonding surface is bonded to the second bonding surface, and the first bonding groove of the first bonding surface is sealed to the second bonding surface to form a sealed cavity with a hollow interior, so as to obtain a bonding structure including the sealed cavity, including: Aligning and laminating the first bonding surface with the second bonding surface, and then applying pressure to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface and the second bonding surface are sealed to form a sealed cavity with a hollow interior; The pressure was released.

5. The method according to claim 4, characterized in that The first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form a sealed cavity with a hollow interior, comprising: In an environment where the air pressure is less than 1 standard atmosphere, the first bonding surface is aligned and fitted with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

6. The method according to claim 5, characterized in that In an environment where the air pressure is less than 1 standard atmospheric pressure, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity, comprising: In an environment where the air pressure is less than or equal to 0.4 standard atmospheric pressure, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form a sealed cavity with a hollow interior; The releasing of the pressure comprises: In an environment where the air pressure is 1 standard atmosphere, the pressure is released.

7. The method according to claim 4, characterized in that The first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form a sealed cavity with a hollow interior, comprising: In an environment above room temperature, the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

8. The method according to claim 7, characterized in that The method comprises: aligning and laminating the first bonding surface and the second bonding surface in an environment higher than room temperature, and then applying pressure to the first substrate and / or the second substrate to seal the first bonding groove of the first bonding surface and the second bonding surface to form a sealed cavity with a hollow interior, including: The first substrate and the second substrate are heated to 150-300° C., the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, and the first bonding groove of the first bonding surface is sealed with the second bonding surface to form an internal hollow sealed cavity.

9. The method according to claim 4, characterized in that The first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form a sealed cavity with a hollow interior, comprising: The first substrate and the second substrate are placed in a vacuum chamber, the first substrate and the second substrate are heated to 150-300° C., the first bonding surface is aligned and bonded with the second bonding surface, and then pressure is applied to the first substrate and / or the second substrate, so that the first bonding groove of the first bonding surface is sealed with the second bonding surface to form a sealed cavity with a hollow interior; wherein the air pressure in the vacuum chamber is less than or equal to 0.4 standard atmospheric pressure; The releasing of the pressure comprises: The vacuum chamber is filled with gas to 1 standard atmospheric pressure, the first substrate and the second substrate are cooled to 5-75° C., and then the pressure is released.

10. The method according to claim 1, characterized in that After bonding the first bonding surface to the second bonding surface, the first bonding groove of the first bonding surface and the second bonding surface are sealed to form a sealed cavity with a hollow interior, and a bonding structure including the sealed cavity is obtained, the method further includes: The bonding structure is heated to a preset heating temperature so that the first substrate and the second substrate in the bonding structure are connected as a whole at the interface where the first bonding surface contacts the second bonding surface, wherein the preset heating temperature is 75-90°C.

11. The method according to any one of claims 1 to 10, characterized in that: The second bonding surface is provided with a second bonding groove; the first bonding groove of the first bonding surface and the second bonding surface are sealed to form an internal hollow sealing cavity, including: The first bonding groove of the first bonding surface and the second bonding groove of the second bonding surface are sealed and connected to form a sealed cavity with a hollow interior.

12. A bonding structure, characterized in that: include: A first substrate, wherein the first substrate has a first bonding surface, and the first bonding surface is provided with a first bonding groove; A second substrate, wherein the second substrate has a second bonding surface, the second bonding surface is bonded to the first bonding surface, and the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, wherein the air pressure in the sealed cavity is less than 1 standard atmospheric pressure.

13. The bonding structure according to claim 12, characterized in that: The first substrate includes a first original substrate and a first bonding layer provided with a first bonding groove, wherein the first original substrate includes one or more semiconductor structures, and the first bonding layer includes a conductive material and is provided on an electrical interconnection region on a surface of the semiconductor structure.

14. The bonding structure according to claim 13, characterized in that: The conductive material is a metal material.

15. The bonding structure according to claim 12, characterized in that: The first bonding groove penetrates the first bonding layer.

16. The bonding structure according to any one of claims 12 to 15, characterized in that: The second bonding surface is provided with a second bonding groove; the second bonding surface and the first bonding groove of the first bonding surface are sealed to form an internal hollow sealed cavity, including: the first bonding groove of the first bonding surface and the second bonding groove of the second bonding surface are sealed and connected to form an internal hollow sealed cavity.

17. The bonding structure according to claim 16, characterized in that: The second substrate includes a second original substrate and a second bonding layer, the second bonding layer is arranged on one side of the second original substrate, and the second bonding surface is a surface of the second bonding layer facing away from the second original substrate.

18. A micro light emitting diode device, characterized in that: A bonding structure prepared by the method according to any one of claims 1 to 11, or a bonding structure according to any one of claims 12 to 17.

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