Voltage regulation circuit, power supply circuit, integrated circuit and electronic equipment

Abstract

The invention provides a voltage regulation circuit, a power supply circuit, an integrated circuit and electronic equipment. The voltage regulation circuit comprises a first amplifier and a differential circuit, and the first amplifier is configured to output a first voltage to the differential circuit through a first output end when a first output voltage is greater than a first reference voltage; when the first output voltage is smaller than or equal to the first reference voltage, a second voltage is output to the differential circuit through the first output end; the differential circuit is configured to adjust the current generated by the current source and lower the first output voltage when receiving the first voltage; when the second voltage is received, the current generated by the current source is supplied to the second output end. According to the scheme, amplitude limiting can be carried out on the output of the voltage stabilizing circuit in time when the load of the voltage stabilizing circuit changes, and the reliability of the circuit is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a voltage regulation circuit, a power supply circuit, an integrated circuit and an electronic device. Background Art

[0002] A voltage regulator circuit is a circuit that can output a stable voltage and is widely used in electronic systems. During the use of an electronic system, the load of the voltage regulator circuit may change, causing the output voltage of the voltage regulator circuit to rise to a value exceeding the maximum voltage allowed by the design (i.e., the limiting voltage). This may cause damage to gate circuit devices that use the voltage regulator circuit to provide power, affecting the normal operation of the electronic system and reducing the reliability of the electronic system. Summary of the invention

[0003] The embodiments of the present application provide a voltage regulating circuit, a power supply circuit, an integrated circuit and an electronic device, which can timely limit the output of the voltage stabilizing circuit when the load of the voltage stabilizing circuit changes, thereby improving the reliability of the circuit.

[0004] In a first aspect, a voltage adjustment circuit is provided, comprising a first amplifier and a differential circuit.

[0005] A first amplifier comprising a first input terminal, a second input terminal and a first output terminal; The first input terminal is connected to the second output terminal of the voltage stabilizing circuit and is configured to receive the first output voltage of the voltage stabilizing circuit; the second input terminal is connected to the first reference voltage, and the first reference voltage is the limiting reference voltage of the voltage stabilizing circuit; a first amplifier configured to output a first voltage to the differential circuit through a first output terminal when the first output voltage is greater than a first reference voltage; and to output a second voltage to the differential circuit through the first output terminal when the first output voltage is less than or equal to the first reference voltage; A differential circuit comprising a third input terminal, a fourth input terminal and a third output terminal; The third input terminal is connected to the first output terminal, the fourth input terminal is connected to the bias voltage, and the third output terminal is connected to the second output terminal; The differential circuit also includes a current source, which is configured to adjust the current generated by the current source to lower the first output voltage when receiving the first voltage; and to provide the current generated by the current source to the second output terminal when receiving the second voltage.

[0006] Changes in the load of the voltage stabilizing circuit may cause changes in its output voltage. The voltage adjustment circuit provided in the present application can be intermittently disconnected according to the changes in the load, and the dynamic changes in the output voltage of the voltage stabilizing circuit can be adjusted to prevent the situation where the output voltage of the voltage stabilizing circuit increases to exceed the limiting voltage due to rapid changes in the load. This is beneficial to maintaining the normal operation of the voltage stabilizing circuit and improving the reliability of the circuit.

[0007] In one implementation, the differential circuit includes a differential pair and a current mirror. The differential pair includes a first MOS transistor and a second MOS transistor, and the first MOS transistor and the second MOS transistor are PMOS transistors.

[0008] The gate of the first MOS tube is connected to the first output terminal, and the drain of the first MOS tube is connected to the reference current branch of the current mirror; The gate of the second MOS tube is connected to the bias voltage, and the drain of the second MOS tube is connected to the mirror current branch of the current mirror; The sources of the first MOS tube and the second MOS tube are connected to the current source, the current ratio of the reference current branch to the mirror current branch is 1:N, and N is greater than 1.

[0009] In one implementation, the current source includes a third MOS transistor and a capacitor, and the capacitor is arranged between the gate and the source of the third MOS transistor.

[0010] In this way, the charge and discharge characteristics of the capacitor can be used to enable the current source to provide instantaneous large current when needed, reducing static current consumption. In this case, the current source is allowed to provide a smaller current, thereby saving circuit power consumption.

[0011] In one implementation, the fourth input terminal is connected to a voltage stabilizing circuit, and the bias voltage is generated by the voltage stabilizing circuit.

[0012] In one implementation, the voltage stabilization circuit includes a fifth input terminal, the fifth input terminal is configured to be connected to a second reference voltage, and the fifth input terminal is connected to the second input terminal.

[0013] The non-inverting input terminal of the first amplifier can be connected to the reference voltage input terminal of the voltage stabilizing circuit to reduce the number of reference voltages and the circuit area to reduce the cost.

[0014] In one implementation, the first amplifier includes a fourth MOS tube and a fifth MOS tube, and a width-to-length ratio of the fourth MOS tube to the fifth MOS tube is 1:M, and M is greater than 1.

[0015] In a second aspect, a power supply circuit is provided, comprising: A voltage stabilizing circuit, used for generating a first output voltage; The voltage adjustment circuit in the above first aspect or any implementation of the first aspect is connected to the voltage stabilizing circuit, and is used to adjust the first output voltage when the load of the voltage stabilizing circuit changes.

[0016] In one implementation, the voltage stabilization circuit includes a second amplifier, a feedback circuit, and a driving circuit.

[0017] The second amplifier includes a fifth input terminal, a sixth input terminal, and a fourth output terminal.

[0018] The fifth input terminal is connected to the second reference voltage, the feedback circuit is connected between the sixth input terminal and the output terminal of the voltage stabilizing circuit, and the driving circuit is connected between the fourth output terminal and the output terminal of the voltage stabilizing circuit.

[0019] In a third aspect, an integrated circuit is provided, comprising the power supply circuit of the second aspect.

[0020] According to a fourth aspect, an electronic device is provided, comprising the integrated circuit according to the third aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The following is a brief introduction to the drawings used in describing the embodiments of this application: Figure 1 A schematic diagram of a voltage stabilizing circuit provided in some embodiments of the present application; Figure 2 A schematic diagram of the structure of a voltage adjustment circuit provided in some embodiments of the present application; Figure 3 A schematic diagram of the structure of another voltage adjustment circuit provided in some embodiments of the present application; Figure 4 This is a schematic diagram of the structure of the power supply circuit provided in some embodiments of the present application. DETAILED DESCRIPTION

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the specific implementation methods of the present application will be described below with reference to the accompanying drawings. The accompanying drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other accompanying drawings and other embodiments can be obtained based on these accompanying drawings without creative work. Adjustments and improvements made without departing from the concept of the present application are all within the scope of protection of the present application.

[0023] In order to simplify the drawings, each of the drawings schematically shows only the parts related to the corresponding embodiments, and they do not represent the actual structure of the product, and there may be more or fewer structures or components in reality. In addition, in order to simplify the drawings and facilitate understanding, for the structures or components shown in the drawings, there may be more or fewer similar structures or components in reality.

[0024] In this application, unless otherwise clearly specified and limited, ordinal numbers, such as "first", "second", etc., are only used to distinguish and describe associated objects, and cannot be understood as indicating or implying the relative importance or order between associated objects. In addition, ordinal numbers do not represent the number of associated objects. "Multiple" includes two or more, and other quantifiers are similar. " / " is used to describe the relationship between associated objects, which represents the "or" relationship between associated objects. "And / or" is used to describe the relationship between associated objects, which includes any combination relationship between associated objects, such as "a and / or b" includes: "alone a", "alone b", or "a and b". "One or more" or "at least one" in multiple objects refers to any object or any combination of multiple objects, such as "one or more of a1, a2, a3" or "at least one of a1, a2, a3" includes: "alone a1", "alone a2", "alone a3", "a1 and a2", "a1 and a3", "a2 and a3", or "a1, a2 and a3".

[0025] In the embodiments of the present application, "connection" includes direct connection or indirect connection between objects, which may be directly connected through a medium (e.g., wires, traces, etc.), or may be indirectly connected through other elements, or may be internally connected.

[0026] A voltage stabilization circuit is a circuit commonly used in various integrated circuits (such as chips) and other electronic systems that can output a stable voltage. In one implementation, the power supply circuit of the electronic system may include a voltage stabilization circuit. Figure 1 , which is a schematic diagram of the structure of a voltage stabilizing circuit provided in an embodiment of the present application. Figure 1 As shown, the voltage stabilizing circuit 100 includes an amplifier 110, a feedback circuit 120 and a driving circuit 130. The amplifier 110 includes a positive phase input terminal (+), an inverting input terminal (-) and an output terminal OUT1. The positive phase input terminal (+) of the amplifier 110 is connected to a reference voltage vref0. The feedback circuit 120 is connected between the inverting input terminal of the amplifier 110 and the output terminal REGOUT of the voltage stabilizing circuit 100. The driving circuit 130 is connected between the output terminal OUT1 and the output terminal REGOUT and is connected to the input terminal REGIN of the voltage stabilizing circuit. Among them, the feedback circuit 120 can feed back the output voltage vout0 of the output terminal VOUT0 to the positive phase input terminal of the amplifier 110. The amplifier 110 can compare the error between the output voltage vout0 and the reference voltage vref0 and output the error amplification amount. The error amplification amount can be used to control the driving circuit, and the size of the output voltage vout0 can be adjusted by the driving circuit to stabilize the output of the voltage stabilizing circuit 100.

[0027] During the use of the electronic system, as the system application conditions change, the load of the voltage stabilizing circuit may change. For example, the load 140 includes resistive loads RL0, RL1 and capacitive loads CL0, CL1. Assume that RL0 and CL0 represent resistive loads and capacitive loads that do not change, and RL1 and CL1 represent resistive loads and capacitive loads that may change. When the switch RSW is switched from on to off, or in some cases the switch CSW is switched, the load current decreases rapidly, and the output voltage vout0 of the voltage stabilizing circuit 100 will increase significantly. In one implementation, the loop bandwidth of the voltage stabilizing circuit 100 is small, which affects the response speed of the voltage stabilizing circuit to load changes. For example, the voltage stabilizing circuit 100 cannot quickly reduce the output current to cope with the reduction in load. This will result in the voltage stabilizing circuit being unable to adjust the output current and voltage in time to cope with the change in load when the load current decreases rapidly, thereby causing the output voltage vout0 to rise. In this case, the output voltage vout0 of the voltage stabilizing circuit may rise to a voltage exceeding the maximum voltage allowed by the design (i.e., the limiting voltage), which may cause damage to the gate circuit devices driven by the load, affect the normal operation of the electronic system, and reduce the reliability of the electronic system. The above load 140 is only an example, and the embodiment of the present application does not limit the number, type, or connection relationship of the resistive load or the capacitive load.

[0028] Based on this, the embodiments of the present application provide a voltage adjustment circuit and other solutions, which can promptly respond to load changes of the voltage stabilizing circuit and limit the output voltage of the voltage stabilizing circuit to improve the reliability of the circuit.

[0029] The following is a description with reference to the accompanying drawings.

[0030] Please refer to Figure 2 , which is a schematic diagram of the structure of a voltage adjustment circuit provided in an embodiment of the present application. Figure 2As shown, the voltage adjustment circuit 200 includes an amplifier 210 and a differential circuit 220, and the voltage VDD is the power supply voltage of the voltage adjustment circuit. The amplifier 210 includes a positive input terminal (+), an inverting input terminal (-) and an output terminal OUT2. The positive input terminal of the amplifier 210 is connected to the output terminal of the voltage stabilizing circuit (for example, the output terminal REGOUT of the voltage stabilizing circuit 100), and is configured to receive the first output voltage of the voltage stabilizing circuit (for example, the output voltage vout0 of the voltage stabilizing circuit 100). The positive input terminal of the amplifier 210 is connected to the reference voltage vref1. The magnitude of the reference voltage vref1 can limit the output voltage of the voltage stabilizing circuit, that is, the reference voltage vref1 is the limiting reference voltage of the voltage stabilizing circuit. The amplifier 210 is configured to output the first voltage V1 to the differential circuit 220 through the output terminal OUT2 when the output voltage of the voltage stabilizing circuit (for example, the voltage vout0) is greater than the reference voltage vref1; when the output voltage of the voltage stabilizing circuit is less than or equal to the reference voltage vref1, the second voltage V2 is output to the differential circuit 220 through the output terminal OUT2.

[0031] The differential circuit 220 includes an input terminal IN1, an input terminal VPG, an output terminal OUT3, and a current source. The input terminal IN1 is connected to the output terminal OUT2, the input terminal VPG is connected to the bias voltage V3, and the output terminal OUT3 is connected to the output terminal REGOUT of the voltage stabilizing circuit. The differential circuit 220 is configured to adjust the current generated by the current source to lower the output voltage of the voltage stabilizing circuit when receiving the first voltage V1 (i.e., when the output voltage of the voltage stabilizing circuit is greater than the reference voltage vref1); and provide the current generated by the current source to the output terminal OUT3 when receiving the second voltage V2 (i.e., when the output voltage of the voltage stabilizing circuit is less than or equal to vref1).

[0032] The above voltage adjustment circuit 200 compares the actual output voltage of the voltage stabilizing circuit with the first reference voltage by setting an amplifier 210. When the output voltage of the voltage stabilizing circuit is greater than the first reference voltage, the differential circuit 220 responds quickly to pull down the output voltage so that the maximum output voltage value of the voltage stabilizing circuit is less than the limiting voltage. When the output voltage of the voltage stabilizing circuit is less than or equal to the first reference voltage, a small current will flow through the output terminal REGOUT of the voltage stabilizing circuit through the differential circuit, and the small current will not affect the normal loop operation of the voltage regulator. The load change of the voltage stabilizing circuit may cause its output voltage to change, and the voltage adjustment circuit provided in the present application can be intermittently disconnected according to the load change, and the dynamic change of the output voltage of the voltage stabilizing circuit is adjusted to prevent the situation where the output voltage of the voltage stabilizing circuit increases to exceed the limiting voltage due to the rapid load change, which is conducive to maintaining the normal operation of the voltage stabilizing circuit and improving the reliability of the circuit.

[0033] In one implementation, the differential circuit includes a differential pair and a current mirror. Figure 3 , which is a schematic diagram of the structure of another voltage adjustment circuit provided in an embodiment of the present application. Figure 3 As shown, the differential circuit 220 includes a differential pair 221 and a current mirror 222. The differential pair 221 includes a MOS transistor MP1 and a MOS transistor MP2. Both the MOS transistor MP1 and the MOS transistor MP2 are PMOS transistors. The gate of the MOS transistor MP1 is connected to the output terminal OUT2, and the drain of the MOS transistor MP1 is connected to the reference current branch of the current mirror 222. The gate of the MOS transistor MP2 is connected to the bias voltage V3, and the drain of the MOS transistor MP2 is connected to the mirror current branch of the current mirror 222. The sources of the MOS transistor MP1 and the MOS transistor MP2 are connected to the current source 223. The ratio of the current of the reference current branch and the mirror current branch of the current mirror 222 is 1:N, and N is greater than 1.

[0034] like Figure 3 As shown, when the output voltage of the voltage stabilizing circuit is greater than the reference voltage vref1, the amplifier 210 can quickly pull down the output voltage of the output terminal OUT2. At this time, the MOS tube MP1 is turned off and MP2 is turned on. In this case, the current generated by the current source 223 flows into the reference current branch of the current mirror 222 through the drain of the MOS tube MP1. The current mirror 222 amplifies the current, and the amplified current flows to the ground line VSS through the mirror current branch of the current mirror 222. In this way, the amplified current pulls down the output voltage of the output terminal REGOUT. Similarly, when the output voltage of the voltage stabilizing circuit is less than or equal to the reference voltage vref1, the amplifier 210 can pull up the output voltage of the output terminal OUT2. At this time, the MOS tube MP1 is turned off and the MOS tube MP2 is turned on. In this case, the current generated by the current source will flow to the output terminal REGOUT of the voltage stabilizing circuit through the MOS tube MP2. The above bias voltage V3 can control the current of MP1 to be zero (or close to zero) when the output voltage of the voltage regulator circuit does not exceed the output voltage limit target, and control the current of MP1 to increase rapidly and the current of MP2 to decrease rapidly when the output voltage of the voltage regulator circuit exceeds the output voltage limit target.

[0035] For example, Figure 3 As shown, the reference current branch of the current mirror 222 may include a MOS transistor MN1, and the mirror current branch may include a MOS transistor MN2. The width-to-length ratio of the MOS transistor MN1 and the MOS transistor MN2 is 1:N (N is greater than 1), and the width-to-length ratio of the MOS transistor MP1 and the MOS transistor MP2 is 1:1.

[0036] In one implementation, Figure 3As shown, the current source 223 includes a MOS tube MP0. The MOS tube MP0 is a PMOS tube, the source of the PMOS tube is connected to the power supply voltage VDD, the drain is connected to the source of the MOS tubes MP1 and MP2, and the gate is connected to the bias voltage V4. For example, the bias voltage V4 may include a bias voltage generated by an external circuit or a bias voltage generated inside the voltage stabilizing circuit. Further, the current source 223 may also include a capacitor. The capacitor may be arranged between the gate and the source of the MOS tube MP0. In this way, the current source 223 can provide an instantaneous large current when needed by utilizing the charging and discharging characteristics of the capacitor, thereby reducing static current consumption. In this case, the MOS tube MP0 is allowed to provide a smaller current, thereby saving circuit power consumption. In one implementation, the differential pair may also be formed by an NMOS tube, and an additional level of PMOS to NMOS conversion is sufficient.

[0037] In one implementation, the above bias voltage V3 may be a bias voltage generated inside the voltage stabilization circuit or a bias voltage provided by an external circuit. Figure 1 , 2 As shown, Figure 2 The middle input terminal VPG may be connected to the voltage stabilizing circuit 100 to receive the bias voltage V3 generated inside the voltage stabilizing circuit 100. For example, Figure 1 The driving circuit 130 may include a PMOS transistor MPDR. The gate of the PMOS transistor MPDR is connected to the output terminal OUT1 of the voltage stabilizing circuit, the source is connected to the input terminal REGIN, and the drain is connected to the output terminal REGOUT. The input terminal VPG may be connected to the gate of the PMOS transistor MPDR to receive a control signal of the PMOS transistor MPDR.

[0038] Furthermore, the present application also provides a power supply circuit, including a voltage stabilizing circuit and a voltage regulating circuit in any of the above embodiments. Figure 4 , which is a schematic diagram of a power supply circuit provided in an embodiment of the present application. Figure 4 As shown, the power supply circuit 400 includes a voltage stabilizing circuit 410 and a voltage regulating circuit 420. The voltage stabilizing circuit 410 is configured to generate a first output voltage. The voltage regulating circuit 420 is connected to the voltage stabilizing circuit 410 and is used to adjust the first output voltage when the load of the voltage stabilizing circuit 410 changes. In one implementation, the voltage stabilizing circuit 410 may include Figure 1 The voltage regulating circuit 100 shown in the figure can refer to the contents of the above-mentioned related embodiments of the voltage regulating circuit 100. The voltage regulating circuit may include Figure 2 or Figure 3 The voltage regulating circuit 200 shown in the figure may refer to the contents of the above related embodiments of the voltage regulating circuit 200 .

[0039] In addition, the non-inverting input terminal of the amplifier in the voltage adjustment circuit can be connected to the reference voltage input terminal of the voltage stabilization circuit to reduce the number of reference voltages, reduce the circuit area and reduce the cost. Figure 3 The non-inverting input terminal of the amplifier 210 can be connected to Figure 1 The positive input terminal of the amplifier 110 is connected. In one implementation, the reference voltage vref0 of the voltage stabilizing circuit may be less than the reference voltage vref1 of the voltage regulating circuit. In this case, an appropriate offset voltage VOS can be added to the amplifier of the voltage stabilizing circuit so that the voltage regulating circuit starts to perform the limit adjustment only after the output voltage vout0 of the voltage stabilizing circuit exceeds the voltage vref0+VOS. For example, the voltage VOS can be provided by changing the size ratio of the input differential pair tube inside the amplifier. For example, the first amplifier above can include a fourth MOS tube and a fifth MOS tube, and the ratio of the width to length ratio of the fourth MOS tube and the fifth MOS tube is 1:M, and M is greater than 1. For example, in one implementation, the amplifier circuit includes a load tube connected to a current mirror, and the voltage VOS can be provided by changing the current ratio of the current mirror reference current branch and the mirror current branch. For example, the output end of the first amplifier is connected to another current mirror, and the current ratio of the current mirror reference current branch and the mirror current branch is 1:K, and K is greater than 1.

[0040] For the sake of distinction, the above amplifier 210 may be referred to as a first amplifier, the non-inverting input terminal of the amplifier 210 may be referred to as a first input terminal, the inverting input terminal of the amplifier 210 may be referred to as a second input terminal, and the output terminal OUT2 of the amplifier 210 may be referred to as a first output terminal. The output terminal of the voltage regulator circuit may be referred to as a second output terminal. The input terminal IN1 of the differential circuit may be referred to as a third input terminal, the input terminal VPG may be referred to as a fourth input terminal, and the output terminal OUT3 may be referred to as a third output terminal.

[0041] The amplifier 110 may be referred to as a second amplifier, the non-inverting input terminal of the amplifier 110 may be referred to as a fifth input terminal, the inverting input terminal of the amplifier 110 may be referred to as a sixth input terminal, and the output terminal OUT1 of the amplifier 110 may be referred to as a fourth output terminal. The reference voltage vref1 may be referred to as a first reference voltage, and the reference voltage vref0 may be referred to as a second reference voltage.

[0042] The MOS transistor MP1 may be referred to as a first MOS transistor, the MOS transistor MP2 may be referred to as a second MOS transistor, and the MOS transistor P0 may be referred to as a third MOS transistor.

[0043] Based on the same or similar technical concept, an embodiment of the present application further provides an integrated circuit, including any power supply circuit in the above embodiments. Further, an embodiment of the present application further provides an electronic device, including the above integrated circuit.

[0044] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments. In addition, the above embodiments can be freely combined as needed.

Claims

1. A voltage regulating circuit, characterized in that: comprising a first amplifier and a differential circuit, The first amplifier comprises a first input terminal, a second input terminal and a first output terminal; The first input terminal is connected to the second output terminal of the voltage stabilizing circuit and is configured to receive the first output voltage of the voltage stabilizing circuit; the second input terminal is connected to a first reference voltage, and the first reference voltage is a limiting reference voltage of the voltage stabilizing circuit; The first amplifier is configured to output a first voltage to the differential circuit through the first output terminal when the first output voltage is greater than the first reference voltage; When the first output voltage is less than or equal to the first reference voltage, outputting a second voltage to the differential circuit through the first output terminal; The differential circuit comprises a third input terminal, a fourth input terminal and a third output terminal; The third input terminal is connected to the first output terminal, the fourth input terminal is connected to a bias voltage, and the third output terminal is connected to the second output terminal; The differential circuit further includes a current source configured to adjust the current generated by the current source to lower the first output voltage when receiving the first voltage; When receiving the second voltage, the current generated by the current source is provided to the second output terminal.

2. The voltage regulating circuit according to claim 1, characterized in that: The differential circuit includes a differential pair and a current mirror, The differential pair includes a first MOS transistor and a second MOS transistor, wherein the first MOS transistor and the second MOS transistor are PMOS transistors, The gate of the first MOS transistor is connected to the first output terminal, and the drain of the first MOS transistor is connected to the reference current branch of the current mirror; The gate of the second MOS tube is connected to a bias voltage, and the drain of the second MOS tube is connected to a mirror current branch of the current mirror; The sources of the first MOS tube and the second MOS tube are connected to the current source, and the ratio of the current of the reference current branch to the current of the mirror current branch is 1:N, and N is greater than 1.

3. The voltage regulating circuit according to claim 2, characterized in that: The current source includes a third MOS tube and a capacitor, and the capacitor is arranged between the gate and the source of the third MOS tube.

4. The voltage regulating circuit according to claim 1, characterized in that: The fourth input terminal is connected to the voltage stabilizing circuit, and the bias voltage is generated by the voltage stabilizing circuit.

5. The voltage regulating circuit according to claim 2, characterized in that: The voltage stabilizing circuit includes a fifth input terminal, which is configured to be connected to a second reference voltage and connected to the second input terminal.

6. The voltage regulating circuit according to claim 5, characterized in that: The first amplifier includes a fourth MOS tube and a fifth MOS tube, and the ratio of the width to length of the fourth MOS tube to that of the fifth MOS tube is 1:M, and M is greater than 1.

7. A power supply circuit, characterized in that: include: A voltage stabilizing circuit, used for generating a first output voltage; The voltage regulating circuit according to any one of claims 1 to 6, connected to the voltage stabilizing circuit, and configured to adjust the first output voltage when a load of the voltage stabilizing circuit changes.

8. The power supply circuit according to claim 7, characterized in that: The voltage stabilizing circuit includes a second amplifier, a feedback circuit and a driving circuit. The second amplifier comprises a fifth input terminal, a sixth input terminal and a fourth output terminal, The fifth input terminal is connected to a second reference voltage, the feedback circuit is connected between the sixth input terminal and the output terminal of the voltage stabilizing circuit, and the driving circuit is connected between the fourth output terminal and the output terminal of the voltage stabilizing circuit.

9. An integrated circuit, characterized in that: Comprising the power supply circuit as claimed in claim 8.

10. An electronic device, characterized in that: Comprising the integrated circuit of claim 9.

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