Data storage and reading method and device, equipment and medium

Abstract

The embodiment of the invention discloses a data storage and reading method and device, equipment and a medium. Comprises: obtaining target data; wherein the target data is represented in a sparse matrix mode; acquiring position information of non-zero elements in the sparse matrix; and storing the non-zero elements in a target memory in parallel based on the position information. According to the technical scheme, all non-zero elements in the sparse matrix can be stored at the same time, the data storage efficiency is improved, and the problem that in the prior art, a serial implementation mode is low in storage efficiency is solved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the field of data storage technology, and in particular to a data storage and reading method, device, equipment and medium. Background Art

[0002] In order to facilitate the storage of sparse matrices, the non-zero elements in the sparse matrix are often stored. At the same time, the stored non-zero elements also need to be restored to the matrix format, and the storage of sparse matrices has the significance of accelerating matrix operations.

[0003] In the prior art, the storage of sparse matrices is implemented in a serial manner element by element, that is, the non-zero elements in the sparse matrix are stored one by one in the array in sequence, which has low storage efficiency. Summary of the invention

[0004] The embodiments of the present invention provide a data storage and reading method, device, equipment and medium, which can improve data storage efficiency.

[0005] In a first aspect, an embodiment of the present invention provides a data storage method, including:

[0006] Acquire target data; wherein the target data is represented in the form of a sparse matrix;

[0007] Obtaining position information of non-zero elements in the sparse matrix;

[0008] The non-zero elements are stored in parallel in a target memory based on the position information.

[0009] In a second aspect, an embodiment of the present invention further provides a data reading method, comprising:

[0010] Construct an empty matrix of the same size as the sparse matrix;

[0011] Reading non-zero elements of the sparse matrix in parallel from the target memory; wherein the non-zero elements carry position information; the position information is the position sequence number of the non-zero elements in the sparse matrix;

[0012] The non-zero elements are added to the empty matrix according to the position information to obtain target data.

[0013] In a third aspect, an embodiment of the present invention further provides a data storage device, the device comprising:

[0014] A data acquisition module, used to acquire target data; wherein the target data is represented in the form of a sparse matrix;

[0015] A position information acquisition module, used to obtain the position information of non-zero elements in the sparse matrix;

[0016] A non-zero element storage module is used to store the non-zero elements in parallel in a target memory based on the position information.

[0017] In a fourth aspect, an embodiment of the present invention further provides a data reading device, the device comprising:

[0018] A matrix building block to build an empty matrix of the same size as a sparse matrix;

[0019] A non-zero element reading module, used for reading non-zero elements of the sparse matrix in parallel from a target memory; wherein the non-zero elements carry position information; the position information is the position number of the non-zero element in the sparse matrix;

[0020] The target data acquisition module is used to add the non-zero elements to the empty matrix according to the position information to obtain the target data.

[0021] In a fifth aspect, an embodiment of the present invention further provides an electronic device, the electronic device comprising:

[0022] at least one processor; and

[0023] a memory communicatively connected to the at least one processor; wherein,

[0024] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the data storage and reading method described in the embodiment of the present invention.

[0025] In a sixth aspect, an embodiment of the present invention further provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to implement the data storage and reading method described in the embodiment of the present invention when executed by a processor.

[0026] The embodiment of the present invention discloses a data storage and reading method, device, equipment and medium, including: obtaining target data; wherein the target data is represented in the form of a sparse matrix; obtaining the position information of non-zero elements in the sparse matrix; and storing the non-zero elements in parallel in the target memory based on the position information. The above technical scheme specifically considers obtaining the position information of non-zero elements in the sparse matrix, and storing the non-zero elements in parallel in the target memory according to the position information, and can store all non-zero elements in the sparse matrix at the same time. Compared with the prior art, the technical scheme provided by this embodiment can store all non-zero elements in the sparse matrix at the same time, improves the data storage efficiency, and solves the problem of low storage efficiency of the serial implementation method in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 is a flow chart of a data storage method in Embodiment 1 of the present invention;

[0028] Figure 2 is a flow chart of a data reading method in Embodiment 2 of the present invention;

[0029] Figure 3 This is a schematic diagram of the structure of a data storage device in Embodiment 3 of the present invention;

[0030] Figure 4 is a structural schematic diagram of a data reading device in Embodiment 4 of the present invention;

[0031] Figure 5 It is a structural schematic diagram of an electronic device in Embodiment 5 of the present invention. DETAILED DESCRIPTION

[0032] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0033] Embodiment 1

[0034] Figure 1 This is a flowchart of a data storage method provided in Embodiment 1 of the present invention. This embodiment is applicable to the case of storing data. The method can be executed by a data storage device, which can be implemented in the form of software and / or hardware. Optionally, it can be implemented by an electronic device, which can be a mobile terminal, a PC or a server. Specifically, it includes the following steps:

[0035] S110, acquiring target data.

[0036] In this embodiment, the target data is represented in the form of a sparse matrix, that is, the target data is a sparse matrix. Exemplarily, the sparse matrix can be a tridiagonal matrix.

[0037] S120. Obtain position information of non-zero elements in the sparse matrix.

[0038] In this embodiment, each element in the sparse matrix has corresponding position information, and the position information is used to represent the position of the element in the sparse matrix.

[0039] In this embodiment, one implementation method of obtaining the position information of non-zero elements in a sparse matrix can be described as: traversing each element in the sparse matrix according to a preset order; for the traversed elements, if the traversed elements are non-zero elements, the position number of the traversed elements in the sparse matrix is ​​used as the position information of the non-zero elements.

[0040] Continuing with the above description, the preset order is a pre-set order, such as: from left to right, from top to bottom or from left to right, from bottom to top.

[0041] Furthermore, each element in the sparse matrix has a corresponding position number, for example, the position number of element a is 1. The correspondence between each element in the sparse matrix and its position number is stored in a preset mapping table, from which the position number corresponding to the traversed element can be obtained.

[0042] Exemplarily, assuming that the sparse matrix is ​​a tridiagonal matrix, take the following 4×4 tridiagonal matrix as an example:

[0043]

[0044] For the above tridiagonal matrix, the position numbers are marked from left to right and from top to bottom. For example, the position number of (1,1) in the matrix is ​​0, the position number of (1,2) is 1, etc. Among them, (1,1) represents the first row and first column in the matrix. After marking the position numbers, the corresponding relationship between each element in the above tridiagonal matrix and its position number is stored in the mapping table.

[0045] Exemplarily, each element in the tridiagonal matrix is ​​traversed in a preset order, and if the traversed element is a non-zero element, the position number corresponding to the traversed element is obtained from the mapping table, and the position number is used as the position information of the non-zero element. For example, the position information of the non-zero element 2 is 0.

[0046] S130 , storing the non-zero elements in parallel in the target memory based on the position information.

[0047] In this embodiment, the target memory may be a parallel memory, and non-zero elements may be stored in parallel.

[0048] In this embodiment, for storing non-zero elements in parallel in the target memory based on the position information, one implementation method can be described as the following steps:

[0049] a1) determining, based on the position information, that the non-zero elements are located at the diagonal positions in the sparse matrix;

[0050] In this embodiment, there may be multiple diagonal positions. Exemplarily, if the sparse matrix is ​​a tridiagonal matrix, the diagonal positions include: a main diagonal position, a previous diagonal position, and a next diagonal position.

[0051] Exemplarily, taking an n×n tridiagonal matrix as an example, the method for determining the diagonal position of a non-zero element in a sparse matrix based on position information can be: if the position information of the non-zero element is any one of 0, n+1, 2*n+2, …, n^2-1, then the diagonal position of the non-zero element in the sparse matrix is ​​the main diagonal position; if the position information of the non-zero element is any one of 1, n+2, 2*n+3, …, n^2-1-n, n^2+1, then the diagonal position of the non-zero element in the sparse matrix is ​​the previous diagonal position; if the position information of the non-zero element is any one of n, 2*n+1, 3*n+2, …, n^2-2, n^2+1, then the diagonal position of the non-zero element in the sparse matrix is ​​the next diagonal position.

[0052] b1) dividing the non-zero elements located at the same diagonal position into the same element group to obtain at least one element group;

[0053] In this embodiment, the element group consists of non-zero elements in the same diagonal position.

[0054] Exemplarily, based on the above example, the method of dividing the non-zero elements located at the same diagonal position into the same element group can be: dividing the non-zero elements located at the main diagonal position into the same element group; dividing the non-zero elements located at the previous diagonal position into the same element group; dividing the non-zero elements located at the next diagonal position into the same element group.

[0055] c1) storing at least one element group in parallel in a target memory.

[0056] In this embodiment, one implementation method of storing at least one element group in parallel in the target memory can be described as: obtaining a preset storage address in the target memory; and storing at least one element group in parallel in a storage unit corresponding to the preset storage address.

[0057] Continuing with the above description, the non-zero elements in the element group carry position information, the target memory is composed of a plurality of storage units, and the preset storage addresses correspond to the storage units one by one, that is, one preset storage address corresponds to one storage unit.

[0058] Furthermore, the method of obtaining the preset storage address in the target memory may be: obtaining the number of elements in each element group; for each element group, obtaining consecutive preset storage addresses in the target memory according to the number of elements. Accordingly, the method of storing at least one element group in parallel in the storage units corresponding to the preset storage addresses may be: for each element group, storing the non-zero elements in the element group in parallel in the storage units corresponding to the consecutive preset storage addresses.

[0059] Exemplarily, based on the above example, three element groups are obtained, namely: the main diagonal element group composed of non-zero elements in the main diagonal positions, the last diagonal element group composed of non-zero elements in the last diagonal positions, and the next diagonal element group composed of non-zero elements in the next diagonal positions.

[0060] Continuing with the above description, it is assumed that the number of elements in the main diagonal element group, the previous diagonal element group, and the next diagonal element group are n, n-1, and n-1, respectively. For the main diagonal element group, obtain n consecutive preset storage addresses in the target memory, and store the n non-zero elements in the main diagonal element group in parallel in the storage units corresponding to the n preset storage addresses; for the previous diagonal element group, obtain n-1 consecutive preset storage addresses in the target memory, and store the n-1 non-zero elements in the previous diagonal element group in parallel in the storage units corresponding to the n-1 preset storage addresses; for the next diagonal element group, obtain n-1 consecutive preset storage addresses in the target memory, and store the n-1 non-zero elements in the next diagonal element group in parallel in the storage units corresponding to the n-1 preset storage addresses.

[0061] The technical solution of this embodiment obtains target data; obtains the position information of non-zero elements in the sparse matrix; and stores the non-zero elements in parallel in the target memory based on the position information. The above technical solution specifically considers obtaining the position information of non-zero elements in the sparse matrix, and storing the non-zero elements in parallel in the target memory according to the position information, and can store all non-zero elements in the sparse matrix at the same time. The technical solution provided by this embodiment can store all non-zero elements in the sparse matrix at the same time, improves data storage efficiency, and solves the problem of low storage efficiency of the serial implementation method in the prior art.

[0062] Embodiment 2

[0063] Figure 2 This is a flow chart of a data reading method provided in Embodiment 2 of the present invention. The method can be executed by a data reading device, which can be implemented in the form of software and / or hardware. Optionally, it can be implemented by an electronic device, which can be a mobile terminal, a PC or a server. The method includes the following steps:

[0064] S210. Construct an empty matrix with the same size as the sparse matrix.

[0065] In this embodiment, after the non-zero elements in the sparse matrix are stored in parallel in the target memory, it may be necessary to restore the non-zero elements to the form of a sparse matrix, and before the restoration, an empty matrix with the same size as the sparse matrix needs to be constructed. The empty matrix is ​​used to store the non-zero elements.

[0066] S220 , reading non-zero elements of the sparse matrix from the target memory in parallel.

[0067] In this embodiment, the non-zero element carries position information; the position information is the position number of the non-zero element in the sparse matrix.

[0068] In this embodiment, one implementation of reading non-zero elements of a sparse matrix in parallel from a target memory can be described as the following steps:

[0069] a2) obtaining the storage address of the non-zero element in the target memory;

[0070] In this embodiment, after the non-zero elements are stored in parallel in the target memory, the storage addresses of the non-zero elements in the target memory are added to a record table. Optionally, the storage addresses of the non-zero elements in the target memory may be obtained by: obtaining the storage addresses of the non-zero elements in the target memory from the record table.

[0071] b2) Read the non-zero elements from the target memory in parallel according to the storage address.

[0072] In this embodiment, non-zero elements at corresponding storage addresses are read out from the target memory in parallel.

[0073] S230. Add non-zero elements to the empty matrix according to the position information to obtain target data.

[0074] In this embodiment, the position information is the position number of the non-zero element in the sparse matrix. The non-zero element is added to the empty matrix according to the position number, so that the restored sparse matrix, that is, the target data, can be obtained.

[0075] The technical solution of this embodiment is to construct an empty matrix of the same size as the sparse matrix; read the non-zero elements of the sparse matrix in parallel from the target memory; add the non-zero elements to the empty matrix according to the position information to obtain the target data. The above technical solution reads the non-zero elements of the sparse matrix in parallel from the target memory, and adds the non-zero elements to the empty matrix according to the position information. All non-zero elements can be read at the same time and restored to the format of the sparse matrix, thereby improving the data reading efficiency.

[0076] Embodiment 3

[0077] Figure 3 A schematic diagram of a data storage device according to a third embodiment of the present invention is shown in FIG. Figure 3 As shown, the device comprises:

[0078] The data acquisition module 310 is used to acquire target data; wherein the target data is represented in the form of a sparse matrix;

[0079] A position information acquisition module 320, used to obtain position information of non-zero elements in the sparse matrix;

[0080] The non-zero element storage module 330 is used to store the non-zero elements in parallel in the target memory based on the position information.

[0081] Optionally, the location information acquisition module 320 may be specifically used for:

[0082] Traversing each element in the sparse matrix in a preset order;

[0083] For the traversed element, if the traversed element is a non-zero element, the position number of the traversed element in the sparse matrix is ​​used as the position information of the non-zero element.

[0084] Optionally, the non-zero element storage module 330 may specifically include:

[0085] A diagonal position determining unit, configured to determine the diagonal position of the non-zero element in the sparse matrix based on the position information;

[0086] An element partitioning unit, used for partitioning non-zero elements located at the same diagonal position into the same element group to obtain at least one element group;

[0087] The element storage unit is used to store the at least one element group in parallel in the target memory.

[0088] Optionally, the element storage unit may be specifically used for:

[0089] Obtaining a preset storage address in the target memory;

[0090] The at least one element group is stored in parallel in a storage unit corresponding to the preset storage address; wherein the non-zero elements in the element group carry position information, the target memory is composed of multiple storage units; and the preset storage address corresponds to the storage unit one by one.

[0091] Embodiment 4

[0092] Figure 4 A structural diagram of a data reading device provided in Embodiment 4 of the present invention is shown in FIG. Figure 4 As shown, the device comprises:

[0093] A matrix construction module 410 is used to construct an empty matrix of the same size as the sparse matrix;

[0094] A non-zero element reading module 420 is used to read the non-zero elements of the sparse matrix in parallel from the target memory; wherein the non-zero elements carry position information; the position information is the position number of the non-zero element in the sparse matrix;

[0095] The target data acquisition module 430 is used to add the non-zero elements to the empty matrix according to the position information to obtain target data.

[0096] Optionally, the non-zero element reading module 420 may be specifically used for:

[0097] Obtaining the storage address of the non-zero element in the target memory;

[0098] The non-zero elements are read out from the target memory in parallel according to the storage address.

[0099] The above device can execute the methods provided by all the above embodiments of the present invention, and has the corresponding functional modules and beneficial effects of executing the above methods. For technical details not described in detail in this embodiment, please refer to the methods provided by all the above embodiments of the present invention.

[0100] Embodiment 5

[0101] Figure 5 A schematic diagram of the structure of an electronic device 10 that can be used to implement an embodiment of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0102] like Figure 5As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0103] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0104] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as data storage and reading methods.

[0105] In some embodiments, the data storage and reading method may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the data storage and reading method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the data storage and reading method in any other suitable manner (e.g., by means of firmware).

[0106] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0107] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0108] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0109] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0110] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0111] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0112] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0113] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A data storage method, characterized in that: include: Acquire target data; wherein the target data is represented in the form of a sparse matrix; Obtaining position information of non-zero elements in the sparse matrix; The non-zero elements are stored in parallel in a target memory based on the position information.

2. The method according to claim 1, characterized in that Obtaining position information of non-zero elements in the sparse matrix includes: Traversing each element in the sparse matrix in a preset order; For the traversed element, if the traversed element is a non-zero element, the position number of the traversed element in the sparse matrix is ​​used as the position information of the non-zero element.

3. The method according to claim 1, characterized in that Storing the non-zero elements in parallel in a target memory based on the position information includes: Determine, based on the position information, that the non-zero element is located at a diagonal position in the sparse matrix; Divide the non-zero elements at the same diagonal position into the same element group to obtain at least one element group; The at least one group of elements is stored in parallel in a target memory.

4. The method according to claim 3, characterized in that Storing the at least one element group in parallel in a target memory comprises: Obtaining a preset storage address in the target memory; The at least one element group is stored in parallel in a storage unit corresponding to the preset storage address; wherein the non-zero elements in the element group carry position information, the target memory is composed of multiple storage units; and the preset storage address corresponds to the storage unit one by one.

5. A data reading method, characterized in that: include: Construct an empty matrix of the same size as the sparse matrix; Reading non-zero elements of the sparse matrix in parallel from the target memory; wherein the non-zero elements carry position information; the position information is the position sequence number of the non-zero elements in the sparse matrix; The non-zero elements are added to the empty matrix according to the position information to obtain target data.

6. The method according to claim 5, characterized in that Reading non-zero elements of the sparse matrix from the target memory in parallel includes: Obtaining the storage address of the non-zero element in the target memory; The non-zero elements are read out from the target memory in parallel according to the storage address.

7. A data storage device, characterized in that: include: A data acquisition module, used to acquire target data; wherein the target data is represented in the form of a sparse matrix; A position information acquisition module, used to obtain the position information of non-zero elements in the sparse matrix; A non-zero element storage module is used to store the non-zero elements in parallel in a target memory based on the position information.

8. A data reading device, characterized in that: include: A matrix building block to build an empty matrix of the same size as a sparse matrix; A non-zero element reading module, used for reading non-zero elements of the sparse matrix in parallel from a target memory; wherein the non-zero elements carry position information; the position information is the position number of the non-zero element in the sparse matrix; The target data acquisition module is used to add the non-zero elements to the empty matrix according to the position information to obtain the target data.

9. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can perform the data storage and reading method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the data storage and reading method according to any one of claims 1 to 6 when executed.

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