Trench gate silicon carbide transistor structure and preparation method thereof

Abstract

The invention provides a trench gate silicon carbide transistor structure and a preparation method thereof. According to the invention, the sacrificial oxide layer with a thin film layer grows and is formed on the surface of the polycrystalline silicon layer of the trench gate structure and the surface of the polycrystalline silicon layer of the driving gate structure, so that sputtering metal can be prevented from reacting with polycrystalline silicon when an ohmic contact structure is formed; therefore, the condition that the photoetching and etching processes of the source contact hole and the gate contact hole can use the same photomask can be met; and meanwhile, the sacrificial oxide layer is thin, so that the sacrificial oxide layer can be conveniently removed together when the first metal layer which does not react is removed, and the influence on other film layers is small. The source contact hole and the gate contact hole are simultaneously formed through photoetching and etching by adopting the same photomask, so that the number of layers of the photomask is reduced, the photoetching and etching process time can be saved on one hand, the process manufacturing cost can be reduced, the parameter abnormity caused by external defects can be reduced on the other hand, the process stability is improved, and the production efficiency is improved. Therefore, the production efficiency is improved, and the productivity is increased.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a trench gate silicon carbide transistor structure and a preparation method thereof. Background Art

[0002] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) can be roughly divided into the following categories: planar type; trench type, mainly used in low-voltage fields; shielded gate trench (SGT) type, mainly used in medium-voltage and low-voltage fields; super junction (SJ) type, mainly used in high-voltage fields. With the continuous advancement of semiconductor integrated circuit manufacturing technology, the performance of semiconductor devices has been continuously improved. As a new type of power device, silicon carbide (SiC) transistor devices have the characteristics of high breakdown voltage, low on-resistance, high temperature resistance, and low loss compared to traditional silicon (Si)-based power devices.

[0003] Trench gate silicon carbide transistors generally include a trench gate formed of polysilicon (poly) in the trench and a drive gate formed of polysilicon on the field oxide. The trench gate is used as the gate, and the two sides are led out through the source contact structure (CTS) to control the conduction of the transistor; the top of the drive gate is led out through the gate contact structure (CTG) to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of channel current.

[0004] At present, when the industry makes metal silicide for trench gate silicon carbide transistors, it is generally necessary to first open a hole in the silicon carbide substrate and then perform the metal silicide process. Metal nickel (Ni) is usually used in the source contact hole to form an ohmic contact after annealing. If excessive metal nickel is used, it will cause the metal nickel to fill the gate contact hole and react violently with the polysilicon at the bottom of the gate contact hole. Therefore, the source contact hole and the gate contact hole usually need to be separated by two different masks for lithography and etching. In the process of silicon carbide transistor devices, the more complex the process, the more mask layers are required, the more external defects will be introduced to the production line, and the time, manpower and raw material costs of process manufacturing will be higher. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a trench gate silicon carbide transistor structure and a preparation method thereof, so that the lithography and etching processes of the source contact hole and the gate contact hole can use the same mask, which can reduce the number of mask layers, save process time, avoid parameter anomalies caused by external defects, improve process stability, and help reduce process manufacturing costs.

[0006] In order to solve the above problems, the present invention provides a method for preparing a trench gate silicon carbide transistor structure, the method comprising the following steps: forming a substrate, the substrate comprising a silicon carbide substrate, a trench gate structure extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a driving gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; growing a sacrificial oxide layer on the surface of a polysilicon layer of the trench gate structure and on the surface of a polysilicon layer of the driving gate structure; performing a first metal sputtering process to form a first metal layer, and on both sides of the trench gate structure, the first metal layer reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure, and the first metal layer does not react with all the polysilicon layers due to the resistance of the sacrificial oxide layer; removing the A sacrificial oxide layer and the first metal layer that did not react; forming a dielectric protection layer covering all the surfaces of the polysilicon layer and the surface of the ohmic contact structure; performing a common etching process, using the same mask to etch the dielectric protection layer, and forming a first contact hole and a second contact hole at the same time, the first contact hole is located on both sides of the trench gate structure and exposes the ohmic contact structure, and the second contact hole is located on the top of the drive gate structure and exposes the polysilicon layer of the drive gate structure; and performing a second metal sputtering process to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts with the ohmic contact structure serves as the first contact structure, and the second metal layer that fills the second contact hole and contacts with the polysilicon layer of the drive gate structure serves as the second contact structure.

[0007] In order to solve the above problems, the present invention further provides a trench gate silicon carbide transistor structure, and the trench gate silicon carbide transistor structure is prepared by the preparation method described in the present invention.

[0008] The above technical solution, by growing a thinner sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure, can prevent the reaction between the sputtered metal and the polysilicon when forming the ohmic contact structure, thereby satisfying the condition that the photolithography and etching processes of the source contact hole and the gate contact hole can use the same mask; at the same time, the sacrificial oxide layer is thinner, which is also convenient for removing the sacrificial oxide layer together when removing the unreacted first metal layer, with less impact on other film layers. By using the same mask for photolithography and etching to simultaneously form the source contact hole and the gate contact hole, the number of mask layers is reduced. On the one hand, it can save the photolithography and etching process time, which is conducive to reducing the process manufacturing cost. On the other hand, it is conducive to reducing parameter abnormalities caused by external defects, so that the process stability is improved, thereby improving production efficiency and increasing production capacity. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments of the present invention are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0010] Figure 1 A schematic diagram of the steps of a method for preparing a trench gate silicon carbide transistor structure according to an embodiment of the present invention;

[0011] Figure 2 A schematic diagram of a local topography of forming a substrate according to an embodiment of the present invention;

[0012] Figure 3 A schematic diagram of the local morphology of forming a sacrificial oxide layer according to an embodiment of the present invention;

[0013] Figure 4 A schematic diagram of the local morphology of forming a first metal layer according to an embodiment of the present invention;

[0014] Figure 5 A schematic diagram of the local morphology after the sacrificial oxide layer is removed according to an embodiment of the present invention;

[0015] Figure 6 A schematic diagram of the local morphology of forming a dielectric protection layer according to an embodiment of the present invention;

[0016] Figure 7 A schematic diagram of the local morphology after performing a common etching process according to an embodiment of the present invention;

[0017] Figure 8 It is a schematic diagram of the local morphology of forming a second metal layer according to an embodiment of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] Please also read Figures 1 to 8 ,in, Figure 1 A schematic diagram of the steps of a method for preparing a trench gate silicon carbide transistor structure according to an embodiment of the present invention; Figure 2 A schematic diagram of a local topography of forming a substrate according to an embodiment of the present invention; Figure 3 A schematic diagram of the local morphology of forming a sacrificial oxide layer according to an embodiment of the present invention; Figure 4 A schematic diagram of the local morphology of forming a first metal layer according to an embodiment of the present invention;

[0020] Figure 5 A schematic diagram of the local morphology after the sacrificial oxide layer is removed according to an embodiment of the present invention; Figure 6 A schematic diagram of the local morphology of forming a dielectric protection layer according to an embodiment of the present invention; Figure 7 A schematic diagram of the local morphology after performing a common etching process according to an embodiment of the present invention; Figure 8 It is a schematic diagram of the local morphology of forming a second metal layer according to an embodiment of the present invention.

[0021] like Figure 1As shown, the preparation method of the silicon carbide transistor structure described in this embodiment includes the following steps: S1, forming a substrate, the substrate including a silicon carbide substrate, a trench gate structure extending from the surface of the silicon carbide substrate to the inside of the silicon carbide substrate, and a driving gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; S2, growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the driving gate structure; S3, performing a first metal sputtering process to form a first metal layer, on both sides of the trench gate structure, the first metal layer reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure, because the sacrificial oxide layer resists, the first metal layer does not react with all the polysilicon layers; S4, removing the sacrificial oxide layer to and the first metal layer that has not reacted; S5, forming a dielectric protection layer covering all the surfaces of the polysilicon layer and the surface of the ohmic contact structure; S6, performing a common etching process, using the same mask to etch the dielectric protection layer, and forming a first contact hole and a second contact hole at the same time, the first contact hole is located on both sides of the trench gate structure and exposes the ohmic contact structure, and the second contact hole is located on the top of the driving gate structure and exposes the polysilicon layer of the driving gate structure; and S7, performing a second metal sputtering process to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts with the ohmic contact structure serves as the first contact structure, and the second metal layer that fills the second contact hole and contacts with the polysilicon layer of the driving gate structure serves as the second contact structure.

[0022] See also Figure 2 In step S1, a substrate is formed, wherein the substrate includes a silicon carbide substrate, a trench gate structure 21 extending from the surface of the silicon carbide substrate to the interior of the silicon carbide substrate, and a driving gate structure 22 formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure 21.

[0023] In this embodiment, the silicon carbide (SiC) substrate includes a support substrate 201 and a silicon carbide epitaxial layer 202 formed on the support substrate 201. The support substrate 201 can be any one of a silicon (Si) substrate and a silicon carbide (SiC). The support substrate 201 can also be a stacked structure, such as a silicon / germanium / silicon stack. The silicon carbide epitaxial layer 202 is a layer of silicon carbide thin film layer epitaxially grown (EPI) on the support substrate 201. The silicon carbide epitaxial layer 202 can be grown by chemical vapor deposition (CVD). CVD technology mainly uses one or more gas phase compounds or single substances containing thin film elements to chemically react on the surface of the substrate to form a thin film. The silicon carbide epitaxial layer 202 can subsequently react with the first metal used in the first metal sputtering process to form a metal compound as an ohmic contact structure.

[0024] In this embodiment, the trench gate structure 21 is formed in the silicon carbide epitaxial layer 202, and the top surface of the trench gate structure 21 is flush with the top surface of the silicon carbide epitaxial layer 202. The ohmic contact structure 41 (shown in FIG. 4 ) formed subsequently Figure 4 The top surface of the silicon carbide epitaxial layer 202 is flush with the top surface of the silicon carbide epitaxial layer 202.

[0025] In this embodiment, the trench gate structure 21 includes a gate oxide layer 211 covering the inner wall of the trench extending from the surface of the silicon carbide substrate to the inside of the silicon carbide substrate, and a polysilicon layer 212 covering the gate oxide layer 211 and filling the trench. The driving gate structure 22 includes a field oxide layer 221 formed on the surface of the silicon carbide substrate and a polysilicon layer 222 covering the field oxide layer 221. The film thickness of the field oxide layer 221 is greater than the film thickness of the gate oxide layer 211. Specifically, the film thickness of the field oxide layer 221 is greater than or equal to 10,000 angstroms. The formation process of the trench gate structure 21 and the driving gate structure 22 can refer to the existing related processes, which will not be repeated here. The purpose of the two gate structures is: the trench gate structure is used as the gate, and the two sides are led out through the source contact structure (CTS) to control the conduction of the transistor; the top of the drive gate structure is led out through the gate contact structure (CTG) to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of channel current.

[0026] In this embodiment, the field oxide layer 221 and the gate oxide layer 211 are made of silicon dioxide (SiO 2 The formation process of the field oxide layer 221 and the gate oxide layer 211 may refer to the existing related processes, which will not be described in detail here.

[0027] See also Figure 3 And step S2, growing and forming a sacrificial oxide layer 30 on the surface of the polysilicon layer 212 of the trench gate structure 21 and the surface of the polysilicon layer 222 of the driving gate structure 22. By forming the sacrificial oxide layer 30 on the surface of the polysilicon layers 212 and 222, the metal and polysilicon in the subsequent metal sputtering process for forming an ohmic contact structure are prevented from reacting; and the sacrificial oxide layer is basically not formed on the surface of the silicon carbide substrate, which will not affect the reaction between the metal and silicon carbide in the metal sputtering process for forming an ohmic contact.

[0028] In this embodiment, the step of growing a sacrificial oxide layer 30 on the surface of the polysilicon layer 212 of the trench gate structure 21 and the surface of the polysilicon layer 222 of the drive gate structure 22 specifically includes: placing the substrate in a furnace tube at a preset process temperature to perform an oxidation reaction, wherein the preset process temperature is higher than or equal to the oxidation temperature of polysilicon and lower than the oxidation temperature of silicon carbide, so that only the surfaces of all the polysilicon layers 212 and 222 are oxidized and grown to form an oxide layer as the sacrificial oxide layer 30, and the surface of the silicon carbide substrate is basically free of an oxide layer. Specifically, the preset process temperature is 600°C to 1200°C, for example, 600°C, 650°C, 700°C, 800°C, 900°C, 1000°C, 1100°C, 1150°C, 1200°C, etc. Specifically, the material of the sacrificial oxide layer 30 is silicon dioxide (SiO 2 ).

[0029] In order to facilitate the subsequent removal of the sacrificial oxide layer 30, the film thickness of the sacrificial oxide layer 30 is less than or equal to a preset thickness threshold. For example, the film thickness of the sacrificial oxide layer 30 is 100 angstroms. By growing a 100 angstrom oxide layer on the surfaces of all the polysilicon layers 212 and 222, the metal and polysilicon in the subsequent metal sputtering process for forming an ohmic contact structure are prevented from reacting, and the 100 angstrom oxide layer is removed after the ohmic contact is formed; and the oxide layer is basically not formed on the surface of the silicon carbide substrate, which will not affect the reaction between the metal and silicon carbide in the metal sputtering process for forming an ohmic contact.

[0030] See also Figure 4 And step S3, performing a first metal sputtering process to form a first metal layer 40, on both sides of the trench gate structure 21, the first metal layer 40 reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure 41, because the sacrificial oxide layer 30 resists, the first metal layer 40 does not react with all the polysilicon layers 212 and 222.

[0031] Specifically, the first metal layer 40 covers the surface of the silicon carbide substrate on both sides of the trench gate structure 21, and the surface of the sacrificial oxide layer 30 on the top of the trench gate structure 21 and the top of the driving gate structure 22; on both sides of the trench gate structure 21, the first metal layer 40 reacts with the silicon carbide substrate to form a metal compound as an ohmic contact structure 41; at the top of the trench gate structure 21 and the top of the driving gate structure 22, the first metal layer 40 does not react with all the polysilicon layers 212 and 222 due to the resistance of the sacrificial oxide layer 30. The presence of the sacrificial oxide layer 30 avoids the reaction of the sputtered metal with the polysilicon when the ohmic contact structure is formed. That is, the sputtered metal will not affect the polysilicon layer 212 of the trench gate structure 21 and the polysilicon layer 222 of the driving gate structure 22, thereby satisfying the condition that the photolithography and etching processes of the source contact hole and the gate contact hole can use the same mask.

[0032] In this embodiment, the step of performing a first metal sputtering process to form a first metal layer 40 specifically includes: performing a metal nickel (Ni) sputtering process, wherein the metal nickel reacts with the silicon carbide substrate to form a nickel silicon compound (NiSi) as the ohmic contact structure 41; because the sacrificial oxide layer 30 resists and the metal nickel does not react with all the polysilicon layers 212 and 222, the sputtered metal will not affect all the polysilicon layers 212 and 222.

[0033] See also Figure 5 And step S4, removing the sacrificial oxide layer 30 and the unreacted first metal layer 40.

[0034] Since the sacrificial oxide layer 30 has a relatively thin film thickness, the film layers in other regions are less affected when the sacrificial oxide layer 30 with a relatively thin film thickness is removed. For example, the sacrificial oxide layer 30 has a film thickness of only 100 angstroms, so removing the 100 angstroms silicon dioxide layer on the polysilicon surface has a relatively small effect on the film layers in other regions.

[0035] See also Figure 6 And step S5, forming a dielectric protection layer 60 covering all surfaces of the polysilicon layers 212, 222 and the surface of the ohmic contact structure 41.

[0036] In some embodiments, the material of the dielectric protection layer 60 is borophospho-silicate glass (BPSG for short). BPSG is silicon dioxide doped with boron and phosphorus. The BPSG film layer is used to isolate and insulate the metal layer, prevent electrical short circuits between the metal layers, and ensure the normal operation of the circuit. The BPSG film layer has good fluidity and hole filling ability, can flow at high temperatures, and can improve the flatness of the surface of the silicon carbide substrate. The BPSG film layer also has a good ability to absorb and block sodium ions, which helps to improve the stability and reliability of semiconductor devices.

[0037] See also Figure 7 And step S6, performing a common etching process, using the same mask to etch the dielectric protection layer 60, and simultaneously forming a first contact hole 601 and a second contact hole 602, wherein the first contact hole 601 is located on both sides of the trench gate structure 21 and exposes the ohmic contact structure 41, and the second contact hole 602 is located on the top of the driving gate structure 22 and exposes the polysilicon layer 222 of the driving gate structure 22.

[0038] By using the same photomask for photolithography and etching to simultaneously form the first contact hole 601 (which can be used as a source contact hole) and the second contact hole 602 (which can be used as a gate contact hole), compared with the prior art in which the source contact hole and the gate contact hole need to be separately photolithographically and etched using two different photomasks, this embodiment reduces the number of photomask layers. Reducing the number of photomask layers can save photolithography and etching process time on the one hand, which is conducive to reducing process manufacturing costs; on the other hand, it is conducive to reducing parameter anomalies caused by external defects, improving process stability, thereby improving production efficiency and increasing production capacity.

[0039] In an embodiment, the first contact hole 601 is a source contact hole. Accordingly, the first contact structure 81 (shown in FIG. 1 ) formed subsequently Figure 8 ) is a source contact structure (CTS); the second contact hole 602 is a gate contact hole, and the second contact structure 82 (shown in FIG. Figure 8 (center) is the gate contact structure (CTG).

[0040] See also Figure 8 And step S7, performing a second metal sputtering process to form a second metal layer 80, wherein the second metal layer 80 that fills the first contact hole 601 and contacts the ohmic contact structure 41 serves as the first contact structure 81, and the second metal layer 80 that fills the second contact hole 602 and contacts the polysilicon layer 222 of the driving gate structure 22 serves as the second contact structure 82.

[0041] In this embodiment, the step of performing a second metal sputtering process to form the second metal layer 80 specifically includes: performing an aluminum-copper alloy sputtering process to form an aluminum-copper metal layer that fills the first contact hole 601 and contacts the ohmic contact structure 41, fills the second contact hole 602 and contacts the polysilicon layer 222 of the driving gate structure 22, and covers the dielectric protection layer 60 and is continuously distributed as the second metal layer 80.

[0042] This embodiment forms a thinner sacrificial oxide layer by growing on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure, which can prevent the reaction between the sputtered metal and the polysilicon when the ohmic contact structure is formed, thereby satisfying the condition that the photolithography and etching processes of the source contact hole and the gate contact hole can use the same mask; at the same time, the sacrificial oxide layer is thinner, which is also convenient for removing the sacrificial oxide layer when removing the unreacted first metal layer, and has less impact on other film layers. By using the same mask for photolithography and etching to simultaneously form the source contact hole and the gate contact hole, the number of mask layers is reduced. On the one hand, it can save the photolithography and etching process time, which is conducive to reducing the process manufacturing cost. On the other hand, it is conducive to reducing parameter abnormalities caused by external defects, so that the process stability is improved, thereby improving production efficiency and increasing production capacity.

[0043] Based on the same inventive concept, an embodiment of the present invention further provides a silicon carbide transistor structure, which can be prepared by the above-mentioned preparation method of the present invention.

[0044] See also Figure 8 , which is a schematic diagram of a silicon carbide transistor structure provided by an embodiment of the present invention. Figure 8 As shown, the silicon carbide transistor structure provided in this embodiment is prepared by the above method of the present invention, and specifically includes: a silicon carbide substrate, a trench gate structure 21 and a driving gate structure 22 spaced apart on the surface of the silicon carbide substrate, an ohmic contact structure 41 in the silicon carbide substrate on both sides of the trench gate structure 21, a dielectric protection layer 60 covering the surface of the silicon carbide substrate, the trench gate structure 21 and the driving gate structure 22, a first contact structure 81 penetrating the dielectric protection layer 60 in a direction perpendicular to the surface of the silicon carbide substrate and in contact with the ohmic contact structure 41, and a second contact structure 82 penetrating the dielectric protection layer 60 in a direction perpendicular to the surface of the silicon carbide substrate and in contact with the polysilicon layer 222 of the driving gate structure 22. The first contact structure 81 and the second contact structure 82 are formed by performing a common etching process using the same mask.

[0045] In this embodiment, the silicon carbide (SiC) substrate includes a support substrate 201 and a silicon carbide epitaxial layer 202 formed on the support substrate 201 .

[0046] In this embodiment, the trench gate structure 21 includes a gate oxide layer 211 covering the inner wall of the trench extending from the surface of the silicon carbide substrate to the inside of the silicon carbide substrate, and a polysilicon layer 212 covering the gate oxide layer 211 and filling the trench. The driving gate structure 22 includes a field oxide layer 221 formed on the surface of the silicon carbide substrate and a polysilicon layer 222 covering the field oxide layer 221. The film thickness of the field oxide layer 221 is greater than the film thickness of the gate oxide layer 211. Specifically, the film thickness of the field oxide layer 221 is greater than or equal to 10,000 angstroms. The formation process of the trench gate structure 21 and the driving gate structure 22 can refer to the existing related processes, which will not be repeated here. The purpose of the two gate structures is: the trench gate structure is used as the gate, and the two sides are led out through the source contact structure (CTS) to control the conduction of the transistor; the top of the driving gate structure is led out through the gate contact structure (CTG) to provide a path for connecting the gate with the external circuit to ensure that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of the channel current. Among them, the film thickness of the field oxide layer 221 is greater than the film thickness of the gate oxide layer 211. Specifically, the film thickness of the field oxide layer 221 is greater than or equal to 10,000 angstroms.

[0047] In this embodiment, the first contact structure 81 is a source contact structure (CTS); the second contact structure 82 is a gate contact structure (CTG). The purpose of the two gate structures of the trench gate structure 21 and the drive gate structure 22 is as follows: the trench gate structure 21 is used as a gate, and the two sides are led out through the source contact structure (CTS) to control the conduction of the transistor; the top of the drive gate structure 22 is led out through the gate contact structure (CTG) to provide a path for connecting the gate to the external circuit, ensuring that the gate voltage can be correctly applied to the transistor structure, thereby controlling the flow of the channel current.

[0048] In this embodiment, the field oxide layer 221 and the gate oxide layer 211 are made of silicon dioxide (SiO 2 ).

[0049] In this embodiment, the first metal is nickel (Ni), and the ohmic contact structure 41 is a nickel silicon compound (NiSi) formed by the reaction of nickel and the silicon carbide substrate.

[0050] In this embodiment, the material of the dielectric protection layer 60 is borophosphosilicate glass, and the material of the first contact structure 81 and the second contact structure 82 is aluminum-copper alloy, which also covers the dielectric protection layer 60 and is a continuously distributed metal film layer.

[0051] In this embodiment, the trench gate silicon carbide transistor structure is an asymmetrical trench gate silicon carbide metal oxide semiconductor field effect transistor structure.

[0052] In the above description, the description of well-known components and technologies is omitted to avoid unnecessary confusion of the concept of the present invention. In the above embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to each other.

[0053] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only include those elements, but also include other elements not clearly listed, or also include elements inherent to such process, method, article or equipment. In the absence of more restrictions, there is a sentence "also includes a ..." The elements limited do not exclude the existence of other identical elements in the process, method, article or equipment including the elements. In addition, the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

[0054] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. It should be noted that a person skilled in the art may make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications shall also be regarded as the protection scope of the present invention.

Claims

1. A method for preparing a trench gate silicon carbide transistor structure, characterized in that: The method comprises the following steps: Forming a substrate, the substrate comprising a silicon carbide substrate, a trench gate structure extending from a surface of the silicon carbide substrate to an interior of the silicon carbide substrate, and a driving gate structure formed on the surface of the silicon carbide substrate and spaced apart from the trench gate structure; Growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure; Performing a first metal sputtering process to form a first metal layer, the first metal layer reacts with the silicon carbide substrate on both sides of the trench gate structure to form a metal compound as an ohmic contact structure, and the first metal layer does not react with all the polysilicon layers due to the resistance of the sacrificial oxide layer; removing the sacrificial oxide layer and the unreacted first metal layer; forming a dielectric protection layer covering all surfaces of the polysilicon layer and the ohmic contact structure; Performing a common etching process, etching the dielectric protection layer using the same photomask, and simultaneously forming a first contact hole and a second contact hole, wherein the first contact hole is located at both sides of the trench gate structure and exposes the ohmic contact structure, and the second contact hole is located on the top of the drive gate structure and exposes the polysilicon layer of the drive gate structure; as well as A second metal sputtering process is performed to form a second metal layer, wherein the second metal layer that fills the first contact hole and contacts the ohmic contact structure serves as a first contact structure, and the second metal layer that fills the second contact hole and contacts the polysilicon layer of the driving gate structure serves as a second contact structure.

2. The method according to claim 1, characterized in that The silicon carbide substrate includes a supporting substrate and a silicon carbide epitaxial layer formed on the supporting substrate, the trench gate structure and the ohmic contact structure are formed in the silicon carbide epitaxial layer, and the top surface of the trench gate structure and the top surface of the ohmic contact structure are flush with the top surface of the silicon carbide epitaxial layer.

3. The method according to claim 1, characterized in that The first contact structure is a source contact structure, and the second contact structure is a gate contact structure.

4. The method according to claim 1, characterized in that: The material of the sacrificial oxide layer is silicon dioxide, and the material of the dielectric protection layer is borophosphosilicate glass.

5. The method according to claim 1, characterized in that The trench gate structure includes a gate oxide layer covering an inner wall of a trench extending from a surface of the silicon carbide substrate to an inner portion of the silicon carbide substrate, and a polysilicon layer covering the gate oxide layer and filling the trench; The driving gate structure includes a field oxide layer formed on the surface of the silicon carbide substrate and a polysilicon layer covering the field oxide layer; The film thickness of the field oxide layer is greater than the film thickness of the gate oxide layer, and the materials of the field oxide layer and the gate oxide layer are both silicon dioxide.

6. The method according to claim 1, characterized in that The step of growing a sacrificial oxide layer on the surface of the polysilicon layer of the trench gate structure and the surface of the polysilicon layer of the drive gate structure specifically includes: The substrate is placed in a furnace tube at a preset process temperature to perform an oxidation reaction, wherein the preset process temperature is higher than or equal to the oxidation temperature of polysilicon and lower than the oxidation temperature of silicon carbide, so that only the surface of all the polysilicon layers is oxidized and grown to form an oxide layer as the sacrificial oxide layer.

7. The method according to claim 6, characterized in that The preset process temperature is 600°C to 1200°C.

8. The method according to claim 1 or 6, characterized in that: The thickness of the sacrificial oxide layer is 100 angstroms.

9. The method according to claim 1, characterized in that: The step of performing a first metal sputtering process to form a first metal layer specifically includes: A metal nickel sputtering process is performed, and the metal nickel reacts with the silicon carbide substrate to form a nickel-silicon compound as the ohmic contact structure. Due to the resistance of the sacrificial oxide layer, the metal nickel does not react with all the polysilicon layers.

10. The method according to claim 1, characterized in that The step of performing a second metal sputtering process to form a second metal layer specifically includes: An aluminum-copper alloy sputtering process is performed to form an aluminum-copper metal layer that fills the first contact hole and contacts the ohmic contact structure, fills the second contact hole and contacts the polysilicon layer of the driving gate structure, and covers the dielectric protection layer and is continuously distributed as the second metal layer.

11. A trench gate silicon carbide transistor structure, characterized in that: The trench gate silicon carbide transistor structure is prepared by the method for preparing a trench gate silicon carbide transistor structure according to any one of claims 1 to 10. 12 . The trench gate silicon carbide transistor structure according to claim 11 , wherein the trench gate silicon carbide transistor structure is an asymmetric trench gate silicon carbide metal oxide semiconductor field effect transistor structure.

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