Efficient N-type TOPCon battery and preparation method thereof

Abstract

The invention discloses a high-efficiency N-type TOPCon battery and a preparation method thereof. The preparation method comprises the following steps: S1, providing an N-type silicon substrate and carrying out alkali texturing; s2, performing chemical vapor deposition on the front surface of the N-type silicon substrate to form a front surface tunneling silicon oxide thin film layer and an amorphous silicon layer; s3, performing low-temperature boron diffusion on the front surface to form a doped amorphous silicon layer; s4, carrying out laser doping on the surface of the doped amorphous silicon layer to carry out crystalline modification to form a laser modified region; s5, polishing the back surface of the N-type silicon substrate; s6, performing low-temperature chemical vapor deposition on the back surface of the N-type silicon substrate to form a back surface tunneling silicon oxide thin film layer, an intrinsic polycrystalline silicon layer and a mask layer; s7, performing low-temperature phosphorus diffusion on the back surface to form a doped polycrystalline silicon layer; s8, removing the mask layer; s9, front and back composite passivation films are respectively deposited on the front and back surfaces of the N-type silicon substrate; and S10, printing silver paste in the laser modification area, sintering to obtain a front grid line, printing silver paste on the back, and sintering to obtain a back grid line.

Description

Technical Field

[0001] The present invention relates to the technical field of crystalline silicon solar cell processing, and in particular to a high-efficiency N-type TOPCon cell and a preparation method thereof. Background Art

[0002] At present, with the gradual consumption of fossil energy, the development of solar energy, a renewable clean energy, is an inevitable development trend. Solar cells are electronic devices that use the photovoltaic effect to convert solar energy into electrical energy.

[0003] In the existing technology, the preparation process of N-type batteries is a high-temperature process. Boron diffusion generally needs to be carried out at a high temperature of 1050°C, which will bring great cost waste. At the same time, the metal composite on the front side is also a major problem affecting battery efficiency. Summary of the invention

[0004] The purpose of the present invention is to solve the problems of high cost and low battery efficiency in the preparation of existing N-type batteries and propose a method for preparing a high-efficiency N-type TOPCon battery to solve the above problems.

[0005] To achieve the above object, the present invention is implemented by the following technical solutions:

[0006] The present invention provides a method for preparing a high-efficiency N-type TOPCon battery, the method comprising the following steps:

[0007] S1, providing an N-type silicon substrate, and performing an alkali texturing treatment on the N-type silicon substrate using a KOH or NaOH solution to form an anti-reflection texturing structure;

[0008] S2, performing low-temperature chemical vapor deposition on the front side of the textured N-type silicon substrate to form a front tunneling silicon oxide film layer (silicon dioxide film layer) and an amorphous silicon layer;

[0009] S3, performing low-temperature boron diffusion on the front surface of the N-type silicon substrate to form a doped amorphous silicon layer;

[0010] S4, performing laser doping on the surface of the low-temperature boron-doped amorphous silicon layer to perform crystalline modification to form a laser modified area;

[0011] S5, polishing the back side of the N-type silicon substrate;

[0012] S6, after polishing, performing low-temperature chemical vapor deposition on the back side of the N-type silicon substrate to form a back-side tunneling silicon oxide film layer (silicon dioxide film layer), an intrinsic polysilicon layer and a mask layer;

[0013] S7, performing low-temperature phosphorus diffusion on the back side of the N-type silicon substrate to form a doped polysilicon layer;

[0014] S8, cleaning and removing the mask layer on the back side of the N-type silicon substrate;

[0015] S9, depositing on the front and back sides of the N-type silicon substrate respectively to form a front composite passivation film and a back composite passivation film;

[0016] S10, printing silver paste in the laser modified area, sintering to obtain front gate lines, printing silver paste on the back side of the N-type silicon substrate, sintering to obtain back gate lines, and completing the preparation of the N-type TOPCon battery.

[0017] The present invention selectively prints in the laser modified area and sinters to the modified area to form a good ohmic contact while reducing the metal compound on the front side, thus solving the problem that the metal compound on the front side affects the battery efficiency.

[0018] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery is provided: Step S2, placing the textured N-type silicon substrate into a low-pressure quartz furnace tube, and then performing chemical vapor deposition on the front side of the N-type silicon substrate at 400-700°C using nitrogen, oxygen, and silane to form a front tunneling silicon oxide film layer with a thickness of less than 1.5nm and an amorphous silicon layer with a thickness of 10-100nm.

[0019] Furthermore, a method for preparing a high-efficiency N-type TOPCon cell: In step S3, a process of performing low-temperature boron diffusion on the front side of the N-type silicon substrate to form a doped amorphous silicon layer comprises the following specific steps:

[0020] (1) placing an N-type silicon substrate (1) on the front side of which an amorphous silicon layer of a certain thickness is deposited, into a quartz boat, and pushing the quartz boat into a quartz tube of a diffusion furnace with an internal temperature of 700 to 850° C.;

[0021] (2) introducing O2 at a flow rate of 1000 to 5000 sccm for pre-oxidation before deposition, and the pre-oxidation time is 100 to 500 seconds;

[0022] (3) Raising the temperature to 750-850° C. and evacuating the atmosphere with a vacuum pump to make the atmosphere in the diffusion furnace quartz tube a low pressure state of less than 100 mbar;

[0023] (4) introducing BCl3 gas with a flow rate of 50 to 500 sccm and O2 with a flow rate of 200 to 2000 sccm to perform the first boron source deposition for a deposition time of 100 to 500 seconds;

[0024] (5) Then, BCl3 gas with a flow rate of 60 to 600 sccm and O2 with a flow rate of 300 to 3000 sccm are introduced to perform a second boron source deposition for a deposition time of 100 to 500 seconds;

[0025] (6) Raise the temperature to 800-900°C and carry out the process of pushing the knot for 500-2000 seconds. After the pushing is completed, introduce 1-10 liters of N2 and back pressure;

[0026] (7) Cooling down and unloading the boat: When the temperature drops to 700-800°C, the quartz boat is taken out of the quartz furnace tube of the diffusion furnace, and the silicon wafer is unloaded from the quartz boat. The square resistance is controlled at 200-600Ω / □.

[0027] The front tunneling oxide layer and the doped amorphous silicon layer together form a front passivation structure.

[0028] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery is provided: in step S4, the laser wavelength is controlled to be 300-900 nm, the laser power is 10-500 W, the laser processing speed is 10-50 m / s, and the width of the laser modified area 4 acting on the printed grid line area is 30-200 μm.

[0029] Specifically, in step S4, laser doping is performed on the surface of low-temperature boron-doped amorphous silicon to perform crystalline modification to form a laser modified area. Under the action of the laser, the area subsequently used for printing the gate lines is processed, and the original amorphous doping will become local crystalline doping, thereby increasing the local doping concentration and forming different doping states.

[0030] Preferably, the wavelength of the modified doping laser used is controlled at 300-900 nm, the laser power is controlled at 10-500 W, and the laser processing speed is 10-50 m / s.

[0031] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery is provided: in step S5, a polishing solution composed of an alkali metal hydroxide and a polishing additive is used, and the difference in etching rate between the crystalline and amorphous states of the polishing solution is utilized to selectively wet etch the front side of the N-type silicon substrate and polish the back side of the N-type silicon substrate.

[0032] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery: the deposition temperature in step S6 is 400-800°C, the thickness of the back tunneling silicon oxide film layer is less than 1.5nm, the thickness of the intrinsic polysilicon layer is 40-180nm, and the thickness of the mask layer is 5-50nm.

[0033] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery is provided: the deposition temperature in step S7 is 700-950° C., and the gases used include oxygen, BCl 3 and nitrogen.

[0034] In step S7, under preset low temperature conditions, low-temperature phosphorus diffusion is performed on the back side of the N-type silicon substrate to form a doped polysilicon layer. The deposition temperature is between 700 and 950°C, and the gases used include oxygen, BCl3, nitrogen, etc., among which nitrogen is a neutral gas, in order to make the reaction more uniform.

[0035] Furthermore, a method for preparing a high-efficiency N-type TOPCon cell is provided: in step S8, a hydrofluoric acid solution is used to clean and remove the mask layer on the back side of the N-type silicon substrate.

[0036] Furthermore, a method for preparing a high-efficiency N-type TOPCon battery: in step S9, the deposition temperature is 200-500°C, the materials used for deposition include TMA, ammonia, silane, nitrogen, and nitrous oxide, and the thickness of the front composite passivation film and the back composite passivation film are set to 50-120 nm, respectively.

[0037] The present invention also provides a high-efficiency N-type TOPCon battery, which is prepared by the above-mentioned preparation method.

[0038] Beneficial effects of the present invention:

[0039] The preparation method of the high-efficiency N-type TOPCon battery provided by the present invention only requires a maximum temperature of 900°C to complete boron diffusion, which greatly reduces the production cost; at the same time, a poly passivation structure is adopted on the front side to solve the problem that the front metal composite affects the battery efficiency; the preparation method of the present invention also uses laser doping modification to reduce the difficulty of ohmic contact in the screen printing area, and uses the difference in etching rate between the crystalline and amorphous states to well solve the optical parasitic absorption of the front poly, thereby improving the battery efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 This is a schematic structural diagram of a high-efficiency N-type TOPCon battery prepared in Example 1 of the present invention.

[0042] Markings in the figure: 1-N-type silicon substrate, 2-front tunneling silicon oxide thin film layer, 3-doped amorphous silicon layer, 4-laser modified area, 5-back tunneling silicon oxide thin film layer, 6-doped polycrystalline silicon layer, 7-front composite passivation film, 8-back composite passivation film, 9-front gate line, 10-back gate line. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0044] Example 1

[0045] This embodiment 1 provides a method for preparing a high-efficiency N-type TOPCon battery, which includes the following specific steps:

[0046] S1, providing an N-type silicon substrate 1, and performing an alkali texturing treatment on the N-type silicon substrate 1 using a NaOH solution, thereby forming an anti-reflection texturing structure;

[0047] S2, performing low-temperature chemical vapor deposition on the front side of the N-type silicon substrate 1 after texturing: placing the N-type silicon substrate 1 after texturing in a low-pressure quartz furnace tube, performing chemical vapor deposition on the front side of the N-type silicon substrate 1 at 550° C. using nitrogen, oxygen, and silane to form a front side tunneling silicon oxide thin film layer 2 with a thickness of less than 1.5 nm and an amorphous silicon layer with a thickness of 65 nm;

[0048] S3, performing low-temperature boron diffusion on the front surface of the N-type silicon substrate 1 to form a doped amorphous silicon layer 3; wherein the low-temperature boron diffusion process includes the following steps:

[0049] (1) An N-type silicon substrate 1 with an amorphous silicon layer of a certain thickness deposited on the front side is placed in a quartz boat, and the quartz boat is pushed into a quartz tube of a diffusion furnace with an internal temperature of 750° C.;

[0050] (2) introducing O2 at a flow rate of 3000 sccm for pre-oxidation before deposition, and the pre-oxidation time is 300 seconds;

[0051] (3) Raising the temperature to 800° C. and evacuating the furnace with a vacuum pump to make the atmosphere in the quartz furnace tube of the diffusion furnace a low pressure state of less than 100 mbar;

[0052] (4) BCl3 gas with a flow rate of 250 sccm and O2 with a flow rate of 950 sccm were introduced to perform the first boron source deposition for a deposition time of 250 seconds;

[0053] (5) Then, BCl3 gas with a flow rate of 350 sccm and O2 with a flow rate of 1500 sccm were introduced to perform a second boron source deposition for 300 seconds;

[0054] (6) Raise the temperature to 900°C and carry out the process of pushing the knot for 1200 seconds. After the pushing is completed, introduce 5 liters of N2 and back pressure;

[0055] (7) Cooling down and unloading the boat: When the temperature drops to 800°C, take the quartz boat out of the quartz furnace tube of the diffusion furnace, unload the silicon wafer from the quartz boat, and control the square resistance to 200-600Ω / □

[0056] S4, laser doping is performed on the surface of the low-temperature boron-doped amorphous silicon layer 3 to perform crystalline modification to form a laser modified area 4. Under the action of the laser, the area for subsequent printing of the grid line is processed, and the original amorphous doping will become local crystalline doping, which increases the local doping concentration and forms different doping states. The wavelength of the modified doping laser used is controlled at 600nm, the laser power is controlled at 250W, the laser processing speed is 30m / s, and the width of the laser modified area 4 acting on the printing grid line area is 110μm;

[0057] S5, using a polishing solution composed of an alkali metal hydroxide and a polishing additive, and utilizing the difference in etching rates of the polishing solution on the crystalline state and the amorphous state, the front side of the N-type silicon substrate 1 can be selectively wet-etched, and the back side of the N-type silicon substrate 1 can be polished;

[0058] S6. After polishing, low-temperature chemical vapor deposition is performed on the back side of the N-type silicon substrate 1 to form a back-side tunneling silicon oxide thin film layer 5 with a thickness of less than 1.5 nm, an intrinsic polysilicon layer with a thickness of 110 nm, and a mask layer with a thickness of 25 nm, wherein the deposition temperature is 600° C.;

[0059] S7, under preset low temperature conditions, low temperature phosphorus diffusion is performed on the back side of the N-type silicon substrate 1 to form a doped polysilicon layer 6, the deposition temperature is 800° C., and the gases used for deposition include oxygen, BCl3, nitrogen, etc., wherein nitrogen is a neutral gas, in order to make the reaction more uniform;

[0060] S8, using a hydrofluoric acid solution to clean and remove the mask layer on the back side of the N-type silicon substrate 1;

[0061] S9, depositing on the front and back sides of the N-type silicon substrate 1 respectively to form a front composite passivation film 7 with a thickness of 80 nm and a back composite passivation film 8 with a thickness of 80 nm, the deposition temperature is 350° C., and the materials used for deposition include TMA, ammonia, silane, nitrogen, laughing gas, etc.;

[0062] S10, printing silver paste in the laser modified area 4, sintering, obtaining the front gate line 9, selectively printing in the laser modified area, sintering to the modified area, forming a good ohmic contact while reducing the metal composite on the front, printing silver paste on the back side of the N-type silicon substrate 1, sintering, obtaining the back gate line 10, completing the preparation of the battery, the structure of the battery is as follows Figure 1 shown.

[0063] In the present invention, the front tunneling oxide layer 2 and the doped amorphous silicon layer 3 together form a front passivation structure.

[0064] Example 2

[0065] This embodiment 2 provides a method for preparing a high-efficiency N-type TOPCon battery, which includes the following specific steps:

[0066] S1, providing an N-type silicon substrate 1, and performing an alkali texturing treatment on the N-type silicon substrate 1 using a KOH solution, thereby forming an anti-reflection texturing structure;

[0067] S2, performing low-temperature chemical vapor deposition on the front side of the N-type silicon substrate 1 after texturing: placing the N-type silicon substrate 1 after texturing in a low-pressure quartz furnace tube, performing chemical vapor deposition on the front side of the N-type silicon substrate 1 at 400° C. using nitrogen, oxygen, and silane to form a front side tunneling silicon oxide thin film layer 2 with a thickness of less than 1.5 nm and an amorphous silicon layer with a thickness of 20 nm;

[0068] S3, performing low-temperature boron diffusion on the front surface of the N-type silicon substrate 1 to form a doped amorphous silicon layer 3; wherein the low-temperature boron diffusion process includes the following steps:

[0069] (1) An N-type silicon substrate 1 with an amorphous silicon layer of a certain thickness deposited on the front side is placed in a quartz boat, and the quartz boat is pushed into a quartz tube of a diffusion furnace with an internal temperature of 700° C.

[0070] (2) introducing O2 at a flow rate of 1000 sccm for pre-oxidation before deposition, and the pre-oxidation time is 500 seconds;

[0071] (3) Raising the temperature to 750° C. and evacuating the furnace with a vacuum pump to make the atmosphere in the quartz furnace tube of the diffusion furnace a low pressure state of less than 100 mbar;

[0072] (4) BCl3 gas with a flow rate of 50 sccm and O2 with a flow rate of 200 sccm were introduced to perform the first boron source deposition for a deposition time of 450 seconds;

[0073] (5) Then, BCl3 gas with a flow rate of 60 sccm and O2 with a flow rate of 300 sccm were introduced to perform a second boron source deposition for 500 seconds;

[0074] (6) Raise the temperature to 850°C and carry out the process of pushing the knot for 500 seconds. After the pushing is completed, introduce 10 liters of N2 and back pressure;

[0075] (7) Cooling down and unloading the boat: When the temperature drops to 750°C, take the quartz boat out of the quartz furnace tube of the diffusion furnace, unload the silicon wafer from the quartz boat, and control the square resistance to 200-600Ω / □

[0076] S4, laser doping is performed on the surface of the low-temperature boron-doped amorphous silicon layer 3 to perform crystalline modification to form a laser modified area 4. Under the action of the laser, the area used for subsequent printing of the grid line is processed, and the original amorphous doping will become local crystalline doping, which increases the local doping concentration and forms different doping states. The wavelength of the modified doping laser used is controlled at 300nm, the laser power is controlled at 50W, the laser processing speed is 15m / s, and the width of the laser modified area 4 acting on the printing grid line area is 50μm;

[0077] S5, using a polishing solution composed of an alkali metal hydroxide and a polishing additive, and utilizing the difference in etching rates of the polishing solution on the crystalline state and the amorphous state, the front side of the N-type silicon substrate 1 can be selectively wet-etched, and the back side of the N-type silicon substrate 1 can be polished;

[0078] S6, after polishing, performing low-temperature chemical vapor deposition on the back side of the N-type silicon substrate 1 to form a back-side tunneling silicon oxide thin film layer 5 with a thickness of less than 1.5 nm, an intrinsic polysilicon layer with a thickness of 45 nm, and a mask layer with a thickness of 5 nm, wherein the deposition temperature is 400° C.;

[0079] S7, under preset low temperature conditions, low temperature phosphorus diffusion is performed on the back side of the N-type silicon substrate 1 to form a doped polysilicon layer 6, the deposition temperature is 700° C., and the gases used for deposition include oxygen, BCl3, nitrogen, etc., wherein nitrogen is a neutral gas, in order to make the reaction more uniform;

[0080] S8, using a hydrofluoric acid solution to clean and remove the mask layer on the back side of the N-type silicon substrate 1;

[0081] S9, depositing on the front and back sides of the N-type silicon substrate 1 respectively to form a front composite passivation film 7 with a thickness of 55 nm and a back composite passivation film 8 with a thickness of 55 nm, the deposition temperature is 210° C., and the materials used for deposition include TMA, ammonia, silane, nitrogen, laughing gas, etc.;

[0082] S10, printing silver paste in the laser modified area 4, sintering to obtain the front gate line 9, selectively printing in the laser modified area, sintering to the modified area, forming a good ohmic contact while reducing the metal composite on the front side, printing silver paste on the back side of the N-type silicon substrate 1, sintering to obtain the back gate line 10, and completing the preparation of the battery.

[0083] Example 3

[0084] This embodiment 3 provides a method for preparing a high-efficiency N-type TOPCon battery, which includes the following specific steps:

[0085] S1, providing an N-type silicon substrate 1, and performing an alkali texturing treatment on the N-type silicon substrate 1 using a NaOH solution, thereby forming an anti-reflection texturing structure;

[0086] S2, performing low-temperature chemical vapor deposition on the front side of the N-type silicon substrate 1 after texturing: placing the N-type silicon substrate 1 after texturing in a low-pressure quartz furnace tube, performing chemical vapor deposition on the front side of the N-type silicon substrate 1 at 680° C. using nitrogen, oxygen, and silane to form a front side tunneling silicon oxide thin film layer 2 with a thickness of less than 1.5 nm and an amorphous silicon layer with a thickness of 95 nm;

[0087] S3, performing low-temperature boron diffusion on the front surface of the N-type silicon substrate 1 to form a doped amorphous silicon layer 3; wherein the low-temperature boron diffusion process includes the following steps:

[0088] (1) An N-type silicon substrate 1 with an amorphous silicon layer of a certain thickness deposited on the front side is placed in a quartz boat, and the quartz boat is pushed into a quartz tube of a diffusion furnace with an internal temperature of 850° C.;

[0089] (2) introducing O2 at a flow rate of 4800 sccm for pre-oxidation before deposition, and the pre-oxidation time is 120 seconds;

[0090] (3) Raising the temperature to 850° C. and evacuating the furnace with a vacuum pump to make the atmosphere in the quartz furnace tube of the diffusion furnace a low pressure state of less than 100 mbar;

[0091] (4) BCl3 gas with a flow rate of 450 sccm and O2 with a flow rate of 1900 sccm were introduced to perform the first boron source deposition for 120 seconds;

[0092] (5) Then, BCl3 gas with a flow rate of 580 sccm and O2 with a flow rate of 3000 sccm were introduced to perform a second boron source deposition for 100 seconds;

[0093] (6) Raise the temperature to 800°C and carry out the process of pushing the knot for 500 seconds. After the pushing is completed, introduce 2 liters of N2 and back pressure;

[0094] (7) Cooling down and unloading the boat: When the temperature drops to 700°C, take the quartz boat out of the quartz furnace tube of the diffusion furnace, unload the silicon wafer from the quartz boat, and control the square resistance to 200-600Ω / □

[0095] S4, laser doping is performed on the surface of the low-temperature boron-doped amorphous silicon layer 3 to perform crystalline modification to form a laser modified area 4. Under the action of the laser, the area for subsequent printing of the grid line is processed, and the original amorphous doping will become local crystalline doping, which increases the local doping concentration and forms different doping states. The wavelength of the modified doping laser used is controlled at 900nm, the laser power is controlled at 450W, the laser processing speed is 50m / s, and the width of the laser modified area 4 acting on the printing grid line area is 200μm;

[0096] S5, using a polishing solution composed of an alkali metal hydroxide and a polishing additive, and utilizing the difference in etching rates of the polishing solution on the crystalline state and the amorphous state, the front side of the N-type silicon substrate 1 can be selectively wet-etched, and the back side of the N-type silicon substrate 1 can be polished;

[0097] S6, after polishing, performing low-temperature chemical vapor deposition on the back side of the N-type silicon substrate 1 to form a back-side tunneling silicon oxide thin film layer 5 with a thickness of less than 1.5 nm, an intrinsic polysilicon layer with a thickness of 180 nm and a mask layer with a thickness of 45 nm, wherein the deposition temperature is 800° C.;

[0098] S7, under preset low temperature conditions, low temperature phosphorus diffusion is performed on the back side of the N-type silicon substrate 1 to form a doped polysilicon layer 6, the deposition temperature is 900° C., and the gases used for deposition include oxygen, BCl3, nitrogen, etc., wherein nitrogen is a neutral gas, in order to make the reaction more uniform;

[0099] S8, using a hydrofluoric acid solution to clean and remove the mask layer on the back side of the N-type silicon substrate 1;

[0100] S9, depositing on the front and back sides of the N-type silicon substrate 1 respectively to form a front composite passivation film 7 with a thickness of 120 nm and a back composite passivation film 8 with a thickness of 120 nm, the deposition temperature is 480° C., and the materials used for deposition include TMA, ammonia, silane, nitrogen, laughing gas, etc.;

[0101] S10, printing silver paste in the laser modified area 4, sintering to obtain the front gate line 9, selectively printing in the laser modified area, sintering to the modified area, forming a good ohmic contact while reducing the metal composite on the front side, printing silver paste on the back side of the N-type silicon substrate 1, sintering to obtain the back gate line 10, and completing the preparation of the battery.

[0102] The difference between the above-mentioned Embodiment 2 and Embodiment 3 and Embodiment 1 lies in the difference in the setting of process parameters.

[0103] In the prior art, the preparation process of N-type batteries is a high-temperature process, and boron diffusion is generally carried out at a high temperature of about 1050°C, which will result in higher costs. However, the present invention optimizes the process and only requires a temperature of 900°C to complete the boron diffusion, which greatly reduces the production cost and is more advantageous than high-temperature boron diffusion. The present invention also makes full use of the passivation performance of poly to produce a tunneling oxide layer and a poly stacked passivation structure on the front side of the battery, thereby reducing metal recombination on the front side and improving battery efficiency.

[0104] The preparation method of the present invention also utilizes laser doping modification to transform the amorphous state into a crystalline state, realizes laser doping in the screen printing area, and reduces the difficulty of ohmic contact in the screen printing area. The present invention utilizes the difference in etching rate between the crystalline state and the amorphous state with an alkaline polishing solution, and also solves the optical parasitic absorption of the front poly well, thereby improving the battery efficiency.

[0105] The above are preferred embodiments of the present invention and are only used to explain the present invention, not to limit the present invention. Any obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A method for preparing a high-efficiency N-type TOPCon battery, characterized in that: The method comprises the following steps: S1, providing an N-type silicon substrate (1), and performing an alkali texturing treatment on the substrate; S2, performing low-temperature chemical vapor deposition on the front side of the textured N-type silicon substrate (1) to form a front tunneling silicon oxide thin film layer (2) and an amorphous silicon layer; S3, performing low-temperature boron diffusion on the front surface of the N-type silicon substrate (1), thereby forming a doped amorphous silicon layer (3); S4, performing laser doping on the surface of the low-temperature boron-doped amorphous silicon layer (3) to perform crystalline modification to form a laser modified area (4); S5, polishing the back side of the N-type silicon substrate (1); S6, after polishing, performing low-temperature chemical vapor deposition on the back side of the N-type silicon substrate (1) to form a back-side tunneling silicon oxide thin film layer (5), an intrinsic polysilicon layer and a mask layer; S7, performing low-temperature phosphorus diffusion on the back side of the N-type silicon substrate (1), thereby forming a doped polysilicon layer (6); S8, cleaning and removing the mask layer on the back side of the N-type silicon substrate (1); S9, depositing on the front and back sides of the N-type silicon substrate (1) respectively to form a front composite passivation film (7) and a back composite passivation film (8); S10, printing silver paste in the laser modified area (4), sintering, obtaining front gate lines (9), printing silver paste on the back side of the N-type silicon substrate (1), sintering, obtaining back gate lines (10), and completing the preparation of the battery.

2. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: Step S2, placing the textured N-type silicon substrate (1) into a low-pressure quartz furnace tube, and performing chemical vapor deposition on the front side of the N-type silicon substrate (1) at 400-700° C. using nitrogen, oxygen, and silane to form a front-side tunneling silicon oxide film layer (2) with a thickness of less than 1.5 nm and an amorphous silicon layer with a thickness of 10-100 nm.

3. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: The low temperature boron diffusion process in step S3 includes the following steps: (1) placing an N-type silicon substrate (1) on the front side of which an amorphous silicon layer of a certain thickness is deposited, into a quartz boat, and pushing the quartz boat into a quartz tube of a diffusion furnace with an internal temperature of 700 to 850° C.; (2) introducing O2 at a flow rate of 1000 to 5000 sccm for pre-oxidation before deposition, and the pre-oxidation time is 100 to 500 seconds; (3) Raising the temperature to 750-850° C. and evacuating the atmosphere with a vacuum pump to make the atmosphere in the diffusion furnace quartz tube a low pressure state of less than 100 mbar; (4) introducing BCl3 gas with a flow rate of 50 to 500 sccm and O2 with a flow rate of 200 to 2000 sccm to perform the first boron source deposition for a deposition time of 100 to 500 seconds; (5) Then, BCl3 gas with a flow rate of 60 to 600 sccm and O2 with a flow rate of 300 to 3000 sccm are introduced to perform a second boron source deposition for a deposition time of 100 to 500 seconds; (6) Raise the temperature to 800-900°C and carry out the process of pushing the knot for 500-2000 seconds. After the pushing is completed, introduce 1-10 liters of N2 and back pressure; (7) Cooling down and unloading the boat: When the temperature drops to 700-800°C, the quartz boat is taken out of the quartz furnace tube of the diffusion furnace, and the silicon wafer is unloaded from the quartz boat. The square resistance is controlled at 200-600Ω / □.

4. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: In step S4, the laser wavelength is controlled to be 300-900 nm, the laser power is 10-500 W, and the laser processing speed is 10-50 m / s.

5. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: In step S5, a polishing solution composed of an alkali metal hydroxide and a polishing additive is used, and the difference in etching rate between the crystalline state and the amorphous state of the polishing solution is utilized to selectively wet etch the front side of the N-type silicon substrate (1) and polish the back side of the N-type silicon substrate (1).

6. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: The deposition temperature in step S6 is 400-800° C., the thickness of the back tunneling silicon oxide film layer (5) is less than 1.5 nm, the thickness of the intrinsic polysilicon layer is 40-180 nm, and the thickness of the mask layer is 5-50 nm.

7. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: The deposition temperature in step S7 is 700-950° C., and the gases used include oxygen, BCl 3 and nitrogen.

8. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: In step S8, a hydrofluoric acid solution is used to clean and remove the mask layer on the back side of the N-type silicon substrate (1).

9. The method for preparing a high-efficiency N-type TOPCon battery according to claim 1, characterized in that: The deposition temperature in step S9 is 200-500° C., the materials used for deposition include TMA, ammonia, silane, nitrogen, and laughing gas, and the thicknesses of the front composite passivation film (7) and the back composite passivation film (8) are 50-120 nm respectively.

10. A high-efficiency N-type TOPCon battery, characterized in that: The battery is prepared by the preparation method described in any one of claims 1 to 9.

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