Terminal structure of semiconductor power device and manufacturing method thereof
Through the introduction of the drift layer and doping concentration in the terminal structure of the semiconductor power device to decrease or increase the extension layer of the doped concentration, the problem of easy breakdown of the device under high pressure, significantly improved its pressure resistance and blocking characteristics.
Patent Information
- Application Number
- CN202411890627.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-20
- Publication Date
- 2025-01-21
- Estimated Expiration
- 2044-12-20
AI Technical Summary
Existing semiconductor power devices are prone to breakdown under high voltage, resulting in insufficient voltage resistance characteristics.
The terminal structure includes the drifting layer and the extension layer. The extension layer has multiple doping areas. The doping concentration is decreasing or increasing along the first scheduled direction to adjust the horizontal and vertical extensions of the surface electric field.
By accurate control of the concentration and thickness of the terminal protection area, reduce surface defects and charge effects, improve the resistance level of semiconductor terminals, and enhance the blocking characteristics of the device.
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Figure CN119342875A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductors, and in particular to a terminal structure of a semiconductor power device, a method for manufacturing the terminal structure of a semiconductor power device, and a semiconductor power device. Background Art
[0002] As a key switching device for weak current to control strong current, power semiconductors have broad application prospects in modern power systems, transportation, aerospace and other fields. However, due to the influence of the surface curvature radius of the semiconductor PN junction, the surface electric field of the PN junction is much larger than the maximum electric field in the body, making the device prone to breakdown on the surface under high voltage. Therefore, high-voltage power devices usually need to be equipped with terminal protection structures to reduce the maximum electric field on the surface, so that the device can break down in the body as much as possible, and the actual breakdown voltage can reach the ideal value of the breakdown voltage in the body as much as possible, thereby improving the device's withstand voltage characteristics.
[0003] Therefore, there is an urgent need for a method to solve the technical problem of how to improve the withstand voltage of semiconductor power devices in the prior art. Summary of the invention
[0004] The main purpose of the present invention is to provide a terminal structure of a semiconductor power device, a method for manufacturing the terminal structure of a semiconductor power device, and a semiconductor power device, so as to solve the problem of how to improve the withstand voltage of the semiconductor power device in the prior art.
[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, a terminal structure of a semiconductor power device is provided, comprising: a drift layer, the conductivity type of the drift layer is a first conductivity type; an epitaxial layer, located on one side of the drift layer, the conductivity type of the epitaxial layer is a second conductivity type, the first conductivity type is different from the second conductivity type, the epitaxial layer comprises a plurality of doping regions, the doping concentrations in the plurality of doping regions decrease or increase along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer.
[0006] Furthermore, the absolute value of the difference between the doping concentrations of any two adjacent doping regions is the same.
[0007] Furthermore, the absolute value of the difference between the doping concentrations of any two adjacent doping regions is different.
[0008] Furthermore, the structure further includes: a substrate layer, located on a side of the drift layer away from the epitaxial layer, and the conductivity type of the substrate layer is the first conductivity type.
[0009] Furthermore, the plurality of doping regions are arranged along a second predetermined direction, wherein the second predetermined direction is perpendicular to the first predetermined direction, and the second predetermined direction is perpendicular to a thickness direction of the epitaxial layer.
[0010] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, a method for manufacturing a terminal structure of a semiconductor power device is provided, comprising: providing a drift layer, wherein the drift layer has a first conductivity type; a forming step, forming a preliminary doping layer on a surface of one side of the drift layer, wherein the preliminary doping layer has a second conductivity type, and the first conductivity type is different from the second conductivity type; a removing step, removing part of the preliminary doping layer to expose part of the drift layer, wherein the removed preliminary doping layer is located in a first predetermined direction of the remaining preliminary doping layer; a repeating step, repeating the forming step and the removing step at least once in sequence, and increasing the doping concentration of the preliminary doping layer in the forming step during the repeating process, or reducing the doping concentration of the preliminary doping layer in the forming step during the repeating process, to form an epitaxial layer, wherein the epitaxial layer includes at least one doping region, and the doping concentration in each of the doping regions decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer.
[0011] Furthermore, the absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is the same.
[0012] Furthermore, the absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is different.
[0013] Furthermore, the method further includes: forming a substrate layer on a side of the drift layer away from the epitaxial layer, wherein the conductivity type of the substrate layer is the first conductivity type.
[0014] According to another aspect of the present invention, a semiconductor power device is provided, comprising any one of the terminal structures of the semiconductor power device or a terminal structure of the semiconductor power device manufactured by any one of the methods for manufacturing the terminal structure of the semiconductor power device.
[0015] The technical solution of the present invention is applied to provide a terminal structure of a semiconductor power device, including a drift layer and an epitaxial layer, the conductivity type of the drift layer is a first conductivity type; the epitaxial layer is located on one side of the drift layer, the conductivity type of the epitaxial layer is a second conductivity type, the first conductivity type is different from the second conductivity type, and the epitaxial layer includes a plurality of doping regions, the doping concentration in each doping region decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer. The doping concentration in the above-mentioned plurality of doping regions is gradually changed laterally, which can adjust the lateral and longitudinal expansion of the surface electric field, so that the concentration and thickness of the junction terminal protection zone are more accurately controlled, and the generation of surface defects is reduced, which can greatly improve the withstand voltage level of the semiconductor terminal, reduce the influence of the surface charge on the withstand voltage level of the device, and alleviate the electric field concentration effect of the semiconductor device terminal, thereby improving the blocking characteristics of the device. And effectively reduce the influence of the interface charge on the blocking characteristics of the device, effectively improve the surface electric field concentration effect, and then improve the withstand voltage of the power device, solving the technical problem of how to improve the withstand voltage of the semiconductor power device in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:
[0017] Figure 1 A schematic diagram showing a terminal structure of a semiconductor power device in the prior art is shown;
[0018] Figure 2 A schematic diagram showing a terminal structure of a semiconductor power device provided according to an embodiment of the present invention is shown;
[0019] Figure 3 A schematic diagram showing a change in doping concentration of a doping region of a terminal structure of a semiconductor power device provided in an embodiment of the present invention is shown;
[0020] Figure 4 A schematic diagram showing a change in doping concentration of a doping region of a terminal structure of another semiconductor power device provided according to an embodiment of the present invention;
[0021] Figure 5 A schematic structural diagram of another terminal structure of a semiconductor power device provided according to an embodiment of the present invention is shown;
[0022] Figure 6 A top view of another terminal structure of a semiconductor power device provided according to an embodiment of the present invention is shown;
[0023] Figure 7A schematic flow chart of a method for manufacturing a terminal structure of a semiconductor power device provided in accordance with an embodiment of the present invention is shown;
[0024] Figure 8 A schematic diagram of a process for manufacturing an epitaxial layer according to an embodiment of the present invention is shown;
[0025] Fig. 9 A schematic diagram showing the relationship between the doping concentration of an epitaxial layer and the gas flow rate of a semiconductor power device provided according to an embodiment of the present invention is shown.
[0026] The above drawings include the following reference numerals:
[0027] 10. cathode layer; 20. depletion region boundary; 30. anode layer; 40. main junction; 50. junction terminal extension layer; 100. drift layer; 200. epitaxial layer; 201. doping region; D1. first predetermined direction; 300. substrate layer; D2. second predetermined direction; 202. first preliminary epitaxial layer; 203. second preliminary epitaxial layer. DETAILED DESCRIPTION
[0028] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.
[0029] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so as to describe the embodiments of the present invention described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0031] In the prior art, the terminal structure of the semiconductor usually adopts some special structures to reduce the surface electric field, so as to alleviate the influence of the bending of the PN junction at the edge of the active area, and enhance the anti-charge ability, so that the electric field distribution is similar to the distribution of the ideal parallel plane junction. Junction terminal extension technology is currently the most promising terminal technology. The use of junction terminal extension technology mainly includes a junction terminal extension structure with a gradual change in doping concentration. Figure 1 As shown, the structure includes a cathode layer 10, an anode layer 30, a main junction 40 and a junction terminal extension layer 50. When a large reverse bias voltage is applied to the main junction, the main junction will have a large area depletion region on the side of the low-doped region. When the main junction and the depletion region of the terminal extension structure are combined together, a larger depletion region boundary 20 can be generated. However, the junction terminal extension technology is very sensitive to the doping concentration, and the process of forming the terminal structure by the existing ion implantation technology is difficult and complicated. In addition, the formation process of the existing ion implantation technology will produce defects, and the presence of defect charges will reduce the breakdown voltage of the terminal and reduce the semiconductor yield.
[0032] To solve the above problems, the embodiments of the present application provide a terminal structure of a semiconductor power device, a method for manufacturing a terminal structure of a semiconductor power device, and a semiconductor power device, such as Figure 2 As shown, including:
[0033] A drift layer 100, wherein the conductivity type of the drift layer 100 is a first conductivity type;
[0034] Specifically, the first conductivity type can be P-type or N-type. The drift layer is located between the source and drain of the device, and its main function is to provide a high resistivity region so that a large voltage drop can be generated in the region when the device is working. In this way, the device can maintain low power consumption when subjected to high voltage. The drift layer can be made of high resistivity semiconductor materials, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide.
[0035] The epitaxial layer 200 is located on one side of the drift layer 100. The conductivity type of the epitaxial layer 200 is the second conductivity type. The first conductivity type is different from the second conductivity type. The epitaxial layer 200 includes a plurality of doping regions 201. The doping concentration in the plurality of doping regions 201 decreases or increases along a first predetermined direction D1. The first predetermined direction D1 is perpendicular to the thickness direction of the epitaxial layer 200.
[0036] Specifically, when the first conductivity type is N-type, the second conductivity type is P-type; when the first conductivity type is P-type, the second conductivity type is N-type. The above-mentioned epitaxial layer can be made of high-resistivity semiconductor materials, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide. The above-mentioned first predetermined direction is parallel to the direction of the surface of the epitaxial layer. The doping concentration in a doping region can be constant, or it can decrease or increase along the first predetermined direction, and the change trend is the same as that of multiple doping regions. In the case where the doping concentration in the doping region increases or decreases, compared with the case where the doping concentration of a doping region remains unchanged, the doping concentration difference between two adjacent doping regions can be reduced, thereby further improving the accuracy of the lateral gradient of the epitaxial layer.
[0037] In the above embodiment, a terminal structure of a semiconductor power device is provided, including a drift layer and an epitaxial layer, the conductivity type of the drift layer is a first conductivity type; the epitaxial layer is located on one side of the drift layer, the conductivity type of the epitaxial layer is a second conductivity type, the first conductivity type is different from the second conductivity type, and the epitaxial layer includes a plurality of doping regions, the doping concentration in each doping region decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer. The doping concentration in the above multiple doping regions is gradually changed laterally, which can adjust the lateral and longitudinal expansion of the surface electric field, so that the concentration and thickness of the junction terminal protection area are more accurately controlled, and the generation of surface defects is reduced, which can greatly improve the withstand voltage level of the semiconductor terminal, reduce the influence of the surface charge on the withstand voltage level of the device, and alleviate the electric field concentration effect of the semiconductor device terminal, thereby improving the blocking characteristics of the device. And effectively reduce the influence of the interface charge on the blocking characteristics of the device, effectively improve the surface electric field concentration effect, and then improve the withstand voltage of the power device, solving the technical problem of how to improve the withstand voltage of the semiconductor power device in the prior art.
[0038] In order to further improve the withstand voltage effect of the semiconductor power device, in some optional embodiments, the absolute value of the difference between the doping concentrations of any two adjacent doping regions is the same.
[0039] Specifically, the doping concentration of the doping region varies as follows Figure 3 As shown, the doping concentration of the doping region changes linearly, that is, the absolute value of the difference in doping concentration between any two adjacent doping regions is the same. In practical applications, the cross-sectional areas of each doping region along the first predetermined direction can be the same or different. The doping materials of each doping region can be the same or different. Moreover, the doping region with linear doping concentration change can be realized by repeating the epitaxial step and the etching step. In addition, the doping concentration of the doping region can be as follows: Figure 3 The value shown decreases along the first predetermined direction, and may also increase along the first predetermined direction.
[0040] In some optional embodiments, the absolute value of the difference between the doping concentrations of any two adjacent doping regions is different. The above structural arrangement can further enhance the withstand voltage effect of the semiconductor power device.
[0041] Specifically, the doping concentration of the doping region varies as follows Figure 4 As shown, the doping concentration variation of the doping region is nonlinear, that is, the absolute value of the difference in doping concentration between any two adjacent doping regions is different. In practical applications, the cross-sectional areas of each doping region along the first predetermined direction may be the same or different. The doping materials of each doping region may be the same or different. Furthermore, the doping region with linear variation of doping concentration can be realized by controlling epitaxial growth conditions such as gas component ratio, temperature, gas flow rate, etc. In addition, the doping concentration of the doping region may be as follows: Figure 4 The value shown decreases along the first predetermined direction, and may also increase along the first predetermined direction.
[0042] In some other optional embodiments, Figure 5 As shown, the structure further includes: a substrate layer 300, which is located on a side of the drift layer 100 away from the epitaxial layer 200, and the conductivity type of the substrate layer 300 is the first conductivity type. The epitaxial layer 200 includes a plurality of doping regions 201, and the doping concentration in each of the doping regions 201 decreases or increases along a first predetermined direction D1, and the first predetermined direction D1 is perpendicular to the thickness direction of the epitaxial layer 200. The above structure can further improve the structural stability of the terminal structure of the above semiconductor power device.
[0043] Specifically, the conductivity type of the substrate layer is the same as the conductivity type of the drift layer. The present application does not limit the thickness of the substrate layer, and those skilled in the art can set it according to actual conditions. In a specific embodiment, the thickness of the substrate can be 0. The substrate layer can be made of a semiconductor material with high resistivity, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide.
[0044] In some optional embodiments, Figure 6 As shown, the plurality of doped regions are arranged along a second predetermined direction D2, wherein the second predetermined direction D2 is perpendicular to the first predetermined direction, and the second predetermined direction D2 is perpendicular to the thickness direction of the epitaxial layer. The above structural arrangement can further improve the withstand voltage effect of the semiconductor power device in the first predetermined direction and the second predetermined direction D2 at the same time.
[0045] Specifically, the doping concentration in one doping region may be constant, or may decrease or increase along the second predetermined direction, and the change trend is the same as that of the multiple doping regions.
[0046] According to the embodiments of the present application, Figure 7 As shown, a method for manufacturing a terminal structure of a semiconductor power device is also provided, comprising:
[0047] Step S401, providing a drift layer, wherein the drift layer has a first conductivity type;
[0048] Specifically, the first conductivity type can be P-type or N-type. The drift layer is located between the source and drain of the device, and its main function is to provide a high resistivity region so that a large voltage drop can be generated in the region when the device is working. In this way, the device can maintain low power consumption when subjected to high voltage. The drift layer can be made of high resistivity semiconductor materials, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide.
[0049] Step S402, a forming step, forming a preliminary doped layer on a surface of one side of the drift layer, wherein the preliminary doped layer has a second conductivity type, and the first conductivity type is different from the second conductivity type;
[0050] Specifically, when the first conductivity type is N-type, the second conductivity type is P-type; when the first conductivity type is P-type, the second conductivity type is N-type. In the process of forming the preliminary doping layer, a suitable gas flow rate and ratio can be selected for growth according to actual conditions. The preliminary doping layer can be made of a semiconductor material with high resistivity, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide. The above-mentioned first predetermined direction is parallel to the direction of the surface of the epitaxial layer.
[0051] Step S403, a removal step, removing part of the preliminary doping layer to expose part of the drift layer, wherein the removed preliminary doping layer is located in a first predetermined direction of the remaining preliminary doping layer;
[0052] Specifically, in the process of removing the above-mentioned preliminary doping layer, all the removed portions are located on one side of the portion that is not removed.
[0053] Step S404, repeating the step, repeating the forming step and the removing step at least once in sequence, and increasing the doping concentration of the preliminary doping layer in the forming step during the repeating process, or reducing the doping concentration of the preliminary doping layer in the forming step during the repeating process, thereby forming an epitaxial layer, the epitaxial layer comprising at least one doping region, the doping concentration in each of the doping regions decreasing or increasing along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer.
[0054] Specifically, in the repeated process, in each removal step, the first predetermined direction is the same. The doping concentration in a doping region may be constant, or may decrease or increase along the first predetermined direction, and the change trend of multiple doping regions is the same. Figure 8 As shown, first, a substrate layer 300, an epitaxial layer 200 and a first preliminary epitaxial layer 202 are stacked in sequence, a portion of the first preliminary epitaxial layer 202 is removed by etching, and the remaining first preliminary epitaxial layer 202 forms a doping region 201, and a second preliminary epitaxial layer 203 is formed on the exposed surface of the doping region 201 and the drift region 100, and the doping concentration of the second preliminary epitaxial layer 203 is greater than the doping concentration of the doping region 201 or less than the doping concentration of the doping region 201. Part of the second preliminary epitaxial layer 203 is removed, and the remaining second preliminary epitaxial layer 203 forms another doping region 201. The above-mentioned etching removal and epitaxy steps are continuously repeated, and finally the following is obtained. Figure 5 The structure shown.
[0055] In the above embodiment, a method for manufacturing a terminal structure of a semiconductor power device is provided, first, a drift layer is provided, the drift layer has a first conductivity type; a forming step is performed to form a preliminary doping layer on a surface of one side of the drift layer, the preliminary doping layer has a second conductivity type, and the first conductivity type is different from the second conductivity type; a removing step is performed to remove part of the preliminary doping layer to expose part of the drift layer, wherein the removed preliminary doping layer is located in a first predetermined direction of the remaining preliminary doping layer; the forming step and the removing step are repeated at least once in sequence, and the doping concentration of the preliminary doping layer in the forming step is increased during the repeated process, or the doping concentration of the preliminary doping layer in the forming step is reduced during the repeated process, to form an epitaxial layer, the epitaxial layer includes at least one doping region, the doping concentration in each doping region decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer. By repeatedly using epitaxial growth technology and etching technology to dope the terminal protection zone, the lateral and longitudinal expansion of the surface electric field can be adjusted, so that the concentration and thickness of the junction terminal protection zone can be more accurately controlled, and the generation of surface defects can be reduced. The influence of surface charge on the device's withstand voltage level can be reduced, and the electric field concentration effect at the terminal of the semiconductor device can be alleviated, thereby improving the blocking characteristics of the device, thereby improving the withstand voltage of the power device, and solving the technical problem of how to improve the withstand voltage of semiconductor power devices in the prior art.
[0056] In order to further improve the withstand voltage effect of the semiconductor power device, in some optional embodiments, the absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is the same.
[0057] Specifically, the doping concentration of the doping region varies as follows Figure 3As shown, the doping concentration of the doping region changes linearly, that is, the absolute value of the difference in doping concentration between any two adjacent doping regions is the same. In practical applications, the cross-sectional areas of each doping region along the first predetermined direction can be the same or different. The doping materials of each doping region can be the same or different. Moreover, the doping region with linear doping concentration change can be realized by repeating the epitaxial step and the etching step. In addition, the doping concentration of the doping region can be as follows: Figure 3 The value shown decreases along the first predetermined direction, and may also increase along the first predetermined direction.
[0058] In some further optional embodiments, the absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is different. The above method can further improve the withstand voltage effect of the semiconductor power device.
[0059] Specifically, the doping concentration of the doping region varies as follows Figure 4 As shown, the doping concentration of the doping region changes nonlinearly, that is, the absolute value of the difference between the doping concentrations of any two adjacent doping regions is different. In practical applications, the cross-sectional areas of each doping region along the first predetermined direction may be the same or different. The doping materials of each doping region may be the same or different.
[0060] Furthermore, the doping concentration of the doping region with linear variation can be realized by controlling the epitaxial growth conditions such as gas component ratio, temperature, gas flow rate, etc. In addition, the doping concentration of the doping region can be as follows: Figure 4 It can be shown as decreasing along the first predetermined direction, or it can be shown as increasing along the first predetermined direction. When the doping concentration of the doping region presents a linear or nonlinear gradient along the first predetermined direction, its formation method can also include the following steps: selecting the growth furnace support to be fixed and not rotated, or rotating at a very small angular velocity; according to the influence of the introduction ratio, temperature, and flow rate of different component gases in the growth furnace on the growth doping concentration, determine the epitaxial growth conditions: gas component ratio, temperature, and gas flow rate. Among them, the schematic diagram of the relationship between doping concentration and gas flow rate, as shown in FIG. Fig. 9 shown.
[0061] In some other optional embodiments, the method further comprises: step S405, forming a substrate layer on a side of the drift layer away from the epitaxial layer, wherein the conductivity type of the substrate layer is the first conductivity type. The above method can further improve the structural stability of the terminal structure of the above semiconductor power device.
[0062] Specifically, the conductivity type of the substrate layer is the same as the conductivity type of the drift layer. The present application does not limit the thickness of the substrate layer, and those skilled in the art can set it according to actual conditions. In a specific embodiment, the thickness of the substrate can be 0. The substrate layer can be made of a semiconductor material with high resistivity, such as at least one of silicon, silicon carbide, gallium nitride and gallium arsenide.
[0063] According to an embodiment of the present application, a semiconductor power device is also provided, comprising any one of the terminal structures of the semiconductor power device or a terminal structure of the semiconductor power device manufactured by any one of the methods for manufacturing the terminal structure of the semiconductor power device.
[0064] Specifically, the chip of a semiconductor power device is mainly composed of two parts: one part is called the active area, which is used to turn on and off the current when the power semiconductor device is forward conducted; the other part is the above-mentioned terminal structure, which is used to jointly bear the blocking voltage of the power semiconductor device with the active area when the power semiconductor device is in reverse blocking.
[0065] From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:
[0066] 1) The terminal structure of the semiconductor power device of the present application includes a drift layer and an epitaxial layer, the conductivity type of the drift layer is a first conductivity type; the epitaxial layer is located on one side of the drift layer, the conductivity type of the epitaxial layer is a second conductivity type, the first conductivity type is different from the second conductivity type, and the epitaxial layer includes multiple doping regions, the doping concentration in each doping region decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer. The doping concentration in the above-mentioned multiple doping regions is gradually changed laterally, which can adjust the lateral and longitudinal expansion of the surface electric field, so that the concentration and thickness of the junction terminal protection area can be more accurately controlled, and the generation of surface defects can be reduced, which can greatly improve the withstand voltage level of the semiconductor terminal, reduce the influence of the surface charge on the withstand voltage level of the device, and alleviate the electric field concentration effect of the semiconductor device terminal, thereby improving the blocking characteristics of the device. And effectively reduce the influence of the interface charge on the blocking characteristics of the device, effectively improve the surface electric field concentration effect, and then improve the withstand voltage of the power device, solving the technical problem of how to improve the withstand voltage of the semiconductor power device in the prior art.
[0067] 2) A method for manufacturing a terminal structure of a semiconductor power device of the present application comprises the following steps: first, providing a drift layer, wherein the drift layer has a first conductivity type; forming a preliminary doping layer on a surface of one side of the drift layer, wherein the preliminary doping layer has a second conductivity type, and the first conductivity type is different from the second conductivity type; removing a portion of the preliminary doping layer to expose a portion of the drift layer, wherein the removed preliminary doping layer is located in a first predetermined direction of the remaining preliminary doping layer; repeating the forming step and the removing step at least once in sequence, and increasing the doping concentration of the preliminary doping layer in the forming step during the repetition process, or reducing the doping concentration of the preliminary doping layer in the forming step during the repetition process, to form an epitaxial layer, wherein the epitaxial layer includes at least one doping region, and the doping concentration in each doping region decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer. By repeatedly using epitaxial growth technology and etching technology to dope the terminal protection zone, the lateral and longitudinal expansion of the surface electric field can be adjusted, so that the concentration and thickness of the junction terminal protection zone can be more accurately controlled, and the generation of surface defects can be reduced. The influence of surface charge on the device's withstand voltage level can be reduced, and the electric field concentration effect at the terminal of the semiconductor device can be alleviated, thereby improving the blocking characteristics of the device, thereby improving the withstand voltage of the power device, and solving the technical problem of how to improve the withstand voltage of semiconductor power devices in the prior art.
[0068] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A terminal structure of a semiconductor power device, characterized in that: include: a drift layer, wherein the conductivity type of the drift layer is a first conductivity type; An epitaxial layer is located on one side of the drift layer, the conductivity type of the epitaxial layer is a second conductivity type, the first conductivity type is different from the second conductivity type, the epitaxial layer includes a plurality of doping regions, the doping concentrations in the plurality of doping regions decrease or increase along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer.
2. The terminal structure of the semiconductor power device according to claim 1, characterized in that: The absolute value of the difference between the doping concentrations of any two adjacent doping regions is the same.
3. The terminal structure of the semiconductor power device according to claim 1, characterized in that: The absolute value of the difference between the doping concentrations of any two adjacent doping regions is different.
4. The terminal structure of the semiconductor power device according to claim 1, characterized in that: The structure also includes: A substrate layer is located at a side of the drift layer away from the epitaxial layer, and the conductivity type of the substrate layer is the first conductivity type.
5. The terminal structure of the semiconductor power device according to claim 1, characterized in that: The plurality of doping regions are arranged along a second predetermined direction, wherein the second predetermined direction is perpendicular to the first predetermined direction, and the second predetermined direction is perpendicular to a thickness direction of the epitaxial layer.
6. A method for manufacturing a terminal structure of a semiconductor power device, characterized in that: include: providing a drift layer, wherein the drift layer has a first conductivity type; forming a preliminary doping layer on a surface of one side of the drift layer, wherein the preliminary doping layer has a second conductivity type, and the first conductivity type is different from the second conductivity type; a removing step of removing a portion of the preliminary doping layer to expose a portion of the drift layer, wherein the removed preliminary doping layer is located in a first predetermined direction of the remaining preliminary doping layer; Repeating step, repeating the forming step and the removing step at least once in sequence, and increasing the doping concentration of the preliminary doping layer in the forming step during the repeating process, or reducing the doping concentration of the preliminary doping layer in the forming step during the repeating process, to form an epitaxial layer, wherein the epitaxial layer includes at least one doping region, and the doping concentration in each of the doping regions decreases or increases along a first predetermined direction, and the first predetermined direction is perpendicular to the thickness direction of the epitaxial layer.
7. The method according to claim 6, characterized in that The absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is the same.
8. The method according to claim 6, characterized in that The absolute value of the difference between the doping concentrations of the preliminary doping layer in two adjacent repetition processes is different.
9. The method according to claim 6, characterized in that The method further comprises: A substrate layer is formed on a side of the drift layer away from the epitaxial layer, wherein the conductivity type of the substrate layer is the first conductivity type.
10. A semiconductor power device, characterized in that: A terminal structure of a semiconductor power device comprising the terminal structure of a semiconductor power device as described in any one of claims 1 to 5 or a terminal structure of a semiconductor power device manufactured by the method for manufacturing the terminal structure of a semiconductor power device as described in any one of claims 6 to 9.
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