Semiconductor multilayer epitaxial wafer material and preparation method thereof

Abstract

The invention discloses a semiconductor multilayer epitaxial wafer material and a preparation method thereof, and relates to the technical field of semiconductor materials, the semiconductor multilayer epitaxial wafer material comprises a substrate, and the substrate is sequentially provided with a buffer layer, a first multi-element co-doped epitaxial layer, a second multi-element co-doped epitaxial layer and a silicon carbide epitaxial layer; the first multi-element co-doped epitaxial layer is a rare earth, Ga, N and Te co-doped epitaxial layer; and the second multi-element co-doped epitaxial layer is an N and In co-doped epitaxial layer. The semiconductor multilayer epitaxial wafer material disclosed by the invention is low in leakage current and starting voltage and high in breakdown voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor materials, and in particular to a semiconductor multilayer epitaxial wafer material and a preparation method thereof. Background Art

[0002] Semiconductor silicon carbide epitaxial wafer material is a third-generation semiconductor material with the advantages of wide bandgap, high thermal conductivity, high critical breakdown field strength and high carrier saturation velocity. It can be widely used to make high-temperature, high-frequency, high-voltage high-power devices. It has incomparable advantages over traditional silicon materials in new energy vehicles and military industry. It is the core of new energy vehicles, new generation radars, and satellite communications. It has important application value and broad development prospects, and has become the focus of attention in the development of the semiconductor industry today.

[0003] At present, semiconductor silicon carbide epitaxial wafer materials are usually grown epitaxially on substrates. Since the stacking fault energy of silicon carbide crystals is low, stacking fault defects are more likely to form inside the material during the crystal growth and epitaxy process. Epitaxial stacking fault defects will become leakage channels for silicon carbide power devices, causing a significant increase in leakage current and a reduction in reverse withstand voltage by more than 20%. Too many of these epitaxial defects may even directly lead to device scrapping. In addition, semiconductor silicon carbide epitaxial wafer materials on the market have more or less major defects such as lattice mismatch, thermal mismatch, crystal dislocation, stacking fault, many defects, and low quality.

[0004] In order to solve the above technical problems, the Chinese invention patent with application publication number CN118676188A discloses a silicon carbide epitaxial wafer, a preparation method and a semiconductor device, wherein the silicon carbide epitaxial wafer includes a silicon carbide substrate, and a buffer layer, a first epitaxial layer, a second epitaxial layer, a third epitaxial layer, a fourth epitaxial layer and a fifth epitaxial layer sequentially arranged on the silicon carbide substrate; the fourth epitaxial layer is injected with fluorine. The silicon carbide epitaxial wafer provided by the invention depletes the electrons in the fourth epitaxial layer by injecting fluorine into the fourth epitaxial layer, thereby forming a buried layer structure to avoid contamination by Al ions and avoid an increase in device leakage current. However, the leakage current and turn-on voltage of the epitaxial wafer need to be further reduced, and the breakdown voltage needs to be further increased.

[0005] It can be seen that it is necessary to seek more effective epitaxial structures and process methods to prepare a semiconductor multilayer epitaxial wafer material with low leakage current and turn-on voltage and high breakdown voltage. Summary of the invention

[0006] In order to overcome the defects in the prior art, the present invention provides a semiconductor multilayer epitaxial wafer material with low leakage current and turn-on voltage and high breakdown voltage and a preparation method thereof.

[0007] The technical solution adopted by the present invention to solve the technical problem is: a semiconductor multi-layer epitaxial wafer material, including a substrate, on which a buffer layer, a first multi-component co-doped epitaxial layer, a second multi-component co-doped epitaxial layer and a silicon carbide epitaxial layer are arranged in sequence; the first multi-component co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multi-component co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0008] Preferably, the rare earth doping concentration in the first multi-element co-doped epitaxial layer is 1×10 10 atoms / cm 3 -5×10 11 atoms / cm 3 ; The doping concentration of Ga is 2×10 11 atoms / cm 3 -4×10 12 atoms / cm 3 ; The doping concentration of N is 1×10 16 atoms / cm 3 -5×10 19 atoms / cm 3 ; The doping concentration of Te is 1×10 8 atoms / cm 3 -5×10 9 atoms / cm 3 .

[0009] Preferably, the rare earth is any one of lanthanum, cerium and praseodymium.

[0010] Preferably, the doping concentration of N in the second multi-element co-doped epitaxial layer is 1×10 14 atoms / cm 3 -5×10 15 atoms / cm 3 ; The doping concentration of In is 1×10 8 atoms / cm 3 -8×10 9 atoms / cm 3 .

[0011] Preferably, the substrate is a silicon carbide substrate; the thickness of the substrate is 300-1000 μm.

[0012] Preferably, the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1-2 μm.

[0013] Preferably, the first multinary co-doped epitaxial layer is a first multinary co-doped silicon carbide epitaxial layer, the thickness of the first multinary co-doped epitaxial layer is 0.5-2.5 μm, the second multinary co-doped epitaxial layer is a second multinary co-doped silicon carbide epitaxial layer, the thickness of the second multinary co-doped epitaxial layer is 1-3 μm, and the thickness of the silicon carbide epitaxial layer is 1-5 μm.

[0014] Another object of the present invention is to provide a method for preparing the semiconductor multilayer epitaxial wafer material, comprising the following steps:

[0015] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0016] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0017] Preferably, the etching temperature in step S1 is 1580-1700° C., and the etching time is 5-12 min.

[0018] Preferably, the etching in step S1 is performed in a hydrogen atmosphere; the flow rate of hydrogen during the etching process is 80 to 220 slm; and the etching pressure is 40 to 150 mbar.

[0019] Preferably, during the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is (0.2-0.4):1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.4-0.6):1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.4-0.6):1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.8-1.2):1.

[0020] Preferably, the silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding gas-phase halides or organic compounds; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0021] Preferably, the growth temperature of the buffer layer in step S2 is 1600-1700°C, and the growth pressure is 40-120mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1620-1690°C, and the growth pressure is 60-110mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1620-1680°C, and the growth pressure is 60-100mbar; the growth temperature of the silicon carbide epitaxial layer is 1600-1650°C, and the growth pressure is 50-100mbar.

[0022] The beneficial effects of adopting the above technical solution are:

[0023] (1) The method for preparing the semiconductor multilayer epitaxial wafer material provided by the present invention has a simple process, convenient operation and control, high preparation efficiency and finished product qualification rate, low dependence on equipment, stable industrial production, and high promotion and application value.

[0024] (2) The semiconductor multilayer epitaxial wafer material provided by the present invention includes a substrate, on which a buffer layer, a first multi-element co-doped epitaxial layer, a second multi-element co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multi-element co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multi-element co-doped epitaxial layer is an N, In co-doped epitaxial layer. Through the design of the above-mentioned epitaxial structure, the leakage current and turn-on voltage of the manufactured epitaxial wafer material are low, and the breakdown voltage is high; through the setting of the epitaxial layer co-doped with multiple elements, the leakage current of the silicon carbide epitaxial wafer can be significantly reduced, which is beneficial to improving the performance of the silicon carbide epitaxial wafer. The setting of the undoped silicon carbide buffer layer enables the epitaxial layer to better transition from the silicon carbide substrate to the epitaxial layer, thereby reducing epitaxial defects and improving the quality of the epitaxial layer.

[0025] (3) The semiconductor multilayer epitaxial wafer material provided by the present invention can improve the quality of the epitaxial wafer material, further reduce the leakage current and the turn-on voltage, improve the breakdown resistance, effectively reduce the yield loss of the chip prepared therefrom, and further improve the preparation efficiency. DETAILED DESCRIPTION

[0026] In order to make the technical solution of the present invention better understood by the technical personnel in the field, and to make the above-mentioned features, purposes and advantages of the present invention more clearly understood, the present invention is further described below in conjunction with the embodiments. The embodiments are only used to illustrate the present invention and are not used to limit the scope of the present invention.

[0027] Example 1

[0028] A semiconductor multilayer epitaxial wafer material comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0029] The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 1×10 10 atoms / cm 3 ; The doping concentration of Ga is 2×10 11 atoms / cm 3 ; The doping concentration of N is 1×10 16 atoms / cm 3 ; The doping concentration of Te is 1×10 8 atoms / cm 3 The rare earth is lanthanum; the doping concentration of N in the second multi-element co-doped epitaxial layer is 1×10 14 atoms / cm 3 ; The doping concentration of In is 1×10 8 atoms / cm 3 .

[0030] The substrate is a silicon carbide substrate; the thickness of the substrate is 300 μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1 μm; the first multi-component co-doped epitaxial layer is a first multi-component co-doped silicon carbide epitaxial layer, the thickness of the first multi-component co-doped epitaxial layer is 0.5 μm, the second multi-component co-doped epitaxial layer is a second multi-component co-doped silicon carbide epitaxial layer, the thickness of the second multi-component co-doped epitaxial layer is 1 μm, and the thickness of the silicon carbide epitaxial layer is 1 μm.

[0031] A method for preparing the semiconductor multilayer epitaxial wafer material comprises the following steps:

[0032] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0033] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0034] The etching temperature in step S1 is 1580° C., and the etching time is 5 min. The etching in step S1 is performed in a hydrogen atmosphere. The flow rate of hydrogen during the etching process is 80 slm. The etching pressure is 40 mbar.

[0035] During the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is 0.2:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.4:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.4:1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.8:1.

[0036] The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding gas-phase halides; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0037] In step S2, the growth temperature of the buffer layer is 1600°C, and the growth pressure is 40 mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1620°C, and the growth pressure is 60 mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1620°C, and the growth pressure is 60 mbar; the growth temperature of the silicon carbide epitaxial layer is 1600°C, and the growth pressure is 50 mbar.

[0038] Example 2

[0039] A semiconductor multilayer epitaxial wafer material comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0040] The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 4×10 10 atoms / cm 3 ; The doping concentration of Ga is 5×10 11 atoms / cm 3 ; The doping concentration of N is 8×10 16 atoms / cm 3 ; The doping concentration of Te is 5×10 8 atoms / cm 3 ; The rare earth is cerium; The doping concentration of N in the second multi-element co-doped epitaxial layer is 6×10 14 atoms / cm 3 ; The doping concentration of In is 7×10 8 atoms / cm 3 .

[0041] The substrate is a silicon carbide substrate; the thickness of the substrate is 500μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1.2μm; the first multi-component co-doped epitaxial layer is a first multi-component co-doped silicon carbide epitaxial layer, the thickness of the first multi-component co-doped epitaxial layer is 1.5μm, the second multi-component co-doped epitaxial layer is a second multi-component co-doped silicon carbide epitaxial layer, the thickness of the second multi-component co-doped epitaxial layer is 1.5μm, and the thickness of the silicon carbide epitaxial layer is 2μm.

[0042] A method for preparing the semiconductor multilayer epitaxial wafer material comprises the following steps:

[0043] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0044] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0045] The etching temperature in step S1 is 1620° C., and the etching time is 7 min. The etching in step S1 is performed in a hydrogen atmosphere. The flow rate of hydrogen during the etching process is 120 slm. The etching pressure is 70 mbar.

[0046] During the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is 0.25:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.45:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.45:1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.9:1.

[0047] The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding organic compounds; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0048] In step S2, the growth temperature of the buffer layer is 1630°C, and the growth pressure is 60mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1640°C, and the growth pressure is 80mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1640°C, and the growth pressure is 70mbar; the growth temperature of the silicon carbide epitaxial layer is 1630°C, and the growth pressure is 60mbar.

[0049] Example 3

[0050] A semiconductor multilayer epitaxial wafer material comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0051] The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 1×10 11 atoms / cm 3 ; The doping concentration of Ga is 1×10 12 atoms / cm 3 ; The doping concentration of N is 8×10 18 atoms / cm 3 ; The doping concentration of Te is 1×10 9 atoms / cm 3 The rare earth is praseodymium; the doping concentration of N in the second multi-element co-doped epitaxial layer is 1×10 15 atoms / cm 3 ; The doping concentration of In is 2×10 9 atoms / cm 3 .

[0052] The substrate is a silicon carbide substrate; the thickness of the substrate is 600μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1.5μm; the first multi-component co-doped epitaxial layer is a first multi-component co-doped silicon carbide epitaxial layer, the thickness of the first multi-component co-doped epitaxial layer is 1.5μm, the second multi-component co-doped epitaxial layer is a second multi-component co-doped silicon carbide epitaxial layer, the thickness of the second multi-component co-doped epitaxial layer is 2μm, and the thickness of the silicon carbide epitaxial layer is 3.5μm.

[0053] A method for preparing the semiconductor multilayer epitaxial wafer material comprises the following steps:

[0054] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0055] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0056] The etching temperature in step S1 is 1630° C., and the etching time is 9 min. The etching in step S1 is performed in a hydrogen atmosphere. The flow rate of hydrogen during the etching process is 170 slm. The etching pressure is 110 mbar.

[0057] During the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is 0.3:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.5:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.5:1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 1:1.

[0058] The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding gas-phase halides; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0059] The growth temperature of the buffer layer in step S2 is 1650°C, and the growth pressure is 90 mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1660°C, and the growth pressure is 90 mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1650°C, and the growth pressure is 80 mbar; the growth temperature of the silicon carbide epitaxial layer is 1630°C, and the growth pressure is 75 mbar.

[0060] Example 4

[0061] A semiconductor multilayer epitaxial wafer material comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0062] The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 4×10 11 atoms / cm 3 ; The doping concentration of Ga is 3×10 12 atoms / cm 3 ; The doping concentration of N is 4×10 19 atoms / cm 3 ; The doping concentration of Te is 4×10 9 atoms / cm 3 The rare earth is lanthanum; the doping concentration of N in the second multi-element co-doped epitaxial layer is 4×10 15 atoms / cm 3 ; The doping concentration of In is 7×10 9 atoms / cm 3 .

[0063] The substrate is a silicon carbide substrate; the thickness of the substrate is 800μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1.8μm; the first multi-component co-doped epitaxial layer is a first multi-component co-doped silicon carbide epitaxial layer, the thickness of the first multi-component co-doped epitaxial layer is 2μm, the second multi-component co-doped epitaxial layer is a second multi-component co-doped silicon carbide epitaxial layer, the thickness of the second multi-component co-doped epitaxial layer is 2.5μm, and the thickness of the silicon carbide epitaxial layer is 4μm.

[0064] A method for preparing the semiconductor multilayer epitaxial wafer material comprises the following steps:

[0065] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0066] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0067] The etching temperature in step S1 is 1680° C., and the etching time is 10 min. The etching in step S1 is performed in a hydrogen atmosphere. The flow rate of hydrogen during the etching process is 200 slm. The etching pressure is 130 mbar.

[0068] During the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is 0.35:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.55:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.55:1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 1.1:1.

[0069] The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding organic compounds; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0070] In step S2, the growth temperature of the buffer layer is 1680°C, and the growth pressure is 110 mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1680°C, and the growth pressure is 100 mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1670°C, and the growth pressure is 95 mbar; the growth temperature of the silicon carbide epitaxial layer is 1640°C, and the growth pressure is 95 mbar.

[0071] Example 5

[0072] A semiconductor multilayer epitaxial wafer material comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

[0073] The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 5×10 11 atoms / cm 3 ; The doping concentration of Ga is 4×10 12 atoms / cm 3 ; The doping concentration of N is 5×10 19 atoms / cm 3 ; The doping concentration of Te is 5×10 9 atoms / cm 3 ; The rare earth is lanthanum; the doping concentration of N in the second multi-element co-doped epitaxial layer is 5×10 15 atoms / cm 3 ; The doping concentration of In is 8×10 9 atoms / cm 3 ; The substrate is a silicon carbide substrate; the thickness of the substrate is 1000μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 2μm; the first multi-component co-doped epitaxial layer is a first multi-component co-doped silicon carbide epitaxial layer, the thickness of the first multi-component co-doped epitaxial layer is 2.5μm, the second multi-component co-doped epitaxial layer is a second multi-component co-doped silicon carbide epitaxial layer, the thickness of the second multi-component co-doped epitaxial layer is 3μm, and the thickness of the silicon carbide epitaxial layer is 5μm.

[0074] A method for preparing the semiconductor multilayer epitaxial wafer material comprises the following steps:

[0075] Step S1, pretreatment of substrate: etching the silicon carbide substrate;

[0076] Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

[0077] The etching temperature in step S1 is 1700°C, and the etching time is 12 minutes; the etching in step S1 is carried out in a hydrogen atmosphere; the flow rate of hydrogen during the etching process is 220slm; the etching pressure is 150mbar; during the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is 0.4:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.6:1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 0.6:1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is 1.2:1.

[0078] The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding gas-phase halides; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

[0079] In step S2, the growth temperature of the buffer layer is 1700°C, and the growth pressure is 120 mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1690°C, and the growth pressure is 110 mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1680°C, and the growth pressure is 100 mbar; the growth temperature of the silicon carbide epitaxial layer is 1650°C, and the growth pressure is 100 mbar.

[0080] Comparative Example 1

[0081] A semiconductor multi-layer epitaxial wafer material and a preparation method thereof, which are basically the same as those in Example 1, except that the first multi-component co-doped epitaxial layer is an N-doped epitaxial layer.

[0082] Comparative Example 2

[0083] A semiconductor multi-layer epitaxial wafer material and a preparation method thereof, which are basically the same as those in Example 1, except that the second multi-component co-doped epitaxial layer is an N-doped epitaxial layer.

[0084] The semiconductor multilayer epitaxial wafer material samples described in Examples 1-5 and Comparative Examples 1-2 were subjected to performance tests, and the test results are shown in Table 1. The test method is as follows: the semiconductor multilayer epitaxial wafer materials obtained in Examples 1-5 and Comparative Examples 1-2 are used respectively, and three electrodes of gate, source and drain are prepared on the epitaxial wafer by processes such as photolithography and coating to prepare silicon carbide MOS tubes, and a semiconductor discrete device static tester is used to fix the voltage between the gate and the source, and test the leakage current between the gate and the source; and to fix the voltage between the drain and the source, and test the turn-on voltage between the gate and the source; and to fix the voltage between the gate and the source to 0, and test the breakdown voltage between the drain and the source.

[0085] Table 1

[0086] Test items Example 1 Example 2 Example 3 Example 4 Example 5 Comparative Example 1 Comparative Example 2 Leakage current (μA) 0.2 0.2 0.1 0.1 0.1 1.2 0.9 Turn-on voltage(V) 2.2 2.0 1.7 1.6 1.3 3.4 3.0 Breakdown voltage(V) 3600 3750 3800 3900 3950 3050 3200

[0087] It can be seen from Table 1 that the semiconductor multilayer epitaxial wafer material disclosed in the embodiment of the present invention has a smaller leakage current, a smaller turn-on voltage, and a larger breakdown voltage compared with the comparative example; the provision of the first multi-component co-doped epitaxial layer and the second multi-component co-doped epitaxial layer is beneficial to improving the above performance.

[0088] The above shows and describes the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions only describe the principles of the present invention. The present invention may be subject to various changes and improvements without departing from the spirit and scope of the present invention. These changes and improvements fall within the scope of the present invention. The scope of protection claimed by the present invention is defined by the attached claims and their equivalents.

Claims

1. A semiconductor multilayer epitaxial wafer material, characterized in that: The invention comprises a substrate, on which a buffer layer, a first multinary co-doped epitaxial layer, a second multinary co-doped epitaxial layer and a silicon carbide epitaxial layer are sequentially arranged; the first multinary co-doped epitaxial layer is a rare earth, Ga, N, Te co-doped epitaxial layer; the second multinary co-doped epitaxial layer is a N, In co-doped epitaxial layer.

2. The semiconductor multilayer epitaxial wafer material according to claim 1, characterized in that: The rare earth doping concentration in the first multi-element co-doped epitaxial layer is 1×10 10 atoms / cm 3 -5×10 11 atoms / cm 3 ; The doping concentration of Ga is 2×10 11 atoms / cm 3 -4×10 12 atoms / cm 3 ; The doping concentration of N is 1×10 16 atoms / cm 3 -5×10 19 atoms / cm 3 ; The doping concentration of Te is 1×10 8 atoms / cm 3 -5×10 9 atoms / cm 3 ; The rare earth is any one of lanthanum, cerium and praseodymium.

3. The semiconductor multilayer epitaxial wafer material according to claim 1, characterized in that: The doping concentration of N in the second multi-element co-doped epitaxial layer is 1×10 14 atoms / cm 3 -5×10 15 atoms / cm 3 ; The doping concentration of In is 1×10 8 atoms / cm 3 -8×10 9 atoms / cm 3 .

4. The semiconductor multilayer epitaxial wafer material according to claim 1, characterized in that: The substrate is a silicon carbide substrate; the thickness of the substrate is 300-1000 μm; the buffer layer is a silicon carbide buffer layer; the thickness of the buffer layer is 1-2 μm.

5. The semiconductor multilayer epitaxial wafer material according to claim 1, characterized in that: The first multinary co-doped epitaxial layer is a first multinary co-doped silicon carbide epitaxial layer, and the thickness of the first multinary co-doped epitaxial layer is 0.5-2.5μm. The second multinary co-doped epitaxial layer is a second multinary co-doped silicon carbide epitaxial layer, and the thickness of the second multinary co-doped epitaxial layer is 1-3μm. The thickness of the silicon carbide epitaxial layer is 1-5μm.

6. A method for preparing a semiconductor multilayer epitaxial wafer material according to any one of claims 1 to 5, characterized in that: The steps include: Step S1, pretreatment of substrate: etching the silicon carbide substrate; Step S2, epitaxial layer growth: sequentially perform buffer layer growth, first multi-component co-doped epitaxial layer growth, second multi-component co-doped epitaxial layer growth and silicon carbide epitaxial layer growth on the pretreated silicon carbide substrate to obtain a semiconductor multilayer epitaxial wafer material.

7. The method for preparing a semiconductor multilayer epitaxial wafer material according to claim 6, characterized in that: The etching temperature in step S1 is 1580-1700° C., and the etching time is 5-12 min. The etching in step S1 is performed in a hydrogen atmosphere. The flow rate of hydrogen during the etching process is 80-220 slm. The etching pressure is 40-150 mbar.

8. The method for preparing a semiconductor multilayer epitaxial wafer material according to claim 6, characterized in that: During the growth of the buffer layer in step S2, the C / Si ratio of the silicon source and the carbon source used is (0.2-0.4):1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.4-0.6):1; during the growth of the first multi-component co-doped epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.4-0.6):1; during the growth of the silicon carbide epitaxial layer, the C / Si ratio of the silicon source and the carbon source used is (0.8-1.2):

1.

9. The method for preparing a semiconductor multilayer epitaxial wafer material according to claim 6, characterized in that: The silicon source gas used in the growth process of the epitaxial layer in step S2 is SiH3Cl; the carbon source gas used is C2H4; the N dopant used is ammonia; the rare earth, Ga, and In dopants used are corresponding gas-phase halides or organic compounds; the Te dopant used is Te elemental; and the carrier gas is hydrogen.

10. The method for preparing a semiconductor multilayer epitaxial wafer material according to claim 6, characterized in that: The growth temperature of the buffer layer in step S2 is 1600-1700°C, and the growth pressure is 40-120mbar; the growth temperature of the first multi-component co-doped epitaxial layer is 1620-1690°C, and the growth pressure is 60-110mbar; the growth temperature of the second multi-component co-doped epitaxial layer is 1620-1680°C, and the growth pressure is 60-100mbar; the growth temperature of the silicon carbide epitaxial layer is 1600-1650°C, and the growth pressure is 50-100mbar.