Silicon carbide detector and manufacturing method thereof

By using a stacked structure and a spiral arrangement of drift ring in the silicon carbide detector, the lateral voltage gradient is automatically formed, which solves the problem of high leakage current of the silicon drift detector, and realizes a low leakage current and high performance silicon carbide detector, reducing process complexity and cost.

CN119364881BActive Publication Date: 2025-03-18NANJING UNIV +1
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Patent Information

Application Number
CN202411937687.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-26
Publication Date
2025-03-18
Estimated Expiration
2044-12-26

AI Technical Summary

Technical Problem

The silicon drift detector has a high leakage current at the operating voltage, which leads to the need to be equipped with an external refrigeration plate to reduce leakage current, increasing the packaging complexity and overall power consumption.

Method used

A silicon carbide detector is designed, using a silicon carbide substrate layer and a layered silicon carbide matrix layer, including anode layer and a drift ring. Through the spiral arranged drift ring, a uniform lateral voltage gradient is automatically formed to ensure uniform distribution of electrons and a stable lateral drift electric field is formed.

Benefits of technology

A high-performance detector with extremely low leakage current under non-cooling conditions is achieved, reducing process difficulty and cost without the need to prepare a voltage divider.

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Abstract

The present application discloses a silicon carbide detector and a manufacturing method thereof, which relates to the semiconductor field, including: a silicon carbide substrate layer; a silicon carbide base layer located on one side of the silicon carbide substrate layer, the silicon carbide base layer including a stacked first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer; the third silicon carbide layer is an anode layer, located in the first region of the second silicon carbide layer, exposing the second region of the second silicon carbide layer; the second region of the second silicon carbide layer has N drift rings, among which the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1 drift ring is connected to the tail end of the i drift ring; in a plane parallel to the plane where the substrate layer is located, the anode layer is located in the closed region of the first drift ring. The silicon carbide detector provided in the embodiment of the present application makes it easier to obtain a high-performance device with extremely low leakage current, and there is no need to prepare a voltage divider, and the process difficulty and cost are greatly reduced.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a silicon carbide detector and a method for manufacturing the same. Background Art

[0002] Silicon Drift Detector (SDD) is a high-performance X-ray detector that was originally developed for high-energy physics applications. Today, its manufacturing technology is relatively mature and commercially available. Compared with other types of detectors, spiral silicon drift detectors have the characteristics of low cost and low process complexity. When working, the spiral silicon drift detector can form a clear electron channel in the silicon substrate, so it has good performance in terms of working sensitivity, frequency response speed and collection efficiency. However, the silicon drift detector has a 10 -9 The leakage current of the order of magnitude requires an external cooling plate to reduce the working leakage and improve the device performance. This not only increases the complexity and difficulty of packaging the structure including the silicon drift detector, but also inevitably increases the overall power consumption of the structure including the silicon drift detector.

[0003] Silicon carbide (4H-SiC), as an outstanding representative of the third generation of semiconductor materials, has high critical breakdown voltage, high saturation drift velocity, and high thermal conductivity. Therefore, detectors made of SiC have very low dark current and significantly high operating temperature, which makes the design and manufacture of a high-performance silicon carbide-based uncooled drift chamber detector of great research significance. Summary of the invention

[0004] In view of the above problems, the present application provides a silicon carbide detector and a method for manufacturing the same, so as to achieve the purpose of designing and manufacturing a high-performance silicon carbide-based uncooled drift chamber detector. The specific scheme is as follows:

[0005] A silicon carbide detector, comprising:

[0006] a silicon carbide substrate layer, the silicon carbide substrate layer having a first doping type;

[0007] A silicon carbide base layer located on one side of the silicon carbide substrate layer, the silicon carbide base layer comprising a stacked first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer, the first silicon carbide layer having a second doping type, and the third silicon carbide layer having a first doping type;

[0008] The third silicon carbide layer is an anode layer, which is located in the first area of ​​the second silicon carbide layer and exposes the second area of ​​the second silicon carbide layer; the second area of ​​the second silicon carbide layer has N drift rings, among which the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1 drift ring is connected to the tail end of the i drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1 in sequence; in a plane parallel to the plane where the silicon carbide substrate layer is located, the anode layer is located in the closed area of ​​the first drift ring;

[0009] The drift ring has a second doping type.

[0010] Optionally, the second region includes a first sub-region and a second sub-region, and the detection photosensitivity of the second sub-region is greater than the detection photosensitivity of the first sub-region; at least one drift ring among the N drift rings except the first drift ring includes a first component located in the first sub-region and a second component located in the second sub-region;

[0011] The second component includes M sub-components connected in parallel, the M sub-components are parallel to each other, and M is an integer not less than 2.

[0012] Optional. The value range of M is 2-4.

[0013] Optionally, if N is greater than 2, the drift rings except the first drift ring and the second drift ring among the N drift rings all include a first component located in the first sub-region and a second component located in the second sub-region; the second component includes M sub-components connected in parallel.

[0014] Optionally, the other drift rings among the N drift rings except the first drift ring and the second drift ring include a first drift ring and a second drift ring, the distance from the first drift ring to the first drift ring is smaller than the distance from the second drift ring to the first drift ring, and the number of sub-components included in the second component in the first drift ring is smaller than the number of sub-components included in the second component in the second drift ring.

[0015] Optionally, a guard ring is further provided in the second region of the second silicon carbide layer, the guard ring is a closed ring, and the N drift rings are located in the closed region of the guard ring.

[0016] Optionally, the first doping type is N-type, the second doping type is N-type, and the doping ions of the drift ring are aluminum ions or boron ions;

[0017] The doping concentration of the second silicon carbide layer ranges from 1×10 12~1×10 19 cm -3 .

[0018] Optionally, the width of the gap between adjacent drift rings in the N drift rings ranges from 5 μm to 500 μm.

[0019] A method for manufacturing a silicon carbide detector, comprising:

[0020] Forming a silicon carbide base layer on the silicon carbide substrate layer, wherein the silicon carbide substrate layer has a first doping type, the silicon carbide base layer includes a first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer stacked, the first silicon carbide layer has a second doping type, and the third silicon carbide layer has a first doping type;

[0021] removing a portion of the third silicon carbide layer located in the second region of the second silicon carbide layer, and retaining a portion of the third silicon carbide layer located in the first region of the second silicon carbide layer, to form an anode layer;

[0022] Ions are implanted into the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer, wherein the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1th drift ring is connected to the tail end of the i-th drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1 in sequence; in a plane parallel to the plane where the silicon carbide substrate layer is located, the anode layer is located in the closed region of the first drift ring; the second silicon carbide layer has a first doping type, and the drift ring has a second doping type.

[0023] Optionally, performing ion implantation on the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer includes:

[0024] forming a first mask layer on a side of the silicon carbide base layer away from the silicon carbide substrate layer, wherein the first mask layer has a plurality of openings, and the plurality of openings expose regions in the second silicon carbide layer where N drift rings are to be formed;

[0025] forming a protective layer covering the silicon carbide base layer and the first mask layer on a side of the first mask layer away from the silicon carbide base layer, wherein the protective layer covers the plurality of openings;

[0026] Using the first mask layer as a mask, ion implantation is performed into the second silicon carbide layer to form N drift rings in a second region of the second silicon carbide layer;

[0027] The first mask layer and the protection layer are removed.

[0028] Optionally, also include:

[0029] Performing an oxidation process on an exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and a surface of the anode layer away from the silicon carbide substrate layer to form a first oxide layer, and removing the first oxide layer;

[0030] Perform at least one oxidation process on the exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and the surface of the anode layer away from the silicon carbide substrate layer to form a second oxide layer, and remove the second oxide layer.

[0031] By means of the above technical solution, the silicon carbide detector provided by the present application can automatically form a uniform transverse voltage gradient by utilizing the spiral arrangement of the N drift rings except the first drift ring which is a closed loop, thereby ensuring uniform distribution of electrons in the drift channel in the silicon carbide material and promoting the formation of a stable transverse drift electric field in the matrix. Compared with the traditional silicon-based drift chamber detector, the silicon carbide detector provided by the embodiment of the present application is easier to obtain a high-performance device with extremely low leakage current, and there is no need to prepare a voltage divider, which greatly reduces the process difficulty and cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. Throughout the accompanying drawings, the same or similar reference numerals represent the same or similar elements. It should be understood that the drawings are schematic and the originals and elements are not necessarily drawn to scale.

[0033] Figure 1 A cross-sectional view of a silicon carbide detector provided in the present application;

[0034] Figure 2 A schematic diagram of the structure of a silicon carbide detector provided in this application;

[0035] Figure 3 A top view of a silicon carbide detector provided in the present application;

[0036] Figure 4 A schematic diagram of a leakage current IV characteristic curve of a silicon carbide detector provided in this application;

[0037] Figure 5-Figure 10 A schematic diagram of some structures involved in the manufacturing process of a silicon carbide detector provided in this application.

[0038] Reference numerals:

[0039] 10-silicon carbide substrate layer; 20-silicon carbide base layer; 21-first silicon carbide layer; 22-second silicon carbide layer; 23-third silicon carbide layer; 30-drift ring; 31-first drift ring; 3N-Nth drift ring; 301-first component; 3011-first branch; 3012-second branch; 302-second component; 40-guard ring; 50-passivation layer; 61-first metal contact layer; 62-second metal contact layer; 63-third metal contact layer; 64-fourth metal contact layer; 70-first mask layer; protective layer 80. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the embodiments in the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0041] It is obvious to those skilled in the art that various modifications and changes can be made in this application without departing from the spirit or scope of this application. Therefore, this application is intended to cover modifications and changes of this application that fall within the scope of the corresponding claims (technical solutions claimed for protection) and their equivalents. It should be noted that the implementation methods provided in the embodiments of this application can be combined with each other without contradiction.

[0042] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0043] As described in the background technology section, designing and manufacturing a high-performance silicon carbide-based uncooled drift chamber detector is of great research significance.

[0044] In view of this, the embodiments of the present application provide a silicon carbide detector and a preparation method thereof, so as to provide a high-performance silicon carbide-based uncooled drift chamber detector. It should be noted that the silicon carbide-based uncooled drift chamber detector is a high-performance semiconductor detector using silicon carbide (SiC) as the main material. Such detectors can be used for high-energy particle detection, X-ray and gamma ray detection, and space detection in extreme environments.

[0045] like Figure 1-Figure 3 As shown, the silicon carbide detector provided in the embodiment of the present application includes:

[0046] A silicon carbide substrate layer 10, wherein the silicon carbide substrate layer 10 has a first doping type and is a conductive layer;

[0047] A silicon carbide base layer 20 located on one side of the silicon carbide substrate layer 10, the silicon carbide base layer 20 comprising a stacked first silicon carbide layer 21, a second silicon carbide layer 22 and a third silicon carbide layer 23, the first silicon carbide layer 21 having a second doping type, and the third silicon carbide layer 23 having a first doping type;

[0048] Among them, the third silicon carbide layer 23 is an anode layer, which is located in the first area of ​​the second silicon carbide layer 22 and exposes the second area of ​​the second silicon carbide layer 22; the second area of ​​the second silicon carbide layer 22 has N drift rings 30, among which the first drift ring 31 is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring 31, and the head end of the i+1 drift ring is connected to the tail end of the i drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1 in sequence; in a plane parallel to the plane where the silicon carbide substrate layer 10 is located, the anode layer is located in the closed area of ​​the first drift ring 31; the drift ring 30 has a second doping type.

[0049] Optionally, in one embodiment of the present application, continue as Figure 1 As shown, the drift ring 30 extends from the surface of the second silicon carbide layer 22 away from the silicon carbide substrate layer 10 to the side of the silicon carbide substrate layer 10, and the depth of the drift ring 30 can range from two to three hundred nanometers, but the present application does not limit this, depending on the specific circumstances.

[0050] It should be noted that, in the present embodiment, among the N drift rings, the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, that is, among the N drift rings except the first drift ring, the other drift rings extend outward in a spiral around the first drift ring to form a spiral arrangement.

[0051] Specifically, in one embodiment of the present application, Figure 3As shown, the projection of each drift ring 30 on the silicon carbide substrate layer may be rectangular, that is, the other drift rings among the N drift rings except the first drift ring are arranged around the first drift ring in a square spiral ring arrangement; in another embodiment of the present application, the projection of each drift ring on the silicon carbide substrate layer may be circular, that is, the other drift rings among the N drift rings except the first drift ring are arranged around the first drift ring in a circular spiral ring arrangement; in yet another embodiment of the present application, the projection of each drift ring on the silicon carbide substrate layer may be elliptical, that is, the other drift rings among the N drift rings except the first drift ring are arranged around the first drift ring in an elliptical spiral ring arrangement; in other embodiments of the present application, the other drift rings among the N drift rings except the first drift ring may also be arranged around the first drift ring in spiral rings of other shapes, which is not limited in the present application and depends on the specific circumstances.

[0052] The silicon carbide detector provided in the embodiment of the present application is described below with the projection of each drift ring on the silicon carbide substrate layer being a rectangle, that is, the other drift rings among the N drift rings except the first drift ring are arranged in a square spiral ring around the first drift ring.

[0053] It should be noted that, in this embodiment, Figure 2 and Figure 3 As shown, among the N drift rings 30, the first drift ring 31 is a closed loop, which is used to provide a first voltage signal in each direction in a plane parallel to the plane where the silicon carbide substrate layer is located. In this embodiment, the second voltage signal can be applied to the Nth drift ring 3N, that is, the outermost drift ring, among the N drift rings 30, so that between the first drift ring 31 and the Nth drift ring 3N, a uniform lateral voltage gradient is automatically formed by utilizing the spiral arrangement of the other drift rings except the first drift ring 31 among the N drift rings, ensuring uniform distribution of electrons in the drift channel in the silicon carbide material, and promoting the formation of a stable lateral drift electric field in the substrate. Compared with the traditional silicon-based drift chamber detector, there is no need to prepare a voltage divider, which not only greatly reduces the process difficulty and cost, but also, thanks to the excellent material properties of silicon carbide, it is easier to obtain a high-performance device with extremely low leakage current.

[0054] It should be noted that, in the present embodiment, the silicon carbide substrate layer is a conductive layer, and a PN junction can be formed between the silicon carbide substrate layer and the first silicon carbide layer, thereby reducing the leakage current of the surface of the silicon carbide substrate layer away from the first silicon carbide layer during the operation of the silicon carbide detector, thereby reducing the leakage current of the silicon carbide detector.

[0055] Optionally, in the embodiment of the present application, the second silicon carbide layer may be an intrinsic layer or may have a first doping type. If the second silicon carbide layer has the first doping type, the doping concentration of the second silicon carbide layer is in the range of 1×10 12 cm -3 ~1×10 19 cm -3 The thickness of the second silicon carbide layer ranges from 20 μm to 50 μm. For example, the doping concentration of the second silicon carbide layer can be 2×10 13 cm -3 , the thickness of the second silicon carbide layer can be 40μm, which is not limited in this application and depends on the specific situation. It should also be noted that in this embodiment, the lower the doping concentration of the second silicon carbide layer, the lower the voltage required when the silicon carbide detector is depleted, so that the minimum voltage can be used to reach the depletion state during the performance test of the silicon carbide detector, thereby reducing power consumption.

[0056] Due to process limitations, there is currently no P-type silicon carbide substrate. Therefore, in one embodiment of the present application, the first doping type is N-type, and the second doping type is P-type, that is, the silicon carbide substrate layer is an N-type silicon carbide substrate, the first silicon carbide layer in the silicon carbide base layer is a P-type silicon carbide layer, the third silicon carbide layer is an N-type silicon carbide layer, and the drift ring is a P-type doped drift ring.

[0057] The following describes the silicon carbide detector provided in the embodiment of the present application by taking the first doping type being N-type and the second doping type being P-type as an example.

[0058] Optionally, in one embodiment of the present application, the first silicon carbide layer is a P-type doped silicon carbide layer, and the doping concentration thereof is in the range of 1×10 16 cm -3 ~1×10 19 cm -3 , the thickness ranges from 1 μm to 5 μm. For example, the doping concentration of the first silicon carbide layer can be 1×10 16 cm -3 The thickness can be 2 μm; the third silicon carbide layer is an N-type doped silicon carbide layer, and its doping concentration ranges from 1×10 18 cm -3 ~3×10 20 cm -3 The thickness ranges from 0.1 μm to 5 μm. For example, the doping concentration of the third silicon carbide layer can be 1×10 18 cm -3 , but this application does not limit this and it depends on the specific circumstances.

[0059] It should be noted that, in the present embodiment, the other drift rings among the N drift rings except the first drift ring are arranged in a spiral around the first drift ring, and the head end of the i+1th drift ring is connected to the tail end of the i-th drift ring. Therefore, in the direction away from the first drift ring, the longer the conductive path length of each drift ring among the N drift rings except the first drift ring is, correspondingly, under the premise of the same conductive path width, the longer the conductive path length is, the greater the resistance on the conductive path is.

[0060] Optionally, in one embodiment of the present application, the second region includes a first sub-region and a second sub-region, and the detection light sensitivity of the second sub-region is greater than the detection light sensitivity of the first sub-region; Figure 3 As shown, at least one drift ring among the N drift rings 30 except the first drift ring 31 includes a first component 301 located in the first sub-region and a second component 302 located in the second sub-region; the second component 302 includes M sub-components connected in parallel to reduce the overall resistance of the second component 302. The M sub-components are parallel to each other, and M is an integer not less than 2.

[0061] It should be noted that, in some applications, the main detection area of ​​the silicon carbide detector is a partial area, such as the second sub-area of ​​the silicon carbide detector is its high light sensitivity area. Therefore, in the embodiment of the present application, it is only necessary to set the second component 302 located in the second sub-area to include M sub-components in parallel (that is, including M signal transmission paths in parallel), and the first component 301 can have only one signal transmission path, but the present application does not limit this, and it depends on the specific circumstances.

[0062] Optionally, in one embodiment of the present application, the value range of M is 2-4, that is, M can be 2, 3, or 4, but the present application does not limit this and it depends on the specific situation.

[0063] In some applications, the conductive path lengths of the first drift ring and the second drift ring among the N drift rings are generally smaller, that is, the resistance on the first drift ring and the second drift ring among the N drift rings is smaller. Therefore, in one embodiment of the present application, if N is greater than 2, the other drift rings among the N drift rings except the first drift ring and the second drift ring all include a first component located in the first sub-region and a second component located in the second sub-region; the second component includes M sub-components connected in parallel to reduce the resistance of the other drift rings among the N drift rings except the first drift ring and the second drift ring.

[0064] It should be noted that, along the direction away from the first drift ring, the greater the conductive path length of each drift ring of the N drift rings except the first drift ring, correspondingly, under the premise of the same conductive path width, the greater the conductive path length, the greater the resistance on the conductive path. Therefore, in one embodiment of the present application, along the direction away from the first drift ring, the number of sub-components included in the second component of each drift ring of the N drift rings except the first drift ring and the second drift ring gradually increases, such as the N drift rings except the first drift ring and the second drift ring include a first drift ring and a second drift ring, the distance from the first drift ring to the first drift ring is less than the distance from the second drift ring to the first drift ring, and the number of sub-components included in the second component of the first drift ring is less than the number of sub-components included in the second component of the second drift ring. However, the present application is not limited to this. In other embodiments of the present application, along the direction away from the first drift ring, the number of sub-components included in the second component of each drift ring in the N drift rings excluding the first drift ring and the second drift ring may be partially the same or partially different, as long as the other drift rings in the N drift rings excluding the first drift ring and the second drift ring include at least one first drift ring and at least one second drift ring, the distance from the first drift ring to the first drift ring is smaller than the distance from the second drift ring to the first drift ring, and the number of sub-components included in the second component of the first drift ring is smaller than the number of sub-components included in the second component of the second drift ring.

[0065] Based on any of the above embodiments, in one embodiment of the present application, continue as follows Figure 1-Figure 3 As shown, the second region of the second silicon carbide layer 22 further includes a guard ring 40, the guard ring 40 is a closed ring, and the N drift rings 30 are located in the closed region of the guard ring 40. It should be noted that, in this embodiment, the guard ring 40 and the drift ring 30 have the same doping type, and optionally, the guard ring 40 and the drift ring 30 are formed at the same time.

[0066] Optionally, in one embodiment of the present application, when the drift ring is a P-type doped drift ring, the doping ions in the drift ring may be aluminum ions, or other P-type doping ions such as boron ions; similarly, the doping ions in the guard ring may be aluminum ions, or other P-type doping ions such as boron ions; the present application does not impose any limitation on this, and it depends on the specific circumstances.

[0067] Based on any of the above embodiments, in one embodiment of the present application, the width of the gap between adjacent drift rings in the N drift rings is in the range of 5μm to 500μm, such as 10μm. Optionally, in the drift ring including the first component and the second component in the N drift rings, the distance between adjacent sub-components in the second component is also in the range of 5μm to 500μm, such as 10μm, but the present application does not limit this and it depends on the specific circumstances.

[0068] Optionally, in one embodiment of the present application, among the N drift rings, in the drift rings not including sub-components, the width of each drift ring on the surface of the second silicon carbide layer is in the range of 5μm to 300μm, and can further be 10μm to 50μm, such as 50μm; in the drift rings including sub-components, the width of the first component and each sub-component of each drift ring on the surface of the second silicon carbide layer is in the range of 5μm to 300μm, and can further be 10μm to 50μm, such as 50μm, so as to avoid the same conductive path width being too large, which is inconvenient for carrier migration, and at the same time avoid the same conductive path width being too small, which is too difficult to process and cannot be achieved.

[0069] Based on any of the above embodiments, in one embodiment of the present application, continue as follows Figure 1-Figure 3 As shown, the silicon carbide detector further includes: a metal contact layer, and the metal contact layer includes:

[0070] A first metal contact layer 61 covering the anode layer and electrically connected to the anode layer, wherein the first metal contact layer 61 is an anode metal contact layer;

[0071] a second metal contact layer 62 covering the silicon carbide substrate layer 10 from a side of the silicon carbide substrate layer 10 away from the silicon carbide base layer 20, the second metal contact layer 62 being a cathode metal contact layer;

[0072] A third metal contact layer 63 covering the first drift ring 31 among the N drift rings 30 and electrically connected to the first drift ring 31;

[0073] A fourth metal contact layer 64 covers at least a portion of the Nth drift ring 3N among the N drift rings 30 and is electrically connected to the Nth drift ring 3N.

[0074] Taking the second component of each drift ring as an example, each drift ring includes three parallel sub-components. Figure 3As shown, in one embodiment of the present application, the high light sensitive area of ​​the silicon carbide detector is in the direction of its upper right corner. In this embodiment, the first sub-area includes a portion located on the left side of the first drift ring and a portion located on the bottom side of the first drift ring, and the second sub-area includes a portion located on the right side of the first drift ring and a portion located on the top side of the first drift ring.

[0075] Specifically, in one embodiment of the present application, continue as follows Figure 3 As shown, the first component 301 includes a first branch 3011 and a second branch 3012, and the second component 302 is located between the first branch 3011 and the second branch 3012; in this embodiment,

[0076] The first drift ring 31 is a closed ring; one end of the second drift ring is electrically connected to the preset position of the first drift ring 31, and after extending a distance along the extension direction of the preset position of the first drift ring 31, it begins to spirally extend outward around the first drift ring 31 to the head end of the first branch of the first component of the third drift ring;

[0077] The head end of the first branch of the third drift ring spirally extends outwards around the first drift ring to the tail end of the first branch of the third drift ring, and the tail end of the first branch of the third drift ring is connected to the head end of the second component of the third drift ring, that is, the tail end of the first branch of the third drift ring is divided into three parallel and parallel sub-components, and the three parallel and parallel sub-components of the third drift ring spirally extend outwards around the first drift ring to the head end of the second branch of the third drift ring, that is, converge to the head end of the second branch of the third drift ring, and the head end of the second branch of the third drift ring spirally extends outwards around the first drift ring to the tail end of the second branch of the third drift ring;

[0078] The head end of the first branch of the 4th drift ring is connected to the tail end of the second branch of the 3rd drift ring, the head end of the first branch of the 4th drift ring spirally extends outwards around the 1st drift ring to the tail end of the first branch of the 4th drift ring, the tail end of the first branch of the 4th drift ring is connected to the head end of the second component of the 4th drift ring, that is, the tail end of the first branch of the 4th drift ring is divided into three parallel and parallel sub-components, the three parallel and parallel sub-components of the 4th drift ring spirally extend outwards around the 1st drift ring to the head end of the second branch of the 4th drift ring, that is, converge to the head end of the second branch of the 4th drift ring, the head end of the second branch of the 4th drift ring spirally extends outwards around the 1st drift ring to the tail end of the second branch of the 4th drift ring;

[0079] The head end of the first branch of the fifth drift ring is connected to the tail end of the second branch of the fourth drift ring, and so on, until the tail end of the second branch of the Nth drift ring 3N is electrically connected to the fourth metal contact layer 64 .

[0080] In the silicon carbide detector provided in the embodiment of the present application, the 3rd drift ring to the Nth drift ring are divided into 3 sub-components after each spiral rotation and continue to spirally extend outward around the 1st drift ring. After applying different voltage signals to the third metal contact layer and the fourth contact layer, a voltage gradient can be automatically formed, thereby promoting the formation of a stable lateral drift electric field in the silicon carbide substrate layer.

[0081] Optionally, in one embodiment of the present application, the metal contact layer includes a stacked nickel electrode layer, a titanium electrode layer, an aluminum electrode layer and a gold electrode layer, and the thickness ranges from 20 nm to 5000 nm; that is, the first metal contact layer includes a stacked nickel electrode layer, a titanium electrode layer, an aluminum electrode layer and a gold electrode layer, and the thickness ranges from 20 nm to 5000 nm; the second metal contact layer includes a stacked nickel electrode layer, a titanium electrode layer, an aluminum electrode layer and a gold electrode layer, and the thickness ranges from 20 nm to 5000 nm; the third metal contact layer includes a stacked nickel electrode layer, a titanium electrode layer, an aluminum electrode layer and a gold electrode layer, and the thickness ranges from 20 nm to 5000 nm; the fourth metal contact layer includes a stacked nickel electrode layer, a titanium electrode layer, an aluminum electrode layer and a gold electrode layer, and the thickness ranges from 20 nm to 5000 nm; for example, the thickness of the metal contact layer can be 300 nm, this application does not limit this, it depends on the specific circumstances.

[0082] Specifically, in one embodiment of the present application, the projection area of ​​the silicon carbide base layer on the plane where the silicon carbide substrate layer is located is in the range of 0.01 mm 2 ~60mm 2 For example, the projection area of ​​the silicon carbide matrix layer on the plane where the silicon carbide substrate layer is located can be 4 mm 2 ; In a plane parallel to the plane where the silicon carbide substrate layer is located, the radius of the circumscribed circle of the anode is in the range of 20μm to 500μm, and the radius of the circumscribed circle of the fourth metal contact layer (i.e., the metal contact layer electrically connected to the Nth drift ring) is in the range of 10μm to 1000μm. For example, in a plane parallel to the plane where the silicon carbide substrate layer is located, the radius of the circumscribed circle of the anode is 80μm, and the radius of the circumscribed circle of the fourth metal contact layer (i.e., the metal contact layer electrically connected to the Nth drift ring) is 90μm; however, the application does not impose any limitation on this, and it depends on the specific circumstances.

[0083] Optionally, in one embodiment of the present application, the silicon carbide detector further includes: a passivation layer covering the anode layer and the area of ​​the second silicon carbide layer not covered by the metal contact layer. Optionally, the passivation layer is a silicon dioxide film, and the thickness of the passivation layer ranges from 100 nm to 10000 nm. For example, the thickness of the passivation layer may be 1 μm. The present application does not impose any limitation on this, and it depends on the specific circumstances.

[0084] like Figure 4 As shown, Figure 4 The schematic diagram of the IV characteristic curve of the silicon carbide detector provided in the embodiment of the present application during the leakage test is shown. The test conditions include grounding the cathode of the silicon carbide detector and applying a bias voltage of -20 V to 180 V to the anode; wherein, Figure 4 The horizontal axis represents the voltage value applied to the anode, and the vertical axis represents the measured leakage current. Figure 4 It can be seen from the figure that the leakage current of the silicon carbide detector changes slightly with the increase of the anode bias voltage, which is 10 orders of magnitude less than the leakage current of the silicon drift detector. -9 Moreover, when the anode bias voltage is 200 V, the leakage current of the SiC detector is extremely low, only 2.6 pA.

[0085] It can be seen that under non-refrigeration conditions, the silicon carbide detector provided in the embodiment of the present application can have an ultra-low leakage current.

[0086] In summary, the silicon carbide detector provided in the embodiment of the present application can utilize the spiral arrangement of the drift rings except the first drift ring which is a closed loop among the N drift rings to automatically form a uniform lateral voltage gradient, ensure the uniform distribution of electrons in the drift channel in the silicon carbide material, and promote the formation of a stable lateral drift electric field in the matrix. Compared with the traditional silicon-based drift chamber detector, the silicon carbide detector provided in the embodiment of the present application is easier to obtain a high-performance device with extremely low leakage current, and there is no need to prepare a voltage divider, which greatly reduces the process difficulty and cost.

[0087] In addition, the present invention also provides a method for manufacturing a silicon carbide detector. The method for manufacturing a silicon carbide detector provided in the present invention includes:

[0088] S1: Figure 5 As shown, a silicon carbide base layer 20 is formed on a silicon carbide substrate layer 10, wherein the silicon carbide substrate layer 10 has a first doping type, and the silicon carbide base layer 20 includes a stacked first silicon carbide layer 21, a second silicon carbide layer 22 and a third silicon carbide layer 23, wherein the first silicon carbide layer 21 has a second doping type, and the third silicon carbide layer 23 has a first doping type.

[0089] Due to process limitations, there is currently no P-type silicon carbide substrate. Therefore, in one embodiment of the present application, the first doping type is N-type, and the second doping type is P-type, that is, the silicon carbide substrate layer is an N-type silicon carbide substrate, the first silicon carbide layer in the silicon carbide base layer is a P-type silicon carbide layer, the third silicon carbide layer is an N-type silicon carbide layer, and the drift ring is a P-type doped drift ring.

[0090] The following describes the silicon carbide detector provided in the embodiment of the present application by taking the first doping type being N-type and the second doping type being P-type as an example.

[0091] Optionally, in one embodiment of the present application, the first silicon carbide layer is a P-type doped silicon carbide layer, and the doping concentration thereof is in the range of 1×10 16 cm -3 ~1×10 19 cm -3 , the thickness ranges from 1 μm to 5 μm; the third silicon carbide layer is an N-type doped silicon carbide layer, and the doping concentration ranges from 1×10 18 cm -3 ~3×10 20 cm -3 , the thickness ranges from 0.1 μm to 5 μm; the second silicon carbide layer may be an intrinsic layer or may have a first doping type. If the second silicon carbide layer has the first doping type, the doping concentration of the second silicon carbide layer ranges from 1×10 12 cm -3 ~1×10 19 cm -3 The thickness of the second silicon carbide layer ranges from 20 μm to 50 μm, but this application does not limit this and it depends on the specific situation.

[0092] S2: Figure 6 As shown, the portion of the third silicon carbide layer 23 located in the second region of the second silicon carbide layer 22 is removed, and the portion of the third silicon carbide layer 23 located in the first region of the second silicon carbide layer 22 is retained to form an anode layer.

[0093] Optionally, in one embodiment of the present application, removing a portion of the third silicon carbide layer located in the second region of the second silicon carbide layer, retaining a portion of the third silicon carbide layer located in the first region of the second silicon carbide layer, and forming the anode layer includes:

[0094] forming a second mask layer on a surface of the third silicon carbide layer away from the second silicon carbide layer, wherein the second mask layer covers a region of the third silicon carbide layer where an anode layer is to be formed, and exposes other regions of the third silicon carbide layer;

[0095] Using the second mask layer as a mask, adopting an inductively coupled plasma etching process, removing a portion of the third silicon carbide layer located in the second region of the second silicon carbide layer, retaining a portion of the third silicon carbide layer located in the first region of the second silicon carbide layer, to form an anode layer, optionally, a projection of the anode layer on the plane where the silicon carbide substrate is located is circular;

[0096] The second mask layer is removed.

[0097] Specifically, in one embodiment of the present application, an inductively coupled plasma etcher may be used to remove the portion of the third silicon carbide layer located in the second region of the second silicon carbide layer, retaining the portion of the third silicon carbide layer located in the first region of the second silicon carbide layer to form an anode layer.

[0098] Optionally, in one embodiment of the present application, the second mask layer is a photolithography pattern layer, but the present application does not limit this and it depends on the specific circumstances.

[0099] S3: performing ion implantation on the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer, wherein the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1th drift ring is connected to the tail end of the i-th drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1; in a plane parallel to the plane where the silicon carbide substrate layer is located, the anode layer is located in the closed region of the first drift ring; the second silicon carbide layer has a first doping type, and the drift ring has a second doping type.

[0100] Optionally, in one embodiment of the present application, performing ion implantation on the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer includes:

[0101] like Figure 7 As shown, a first mask layer 70 is formed on a side of the silicon carbide base layer 20 away from the silicon carbide substrate layer 10, and the first mask layer 70 has a plurality of openings, and the plurality of openings expose the region of the second silicon carbide layer 22 where N drift rings are to be formed;

[0102] like Figure 8 As shown, a protection layer 80 covering the silicon carbide base layer 20 and the first mask layer 70 is formed on the side of the first mask layer 70 away from the silicon carbide base layer 20, and the protection layer 80 covers the plurality of openings;

[0103] Continue as Figure 8As shown, ions are implanted into the second silicon carbide layer 22 using the first mask layer 70 as a mask to form N drift rings 30 in the second region of the second silicon carbide layer 22;

[0104] like Fig. 9 As shown, the first mask layer and the protection layer are removed.

[0105] It should be noted that the provision of the protective layer can avoid ion implantation into the second silicon carbide layer using the first mask layer as a mask, and when N drift rings are formed in the second region of the second silicon carbide layer, implantation damage is formed on the surface of the second silicon carbide layer, and the uniformity of the implanted ions in the drift rings close to the surface region of the second silicon carbide layer is improved. Optionally, in one embodiment of the present application, the protective layer is a silicon dioxide film, and the thickness of the protective layer ranges from 20 nm to 500 nm, such as 100 nm, but the present application does not limit this, and it depends on the specific situation.

[0106] Optionally, in one embodiment of the present application, the first mask layer is a silicon dioxide layer or a silicon nitride layer. Specifically, in one embodiment of the present application, the first mask layer is a silicon dioxide layer, and the first mask layer is formed on a side of the silicon carbide base layer away from the silicon carbide substrate layer, and the first mask layer has a plurality of openings, and the plurality of openings expose regions in the second silicon carbide layer where N drift rings are to be formed, including:

[0107] At a high temperature of 350° C., a silicon dioxide film is prepared on the surface of the silicon carbide substrate layer by chemical vapor deposition. Optionally, the thickness of the silicon dioxide film ranges from 0.5 μm to 5 μm. Further, optionally, the thickness of the silicon dioxide film may be 1 μm, but this application does not limit this, and it depends on the specific situation;

[0108] placing a third mask layer on the surface of the first mask layer, wherein the third mask layer has an opening, and the opening of the third mask layer corresponds to a region in the second silicon carbide layer where a drift ring and / or a guard ring is to be formed, and optionally, the third mask layer is a photoresist pattern layer;

[0109] The first mask layer is wet-etched with the third mask layer to form a plurality of openings in the first mask layer, wherein the plurality of openings expose regions in the second silicon carbide layer where N drift rings are to be formed.

[0110] Optionally, in one embodiment of the application, the first mask layer is wet-etched with the third mask layer to form multiple openings in the first mask layer, including: soaking the first mask layer in a BOE solution for 5 to 20 minutes, such as 10 minutes, to form multiple openings in the first mask layer, but the application is not limited to this and it depends on the specific circumstances.

[0111] Optionally, in one embodiment of the present application, the size of the opening is in the range of 10 μm to 50 μm to avoid the opening being too wide, which would make the width of the conductive path of the drift ring formed subsequently too large and inconvenient for carrier migration, and to avoid the opening being too small, which would make the process too difficult to implement.

[0112] Optionally, in one embodiment of the present application, using the first mask layer as a mask, ion implantation is performed into the second silicon carbide layer, and N drift rings are formed in the second region of the second silicon carbide layer, including: using the first mask layer as a mask, ion implantation is performed into the second silicon carbide layer by means of a first implantation energy, a second implantation energy, and a third implantation energy, respectively, to form N drift rings in the second region of the second silicon carbide layer, wherein the first implantation energy is less than the second implantation energy and less than the third implantation energy. Specifically, in one embodiment of the present application, the first implantation energy is 50kev, the second implantation energy is 100kev, and the third implantation energy is 150kev, but the present application does not limit this, and it depends on the specific circumstances.

[0113] Optionally, in an embodiment of the present community, removing the first mask layer and the protective layer includes removing the first mask layer and the protective layer by a wet etching process, such as using a BOE solution as an etching solution for wet etching to remove the first mask layer and the protective layer.

[0114] It should be noted that, in this embodiment, Figure 8 and Fig. 9 As shown, when the silicon carbide detector includes the guard ring 40 , the guard ring 40 and the drift ring 30 are formed simultaneously.

[0115] On the basis of any of the above embodiments, in one embodiment of the present application, the manufacturing method further includes:

[0116] S4: performing an oxidation process on an exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and a surface of the anode layer away from the silicon carbide substrate layer to form a first oxide layer, and removing the first oxide layer to repair etching damage on the surface of the second silicon carbide layer away from the first silicon carbide layer;

[0117] S5: Perform at least one oxidation process on the exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and the surface of the anode layer away from the silicon carbide substrate layer to form a second oxide layer, and remove the second oxide layer to process the dangling bonds on the surface of the second silicon carbide layer away from the first silicon carbide layer to obtain better surface quality.

[0118] Optionally, in one embodiment of the present application, performing an oxidation process on an exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and a surface of the anode layer away from the silicon carbide substrate layer to form a first oxide layer, and removing the first oxide layer includes:

[0119] Placing the silicon carbide detector in a thermal oxidation furnace, and performing wet oxygen oxidation at 1050° C. for 1 to 3 hours, such as 2 hours, to form a first oxide layer on the exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and on the surface of the anode layer away from the silicon carbide substrate layer;

[0120] The silicon carbide detector is immersed in a BOE solution for 5 minutes to 10 minutes, such as 8 minutes, to remove the first silicon oxide layer.

[0121] Optionally, in one embodiment of the present application, performing at least one oxidation process on an exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and a surface of the anode layer away from the silicon carbide substrate layer to form a second oxide layer, and removing the second oxide layer includes:

[0122] Placing the silicon carbide detector in a thermal oxidation furnace, firstly dry-oxidizing at 1050° C. for 0.5 to 3 hours, such as 1.5 hours, then wet-oxidizing for 0.5 to 3 hours, such as 1.5 hours, and then dry-oxidizing for 0.5 to 3 hours, such as 1.5 hours, to form a second oxide layer on the exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and the surface of the anode layer away from the silicon carbide substrate layer;

[0123] The silicon carbide detector is immersed in a BOE solution to remove the second silicon oxide layer.

[0124] On the basis of any of the above embodiments, in one embodiment of the present application, the manufacturing method further includes:

[0125] S6: Fig.10 As shown, a passivation layer 50 is formed on the surface of the second silicon carbide layer 22 away from the first silicon carbide layer 21, and the passivation layer 50 covers the second region of the second silicon carbide layer 22 except the region where the metal contact layer is to be formed;

[0126] S7: Continue as Figure 1 As shown, a metal contact layer is formed on a surface of the second silicon carbide layer 22 away from the first silicon carbide layer 21, wherein the metal contact layer includes:

[0127] A first metal contact layer 61 covering the anode layer and electrically connected to the anode layer, wherein the first metal contact layer 61 is an anode metal contact layer;

[0128] A third metal contact layer 63 covering the first drift ring 31 among the N drift rings and electrically connected to the first drift ring 31;

[0129] A fourth metal contact layer 64 covers at least a portion of the Nth drift ring 3N among the N drift rings and is electrically connected to the Nth drift ring 3N.

[0130] Optionally, in one embodiment of the present application, a passivation layer is formed on a surface of the second silicon carbide layer away from the first silicon carbide layer, and the passivation layer covers other regions of the second region of the second silicon carbide layer except for the region where the metal contact layer is to be formed, including:

[0131] A passivation layer is prepared by chemical vapor deposition at a high temperature of 350° C. on a surface of the silicon carbide base layer away from the silicon carbide substrate layer. Optionally, the passivation layer is a silicon dioxide film with a thickness ranging from 0.5 μm to 5 μm, such as 1.5 μm.

[0132] Annealing the passivation layer at 900° C. in a nitrogen atmosphere to densify the passivation layer and obtain a high-quality passivation layer;

[0133] forming a fourth mask layer on a side of the passivation layer away from the silicon carbide substrate layer, wherein the fourth mask layer has an opening, and the opening of the fourth mask layer corresponds to a region where a metal contact layer is to be formed, and optionally, the fourth mask layer is a photoresist pattern layer;

[0134] Using the fourth mask layer as a mask, etching the passivation layer, using an etching solution such as a BOE solution, and adopting a wet etching process to remove a portion of the passivation layer corresponding to an area on the surface of the second silicon carbide layer where a metal contact layer is to be formed;

[0135] The fourth mask layer is removed.

[0136] Optionally, in one embodiment of the present application, forming a metal contact layer on the surface of the second silicon carbide layer away from the first silicon carbide layer includes: using a physical vapor deposition process to form a metal contact layer on the surface of the second silicon carbide layer away from the first silicon carbide layer.

[0137] Based on any of the above embodiments, in one embodiment of the present application, the manufacturing method further includes: forming a second metal contact layer (i.e., a cathode metal contact layer) covering the silicon carbide substrate layer on a side of the silicon carbide substrate layer away from the silicon carbide base layer.

[0138] In summary, the silicon carbide detector and its manufacturing method provided in the embodiments of the present application can utilize the spiral arrangement of the N drift rings except the first drift ring which is a closed loop to automatically form a uniform lateral voltage gradient, ensure uniform distribution of electrons in the drift channel in the silicon carbide material, and promote the formation of a stable lateral drift electric field in the matrix so that a relatively uniform photocurrent value can be obtained in any photosensitive area, thereby improving the detection performance of the detector.

[0139] Moreover, compared with traditional silicon-based drift chamber detectors, the silicon carbide detector provided in the embodiment of the present application is easier to obtain high-performance devices with extremely low leakage current, and there is no need to prepare a voltage divider, which greatly reduces the manufacturing complexity and cost.

[0140] In this specification, each embodiment is described in a progressive, parallel, or progressive and parallel manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the method part.

[0141] It should be noted that in the description of the present application, it should be understood that the description of the drawings and embodiments is illustrative rather than restrictive. The same reference numerals throughout the embodiments of the specification mark the same structure. In addition, for the purpose of understanding and ease of description, the drawings may exaggerate the thickness of some layers, films, panels, regions, etc. It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the term "includes", "comprising" or any other variant thereof is intended to cover non-exclusive inclusion, so that the article or equipment including a series of elements includes not only those elements, but also includes other elements that are not clearly listed, or also includes elements inherent to such articles or equipment. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the articles or equipment including the above elements.

[0142] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present application. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present application. Therefore, the present application will not be limited to the embodiments shown herein, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A silicon carbide detector, characterized in that: include: a silicon carbide substrate layer, the silicon carbide substrate layer having a first doping type; A silicon carbide base layer located on one side of the silicon carbide substrate layer, the silicon carbide base layer comprising a stacked first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer, the first silicon carbide layer having a second doping type, and the third silicon carbide layer having a first doping type; The third silicon carbide layer is an anode layer, which is located in the first area of ​​the second silicon carbide layer and exposes the second area of ​​the second silicon carbide layer; the second area of ​​the second silicon carbide layer has N drift rings, among which the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1 drift ring is connected to the tail end of the i drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1 in sequence; in a plane parallel to the plane where the silicon carbide substrate layer is located, the anode layer is located in the closed area of ​​the first drift ring; The drift ring has a second doping type.

2. The silicon carbide detector according to claim 1, characterized in that: The second region includes a first sub-region and a second sub-region, and the detection photosensitivity of the second sub-region is greater than the detection photosensitivity of the first sub-region; at least one drift ring among the N drift rings except the first drift ring includes a first component located in the first sub-region and a second component located in the second sub-region; The second component includes M sub-components connected in parallel, the M sub-components are parallel to each other, and M is an integer not less than 2.

3. The silicon carbide detector according to claim 2, characterized in that: The value range of M is 2-4.

4. The silicon carbide detector according to claim 2, characterized in that: If N is greater than 2, the drift rings except the first drift ring and the second drift ring among the N drift rings all include a first component located in the first sub-region and a second component located in the second sub-region; the second component includes M sub-components connected in parallel.

5. The silicon carbide detector according to claim 4, characterized in that: The other drift rings among the N drift rings except the first drift ring and the second drift ring include a first drift ring and a second drift ring, the distance from the first drift ring to the first drift ring is smaller than the distance from the second drift ring to the first drift ring, and the number of sub-components included in the second component in the first drift ring is smaller than the number of sub-components included in the second component in the second drift ring.

6. The silicon carbide detector according to claim 1, characterized in that: A guard ring is further provided in the second region of the second silicon carbide layer. The guard ring is a closed ring, and the N drift rings are located in the closed region of the guard ring.

7. The silicon carbide detector according to claim 1, characterized in that: The first doping type is N-type, the second doping type is N-type, and the doping ions of the drift ring are aluminum ions or boron ions; The doping concentration of the second silicon carbide layer ranges from 1×10 12 ~1×10 19 cm -3 .

8. The silicon carbide detector according to claim 1, characterized in that: The width of the gaps between adjacent drift rings in the N drift rings ranges from 5 μm to 500 μm.

9. A method for manufacturing a silicon carbide detector, characterized in that: include: Forming a silicon carbide base layer on the silicon carbide substrate layer, wherein the silicon carbide substrate layer has a first doping type, the silicon carbide base layer includes a first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer stacked, the first silicon carbide layer has a second doping type, and the third silicon carbide layer has a first doping type; removing a portion of the third silicon carbide layer located in the second region of the second silicon carbide layer, and retaining a portion of the third silicon carbide layer located in the first region of the second silicon carbide layer, to form an anode layer; Ion implantation is performed on the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer, wherein the first drift ring is a closed loop, and the other drift rings are arranged in a spiral around the first drift ring, and the head end of the i+1th drift ring is connected to the tail end of the i-th drift ring, N is an integer greater than 1, and i is any integer from 1 to N-1 in sequence; in a plane parallel to the plane where the silicon carbide substrate layer is located, the anode layer is located in the closed region of the first drift ring; the second silicon carbide layer has a first doping type, and the drift ring has a second doping type.

10. The manufacturing method according to claim 9, characterized in that: Performing ion implantation on the second region of the second silicon carbide layer to form N drift rings in the second region of the second silicon carbide layer includes: forming a first mask layer on a side of the silicon carbide base layer away from the silicon carbide substrate layer, wherein the first mask layer has a plurality of openings, and the plurality of openings expose regions in the second silicon carbide layer where N drift rings are to be formed; forming a protective layer covering the silicon carbide base layer and the first mask layer on a side of the first mask layer away from the silicon carbide base layer, wherein the protective layer covers the plurality of openings; Using the first mask layer as a mask, ion implantation is performed into the second silicon carbide layer to form N drift rings in a second region of the second silicon carbide layer; The first mask layer and the protective layer are removed.

11. The manufacturing method according to claim 9, characterized in that: Also includes: Performing an oxidation process on an exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and a surface of the anode layer away from the silicon carbide substrate layer to form a first oxide layer, and removing the first oxide layer; Perform at least one oxidation process on the exposed surface of the second silicon carbide layer away from the silicon carbide substrate layer and the surface of the anode layer away from the silicon carbide substrate layer to form a second oxide layer, and remove the second oxide layer.

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