Lock control board

Abstract

The invention discloses a lock control board in the technical field of electromagnetic lock detection. The lock control board comprises a power supply circuit, a short circuit protection circuit, an MOS control circuit, a lock interface circuit, a voltage stabilizing circuit, an ADC acquisition circuit and a CPU main control circuit, the CPU main control circuit is electrically connected with the power supply circuit, the short circuit protection circuit, the MOS control circuit and the ADC acquisition circuit, the MOS control circuit and the ADC acquisition circuit are electrically connected with the lock interface circuit, and the power supply circuit is electrically connected with the ADC acquisition circuit through the voltage stabilizing circuit; the control and detection of the lock interface do not need to occupy too many IO ports, the stability is good, the turn-off current is smaller, and the fault resistance rate is higher.

Description

Technical Field

[0001] The invention relates to the technical field of electromagnetic lock detection, and in particular to a lock control plate. Background Art

[0002] The electromagnetic lock is a combination lock with an anti-theft alarm function and uses an electronic password instead of a traditional mechanical password, which solves the problem of low security performance caused by a small number of mechanical password locks.

[0003] Before leaving the factory, the electromagnetic lock needs to be tested to see if the lock interface can work properly. Currently, when testing the lock interface, one IO port is mainly used to control and detect one lock interface. The number of IO ports occupied is too large, and the whole process is very prone to failure and has low efficiency. Summary of the invention

[0004] The purpose of this section is to summarize some aspects of the embodiments of the present invention and briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section and the specification abstract and the invention title of the present invention to avoid blurring the purpose of this section, the specification abstract and the invention title, and such simplifications or omissions cannot be used to limit the scope of the present invention.

[0005] Therefore, the object of the present invention is to provide a lock control board, which does not need to occupy too many IO ports for controlling and detecting the lock interface, has good stability, smaller shutdown current, and higher fault resistance rate.

[0006] In order to solve the above technical problems, the present invention provides a lock control board, which adopts the following technical solution: it includes a power supply circuit, a short protection circuit, a MOS control circuit, a lock interface circuit, a voltage stabilizing circuit, an ADC acquisition circuit and a CPU main control circuit; the CPU main control circuit is electrically connected to the power supply circuit, the short protection circuit, the MOS control circuit and the ADC acquisition circuit respectively, the MOS control circuit and the ADC acquisition circuit are electrically connected to the lock interface circuit, and the power supply circuit is electrically connected to the ADC acquisition circuit through the voltage stabilizing circuit.

[0007] Optionally, the power supply circuit includes a power supply interface, a power supply input and a power conversion chip, the input end of the power conversion chip is electrically connected to the power supply input, the output end of the power conversion chip is electrically connected to the voltage stabilization circuit and the CPU main control circuit, and the power supply input is also electrically connected to the short-circuit protection circuit.

[0008] Optionally, the CPU main control circuit is also electrically connected to a 485 communication circuit, and the 485 communication circuit is electrically connected to a communication interface.

[0009] Optionally, the power supply circuit includes a power supply communication interface, the power supply communication interface is electrically connected to the power supply input, and the 485 communication circuit is also electrically connected to the power supply communication interface.

[0010] Optionally, the CPU main control circuit is also electrically connected to a key circuit.

[0011] Optionally, the CPU main control circuit is also electrically connected to a digital tube display circuit.

[0012] Optionally, the CPU main control circuit is also electrically connected to a program download interface.

[0013] Optionally, the voltage stabilizing circuit adopts a TL431 voltage stabilizing circuit.

[0014] Optionally, the short protection circuit includes an MP2315 chip.

[0015] Optionally, the MOS control circuit adopts dual control terminals, one control terminal is electrically connected to the positive electrode of the lock interface circuit, and the other control terminal is electrically connected to the negative electrode of the lock interface circuit.

[0016] In summary, the present invention includes at least one of the following beneficial effects:

[0017] 1. The present invention uses MOS control circuit to realize multiplexed control of multiple electromagnetic locks, so as to achieve the function of taking into account the dual-end control of electromagnetic locks while consuming only a small number of IO ports. Compared with single-end (single-side) control, the advantages of dual-end (dual-side) control are good stability, smaller shutdown current, and higher fault resistance rate.

[0018] 2. The present invention uses an ADC acquisition circuit to detect the voltage values ​​of different lock interfaces, so that one ADC acquisition circuit can detect the switch status of 4 electromagnetic locks at the same time, and can perform batch detection of electromagnetic locks. In conjunction with the voltage stabilizing circuit, it takes into account the ability to detect the number of electromagnetic locks and improve the detection accuracy, reduces the occupancy of a large number of IO ports, reduces the difficulty of wiring, and improves the anti-interference ability of electromagnetic lock detection.

[0019] 3. The present invention adopts a short-circuit protection circuit to output a stable voltage as the power supply for the electromagnetic lock, and uses a lock short-circuit detection circuit to realize short-circuit feedback detection, thereby realizing the function of electromagnetic lock short-circuit fault detection and protection, effectively reducing the safety hazards caused by lock failures and reducing product operation and maintenance costs.

[0020] 4. The present invention connects the power communication interface of the power circuit and the CPU main control circuit through the 485 communication circuit, and can remotely obtain the information of the power circuit and the CPU main control circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0022] Figure 1 This is a structural block diagram of the lock control panel of the present invention;

[0023] Figure 2 is a circuit diagram of a power supply circuit in a lock control panel of the present invention;

[0024] Figure 3 It is a circuit diagram of the 485 communication circuit in the lock control board of the present invention;

[0025] Figure 4 A circuit diagram of a lock interface circuit in the lock control panel of the present invention;

[0026] Figure 5 The circuit diagram of the ADC acquisition circuit in the lock control board of the present invention;

[0027] Figure 6 It is a circuit diagram of the MOS control circuit in the lock control board of the present invention;

[0028] Figure 7 It is a circuit diagram of a short circuit protection circuit in a lock control panel of the present invention;

[0029] Figure 8 It is a circuit diagram of the voltage stabilizing circuit in the lock control board of the present invention;

[0030] Fig. 9 The circuit diagram of the CPU main control circuit in the lock control board of the present invention;

[0031] Fig.10 It is a circuit diagram of a digital tube display circuit in a lock control panel of the present invention;

[0032] Fig.11 The figure is a circuit diagram of the key circuit in the lock control panel of the present invention. DETAILED DESCRIPTION

[0033] The following will combine the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all the embodiments. All other embodiments obtained by ordinary technicians in this field without creative work based on the embodiments of the present invention belong to the scope of protection of the present invention.

[0034] In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "top / bottom" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0035] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "provided with", "mounted / connected", "connected", etc. should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0036] Example

[0037] Reference Figure 1 The present invention discloses a lock control board, comprising a power supply circuit, a short circuit protection circuit, a MOS control circuit, a lock interface circuit, a voltage stabilizing circuit, an ADC acquisition circuit and a CPU main control circuit; the CPU main control circuit is electrically connected to the power supply circuit, the short circuit protection circuit, the MOS control circuit and the ADC acquisition circuit respectively, the MOS control circuit and the ADC acquisition circuit are electrically connected to the lock interface circuit, and the power supply circuit is electrically connected to the ADC acquisition circuit through the voltage stabilizing circuit.

[0038] In this embodiment, the power circuit includes a power interface, a power input and a power conversion chip. The input end of the power conversion chip is electrically connected to the power input, the output end of the power conversion chip is electrically connected to the voltage stabilization circuit and the CPU main control circuit, and the power input is also electrically connected to the short circuit protection circuit. Figure 2 , is the circuit diagram of the power supply circuit. The power input is 9V-24V. The power conversion chip converts the power input voltage into 5.2V to provide power for the voltage stabilization circuit and the CPU main control circuit.

[0039] In detail, in this embodiment, the CPU main control circuit is also electrically connected to a 485 communication circuit. Figure 3, is a circuit diagram of a 485 communication circuit, wherein the 485 communication circuit is electrically connected to a communication interface, through which information of the CPU main control circuit can be remotely obtained. The power supply circuit includes a power supply communication interface, which is electrically connected to the power supply input, and the 485 communication circuit is also electrically connected to the power supply communication interface, through which information of the power supply circuit can also be remotely obtained.

[0040] Reference Figure 5 , is a circuit diagram of an ADC acquisition circuit. The ADC acquisition circuit includes a TVS electrostatic protection D13 and 9 resistors R57, R58, R62, R59, R63, R60, R64, R61 and R65. The resistors R58 and R62; R59 and R63; R60 and R64 as well as R61 and R65 are divided into four parallel feedback lines; the first end of the resistor R57 is connected to the power input end of the ADC acquisition circuit, the second end of the resistor R57 is connected to the first ends of the four feedback lines, the first end of the TVS electrostatic protection D13 and the CPU main control circuit P1.3 interface, and the second end of the TVS electrostatic protection D13 is grounded; the second ends of the four feedback lines are connected to CK1, CK2, CK3 and CK4 of the four lock interfaces one by one. According to the resistance voltage division formula Uout = R1 / (R1+R2)*Uin, 15 combination voltages can be obtained, that is, multiple feedback lines output 15 different voltage values ​​according to the on and off of the lock interface. The CPU main control circuit reads different voltage values ​​and determines which feedback lines are opened and closed according to the voltage values.

[0041] Reference Figure 6 , is a circuit diagram of a MOS control circuit. The MOS control circuit is actually a circuit of a P and N MOS combination, including a PMOS tube and an NMOS tube. The NMOS tube has pins 1, 5, and 6. Pin 5 of the NMOS tube is grounded, and pin 6 of the NMOS tube is multiplexed on the NMOS terminal of the lock interface circuit. Pin 1 of the NMOS tube is connected to the first end of a resistor R186, and the second end of the resistor R186 is connected to the first end of a resistor R103 and a CPU main control circuit. The second end of the resistor R103 is grounded. The resistor R186 has a current limiting function, and the resistor R103 has a pull-down function to prevent the CPU main control circuit from being unlocked due to a slow power-on reaction time.

[0042] The PMOS tube has pins 2, 3, and 4. Pin 2 of the PMOS tube is connected to the power supply, and pin 3 of the PMOS tube is connected to the collector of transistor Q8 and the first end of resistor R51. The second end of resistor R51 is connected to the power supply, and the emitter of transistor Q8 is grounded; pin 4 of the PMOS tube is connected to the PMOS terminal of the lock interface circuit. Due to the characteristics of the PMOS tube, the CPU main control circuit cannot be completely shut down, so transistor Q8 is needed to assist in shutting down. R51 is a pull-up resistor to prevent the MOS control circuit from conducting when powered on.

[0043] The base of the transistor Q8 is connected to the first end of the resistor R195, the second end of the resistor R195 is connected to the first end of the resistor R199 and the CPU main control circuit, the second end of the resistor R199 is grounded, the resistor R195 is used to limit the current of the transistor Q8, and the resistor R199 has a pull-down effect to prevent the CPU main control circuit from unlocking due to a slow power-on reaction time.

[0044] One of the PMOS tubes can be connected to the positive poles of the lock control of four lock interface circuits, and one of the NMOS tubes can be reused on the negative poles of the lock control of four lock interface circuits, thereby achieving multiple reuse. This can reduce the occupation of a large number of IO ports, reduce the lock shutdown current, and thus improve the static current stability.

[0045] Reference Figure 4 , is a circuit diagram of one of the lock interface circuits, the lock interface circuit includes an interface CN1, a CN1 is used for the interface of the electromagnetic lock, the pin 1 of the interface CN1 is grounded, the pin 4 of the interface CN1 is connected to the positive electrode of LED1 and the PMOS tube through the PMOS terminal, the negative electrode of LED1 is connected to the first end of the resistor R237, the second end of the resistor R237 is connected to the NMOS tube through the NMOS terminal, LED1 and R237 form an LED lamp circuit, when the PMOS tube and the NMOS tube are turned on, the electromagnetic lock will open, and the LED lamp will also light up.

[0046] Pin 3 of the interface CN1 is connected to the anode of diode D49 and the anode of diode D18, and pin 4 of the interface CN1 is connected to the cathode of diode D49. The cathode of diode D18 is connected to the NMOS tube through the NMOS terminal. D49 is used for freewheeling, and D18 is used to reduce the impact caused by NMOS tube reuse.

[0047] Reference Figure 7 , is the circuit diagram of the short circuit protection circuit, and the short circuit protection circuit uses the MP2315 chip. In addition to the following functions, the MP2315 chip also has over-current, over-voltage and over-temperature protection functions, which plays a good role in protecting the electromagnetic lock during operation.

[0048] In this embodiment, the 75K resistor of the pull-down resistor 232 of pin 1 of the MP2315 chip is used to set it to asynchronous mode, pin 2 of the MP2315 chip is connected to the power input, where 12 to 24V can be input, pin 4 of the MP2315 chip is grounded, and pin 6 of the MP2315 chip is connected to the power input through the 200K resistor of resistor R236. In order to enable the MP2315 chip to work normally when powered on, pin 7 of the MP2315 chip is grounded through capacitor C45 for decoupling.

[0049] Pin 3 of the MP2315 chip is connected to the first end of the 4.7UH inductor L2, and the converted output is connected to the 4.7UH inductor L2 to filter out the ripple. Pin 8 of the MP2315 chip is connected to the first end of the resistor R234 and the first end of the resistor 235. Pin 8 of the MP2315 chip is the feedback pin voltage 791mV, which is obtained by voltage division by the resistor R234 and the resistor R235. 15V can be output here. The second end of the resistor 235 is grounded. The second end of the resistor 234 and the second end of the 4.7UH inductor L2 are connected to the first end of the capacitor C47, the first end of the resistor R320 and the first end of the resistor R231. The second end of the capacitor C47 and the second end of the resistor R320 are grounded together. The second end of the resistor R231 is connected to the MOS control circuit. The resistor R231 protects the MOS control circuit from being damaged in a short time.

[0050] Pin 5 of the MP2315 chip is connected to the first end of the resistor R233, the second end of R233 is connected to the first end of the capacitor C46, ​​and the second end of the capacitor C46 is connected to the first end of the 4.7UH inductor L2, forming a floating power supply on the high-speed switch driver.

[0051] In detail, in this embodiment, the resistance value of resistor R234 is 27KΩ, the resistance value of resistor 235 is 1.5KΩ, the resistance value of resistor 231 is 500mΩ, and a fixed output of 15V is given to the MOS control circuit, which is used to control the switch of the lock interface.

[0052] In detail, in the present embodiment, the lock short circuit detection circuit includes a resistor R273, a resistor R274 and a 5.1V voltage regulator D81, the first end of the resistor R273 is connected to the MOS control circuit, the second end of the resistor R273 is connected to the positive electrode of the 5.1V voltage regulator D81, the first end of the resistor R274 and the CPU main control circuit, the negative electrode of the 5.1V voltage regulator D81 and the second end of the resistor R274 are grounded together, the resistor R273 and the resistor R274 are used for voltage division, and the 5.1V voltage regulator D81 is used for voltage stabilization to prevent the CPU main control circuit from being damaged due to a voltage exceeding the voltage that the CPU main control circuit can withstand.

[0053] The CPU main control circuit can read the voltage value of the control circuit that supports the lock short circuit protection in the range of 0 to 4.2V. When the circuit is working normally, the microcontroller reads 4.2V, and when it is short-circuited, it reads 0V, so it can feedback whether the circuit is working normally. When the CPU main control circuit reads the voltage value of 0V, the CPU main control circuit controls the short circuit protection circuit, and protects the MP2315 chip internally, prohibiting voltage output, thereby playing a protective role.

[0054] Reference Figure 8 , is a circuit diagram of a voltage stabilizing circuit, the voltage stabilizing circuit includes a chip TL431, a resistor R46, a resistor R47, a resistor R48 and a filter capacitor C20, the first end of the resistor R48 is connected to the power conversion chip, the second end of the resistor R48 is connected to the first end of the resistor R46, the pin 2 of the chip TL431, the first end of the filter capacitor C20 and the power input end of the ADC acquisition circuit, the second end of the resistor R46 is connected to the first end of the resistor R47 and the pin 1 of the chip TL431, the second end of the resistor R47, the pin 3 of the chip TL431 and the second end of the filter capacitor C20 are grounded.

[0055] Resistor R48 is used to limit the current in the circuit to ensure that the ADC acquisition circuit feedback is normal while also ensuring that the main circuit current is not affected. The settings of R46 and R47 make the voltage adjustable, providing a stable 4.998~5.002V through the chip TL431 and the 0.1uF filter capacitor C20 to ensure that the voltage sampled by the ADC acquisition circuit is stable and not affected by the power conversion chip.

[0056] In detail, in this embodiment, the CPU main control circuit is also electrically connected to a key circuit, referring to Fig.11 The CPU main control circuit is also electrically connected to a digital tube display circuit, referring to Fig.10 The CPU main control circuit is also electrically connected to a program download interface, see Fig. 9 .

[0057] The above are all preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Therefore, any equivalent changes made based on the structure, shape, and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A locking control panel, characterized in that: It includes a power supply circuit, a short protection circuit, a MOS control circuit, a lock interface circuit, a voltage stabilizing circuit, an ADC acquisition circuit and a CPU main control circuit; the CPU main control circuit is electrically connected to the power supply circuit, the short protection circuit, the MOS control circuit and the ADC acquisition circuit respectively, the MOS control circuit and the ADC acquisition circuit are electrically connected to the lock interface circuit, and the power supply circuit is electrically connected to the ADC acquisition circuit through the voltage stabilizing circuit.

2. A locking control panel according to claim 1, characterized in that: The power supply circuit includes a power supply interface, a power supply input and a power supply conversion chip. The input end of the power supply conversion chip is electrically connected to the power supply input, the output end of the power supply conversion chip is electrically connected to the voltage stabilization circuit and the CPU main control circuit, and the power supply input is also electrically connected to the short-circuit protection circuit.

3. A locking control panel according to claim 2, characterized in that: The CPU main control circuit is also electrically connected to a 485 communication circuit, and the 485 communication circuit is electrically connected to a communication interface.

4. A locking control panel according to claim 3, characterized in that: The power supply circuit includes a power supply communication interface, which is electrically connected to the power supply input, and the 485 communication circuit is also electrically connected to the power supply communication interface.

5. The locking control panel according to claim 1, characterized in that: The CPU main control circuit is also electrically connected to a key circuit.

6. The locking panel according to claim 1, characterized in that: The CPU main control circuit is also electrically connected to a digital tube display circuit.

7. The locking control panel according to claim 1, characterized in that: The CPU main control circuit is also electrically connected to a program download interface.

8. A locking control panel according to any one of claims 1 to 7, characterized in that: The voltage stabilizing circuit adopts TL431 voltage stabilizing circuit.

9. A locking control panel according to any one of claims 1 to 7, characterized in that: The short protection circuit includes an MP2315 chip.

10. A locking control panel according to any one of claims 1 to 7, characterized in that: The MOS control circuit adopts dual control terminals, one control terminal is electrically connected to the positive electrode of the lock interface circuit, and the other control terminal is electrically connected to the negative electrode of the lock interface circuit.

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