Semiconductor process data acquisition system and method, process equipment and storage medium
By configuring an independent high-level data acquisition computer, the problem of data acquisition speed and frequency in the prior art is solved, and more efficient data acquisition and transmission is achieved, improving the time accuracy and control quality of the process.
Patent Information
- Application Number
- CN202411527259.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-29
- Publication Date
- 2025-02-07
AI Technical Summary
During the data acquisition process of existing semiconductor process equipment, the transmission speed and acquisition frequency are limited by the hardware configuration, resulting in excessive sampling rate that puts the controller too much load, affecting the time accuracy, and high-frequency sampling occupies a large amount of network bandwidth, affecting the control quality. timely transmission.
By configuring an independent high-data acquisition computer, high-speed data acquisition schemes are performed, including CTC computers and data acquisition computers, and data acquisition computers are used to collect and transmit data using analog input interfaces, industrial communication bus interfaces and network communication interfaces.
Improves the performance and efficiency of data acquisition, enables higher sampling rates and lower delays, ensuring the time accuracy and control quality of the process.
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Figure CN119396100A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor device processing, and in particular to a semiconductor process data acquisition system, a semiconductor process equipment, a semiconductor process data acquisition method, and a computer-readable storage medium. Background Art
[0002] In the prior art, semiconductor process equipment needs to collect process data in real time during the process. Usually, in the process of data collection, the process controller (PMC) first reads the sensor information from the hardware device and sends the data to the central controller (CTC). The central controller transmits the data to the factory's monitoring server through the SECS / GEM or EDA (Interface A) protocol to complete the data collection. However, in the traditional data collection method, the data is processed and forwarded through multiple links, and the transmission speed and acquisition frequency are limited by the hardware configuration. Too high a sampling rate will overload the central controller and process controller, affecting the time accuracy of process control. Too many sampling points and high-frequency sampling also occupy a large network bandwidth, affecting the timely transmission of control quality. In addition, because the deposition rate in the current process is getting higher and higher, instantaneous parameter fluctuations will have a greater impact on the process results. When the sampling frequency is low, the instantaneous fluctuations of the parameters cannot be captured in time. For example, the abnormal phenomenon of the RF system lasts only tens of microseconds to a few milliseconds, which is difficult to capture at a sampling rate of 10Hz.
[0003] In order to overcome the above-mentioned defects in the prior art, there is an urgent need in the art for an improved semiconductor process data acquisition system for executing a high-speed data acquisition solution to improve data acquisition performance. Summary of the invention
[0004] A brief summary of one or more aspects is given below to provide a basic understanding of these aspects. This summary is not an exhaustive overview of all conceived aspects, and is neither intended to identify the key or decisive elements of all aspects nor to define the scope of any or all aspects. Its only purpose is to give some concepts of one or more aspects in a simplified form as a prelude to a more detailed description that will be given later.
[0005] In order to overcome the above-mentioned defects of the prior art, the present invention provides a semiconductor process data acquisition system, a semiconductor process equipment, a semiconductor process data acquisition method and a computer-readable storage medium, which can be configured with an independent high-speed data acquisition computer to execute a high-speed data acquisition solution to improve data acquisition performance.
[0006] Specifically, the semiconductor process data acquisition system provided according to the first aspect of the present invention includes a CTC computer and a data acquisition computer. The CTC computer is used to collect process scene information of at least one process chamber of semiconductor process equipment. The data acquisition computer includes at least one analog input interface, a first industrial communication bus interface and a first network communication interface. The at least one analog input interface is connected to the analog output interface of the at least one process chamber to collect the analog signal outputted by it. The first industrial communication bus interface is connected to the second industrial communication bus interface of the at least one process chamber to collect the control signal outputted by the control module of the semiconductor process equipment. The first network communication interface is connected to the second network communication interface of the CTC computer to obtain the process scene information collected by it.
[0007] Furthermore, in some embodiments of the present invention, the data acquisition computer includes at least one data acquisition card. The at least one analog input interface is configured on the at least one data acquisition card to acquire the analog signal output by the analog output interface of the at least one process chamber. The analog signal includes a current signal and / or a voltage signal output by a radio frequency power supply and / or a radio frequency regulator configured in the process chamber.
[0008] Furthermore, in some embodiments of the present invention, the control module is a PLC, which adopts the OPC UA protocol to periodically send to the first industrial communication bus interface a switch signal output to at least one valve configured in the process chamber, and / or a sensor signal obtained from at least one sensor configured in the process chamber.
[0009] Furthermore, in some embodiments of the present invention, the process scene information includes at least one of a process chamber name, a process name, a wafer name, a start event, and a stop event of the running process.
[0010] Furthermore, in some embodiments of the present invention, the data acquisition computer further includes a logic processing unit, which is used to collect semiconductor process data according to the start event, stop event, and preset collection scheme collected by the CTC computer.
[0011] Further, in some embodiments of the present invention, the acquisition scheme involves a data list, a trigger event and scene information. The data list includes data name, data type, acquisition channel, acquisition cycle and maximum acquisition length. The trigger event includes a start event and an end event. The start event is used to characterize the start of a semiconductor process step. The end event is used to characterize the end of a semiconductor process step. The scene information includes a process name, a batch name, a batch ID and a wafer ID.
[0012] Further, in some embodiments of the present invention, the logic processing unit is configured to: in response to receiving the start event of the CTC computer acquisition, determine the corresponding acquisition table ID and at least one channel ID corresponding to the acquisition table ID according to the data list. The channel ID is unique in the entire acquisition system and is used to index the corresponding channel; according to the acquisition table ID, determine the corresponding end event, acquisition cycle and maximum acquisition length; according to the at least one channel ID, determine the channel name, channel type, channel address and conversion factor of the semiconductor process data to be acquired. The channel name is used to describe the meaning of the corresponding channel. The channel type is used to define the data form of the corresponding channel. The channel address is used to define the channel number of the corresponding channel on the data acquisition card or the register address in the control module. The conversion factor is used to indicate the numerical relationship between the analog signal and the corresponding actual physical quantity; according to the acquisition cycle, the channel name, the channel type, the channel address and the conversion factor, collect the semiconductor process data of the at least one process chamber; and in response to receiving the corresponding end event or the data acquisition length reaching the maximum acquisition length, end the acquisition of the semiconductor process data.
[0013] Furthermore, in some embodiments of the present invention, the logic processing unit is further configured to: generate a collection history record in a collection history record table and generate a corresponding collection data table while or after collecting the semiconductor process data. The collection history record involves the record number, collection table ID, start time, end time and scene information of the semiconductor process data. The collection data table contains multiple time collection data sets between the start time and the end time and their corresponding timestamps; and store the updated collection history record table and the generated collection data table in a storage medium.
[0014] In addition, the semiconductor process equipment provided according to the second aspect of the present invention comprises at least one process chamber, a semiconductor process data collection system and a control module as provided in the first aspect of the present invention. The control module is used to control the at least one process chamber to perform a thin film deposition process on the wafer therein according to the semiconductor process data collected by the collection system.
[0015] In addition, the semiconductor process data collection method provided according to the third aspect of the present invention includes the following steps: obtaining the collected process scene information from the second network communication interface of the CTC computer via the first network communication interface of the data acquisition computer. The process scene information at least includes a start event and a stop event; in response to receiving the start event, collecting the analog signal output from the analog output interface of the at least one process chamber via at least one analog input interface of the data acquisition computer, and collecting the control signal output by the control module of the semiconductor process equipment from the second industrial communication bus interface of the at least one process chamber via the first industrial communication bus interface of the data acquisition computer; and in response to receiving the end event, or the data acquisition length reaches the preset maximum acquisition length, ending the collection of the semiconductor process data.
[0016] In addition, the computer-readable storage medium provided in the fourth aspect of the present invention stores computer instructions, which, when executed by a processor, implement the semiconductor process data collection method provided in the third aspect of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] The above features and advantages of the present invention can be better understood after reading the detailed description of the embodiments of the present disclosure in conjunction with the following drawings. In the drawings, the components are not necessarily drawn to scale, and components with similar related properties or features may have the same or similar reference numerals.
[0018] Figure 1 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown.
[0019] Figure 2 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown.
[0020] Figure 3 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown.
[0021] Figure 4 A schematic flow chart of a method for collecting semiconductor process data provided according to some embodiments of the present invention is shown. DETAILED DESCRIPTION
[0022] The following specific embodiments illustrate the implementation of the present invention, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Although the description of the present invention will be introduced in conjunction with the preferred embodiment, this does not mean that the features of this invention are limited to this implementation. On the contrary, the purpose of introducing the invention in conjunction with the implementation is to cover other options or modifications that may be extended based on the claims of the present invention. In order to provide a deep understanding of the present invention, the following description will include many specific details. The present invention can also be implemented without using these details. In addition, in order to avoid confusion or blurring the focus of the present invention, some specific details will be omitted in the description.
[0023] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0024] In addition, the terms "upper", "lower", "left", "right", "top", "bottom", "horizontal" and "vertical" used in the following description should be understood as the directions shown in the paragraph and the related drawings. Such relative terms are only used for the convenience of description and do not mean that the device described therein must be manufactured or operated in a specific direction, and therefore should not be understood as limiting the present invention.
[0025] It is understood that although the terms "first", "second", "third", etc. may be used herein to describe various components, regions, layers and / or parts, these components, regions, layers and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers and / or parts. Therefore, the first component, region, layer and / or part discussed below may be referred to as a second component, region, layer and / or part without departing from some embodiments of the present invention.
[0026] As mentioned above, in the traditional data acquisition method, data is processed and forwarded through multiple links, and the transmission speed and acquisition frequency are limited by the hardware configuration. Too high a sampling rate will overload the central controller and process controller, affecting the time accuracy of process control. Too many sampling points and high-frequency sampling also occupy a large network bandwidth, affecting the timely transmission of control quality. In addition, because the deposition rate in the current process is getting higher and higher, instantaneous parameter fluctuations will have a greater impact on the process results. When the sampling frequency is low, the instantaneous fluctuations of the parameters cannot be captured in time. For example, the abnormal phenomenon of the RF system lasts only tens of microseconds to a few milliseconds, which is difficult to capture at a sampling rate of 10Hz.
[0027] In order to overcome the above-mentioned defects of the prior art, the present invention provides a semiconductor process data acquisition system, a semiconductor process equipment, a semiconductor process data acquisition method and a computer-readable storage medium, which can be configured with an independent high-speed data acquisition computer to execute a high-speed data acquisition solution to improve data acquisition performance.
[0028] In some non-limiting embodiments, the semiconductor process data collection system provided by the first aspect of the present invention may be configured to be implemented in the semiconductor process equipment provided by the second aspect of the present invention.
[0029] Please refer to the reference for details Figure 1 to Figure 3 . Figure 1 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown. Figure 2 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown. Figure 3 A schematic structural diagram of semiconductor process equipment provided according to some embodiments of the present invention is shown.
[0030] exist Figure 1 In the illustrated embodiment, the semiconductor process equipment provided by the second aspect of the present invention includes at least one process chamber 20, a semiconductor process data collection system 10 and a control module 30 as provided by the first aspect of the present invention. Here, the control module 30 is used to control at least one process chamber 20 to perform a thin film deposition process on a wafer therein according to the semiconductor process data collected by the collection system 10. The control module 30 can transmit information with at least one process chamber 20 via an Ethernet protocol.
[0031] Further, in Figure 2In the illustrated embodiment, the semiconductor process data acquisition system 10 provided by the first aspect of the present invention includes a CTC computer 11 and a data acquisition computer 12. Here, the CTC computer 11 is used to collect 20 process scene information of at least one process chamber of the semiconductor process equipment. The CTC computer 11 and at least one process chamber 20 can also transmit information through the Ethernet protocol. The data acquisition computer 12 includes at least one analog input interface 121, a first industrial communication bus interface 122 and a first network communication interface. The at least one analog input interface 122 is connected to the analog output interface 21 of at least one process chamber 20 to collect the analog signal outputted by it. The first industrial communication bus interface 122 is connected to the second industrial communication bus interface 22 of at least one process chamber 20 to collect the control signal outputted by the control module of the semiconductor process equipment. The first network communication interface is connected to the second network communication interface of the CTC computer 11 to obtain the process scene information collected by it.
[0032] Here, the process scene information includes at least one of the process chamber name, process name, wafer name, start event, and stop event of the running process. The process scene information can be transmitted through network communication protocols such as HSMS (High-speed SECS Message Services) and MessageQueue.
[0033] In addition, in some embodiments, the process scene information may also optionally include the operation status and state switching events of at least one process chamber 20, such as Job_Start, Process_Start, Wafer_ID, Lot_ID and other information. Here, Job_Start is the start of a processing task for a group of silicon wafers. Process_Start is the start of a processing task for a silicon wafer, which is one of a group of silicon wafers. Wafer_ID is the ID information of the silicon wafer being processed. Lot_ID is the name of a group of silicon wafer processing tasks.
[0034] exist Figure 3 In the illustrated embodiment, the data acquisition computer 12 includes at least one data acquisition card 123. At least one analog input interface 121 is configured on the at least one data acquisition card 123 to acquire analog signals output by the analog output interface 21 of at least one process chamber 20.
[0035] Further, in Figure 1 In the illustrated embodiment, the analog signal includes a current signal and / or a voltage signal output by a radio frequency power supply configured in the process chamber 20. Alternatively, the analog signal includes a current signal and / or a voltage signal output by a radio frequency regulator configured in the process chamber 20.
[0036] In addition, Figure 1 In the illustrated embodiment, at least one process chamber 20 may also be optionally equipped with a motion controller, an MFC, a servo valve, a valve, and a temperature controller. The motion controller, the MFC, the servo valve, the valve, the temperature controller, the RF power supply, and / or the RF regulator in the at least one process chamber 20 may transmit information via EtherCAT or DeviceNet protocol.
[0037] Here, the semiconductor process data acquisition system provided in the first aspect of the present invention can achieve a sampling rate of more than 100K per second for the acquisition of analog data using a high-speed analog or digital conversion device, thereby improving data acquisition efficiency.
[0038] In addition, Figure 3 In the illustrated embodiment, the control module 30 is preferably a PLC, which uses the OPC UA protocol to periodically send to the first industrial communication bus interface 122 a switch signal output to at least one valve configured in the process chamber 20, and / or a sensor signal obtained from at least one sensor configured in the process chamber 20.
[0039] In this way, for the data transmitted by the first industrial communication bus interface 122, the semiconductor process data collection system provided by the first aspect of the present invention adopts a subscription / publishing method to collect data. The data service control module 30 publishes the data, and the collection server subscribes to the data. The collection process does not increase the burden on the collection server.
[0040] In addition, in some embodiments, the data acquisition computer 12 further includes a logic processing unit. Here, the logic processing unit is used to collect semiconductor process data according to the start event, stop event collected by the CTC computer 11 and a preset collection scheme.
[0041] Please refer to Tables 1 to 3. Table 1 shows a channel information definition table provided according to some embodiments of the present invention. Table 2 shows a data collection definition table provided according to some embodiments of the present invention. Table 3 shows a data collection plan table provided according to some embodiments of the present invention.
[0042] Table 1 Channel information definition table
[0043] Channel ID Channel Name Channel Type Channel Address Conversion factor 1 PM1_Param1 Pressure 0 2000 PM1_Param2 Pressure 1 0.5 3 PM1_Param3 Voltage 2 100 4 PM1_Param4 Voltage 3 2000 5 PM1_Param5 communication IPAdress:NodeId 1 6 PM1_Param6 communication IPAddress:NodeId 1 7 PM2_Param1 Voltage 4 2000 8 PM2_Param2 5 5 0.5 9 PM2_Param3 Voltage 6 100 10 PM2_Param4 Voltage 8 2000 11 PM2_Param5 communication IPAdress:NodeId 1 12 PM2_Param6 communication IPAdress:NodeId 1
[0044] Table 2 Data collection definition table
[0045]
[0046] Table 3 Data collection schedule
[0047] Collection table ID Starting Event End Event Collection cycle (ms) Maximum acquisition length RPT001 PM1 Process Start PM1 Process End 10 60000 RPT002 PM2 Process Start PM2 Process End 10 60000 RPT003 PM3 Process Start PM3 Process End 10 60000 RPT004 PM4 Process Start PM4 Process End 10 60000
[0048] Specifically, the above acquisition scheme involves a data list, a trigger event, and scenario information. Here, the data list includes data name, data type, acquisition channel, acquisition cycle, and maximum acquisition length. The trigger event includes a start event and an end event, wherein the start event is used to characterize the start of a semiconductor process step, such as Recipe_start, Process_start, Recipe_Step_Started, etc. The end event is used to characterize the end of a semiconductor process step, such as Recipe_completed, Process_completed, Recipe_Step_Completed, etc. The scenario information includes a process name (Recipe_Name), a lot name (Lot_Name), a lot ID (Lot_ID), and a wafer ID (Wafer_ID).
[0049] In some non-limiting embodiments, the bonding device provided in the first aspect of the present invention further includes a memory and a processor. Here, the memory includes but is not limited to the computer-readable storage medium provided in the fourth aspect, on which computer instructions are stored. When the computer instructions are executed by the processor, the method for collecting semiconductor process data provided in the third aspect of the present invention is implemented. The processor is connected to the memory and is configured to execute the computer instructions stored in the memory to implement the method for collecting semiconductor process data provided in the third aspect of the present invention.
[0050] The working principle of the semiconductor process data collection system described above will be described below in conjunction with some embodiments of semiconductor process data collection methods. Those skilled in the art will understand that these embodiments of the collection methods are only some non-limiting implementation methods provided by the present invention, and are intended to clearly demonstrate the main concept of the present invention and provide some specific solutions that are convenient for the public to implement, rather than limiting all functions or all working modes of the collection system. Similarly, the collection system is also only a non-limiting implementation method provided by the present invention, and does not constitute a limitation on the execution subject and execution order of each step in these collection methods.
[0051] Please refer to Figure 4 . Figure 4 A schematic flow chart of a method for collecting semiconductor process data provided according to some embodiments of the present invention is shown.
[0052] like Figure 4 As shown, the processor can first obtain the collected process scene information from the second network communication interface of the CTC computer 11 via the first network communication interface of the data acquisition computer 12. Here, the process scene information at least includes a start event and a stop event.
[0053] Afterwards, in response to receiving a start event, the processor can collect the analog signal output by the analog output interface 21 of at least one process chamber 20 via at least one analog input interface 121 of the data acquisition computer 12, and collect the control signal output by the control module of the semiconductor process equipment from the second industrial communication bus interface 22 of at least one process chamber 20 via the first industrial communication bus interface 122 of the data acquisition computer 12.
[0054] In addition, in some preferred embodiments, in response to receiving the start event collected by the CTC computer 11, the logic processing unit can also determine the corresponding collection table ID and at least one channel ID corresponding to the collection table ID according to the data list. Here, the channel ID is unique in the entire collection system and is used to index the corresponding channel.
[0055] Afterwards, the processor may determine the corresponding end event, collection cycle, and maximum collection length according to the collection table ID.
[0056] Afterwards, the processor can determine the channel name, channel type, channel address and conversion factor of the semiconductor process data to be collected according to at least one channel ID. Here, the channel name is used to describe the meaning of the corresponding channel, the channel type is used to define the data format of the corresponding channel, the channel address is used to define the channel number of the corresponding channel on the data acquisition card or the register address in the control module, and the conversion factor is used to indicate the numerical relationship between the analog signal and the corresponding actual physical quantity.
[0057] Thereafter, the processor may collect semiconductor process data of at least one process chamber according to the collection period, channel name, channel type, channel address, and conversion factor.
[0058] In addition, while or after collecting semiconductor process data, the logic processing unit can generate a collection history record in the collection history record table and generate a corresponding collection data table. Here, the collection history record involves the record number of the semiconductor process data, the collection table ID, the start time, the end time and the scene information. The collection data table contains multiple time collection data sets between the start time and the end time and their corresponding timestamps.
[0059] Here, the record number is the unique ID of the entire acquisition process. The acquisition table ID is the acquisition table ID in the acquisition configuration. The start timestamp and end timestamp record the start and end time of the acquisition. The scene information includes the process name (Recipe_Name), lot name (Lot_Name), lot ID (Lot_ID) and wafer ID (Wafer_ID).
[0060] Afterwards, the logic processing unit may store the updated collection history record table and the generated collection data table in a storage medium.
[0061] Thereafter, in response to receiving an end event or the data collection length reaching a preset maximum collection length, the processor may end the collection of the semiconductor process data.
[0062] In summary, the semiconductor process data acquisition system, semiconductor process equipment, semiconductor process data acquisition method and computer-readable storage medium provided by the present invention can all be configured with an independent high-speed data acquisition computer to execute high-speed data acquisition solutions to improve data acquisition performance.
[0063] Although the above methods are illustrated and described as a series of actions for simplicity of explanation, it should be understood and appreciated that these methods are not limited by the order of the actions, because according to one or more embodiments, some actions may occur in a different order and / or concurrently with other actions from those illustrated and described herein or not illustrated and described herein but understandable to those skilled in the art.
[0064] Those skilled in the art will appreciate that information, signals, and data may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips cited throughout the above description may be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.
[0065] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or a combination of the two. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps are generally described above in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. The technician may implement the described functionality in different ways for each specific application, but such implementation decisions should not be interpreted as resulting in a departure from the scope of the present invention.
[0066] The steps of the method or algorithm described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software module may reside in a RAM memory, a flash memory, a ROM memory, an EPROM memory, an EEPROM memory, a register, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor so that the processor can read and write information from / to the storage medium. In an alternative, a storage medium may be integrated into a processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and the storage medium may reside in a user terminal as discrete components.
[0067] In one or more exemplary embodiments, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented as a computer program product in software, each function may be stored on or transmitted by a computer-readable medium as one or more instructions or codes. Computer-readable media include both computer storage media and communication media, including any medium that facilitates the transfer of a computer program from one place to another. Storage media may be any available medium that can be accessed by a computer. As an example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of an instruction or data structure and can be accessed by a computer. Any connection is also properly referred to as a computer-readable medium. For example, if the software is transmitted from a website, a server, or other remote source using a coaxial cable, a fiber optic cable, a twisted pair, a digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwaves, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwaves are included in the definition of the medium. Disk and disc as used herein include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and Blu-ray disc, wherein disk often reproduces data magnetically, while disc reproduces data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
[0068] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but should be granted the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A semiconductor process data collection system, characterized in that: include: A CTC computer, used to collect process scene information of at least one process chamber of a semiconductor process equipment; as well as The data acquisition computer comprises at least one analog input interface, a first industrial communication bus interface and a first network communication interface, wherein the at least one analog input interface is connected to the analog output interface of the at least one process chamber to collect the analog signal outputted therefrom, the first industrial communication bus interface is connected to the second industrial communication bus interface of the at least one process chamber to collect the control signal outputted by the control module of the semiconductor process equipment, and the first network communication interface is connected to the second network communication interface of the CTC computer to obtain the collected process scene information.
2. The acquisition system according to claim 1, characterized in that: The data acquisition computer includes at least one data acquisition card, wherein the at least one analog input interface is configured on the at least one data acquisition card to acquire an analog signal output by an analog output interface of the at least one process chamber, wherein the analog signal includes a current signal and / or a voltage signal output by a radio frequency power supply and / or a radio frequency regulator configured in the process chamber.
3. The acquisition system according to claim 1, characterized in that: The control module is a PLC, which uses the OPC UA protocol to regularly send to the first industrial communication bus interface a switch signal output to at least one valve configured in the process chamber, and / or a sensor signal obtained from at least one sensor configured in the process chamber.
4. The acquisition system according to claim 1, characterized in that: The process scenario information includes at least one of a process chamber name, a process name, a wafer name, a start event, and a stop event of a running process.
5. The acquisition system according to claim 4, characterized in that: The data acquisition computer also includes: The logic processing unit is used to collect semiconductor process data according to the start events, stop events and preset collection schemes collected by the CTC computer.
6. The acquisition system according to claim 5, characterized in that: The acquisition scheme involves data lists, trigger events and scene information, among which: The data list includes data name, data type, acquisition channel, acquisition cycle and maximum acquisition length. The trigger event includes a start event and an end event, wherein the start event is used to indicate the start of a semiconductor process step, and the end event is used to indicate the end of a semiconductor process step. The scene information includes process name, batch name, batch ID and wafer ID.
7. The acquisition system according to claim 6, characterized in that: The logic processing unit is configured to: In response to receiving a start event of the CTC computer acquisition, determining the corresponding acquisition table ID and at least one channel ID corresponding to the acquisition table ID according to the data list, wherein the channel ID is unique in the entire acquisition system and is used to index the corresponding channel; According to the collection table ID, determine the corresponding end event, collection cycle and maximum collection length; Determine the channel name, channel type, channel address and conversion factor of the semiconductor process data to be collected according to the at least one channel ID, wherein the channel name is used to describe the meaning of the corresponding channel, the channel type is used to define the data format of the corresponding channel, the channel address is used to define the channel number of the corresponding channel on the data acquisition card or the register address in the control module, and the conversion factor is used to indicate the numerical relationship between the analog signal and the corresponding actual physical quantity; Collecting semiconductor process data of the at least one process chamber according to the collection period, the channel name, the channel type, the channel address, and the conversion coefficient; and In response to receiving the corresponding end event or the data collection length reaching the maximum collection length, the collection of the semiconductor process data is ended.
8. The acquisition system according to claim 7, characterized in that: The logic processing unit is further configured to: While or after collecting the semiconductor process data, generating a collection history record in a collection history record table and generating a corresponding collection data table, wherein the collection history record involves a record number, a collection table ID, a start time, an end time and scene information of the semiconductor process data, and the collection data table contains a plurality of time collection data sets between the start time and the end time and their corresponding timestamps; and The updated collection history table and the generated collection data table are stored in a storage medium.
9. A semiconductor process equipment, characterized in that: include: at least one process chamber; The semiconductor process data collection system according to any one of claims 1 to 8; as well as The control module is used to control the at least one process chamber to perform a thin film deposition process on the wafer therein according to the semiconductor process data collected by the collection system.
10. A method for collecting semiconductor process data, characterized in that: The following steps are involved: Obtaining the collected process scene information from the second network communication interface of the CTC computer via the first network communication interface of the data acquisition computer, wherein the process scene information at least includes a start event and a stop event; In response to receiving the start event, collecting an analog signal output from an analog output interface of the at least one process chamber via at least one analog input interface of the data acquisition computer, and collecting a control signal output from a control module of the semiconductor process equipment from a second industrial communication bus interface of the at least one process chamber via a first industrial communication bus interface of the data acquisition computer; and In response to receiving the end event, or the data collection length reaching a preset maximum collection length, the collection of the semiconductor process data is ended.
11. A computer-readable storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed by a processor, the method for collecting semiconductor process data as claimed in claim 10 is implemented.
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