Quantum dot enhanced dynamic power consumption management method and system and related equipment

Abstract

The invention discloses a quantum dot enhanced dynamic power consumption management method, a quantum dot enhanced dynamic power consumption management system and related equipment. Aiming at the problem of insufficient optimization caused by difficulty in comprehensively, accurately and dynamically sensing the internal energy distribution and conversion process of a chip by a traditional method, the method comprises the following steps of: acquiring the quantum state of the chip in real time by utilizing a quantum dot sensing array, and constructing an adaptive power consumption prediction model by combining multi-source data fusion and feature extraction; and an optimal management strategy is generated based on a multi-objective optimization framework, an execution feedback and self-learning mechanism is introduced, and finally a complete closed-loop control system is formed. The method can be widely applied to various processor chips in the fields of high-performance calculation, the Internet of Things, artificial intelligence and the like, dynamic power consumption management of the chips is achieved through the quantum dot enhancement technology, the performance is guaranteed, meanwhile, energy consumption is minimized, the battery endurance time is prolonged, the heat dissipation cost is reduced, and the energy efficiency of the chips can be remarkably improved.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuit design, and in particular to a chip dynamic power consumption management method, system and related equipment based on quantum dot sensing. Technical Background

[0002] With the continuous evolution of semiconductor technology and the continuous improvement of chip integration, the problem of chip power consumption has become increasingly prominent and has become a bottleneck restricting the performance and reliability of integrated circuits. Traditional power consumption management methods, such as dynamic voltage and frequency scaling (DVFS) and gated clocks, are mainly based on the macroscopic state information of the chip, such as temperature, voltage, current, etc. The adjustment granularity is coarse and the response speed is slow, making it difficult to cope with the complex and changeable power consumption behavior inside the chip.

[0003] With the development of emerging technologies such as quantum computing and artificial intelligence, new ideas and methods have been brought to chip power consumption management. On the one hand, quantum sensing technology can perform real-time and in-situ characterization of microscopic states such as charge distribution and energy level transitions inside the chip at the nanoscale, providing more refined and comprehensive data support for power consumption analysis. On the other hand, machine learning algorithms can automatically extract key features related to power consumption from massive amounts of chip status data, build accurate and adaptive power consumption prediction models, and generate optimal management strategies based on multi-objective optimization algorithms. However, how to efficiently integrate quantum sensing with machine learning to form a complete chip dynamic power consumption management solution still faces many technical challenges:

[0004] (1) Efficient acquisition and processing of quantum state information. The quantum dot array integrated on the chip surface can generate a massive amount of raw data. How to perform pre-processing such as data compression, filtering, and feature extraction inside the chip to reduce the pressure of data transmission and storage is a key issue.

[0005] (2) Extraction and fusion of quantum-classical hybrid features. Chip power consumption is not only related to macroscopic physical quantities such as temperature and voltage, but also closely related to microscopic quantum states. How to extract power consumption features from two different physical levels and organically combine them to form a unified feature space is the difficulty of power consumption modeling.

[0006] (3) Construction and update of adaptive power consumption prediction model. Chip power consumption behavior evolves dynamically with changes in process, environment, task and other factors. The prediction model needs to be able to learn and update adaptively. How to optimize the model structure and parameters online in real time and balance the accuracy and complexity of the model is another challenge.

[0007] (4) Search and decision-making for multi-objective dynamic optimization strategies. Power consumption management often needs to take into account multiple objectives such as performance, energy efficiency, and reliability, and there may be conflicts between the objectives. How to quickly search for the Pareto optimal solution set and select a trade-off solution from it based on the specific application scenario and user preferences is the key to strategy formulation.

[0008] (5) Precise control and real-time feedback of strategy execution. How to efficiently convert management strategies into specific instructions for control chips, monitor execution results in a timely manner, dynamically adjust strategies, and form closed-loop control is also a difficult point in the implementation plan.

[0009] (6) System-level self-learning and evolutionary optimization. As the system runs for a long time, how to continuously accumulate and mine chip status log data, automatically extract system-level optimization knowledge and rules, and timely feed them back to the underlying algorithm to continuously improve the overall optimization effect is an issue that must be considered in intelligent solutions.

[0010] In response to the above technical challenges, a new chip dynamic power consumption management solution is urgently needed to give full play to the advantages of quantum regulation and intelligent optimization, realize accurate perception, prediction and control of power consumption behavior at the nanoscale and picosecond time, maximize the energy efficiency potential of chips, and promote the sustainable development of the integrated circuit industry. Summary of the invention

[0011] The present invention proposes a quantum dot enhanced dynamic power consumption management method and system, aiming to overcome the deficiencies in the existing chip dynamic power consumption management technology.

[0012] In order to achieve the above-mentioned object of the invention, the embodiment of the present invention provides the following technical solutions:

[0013] A quantum dot enhanced dynamic power consumption management method, characterized in that it comprises the following steps:

[0014] Step S1: using the quantum dot sensor array integrated on the chip surface, real-time acquisition of quantum state information such as charge distribution and energy level transition inside the chip is performed, and converted into processable digital signal output;

[0015] Step S2: Time-synchronize and spatially align the quantum state data with the data from traditional sensors such as temperature, voltage, and current, and remove noise interference through an adaptive filtering algorithm to ultimately form a unified multidimensional state matrix;

[0016] Step S3: using nonlinear dimensionality reduction mapping and quantum classical hybrid feature selection algorithm, extract a set of low-dimensional key feature vectors that are strongly correlated with power consumption from the high-dimensional state matrix;

[0017] Step S4: Taking the extracted key features as input and combining the historical power consumption data of the chip, an adaptive power consumption prediction model is constructed through the long short-term memory network and the attention mechanism, and the incremental learning algorithm is used to realize the online update of the model;

[0018] Step S5: embed the power consumption prediction model into a multi-objective optimization framework, take the chip performance, energy consumption, temperature and other indicators as optimization targets, take voltage, frequency, task scheduling and other parameters as optimization variables, and use the evolutionary algorithm to search for a set of optimal management strategies;

[0019] Step S6: Convert the optimal strategy into a series of specific control instructions, accurately adjust the working state of the chip by configuring registers, etc., and monitor the execution effect in real time through the sensor network, calculate the deviation from the expectation, and form a closed-loop control;

[0020] Step S7: With the long-term operation of the system, a large amount of chip status logs and strategy execution effect data are accumulated. Through multi-scale spatiotemporal behavior pattern mining, combined with the latest algorithm iterations, the underlying mathematical models and solutions are continuously optimized and integrated into the system through progressive updates to achieve self-improvement of the overall optimization capability.

[0021] Furthermore, the step S1 comprises:

[0022] a. Initialize the perovskite quantum dot array, where the quantum dot size is 3-5nm and the spacing is 10-15nm;

[0023] b. Using a multi-wavelength tunable laser to generate a laser pulse sequence that matches the absorption band of quantum dots and irradiate the quantum dot array;

[0024] c. Receive the fluorescence signal emitted by the quantum dots through an integrated single-photon detector array and convert it into a weak current signal;

[0025] d. Perform low-noise amplification and analog-to-digital conversion on weak current signals to obtain discrete digital signals;

[0026] e. Pack the digital signal according to the frame format and transmit it through the low voltage differential signal interface.

[0027] Furthermore, the step S2 comprises:

[0028] a. Align the timestamps of quantum state data and sensor data, and interpolate the sensor data;

[0029] b. Calibrate quantum state detectors and sensors to eliminate system bias;

[0030] c. Use adaptive Kalman filtering and wavelet threshold denoising algorithm to filter out high-frequency noise and isolated mutation points;

[0031] d. Perform Min-Max normalization on data of different dimensions and linearly scale them to the interval [0,1];

[0032] e. Using tensor decomposition technology, the fused data of a fixed time window is reconstructed into the product form of a core tensor and a factor matrix.

[0033] Furthermore, the step S3 comprises:

[0034] a. Slice the cleansed data according to fixed time windows and calculate the statistical features and differential features of each slice of data;

[0035] b. Use the principal component analysis algorithm to perform orthogonal transformation on the original features;

[0036] c. Introduce the kernel principal component analysis algorithm to perform nonlinear feature transformation and extract high-order correlation patterns between features;

[0037] d. Use the Gini index and mutual information to measure the importance of each feature to power consumption;

[0038] e. Adopt online incremental learning strategy to update feature subsets in real time to adapt to dynamic changes in chip working conditions.

[0039] Furthermore, the step S4 comprises:

[0040] a. According to the time series characteristics of power consumption data, the long short-term memory neural network is selected as the basic prediction model;

[0041] b. Introduce an attention mechanism layer into the model to adaptively adjust the feature weights at different time steps;

[0042] c. Define the root mean square error and L1 regularization term as the loss function to control the prediction bias and model complexity;

[0043] d. Adopt adaptive moment estimation algorithm to iteratively optimize network weights and accelerate convergence:

[0044] m t =β1*m {t-1} +(1-β1)*g t

[0045]

[0046] w=w (t-1) -lr*m hat / (sqrt(v hat )+eps)

[0047] Among them, w is the target optimization parameter of the model, w (t-1) is the target optimization parameter of the previous round of iterative optimization, m t and v t They are the first-order moment estimate and the second-order moment estimate of the gradient, m hat represents the correction of the first-order moment estimate of the gradient, v hat represents the correction value of the second-order moment estimate of the gradient, β1 and β2 are attenuation factors, t is the number of iterations, lr is the learning rate, sqrt(v hat ) represents the correction value of the second-order moment estimate, and eps is the smoothing term.

[0048] e. predict the power consumption for the next T time steps, where T is determined by cross-validation;

[0049] f. When the prediction error exceeds the threshold, the model is incrementally trained with newly collected data to continuously improve the prediction accuracy.

[0050] Furthermore, the step S5 comprises:

[0051] a. Establish a multi-objective optimization model with power consumption, performance, temperature, etc. as targets and voltage, frequency, etc. as optimization variables;

[0052] b. Embed the power consumption prediction model into the optimization framework as the objective function and constraint condition;

[0053] c. Use the improved multi-objective particle swarm optimization algorithm to solve the problem, and introduce non-dominated sorting and crowding evaluation to generate a non-inferior optimal solution set;

[0054] d. According to the user's emphasis on different goals, calculate the fuzzy satisfaction S(x) of the non-inferior optimal solution set: Among them, μ is the membership function corresponding to the i-th objective function;

[0055] e. Select the solution x with the highest satisfaction opt As the final optimization strategy: x opt =argmax S(x).

[0056] Furthermore, the step S6 comprises:

[0057] a. Analyze the optimization strategy and convert it into configuration values ​​for parameters such as voltage and frequency;

[0058] b. Send configuration data to the chip's power management unit, clock management unit and other components by reading and writing registers; c. Collect chip power consumption, performance counters and other monitoring data in real time to evaluate the execution effect of the current strategy;

[0059] d. Dynamically adjust the target weight or constraint threshold of the optimization strategy based on the evaluation results to achieve adaptive fine-tuning of the strategy;

[0060] e. Feedback configuration logs, evaluation data, etc. to the policy optimization and power consumption prediction modules for offline analysis and algorithm improvement.

[0061] Furthermore, the step S7 comprises:

[0062] a. Carry out system-level optimization analysis once a week or month, and conduct exploratory analysis such as time segment analysis, frequent pattern mining, and anomaly detection on the long-term accumulated chip status data and strategy execution data;

[0063] b. Identify key bottleneck resources that affect chip performance, such as memory bandwidth, bus contention, etc., and locate their occurrence time and space areas;

[0064] c. Automatically discover possible optimization opportunities from the perspectives of data flow, control flow, resource allocation, etc., and evaluate their potential benefits; d. Generate incremental or disruptive optimization solutions for systematic optimization opportunities, such as architecture optimization, algorithm replacement, etc.;

[0065] e. Test and evaluate the optimization plan in a small-scale verification environment, and develop a safe and complete deployment plan and rollback plan; f. Gradually deploy the optimization plan, continuously monitor system performance and policy parameters, and correct deviations in a timely manner.

[0066] A quantum dot enhanced dynamic power consumption management system, the system comprising:

[0067] a. Quantum dot sensor array, used for real-time acquisition of chip quantum state signals;

[0068] b. A data fusion unit, used for synchronizing, calibrating, filtering noise and normalizing the quantum state data and other sensor data; c. A feature extraction unit, used for extracting key features related to power consumption from the fused data;

[0069] d. A power consumption prediction unit, used to construct an adaptive power consumption prediction model;

[0070] e. A strategy optimization unit, used to generate an optimal strategy for dynamic power management;

[0071] f. Execution feedback unit, used for policy analysis, execution instruction issuance and effect evaluation feedback;

[0072] g. Self-optimization unit, used for system-level behavior pattern mining and generating long-term optimization solutions.

[0073] An Internet of Things device, comprising a processor and a memory connected via a bus, wherein the processor is used to execute a computer program stored in the memory, so that the Internet of Things device executes the quantum dot enhanced dynamic power consumption management method described in any one of claims 1 to 8.

[0074] A computer-readable storage medium, characterized in that a computer program is stored in the storage medium, and when the program is executed by a processor, the quantum dot enhanced dynamic power consumption management method described in any one of the above items is implemented.

[0075] Compared with the prior art, the present invention has the following beneficial effects:

[0076] 1. The present invention introduces quantum technology into the chip field, realizes precise perception and regulation of power consumption behavior at the nanoscale and femtosecond time, and explores the energy efficiency potential of the chip unprecedentedly.

[0077] 2. The present invention provides a complete analysis and optimization tool chain for heterogeneous data, which can seamlessly connect the underlying quantum state information with the upper-level macro power consumption characteristics, and build an integrated mapping and decision-making model for chips, systems, and environments.

[0078] 3. Through the adaptive, self-learning optimization closed loop, the system can actively adapt to the evolution trend of chip technology and application requirements, continuously improve its own intelligence level, and maximize the service life and value creation period of the chip.

[0079] 4. The present invention empowers chips in the fields of the Internet of Things, artificial intelligence, information-physical systems, etc., providing them with a high-efficiency, high-reliability, and high-adaptability computing power foundation, which is of great significance for driving the development of a new generation of intelligent computing industry. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments are briefly introduced below. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those skilled in the art, other relevant drawings can be obtained based on these drawings without creative work.

[0081] Figure 1 Flowchart of quantum dot enhanced dynamic power management method;

[0082] Figure 2 Quantum dot enhanced dynamic power management system architecture diagram;

[0083] Figure 3 Quantum state information collection flow chart;

[0084] Figure 4Multi-source data fusion and purification flow chart;

[0085] Figure 5 Power consumption key feature extraction flow chart;

[0086] Figure 6 Adaptive power consumption prediction model construction flow chart;

[0087] Figure 7 Multi-objective dynamic power optimization strategy generation flow chart;

[0088] Figure 8 Dynamic power management strategy execution and feedback flow chart;

[0089] Fig. 9 System self-optimization and evolution flow chart;

[0090] Fig.10 A block diagram of the structure of an Internet of Things (IoT) device. Specific implementation plan

[0091] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention. The described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0092] The terms used in this specification, such as the singular forms of "a", "an" and "the", include the singular and plural forms unless the context clearly indicates that they are plural. The use of these terms is only for describing specific embodiments and is not intended to limit the scope of protection of the present invention.

[0093] The invention relates to a quantum dot enhanced dynamic power consumption management method, system and related equipment.

[0094] The workflow of the quantum dot enhanced dynamic power consumption management method of the present invention is as follows: Figure 1 As shown, it mainly includes steps 101 to 107:

[0095] Step 101: quantum state information collection. The quantum dot sensor array integrated on the chip surface is used to collect quantum state information such as charge distribution and energy level transition inside the chip in real time, and convert it into processable digital signal output.

[0096] Step 102: Multi-source data fusion and purification. The quantum state data is synchronized in time and aligned in space with the data from traditional sensors such as temperature, voltage, and current, and noise interference is removed through an adaptive filtering algorithm, ultimately forming a unified multi-dimensional state matrix.

[0097] Step 103: Extraction of key features of power consumption: A set of low-dimensional key feature vectors that are strongly correlated with power consumption are extracted from the high-dimensional state matrix using nonlinear dimensionality reduction mapping and quantum classical hybrid feature selection algorithm.

[0098] Step 104: Adaptive power consumption prediction model construction. Taking the extracted low-dimensional key feature vector as input and combining it with the historical power consumption data of the chip, an adaptive power consumption prediction model is constructed through the long short-term memory network and attention mechanism, and the incremental learning algorithm is used to realize the online update of the model.

[0099] Step 105: Generate multi-objective dynamic power consumption optimization strategy. The power consumption prediction model is embedded in a multi-objective optimization framework, with chip performance, energy consumption, temperature and other indicators as optimization targets, voltage, frequency, task scheduling and other parameters as optimization variables, and an evolutionary algorithm is used to search for a set of optimal management strategies.

[0100] Step 106: Dynamic power management strategy execution and feedback. The optimal strategy is converted into a series of specific control instructions, and the working state of the chip is accurately adjusted by configuring registers, etc. At the same time, the execution effect is monitored in real time through the sensor network, and the deviation from the expectation is calculated to form a closed-loop control.

[0101] Step 107: System self-optimization and evolution. With the long-term operation of the system, a large amount of chip status logs and policy execution effect data are accumulated. Through multi-scale behavior pattern mining in time and space, combined with the latest algorithm iteration, the underlying mathematical models and solutions are continuously optimized and integrated into the system through progressive updates to achieve self-improvement of the overall optimization capability.

[0102] Specifically, Figure 3 As shown, step S101 quantum state information acquisition includes the following processes: chip quantum dot array initialization (11), laser source modulation (12), quantum state reading (13), signal amplification and conversion (14), quantum state data packaging (15). Exemplarily, during the chip manufacturing process, a layer of perovskite quantum dot array is evenly arranged on its surface through self-assembly technology. The size of each quantum dot is controlled at 3-5nm, and the spacing is controlled at 10-15nm. The surface of the quantum dot is modified with organic ligand molecules to form a core-shell structure with the surrounding medium, so that it has a selective response to changes in the charge distribution inside the chip.

[0103] Exemplarily, a multi-wavelength tunable laser is used to generate a laser pulse sequence with a wavelength of 400-700nm, a pulse width of 100-500ps, and a repetition frequency of 10-50MHz. Spectral modulation is achieved through an optical parametric amplifier and a nonlinear crystal to match the absorption band of quantum dots. The excitation light is irradiated onto the quantum dot array to excite the electrons therein to transition to a high energy level. After absorbing the photon energy, the electrons in the quantum dots transition from the ground state to the excited state, leaving holes to form bound excitons. Subsequently, the electrons and holes recombine and radiate fluorescence of a specific wavelength. Secondly, a highly sensitive single-photon detector array is integrated on the surface of the chip, and each detector corresponds to a quantum dot. When the detector receives a photon, a measurable weak current signal is generated, and its intensity is proportional to the number of incident photons. According to the weak optical flow signal, it is amplified by a low noise amplifier (LNA), and the amplification factor is adjustable, and the gain range is 40-60dB. LNA adopts differential symmetrical topology to suppress common-mode interference, and introduces adaptive impedance matching network to reduce signal reflection. The amplified signal is sent to the analog-to-digital converter (ADC) and converted into an 8-bit digital signal with a sampling rate of 1-5 gigasamples per second. To reduce power consumption, the ADC adopts time interval sampling technology and dynamically adjusts the sampling frequency according to the sparse characteristics of the signal. Data is unified according to the discrete digital signal output by the analog-to-digital converter and packaged according to a certain frame format. Each frame includes a synchronization header, a timestamp, a data bit, and a check bit. The synchronization header is composed of a pseudo-random code sequence to achieve frame boundary alignment. The timestamp records the acquisition time of the frame data with a resolution of 10ns. The data bit records the sampling values ​​of all detectors in a cycle and is arranged in a row-first manner. The check bit uses a cyclic redundancy check code (CRC) to detect possible transmission errors. The packaged data frame is transmitted to the post-processing unit through a low-voltage differential signaling (LVDS) interface. Further, according to the above steps, data is output: quantum state digital data stream, the data frame format is as follows: | sync header (2B) | timestamp (4B) | data bit (1024B) | CRC check (4B) |, where B represents byte. The number of data frames generated per second is equal to the repetition frequency of the laser, and the data volume of each frame is 1034B.

[0104] Specifically, Figure 4As shown, in step 102, multi-source data fusion and purification include data synchronization (21), data calibration (22), data filtering (23), data normalization (24), and purified data integration (25). Exemplarily, there are differences in time scale between quantum state data and sensor data (such as temperature, voltage, current, etc.), and synchronization alignment is required. First, the two types of data are timestamp aligned. The sampling frequency of sensor data is generally lower than that of quantum state data, and it is interpolated to make it correspond one-to-one with the timestamp of quantum state data. The interpolation algorithm uses cubic spline interpolation and performs adaptive encrypted sampling in the fast time-varying area to ensure the accuracy of numerical calculation.

[0105] Exemplarily, the measured values ​​of different sensors are different, and there may be systematic deviations in the measured values ​​of the sensors, which need to be calibrated. For quantum state data, a set of standard data is generated using a reference quantum state source, and the response values ​​of all detectors are fitted to obtain a calibration curve. For sensor data, a piecewise linear calibration method is used to select calibration coefficients in different measurement subintervals. All calibration coefficients are updated regularly, and the update cycle is adaptively adjusted according to the drift characteristics of the sensor, with a typical value of 1-10min. Exemplarily, in order to filter out high-frequency noise and isolated mutation points, an adaptive Kalman filtering algorithm is introduced. According to the statistical characteristics of the signal, the parameters of the filter are dynamically adjusted, such as the covariance matrix of process noise and observation noise. For data showing obvious mutation characteristics, a wavelet threshold denoising algorithm is used for smoothing, and Daubechies4 is selected as the wavelet basis function, with a decomposition scale of 3-5 layers. The filtered data is paired with the original data.

[0106] For example, different types of sensor data have large differences in numerical ranges, and normalization is required to facilitate fusion processing. The Min-Max normalization method is used to linearly scale the data to the interval [0, 1]. For example, if the sensor data of a certain dimension is x, its minimum value is min, and its maximum value is max, then the calculation formula for the normalized data x′ is:

[0107] x′=(x-min) / (max-min)

[0108] Among them, max and min are adaptively updated according to historical data, and the update cycle is 1-10s. The normalized data is packaged with the original data to form a fused data frame. The output fused data frame is: |Synchronization header (2B)|Timestamp (4B)|Quantum state data (1024B)|Temperature data (4B)|Voltage data (4B)|Current data (4B)|CRC check (4B)|, wherein the temperature, voltage, and current data are all normalized values, and the data length is 4B. The length of the fused data frame is 1046B, slightly higher than the quantum state data frame. Assuming that the sampling frequency of the sensor data is 1MHz, the fused data rate is approximately 8.37Gbps.

[0109] Exemplarily, in order to realize the correlation analysis between different physical quantities, tensor decomposition technology is introduced to reconstruct the fused data. The fused data frame of a fixed time window (such as 1s) is organized into a third-order tensor, the first dimension represents the sensor type, the second dimension represents the spatial position, and the third dimension represents the time. The Tucker decomposition algorithm can be used to decompose the tensor into the product of a core tensor and three factor matrices: E = G·U1·U2·U3, where E is the original third-order tensor, G is the core tensor, and U1, U2, and U3 are factor matrices of three dimensions respectively. The decomposed tensor has a more compact representation, and the data redundancy is greatly reduced. The rank number of the tensor decomposition (the dimension of the core tensor) can be adaptively adjusted according to the reconstruction error, and the typical value is 10-100. The decomposed data blocks are output as purified data sets for subsequent feature extraction. The final output data purified data set is: |Timestamp (4B)|Core tensor (1000B)|Factor matrix 1 (100B)|Factor matrix 2 (100B)|Factor matrix 3 (100B)|. Assuming the rank of tensor decomposition is 50, the length of each data block is 1304B. After tensor decomposition, a fused data frame can be compressed into a purified data block with a compression ratio of about 80%. The data rate of the purified data set is about 1.67Gbps, which greatly reduces the pressure of subsequent processing.

[0110] Specifically, Figure 5 As shown, step 103 of power consumption key feature extraction includes data preprocessing (31), feature space transformation (32), nonlinear feature selection (33), feature importance evaluation (34), and incremental feature selection (35).

[0111] Exemplarily, the purified data set is sliced ​​according to a fixed time window (such as 10s), and each piece of data constitutes a feature extraction unit. Statistical features are calculated for each extraction unit, including mean, variance, kurtosis, and skewness (used to characterize the overall distribution characteristics of the data). In addition, the first-order difference and second-order difference are calculated to reflect the dynamic change trend of the data. The original feature vector after preprocessing is denoted as X, with a dimension of m.

[0112] For example, in order to eliminate the linear correlation between different features, the principal component analysis algorithm (PCA) is introduced to perform an orthogonal transformation on the preprocessed original feature vector. First, the covariance matrix of the preprocessed original feature vector is calculated:

[0113] C=(X-mean(X))′*(X-mean(X)) / (m-1)

[0114] Among them, C is the covariance matrix, X is the preprocessed original feature vector, m is the dimension of the preprocessed original feature vector, mean(X) is to take the average value of each feature in X to obtain a row vector with the same number of columns as X, and (X - mean(X))′ represents the matrix transpose. Then, perform eigenvalue decomposition on the covariance matrix: C = U * diag(λ) * U′, where U is the preprocessed original feature vector matrix, λ is the eigenvalue vector, and diag(λ) is a diagonal matrix whose diagonal elements are composed of the elements in the vector λ. Secondly, take the eigenvectors corresponding to the first k largest eigenvalues to form the transformation matrix P, and map the preprocessed original feature vector X to a new feature space: Y = P′ * X. The dimension of the transformed feature vector Y is k, k << m, achieving dimensionality reduction of the feature space. The selection of the k value is determined by cross-validation so that the features after dimensionality reduction can explain more than 95% of the variance of the original data.

[0115] Exemplarily, to capture the non-linear relationship between features, the Kernel PCA algorithm is introduced for non-linear transformation. First, define a non-linear mapping phi to map the original features to a high-dimensional space: phi: X -> phi(X); then, calculate the inner product matrix K in the high-dimensional feature space:

[0116] K(i, j) = phi(X(i))′ * phi(X(j))

[0117] where K is an m * m Gram matrix, i and j represent the row and column indices in the matrix, X(i) and X(j) represent the i-th and j-th samples respectively, and phi(X(i))′ represents the transpose of phi(X(j)). Commonly used kernel functions include polynomial kernels, Gaussian kernels, etc., and their parameters are optimized through grid search. Next, perform eigenvalue decomposition on the K matrix: K = U k * diag(λ k ) * U k ′, where U k represents the eigenvector matrix after eigenvalue decomposition of the K matrix, diag(λ k ) is the diagonal matrix of the K matrix, and U k ′ represents the transpose of U k . Each eigenvalue corresponds to an eigenvector, that is, corresponds to a principal component. The largest eigenvalue corresponds to the first principal component, the second largest eigenvalue corresponds to the second principal component, and so on. If only the largest eigenvalue is selected, only the first principal component can be obtained, while ignoring other principal components. Take the first p largest eigenvalues, and the corresponding eigenvectors form the transformation matrix U kp , and map the preprocessed original feature vector X to a p-dimensional space: Z = U kp ′ * phi(X), where Z is the feature vector after Kernel PCA transformation, Ukp Represents the transformation matrix composed of the eigenvectors corresponding to the first p largest matrix eigenvalues. Kernel PCA is equivalent to mapping the data to a high-dimensional space first and then performing linear PCA, which can discover nonlinear patterns between features. The selection of p value is also determined by cross-validation and is generally much smaller than m.

[0118] For example, feature importance evaluation introduces two metrics, Gini index and mutual information, to quantitatively characterize the influence of each feature on power consumption. The Gini index measures the contribution of a feature to the purity of a data set, and the calculation formula is: Gini(D, A) = 1-∑(|C c | / |D|)^2, where D is the data set, A is a feature, and C c The corresponding sample subset when feature A takes the cth value. The mutual information measures the correlation between the feature and the power consumption, and the calculation formula is:

[0119] MI(S;Y)=∑∑q(s,y)*log[q(s,y) / q(s)q(y)]

[0120] Among them, S is a certain feature, Y is the marginal probability density function when the power consumption q(s) and q(y) are S and Y respectively, and q(s, y) is the joint probability density function of X and Y. The feature importance matrix is ​​obtained by the weighted sum of the Gini index and mutual information, and the weight coefficient is optimized by grid search.

[0121] For example, considering the dynamic changes of power consumption and chip working conditions, an incremental method is used to update the feature selection results online. First, the features are sorted based on the feature importance matrix, and the top-N important features are selected to form the feature subset F. Then, using the teacher-student model, F is used as the dependent variable and the remaining features are used as independent variables to train a mapping function f:

[0122] f:XF->F′

[0123] Among them, XF represents the feature set after removing F, and F′ represents the predicted value of F. f can be a model such as linear regression, decision tree, etc., and its parameters are iteratively optimized by algorithms such as stochastic gradient descent. When a new data block arrives, the features other than F are extracted and input into f, and the updated value F′ of F is generated, which replaces the original F and is added to the feature selection result. This is equivalent to replacing the actual value with the feature value predicted by the model, which overcomes the impact of the change in working conditions to a certain extent. The output data: key feature set, the data format is as follows: |Timestamp (4B)|Feature 1 (4B)|Feature 2 (4B)|...|Feature N (4B)|, where N is the number of selected key features, generally between 10-100. Assuming N=50, the data block length of the key feature set is 204B, which is compressed by 84% compared to the purified data set. The data rate of the key feature set is further reduced to 0.33Gbps.

[0124] Specifically, Figure 6 As shown, in step 104, the construction of the adaptive power consumption prediction model includes the following processes: data set partitioning model structure design (41), loss function definition (42), parameter optimization strategy (43), model training and verification (44), and model online update (45).

[0125] For example, the key feature set is sorted by timestamp and divided into a training set and a test set at a ratio of 8:2. The training set is used for model parameter learning, and the test set is used for model performance evaluation. In the training set, a validation set is further divided at a ratio of 9:1 for the selection of model hyperparameters. In order to enhance the generalization ability of the model, the data set is incrementally updated using a sliding window with a window length of 1000 data blocks.

[0126] For example, a prediction model is constructed using a long short-term memory neural network (LSTM) based on the time series characteristics of power consumption data. The input of the model is a set of key features, and the output is the power consumption prediction value in the future. Assuming that the power consumption of the next T time steps is predicted, the model structure is designed as follows:

[0127] Input layer: feature dimension*1

[0128] LSTM layer: number of neurons * L, L is the number of LSTM layers

[0129] Attention layer: number of neurons*1

[0130] Fully connected layer: number of neurons*T

[0131] Output layer: 1*T

[0132] Among them, the feature dimension, i.e. the number of key features, N, L and T are all hyperparameters and need to be determined through cross-validation. The attention layer is used to adaptively adjust the weight of each time step of LSTM to improve the expressiveness of the model.

[0133] Exemplarily, a loss function is defined to measure the difference between the power consumption prediction value and the actual value, and the root mean square error (RMSE) is defined as the loss function:

[0134] RMSE = sqrt(mean((y pred -y true )^2))

[0135] where y pred is the predicted value, y true is the actual value, and mean means the average. The smaller the RMSE, the higher the prediction accuracy. At the same time, the L1 regularization term is introduced to constrain the model parameters to prevent overfitting:

[0136] Loss = RMSE + λ*∑(abs(w))

[0137] Among them, w is all the parameters of the model, λ is the regularization coefficient, and the optimal value is determined by grid search.

[0138] Exemplarily, the adaptive moment estimation algorithm (Adam) is used to iteratively optimize the model parameters, and its update formula is:

[0139] m t =β1*m {t-1} +(1-β1)*g t

[0140]

[0141] w=w (t-1) -lr*m hat / (sqrt(v hat )+eps)

[0142] Among them, w is the target optimization parameter of the model, w (t-1) is the target optimization parameter of the previous round of iterative optimization, m t and v t They are the first-order moment estimate and the second-order moment estimate of the gradient, m hat represents the correction of the first-order moment estimate of the gradient, v hat represents the correction value of the second-order moment estimate of the gradient, β1 and β2 are attenuation factors, t is the number of iterations, lr is the learning rate, sqrt(v hat) represents the correction value of the second-order moment estimate, and eps is a smoothing term. Compared with the traditional gradient descent algorithm, Adam can adaptively adjust the learning rate of each parameter and accelerate convergence.

[0143] For example, the model is trained using the training set. After the model is fully trained once using all the data in the training set, the model performance is evaluated on the validation set, and hyperparameters such as the number of LSTM layers, the number of neurons, and the learning rate are adjusted based on performance indicators (such as RMSE). The early stopping method is used to prevent overfitting, that is, when the performance on the validation set does not improve after the model is fully trained using all the data in the training set for n consecutive times, the training is stopped. The value of n is generally 5-10.

[0144] Exemplarily, the model is updated online. When new key feature data is output, the current model is used to predict power consumption first, and then the actual power consumption value is compared with the predicted value to calculate the prediction error. If the prediction error exceeds the preset threshold (such as RMSE>1), the new key feature set used for model parameter learning is added to the training set, and the predicted values ​​of the previous batch of outputs are removed, keeping the length of the training set unchanged. Then retrain the model and update the parameters. The output data: the power consumption prediction value is: |Timestamp (4B)|Power consumption prediction 1 (4B)|Power consumption prediction 2 (4B)|...|Power consumption prediction T (4B)|, where T is the number of time steps for prediction, generally 10-100. Assuming T=50, the length of the power consumption prediction data block is 204B, which is the same as the length of the key feature data block, and the data rate of the power consumption prediction value is about 0.16Gbps. The data rate can be appropriately adjusted according to the performance requirements and hardware conditions of the actual system. By changing parameters such as prediction granularity, prediction steps, processor frequency, etc., the data rate can be flexibly configured in the range of 0.01Gbps to 1Gbps.

[0145] Specifically, Figure 7 As shown, in step 105, the generation of a multi-objective dynamic power consumption optimization strategy includes the following processes: problem modeling (51), constraint processing (52), optimization algorithm selection (53), non-inferior solution (Pareto) solution set generation (54), and fuzzy decision making (55).

[0146] Exemplarily, the power consumption optimization problem is modeled as a multi-objective optimization model, where the objective functions include minimizing power consumption, maximizing performance, minimizing temperature, etc., and the decision variables include the voltage, frequency, number of cores, etc. of the chip. Assuming there are m objective functions and n decision variables, the problem can be expressed as:

[0147] minF(d)=[f1(d), f2(d),...,f m (d)]

[0148] std = [d1, d2, ..., d n ]

[0149] lb≤d≤ub

[0150] Among them, F(d) is an m-dimensional objective function vector, which is a combination of the values ​​of m objective functions at a given solution x, d is an n-dimensional decision variable vector, and lb and ub are the lower and upper bounds of the decision variables, respectively. There may be conflicts between the objective functions, and a set of Pareto optimal solutions need to be found, that is, it is impossible to optimize a certain objective alone without sacrificing other objectives. Exemplarily, during the optimization process, some constraints need to be met, such as power budget, temperature threshold, Quality of Service (QoS) requirements, etc. These constraints can be divided into two categories: linear constraints and nonlinear constraints. For linear constraints, you can directly restrict them within the value range of the decision variables; for nonlinear constraints, equivalent conversion or penalty function processing is required. For example, convert the temperature constraint into a power consumption constraint:

[0151] P=α*T^β

[0152] Where P is power consumption, T is temperature, and α and β are fitting parameters. This converts the nonlinear temperature constraint into a linear power consumption constraint. Similarly, QoS constraints can be converted into latency constraints, throughput constraints, etc.

[0153] Exemplarily, when selecting an optimization algorithm, since both the objective function and the constraints may be nonlinear and non-convex, a heuristic optimization algorithm is needed to solve them. Commonly used algorithms include genetic algorithm (GA), particle swarm optimization algorithm (PSO), ant colony optimization algorithm (ACO), etc. Taking PSO as an example, PSO simulates the foraging behavior of bird flocks and uses the collaboration and information sharing of particle groups to find the optimal solution. Each particle represents a candidate solution, and its position and velocity are constantly updated. Let the position of the i-th particle be x i , the speed is v i , the individual's best historical position is p i , the global optimal position is p g , then the particle update formula is: i (t+1)=w*v i (t)+c1*r1*(p i (t)-xi(t))+c2*r2*(p g (t)-x i (t)); x i (t+1)=xi (t)+v i (t+1), where w is the inertia weight, c1 and c2 are acceleration coefficients, and r1 and r2 are random numbers. By adjusting these parameters, the exploration and development capabilities of the algorithm can be balanced.

[0154] For example, due to the presence of multiple objective functions, the optimization algorithm usually finds a set of Pareto non-inferior solutions rather than a single optimal solution. Each solution in the Pareto solution set is optimal, and there is no other solution that can optimize a certain objective alone without sacrificing other objectives. In order to generate the Pareto solution set, it is necessary to introduce mechanisms such as non-dominated sorting and crowding measurement on the basis of the optimization algorithm. Non-dominated sorting divides the population into multiple frontiers, and the individuals in each frontier are non-dominated, that is, they are not dominated by other individuals. Individual a dominates individual b if and only if all objective function values ​​of a are not inferior to b, and at least one objective function value is better than b. Non-dominated sorting can be used for selection and elimination of populations. Crowding measurement calculates the distance between each individual and other individuals. The larger the distance, the more unique the individual is and should be retained. Crowding can be used to maintain the diversity of the population. Through non-dominated sorting and crowding measurement, the Pareto solution set can be continuously updated during the evolution process, and finally a set of non-inferior solutions with uniform distribution and good diversity are obtained.

[0155] For example, since the Pareto solution set contains multiple solutions, it is necessary to select a final solution as the optimization strategy based on the user's preference. Here, the fuzzy decision method is used to divide the value range of each objective function into several fuzzy sets, such as "low", "medium", "high", etc., and then calculate the fuzzy satisfaction of each solution according to the user's emphasis on different goals, and finally select the solution with the highest satisfaction. For example, for the power consumption target, three fuzzy sets can be defined: low power consumption (L), medium power consumption (M), and high power consumption (H), and their membership functions are:

[0156]

[0157]

[0158] Where P is the power consumption value P low , P mid , P high are the thresholds for low, medium, and high power consumption, respectively. Based on the given power consumption value P, its membership on the three fuzzy sets is calculated. Similarly, fuzzy sets can be defined for performance, temperature, and other targets, and then the target weights w set by the user are calculated. i Select the highest membership from the memberships on the three fuzzy sets and calculate the fuzzy satisfaction S(x) for each given solution x:

[0159]

[0160] Among them, μ i is the membership function corresponding to the i-th objective function. Finally, the solution x with the highest satisfaction is selected. opt As the final optimization strategy: x opt =argmax S(x). The output data: The optimization strategy is: |timestamp(4B)|voltage(4B)|frequency(4B)|number of cores(4B)|...|, the dimension of the optimization strategy is equal to the number of decision variables n, which is generally 5-20. Assuming n=10, the length of the optimization strategy data block is 44B. The data rate of the optimization strategy is about 0.07Gbps, which is much lower than the data rate of the previous step. This is because the generation frequency of the optimization strategy is much lower than the frequency of data collection and prediction, which is generally in the order of seconds or minutes. Specifically, if Figure 8 As shown, in step 106, the dynamic power management strategy execution and feedback includes the following processes: strategy analysis and conversion (61), instruction issuance and execution (62), execution effect monitoring (63), strategy dynamic adjustment (64), data recording and feedback (65).

[0161] Exemplarily, the optimization strategy generated in step 105 is parsed into specific execution instructions, such as setting voltage, frequency, number of cores, etc. Since different hardware platforms may have different configuration interfaces and parameter ranges, appropriate conversion and mapping are required. For example, the voltage value in the strategy is converted into a register setting value, and the frequency value is converted into a clock division coefficient, etc. Strategy parsing and conversion can be achieved by table lookup or function mapping.

[0162] Exemplarily, the converted execution instructions are sent to various hardware units, such as power management units, clock management units, task scheduling units, etc., through a system bus or a dedicated control bus. These units adjust corresponding hardware parameters, such as voltage, frequency, core status, etc., according to the received instructions. Instructions are usually sent in an interrupt or polling manner, and timing and synchronization need to be ensured. After the instruction is executed, the hardware unit needs to return the execution result or status for confirmation and verification.

[0163] For example, while the policy is being executed, its execution effect needs to be monitored in real time, including indicators such as power consumption, performance, and temperature. These indicators can be directly measured by hardware sensors, or indirectly estimated by performance counters, event records, and other means. The monitoring data needs to be aligned with the policy execution time point for comparison and analysis. If the monitored indicator deviates greatly from the expected value, or exceeds the preset threshold range, it is necessary to promptly issue an alarm or trigger a policy adjustment.

[0164] For example, the optimization strategy is dynamically adjusted based on the monitored execution effect to adapt to the real-time status of the system. Adjustments can be at the parameter level or at the strategy level. Parameter-level adjustment refers to fine-tuning certain parameters, such as the step value of voltage and frequency, within the current strategy framework to reduce deviations. Strategy-level adjustment refers to regenerating a new optimization strategy to replace the current strategy based on long-term trends or emergencies. Dynamic adjustment requires a balance between adjustment frequency and adjustment amplitude, ensuring both the continuity and stability of the strategy and rapid response to system changes.

[0165] Exemplarily, various data in the strategy execution process, such as execution instructions, monitoring indicators, adjustment logs, etc., are recorded in the database or log file of the system for offline analysis and optimization. At the same time, these data are fed back to the prediction model of step 104 and the optimization algorithm of step 105 for model updating and algorithm improvement. The feedback data needs to be preprocessed as necessary, such as denoising, normalization, feature extraction, etc., to improve data quality and utilization. The step 106 outputs data: the execution effect evaluation is: | timestamp (4B) | strategy ID (4B) | power consumption (4B) | performance (4B) | temperature (4B) | ... |, the dimension of the execution effect evaluation is generally 5-10, in addition to key indicators, it can also include some statistics, such as mean, variance, maximum value, minimum value, etc. Assuming the dimension is 8, the length of the execution effect evaluation data block is 36B. The data rate of the execution effect evaluation is about 0.06Gbps, which is equivalent to the data rate of the optimization strategy.

[0166] Specifically, Fig. 9 As shown in step 107, the system self-optimization and evolution includes the following processes: long-term trend analysis (71), bottleneck resource identification (72), optimization opportunity mining (73), optimization strategy generation (74), strategy verification and deployment (75). Exemplarily, the long-term trend analysis is performed on the execution effect evaluation data accumulated during the system operation to mine the laws and patterns of system behavior. The analysis can be performed on different time scales, such as hourly, daily, weekly, etc., and can also be performed on different operating modes, such as high-performance mode, low-power mode, etc. By comparing the system performance in different periods and under different modes, the key factors affecting the system performance, such as task type, load intensity, ambient temperature, etc., are identified. Long-term trend analysis can use statistical methods, such as regression analysis, factor analysis, cluster analysis, etc.

[0167] For example, during the operation of the system, some hardware or software resources may become bottlenecks that restrict system performance, such as memory bandwidth, I / O throughput, scheduling delay, etc. These bottleneck resources need to be identified in a timely manner and targeted optimization measures should be taken. Bottleneck resource identification can be done in two ways: one is top-down, inferring possible bottlenecks based on the overall performance of the system; the other is bottom-up, directly locating bottlenecks based on resource utilization and saturation. Common bottleneck identification methods include critical path analysis, sensitivity analysis, correlation analysis, etc.

[0168] For example, in addition to identifying bottleneck resources, it is also necessary to actively explore opportunities and potential for system optimization, such as accelerating hot code, improving data locality, and developing task parallelism. Optimization opportunity mining needs to combine system domain knowledge and optimization experience to analyze system behavior from multiple perspectives, such as data flow, control flow, resource flow, etc. Common optimization opportunity mining methods include code analysis, performance profiling, simulation, etc. The mined optimization opportunities need to undergo feasibility analysis and benefit evaluation to determine the optimization priority and roadmap.

[0169] Exemplarily, based on the results of long-term trend analysis, bottleneck resource identification, and optimization opportunity mining, corresponding optimization strategies are generated as the basis for system self-optimization. Optimization strategies can be local or global; they can be incremental or disruptive. Local strategies target a specific problem or scenario, such as adjusting the cache replacement strategy, modifying the scheduling parameters of tasks, etc. Global strategies consider the overall behavior and goals of the system, such as reconstructing the system architecture, upgrading the hardware configuration, etc. Incremental strategies optimize within the existing framework, such as parameter tuning, algorithm improvement, etc. Disruptive strategies attempt to break the existing framework and introduce new mechanisms or patterns, such as heterogeneous computing, near-memory computing, etc. The generation of optimization strategies can refer to the method of step 105, model it as a multi-objective optimization problem, and solve it using a heuristic algorithm.

[0170] Exemplarily, before the optimization strategy is actually deployed, it needs to be strictly verified and tested to ensure the correctness, security and effectiveness of the strategy. Verification can be carried out by means of simulation, simulation, actual measurement, etc., and the function, performance, power consumption and other indicators of the strategy are comprehensively evaluated. For major policy changes, a trial run can be carried out in a test environment or a small-scale system first, and then gradually promoted to the whole system. The deployment of the strategy requires the formulation of a detailed implementation plan and rollback plan, and close cooperation with the system's operation and maintenance team to minimize interference and impact on the system. After the strategy is deployed, it is necessary to continuously monitor its execution effect and make timely adjustments and optimizations based on feedback. The output data of step 107: the system optimization plan is: timestamp (4B) | plan ID (4B) | plan type (4B) | optimization target (4B) | optimization measures (variable length) |, the data block length of the system optimization plan is not fixed, and depends on the description length of the optimization measures. An optimization plan may contain multiple optimization measures, each of which can be a text or a structured record. The generation frequency of the system optimization plan is low, generally at the daily or weekly level, so its data rate can be ignored.

[0171] Furthermore, the quantum dot enhanced dynamic power management system proposed in the present invention is as follows: Figure 2 As shown in FIG. 1 , the system mainly consists of the following modules: quantum dot sensor array (S101), data fusion unit (S102), feature extraction unit (S103), power consumption prediction unit (S104), strategy optimization unit (S105), execution feedback unit (S106) and self-optimization unit (S107). Among them, the quantum dot sensor array is responsible for real-time acquisition of quantum state information of the chip; the data fusion unit synchronizes, aligns, filters noise and normalizes quantum state data with traditional sensor data to form a unified state matrix; the feature extraction unit extracts key feature vectors related to power consumption on this basis; the power consumption prediction unit uses these feature data to establish an adaptive power consumption prediction model; the strategy optimization unit comprehensively considers multiple factors such as performance, energy consumption, and temperature to solve the optimal management strategy; the execution feedback unit converts the optimization strategy into specific control instructions and sends them, and on the other hand, monitors the chip status in real time and evaluates the execution effect; the self-optimization unit can summarize the system-level optimization plan based on the long-term accumulated effect data to achieve continuous improvement of the overall management level. These modules are closely connected through the data bus and together form a complete closed-loop control system.

[0172] Furthermore, the present invention also provides an Internet of Things (IoT) device.

[0173] like Fig.10As shown, the Internet of Things (IoT) device S10 is mainly composed of a processor S11 and a memory S12, which are connected via a bus S13, which can be an I2C (Inter-Integrated Circuit) bus or the like.

[0174] Specifically, the processor S11 undertakes computing and control functions and is the core of the operation of the Internet of Things (IoT) device. The processor S11 can be a low-power microcontroller chip of the Internet of Things, or other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor here can be a microprocessor or any conventional processor.

[0175] The memory S12 can be in various forms such as a Flash chip, a read-only memory ROM, a magnetic disk, an optical disk, a U disk or a mobile hard disk.

[0176] It should be noted that Fig.10 The structure shown in the figure is only a partial structural diagram related to the embodiment of the present invention, and does not limit the Internet of Things (IoT) device to which the solution is applied. The actual Internet of Things (IoT) device may include more or fewer components, or merge some components, or use different component arrangements.

[0177] It is worth noting that the main function of the processor S11 is to execute computer programs stored in the memory S12. When running these programs, the processor can implement various quantum dot enhanced dynamic power management methods proposed in the embodiments of the present invention. In a specific embodiment of the present invention, the processor is designed to execute computer programs stored in the memory.

[0178] When this program is run, the processor completes the following steps:

[0179] a. Using the quantum dot sensor array integrated on the chip surface, the quantum state information such as charge distribution and energy level transition inside the chip is collected in real time and converted into processable digital signal output.

[0180] b. Time-synchronize and spatially align the quantum state data with data from traditional sensors such as temperature, voltage, and current, and remove noise interference through an adaptive filtering algorithm to ultimately form a unified multi-dimensional state matrix.

[0181] c. Using nonlinear dimensionality reduction mapping and quantum-classical hybrid feature selection algorithm, a set of low-dimensional key feature vectors that are strongly correlated with power consumption are extracted from the high-dimensional state matrix.

[0182] d. Taking the extracted key features as input and combining them with the historical power consumption data of the chip, an adaptive power consumption prediction model is constructed through the long short-term memory network and attention mechanism, and the incremental learning algorithm is used to realize online update of the model.

[0183] e. Embed the power consumption prediction model into a multi-objective optimization framework, take the chip's performance, energy consumption, temperature and other indicators as optimization targets, take voltage, frequency, task scheduling and other parameters as optimization variables, and use evolutionary algorithms to search for a set of optimal management strategies. f. Convert the optimal strategy into a series of specific control instructions, accurately adjust the chip's working state by configuring registers, and monitor the execution effect in real time through the sensor network, calculate the deviation from the expectation, and form a closed-loop control.

[0184] g. With the long-term operation of the system, a large amount of chip status logs and strategy execution effect data are accumulated. Through multi-scale behavior pattern mining in time and space, combined with the latest algorithm iteration, the underlying mathematical models and solutions are continuously optimized, and integrated into the system through progressive updates to achieve self-improvement of the overall optimization capability.

[0185] The embodiment of the present invention also provides a computer-readable storage medium, in which one or more programs are stored. These programs can be executed by one or more processors to implement the steps of any quantum dot enhanced dynamic power management method described in the embodiment of the present invention. The storage medium can be an internal storage unit of the aforementioned Internet of Things (IoT) device, such as a hard disk or memory. It can also be an external storage device, such as a plug-in hard disk, a smart memory card (SmartMediaCard, SMC), a secure digital (SecureDigitalCard, SD) card, a flash memory card, etc. It should be understood by those skilled in the art that the steps in the above method, the functional modules in the system or device can be implemented by software, firmware, hardware or a combination thereof. In hardware implementation, the division of each functional module does not necessarily correspond to the division of physical components. A physical component may perform multiple functions, or a function may be completed by the collaboration of multiple physical components. These components can be software executed by a processor (such as a CPU, a digital signal processor (or microprocessor), or can be implemented in hardware, or an integrated circuit (such as an ASIC, Application Specific Integrated Circuit, DSP). These software can be distributed on computer-readable media, including computer storage media (non-temporary) and communication media (temporary). Computer storage media include but are not limited to RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory, CD-ROM, DVD, magnetic tape, disk, etc., for storing information. Communication media include any media that transmit computer-readable instructions, data structures, etc. in modulated data signals.

Claims

1. A quantum dot enhanced dynamic power management method, characterized in that: The following steps are involved: Step S1: using the quantum dot sensor array integrated on the chip surface, real-time acquisition of quantum state information such as charge distribution and energy level transition inside the chip is performed, and converted into processable digital signal output; Step S2: Time-synchronize and spatially align the quantum state data with the data from traditional sensors such as temperature, voltage, and current, and remove noise interference through an adaptive filtering algorithm to ultimately form a unified multidimensional state matrix; Step S3: using nonlinear dimensionality reduction mapping and quantum classical hybrid feature selection algorithm, extract a set of low-dimensional key feature vectors that are strongly correlated with power consumption from the high-dimensional state matrix; Step S4: Taking the extracted key features as input and combining the historical power consumption data of the chip, an adaptive power consumption prediction model is constructed through the long short-term memory network and the attention mechanism, and the incremental learning algorithm is used to realize the online update of the model; Step S5: embed the power consumption prediction model into a multi-objective optimization framework, take the chip performance, energy consumption, temperature and other indicators as optimization targets, take voltage, frequency, task scheduling and other parameters as optimization variables, and use the evolutionary algorithm to search for a set of optimal management strategies; Step S6: Convert the optimal strategy into a series of specific control instructions, accurately adjust the working state of the chip by configuring registers, etc., and monitor the execution effect in real time through the sensor network, calculate the deviation from the expectation, and form a closed-loop control; Step S7: With the long-term operation of the system, a large amount of chip status logs and strategy execution effect data are accumulated. Through multi-scale spatiotemporal behavior pattern mining, combined with the latest algorithm iterations, the underlying mathematical models and solutions are continuously optimized and integrated into the system through progressive updates to achieve self-improvement of the overall optimization capability.

2. The method according to claim 1, characterized in that: The step S1 includes: a. Initialize the perovskite quantum dot array, where the quantum dot size is 3-5nm and the spacing is 10-15nm; b. Using a multi-wavelength tunable laser to generate a laser pulse sequence that matches the absorption band of quantum dots and irradiate the quantum dot array; c. Receive the fluorescence signal emitted by the quantum dots through an integrated single-photon detector array and convert it into a weak current signal; d. Perform low-noise amplification and analog-to-digital conversion on weak current signals to obtain discrete digital signals; e. Pack the digital signal according to the frame format and transmit it through the low voltage differential signal interface.

3. The method according to claim 1, characterized in that In the step S2, it includes: a. Align the timestamps of quantum state data and sensor data, and interpolate the sensor data; b. Calibrate quantum state detectors and sensors to eliminate system bias; c. Use adaptive Kalman filtering and wavelet threshold denoising algorithm to filter out high-frequency noise and isolated mutation points; d. Perform Min-Max normalization on data of different dimensions and linearly scale them to the interval [0, 1]; e. Using tensor decomposition technology, the fused data of a fixed time window is reconstructed into the product form of a core tensor and a factor matrix.

4. The method according to claim 1, characterized in that: In the step S3, it includes: a. Slice the cleansed data according to fixed time windows and calculate the statistical features and differential features of each slice of data; b. Use the principal component analysis algorithm to perform orthogonal transformation on the original features; c. Introduce the kernel principal component analysis algorithm to perform nonlinear feature transformation and extract high-order correlation patterns between features; d. Use the Gini index and mutual information to measure the importance of each feature to power consumption; e. Adopt online incremental learning strategy to update feature subsets in real time to adapt to dynamic changes in chip working conditions.

5. The method according to claim 1, characterized in that In the step S4, it includes: a. According to the time series characteristics of power consumption data, the long short-term memory neural network is selected as the basic prediction model; b. Introduce an attention mechanism layer into the model to adaptively adjust the feature weights at different time steps; c. Define the root mean square error and L1 regularization term as the loss function to control the prediction bias and model complexity; d. Adopt adaptive moment estimation algorithm to iteratively optimize network weights and accelerate convergence: m t =β1*m {t-1} +(1-β1)*g t w=w (t-1) -lr*m hat / (sqrt(v hat )+eps) Among them, w is the target optimization parameter of the model. (t-1) number, which is the target optimization parameter of the previous round of iterative optimization, m t and v t They are the first-order moment estimate and the second-order moment estimate of the gradient, m hat represents the correction of the first-order moment estimate of the gradient, v hat represents the correction value of the second-order moment estimate of the gradient, β1 and β2 are attenuation factors, t is the number of iterations, lr is the learning rate, sqrt(v hat ) represents the correction value of the second-order moment estimate, and eps is the smoothing term. e. predict the power consumption for the next T time steps, where T is determined by cross-validation; f. When the prediction error exceeds the threshold, the model is incrementally trained with newly collected data to continuously improve the prediction accuracy.

6. The method according to claim 1, characterized in that In the step S5, it includes: a. Establish a multi-objective optimization model with power consumption, performance, temperature, etc. as targets and voltage, frequency, etc. as optimization variables; b. Embed the power consumption prediction model into the optimization framework as the objective function and constraint condition; c. Use the improved multi-objective particle swarm optimization algorithm to solve the problem, and introduce non-dominated sorting and crowding evaluation to generate a non-inferior optimal solution set; d. According to the user's emphasis on different goals, calculate the fuzzy satisfaction S(x) of the non-inferior optimal solution set: S(x) = min{w1*μ1(f1(x)), w2*μ2(f2(x)), …, w m *μ m (f m (x))}, where μ i is the membership function corresponding to the i-th objective function; e. Select the solution x with the highest satisfaction opt As the final optimization strategy: x opt =argmax S(x).

7. The method according to claim 1, characterized in that In the step S6, it includes: a. Analyze the optimization strategy and convert it into configuration values ​​for parameters such as voltage and frequency; b. Send configuration data to the chip's power management unit, clock management unit and other components by reading and writing registers; c. Collect chip power consumption, performance counters and other monitoring data in real time to evaluate the execution effect of the current strategy; d. Dynamically adjust the target weight or constraint threshold of the optimization strategy based on the evaluation results to achieve adaptive fine-tuning of the strategy; e. Feedback configuration logs, evaluation data, etc. to the policy optimization and power consumption prediction modules for offline analysis and algorithm improvement.

8. The method according to claim 1, characterized in that In the step S7, it includes: a. Carry out system-level optimization analysis once a week or month, and conduct exploratory analysis such as time segment analysis, frequent pattern mining, and anomaly detection on the long-term accumulated chip status data and strategy execution data; b. Identify key bottleneck resources that affect chip performance, such as memory bandwidth, bus contention, etc., and locate their occurrence time and space areas; c. Automatically discover possible optimization opportunities from the perspectives of data flow, control flow, resource allocation, etc., and evaluate their potential benefits; d. Generate incremental or disruptive optimization solutions for systemic optimization opportunities, such as architecture optimization, algorithm replacement, etc.; e. Test and evaluate the optimization solution in a small-scale verification environment, and develop a safe and complete deployment plan and rollback plan; f. Gradual deployment of optimization solutions, continuous monitoring of system performance and policy parameters, and timely correction of deviations.

9. A quantum dot enhanced dynamic power management system, characterized in that: include: a. Quantum dot sensor array, used for real-time acquisition of chip quantum state signals; b. Data fusion unit, used for synchronization, calibration, noise filtering and normalization fusion of quantum state data and other sensor data; c. A feature extraction unit, used to extract key features related to power consumption from the fused data; d. A power consumption prediction unit, used to construct an adaptive power consumption prediction model; e. A strategy optimization unit, used to generate an optimal strategy for dynamic power management; f. Execution feedback unit, used for policy analysis, execution instruction issuance and effect evaluation feedback; g. Self-optimization unit, used for system-level behavior pattern mining and generating long-term optimization solutions.

10. An Internet of Things device, characterized in that: It includes a processor and a memory connected by a bus, wherein the processor is used to execute a computer program stored in the memory, so that the Internet of Things device executes the quantum dot enhanced dynamic power consumption management method according to any one of claims 1 to 8.

11. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, which, when executed by a processor, implements the quantum dot enhanced dynamic power consumption management method described in any one of claims 1 to 8.

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