UMCP packaging mode and product based on carrier plate and RDL design

Abstract

The invention relates to the technical field of semiconductor packaging, in particular to a UMCP packaging mode and product based on a carrier plate and RDL design, and the packaging mode comprises the following steps: S1, pasting a multi-laminated chip on the carrier plate, then carrying out the upward routing, and then carrying out the plastic packaging; s2, carrying out flat grinding on a plastic package material at the top of the preliminary product until a bonding wire is exposed, and then rewiring by using an RDL process; s3, mounting an FC flip chip and an NAND chip on the basis of the RDL wiring layer of the secondary product, and then routing; s4, performing plastic packaging on the FC + NAND part of the third product; and S5, removing the carrier plate to obtain a finished product. According to the invention, the RDL process is adopted for rewiring to change the original chip combination and lamination mode, and the trouble of'waterfall type routing 'of the high-difficulty bonding process caused by the conventional UMCP high-stack die in the Hybrid Bonding hybrid bonding process is avoided.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging technology, and in particular to a UMCP packaging method and product based on a carrier board and RDL design. Background Art

[0002] As an integrated circuit packaging technology, hybrid bonding technology replaces traditional bump or solder ball interconnection through direct copper-to-copper connection. It combines the characteristics of metal bonding and dielectric bonding to achieve high-density and high-performance interconnection between different chips.

[0003] In the original Hybrid Bonding process, the product structure (see Figure 1 ) The finger from the bottom NAND die to the substrate is more than 400um (finger gold finger: the place on the substrate where wire bonding can be done). The wire length across the die of the top NAND die is close to 900μm, and the wire bonding height is more than 800μm, making wire bonding very difficult. Moreover, the wire arc after bonding forms a "waterfall shape", and the wire is seriously bent during the molding process, causing wire sweep. Summary of the invention

[0004] In view of the problems in the prior art that wire bonding is difficult and wire punching is serious when the wire bonding height is high in the hybrid bonding process, the present invention provides a UMCP packaging method and product based on a carrier board and RDL design.

[0005] The present invention is achieved through the following technical solutions: A UMCP packaging method based on a carrier board and RDL design includes the following steps: S1, multi-layer chips are mounted on the carrier board, wired upward, and then plastic-sealed to form a preliminary product; S2, grinding the top plastic packaging material of the preliminary product until the welding wire is exposed, and then rewiring using the RDL process to obtain a secondary product with an RDL wiring layer foundation; S3, mounts FC flip chip and NAND chip on the RDL wiring layer of secondary product, and then wire bonds to obtain tertiary product; S4, the FC+NAND part of the three-time plastic-sealed product is obtained as the four-time product; S5, removing the carrier board from the four products to obtain the finished product.

[0006] Preferably, in S1, the carrier plate is made of glass.

[0007] Preferably, in S1, the multi-layer chip is a LPDDR chip, and is mounted using DAF glue.

[0008] Preferably, in S3, the distance between the FC flip chip and the NAND chip is greater than 150 μm.

[0009] Preferably, in S3, the bottom of the FC flip chip is bonded to the RDL wiring layer base using a bump process.

[0010] Preferably, in S3, the NAND chip is bonded using a DAF film.

[0011] Preferably, in S1 and S4, epoxy resin is used as the molding material during molding.

[0012] A product obtained according to the UMCP packaging method based on carrier board and RDL design.

[0013] Compared with the prior art, the present invention has the following beneficial effects: The present invention adopts a UMCP packaging method based on a carrier board and RDL design, which uses the RDL process to rewire and change the original chip combination bonding method, and combines two wire bonding operations to handle the electrical connection between different layers of chips respectively, avoiding the problem of "waterfall wire bonding" caused by the high-difficulty bonding process of conventional UMCP high-stack die in the Hybrid Bonding hybrid bonding process. At the same time, the wiring network formed by the RDL process is more stable and reliable, which can improve the overall reliability of the package, and at the same time can simplify the process and improve production efficiency, which helps to reduce the packaging cost.

[0014] Furthermore, limiting the distance between the FC flip chip and the NAND chip helps reduce thermal and signal interference between the chips, while facilitating subsequent plastic packaging and cutting processes.

[0015] Furthermore, by selecting glass as the carrier material, mounting the LPDDR chip and DAF glue, optimizing the chip spacing and bonding process, and using epoxy resin for plastic sealing, a stable, reliable, high-performance and easy-to-manufacture multi-layer chip packaging structure can be constructed. This comprehensively considers material properties, process feasibility and packaging requirements, which helps to improve the reliability, performance and manufacturing efficiency of the multi-layer chip packaging. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 It is a schematic diagram of the product structure of the Hybrid Bonding process in the prior art; Figure 2 It is a flow chart of the UMCP packaging method based on carrier board and RDL design of the present invention; Figure 3 It is a schematic diagram of a preliminary product in a UMCP packaging method based on a carrier board and RDL design of the present invention; Figure 4It is a schematic diagram of a preliminary product in a UMCP packaging method based on a carrier board and RDL design of the present invention; Figure 5 It is a schematic diagram of a secondary product in a UMCP packaging method based on a carrier board and RDL design of the present invention; Figure 6 It is a schematic diagram of a tertiary product in a UMCP packaging method based on a carrier board and RDL design of the present invention; Figure 7 It is a schematic diagram of a fourth product in a UMCP packaging method based on a carrier board and RDL design of the present invention. DETAILED DESCRIPTION

[0017] The present invention is further described in detail below in conjunction with specific embodiments, which are intended to explain the present invention rather than to limit it.

[0018] The present invention discloses a UMCP packaging method based on a carrier board and RDL design, referring to Figure 2 , including the following steps: S1, multi-layer chips are mounted on a glass substrate, wired upward, and then epoxy resin is used to form a preliminary product (such as Figure 3 As shown); the multi-layer chip is a LPDDR chip and is mounted using DAF glue.

[0019] S2, the top plastic packaging material of the preliminary product is flattened until the welding wire is exposed, and then the RDL process is used for rewiring to obtain a secondary product with an RDL wiring layer foundation (such as Figure 4 shown); S3, mount FC flip chip and NAND chip on the RDL wiring layer of secondary products, and then wire bond to obtain tertiary products (such as Figure 5 As shown); the distance between the FC flip chip and the NAND chip is greater than 150μm, the bottom of the FC flip chip is bonded to the RDL wiring layer using a bump process, and the NAND chip is bonded using a DAF film.

[0020] S4, using epoxy resin to seal the FC+NAND part of the tertiary product, to obtain the quaternary product (such as Figure 6 shown); S5, use grinding equipment to remove the carrier plate from the four products to obtain the finished product (such as Figure 7 as shown).

[0021] The present invention adopts a UMCP packaging method based on a carrier board and RDL design to rewire using the RDL process, thereby changing the original chip combination bonding method and avoiding the difficult bonding process problem caused by the conventional UMCP high-stack die (chip) in the Hybrid Bonding hybrid bonding process. This is because the RDL process redistributes the I / O positions of the chip, making the electrical connection between different layers of die simpler and more direct. Through the wiring network, the signal lines of different layers of die are directly connected, thereby avoiding the need for "waterfall wiring", which can not only simplify the packaging process and improve production efficiency, but also improve the reliability and stability of the packaging, and further reduce the packaging cost. At the same time, by optimizing the wiring operation, the overall reliability of the package is improved.

[0022] The above description is only a preferred embodiment of the present invention and is not intended to impose any limitation on the technical solution of the present invention. Those skilled in the art should understand that, without departing from the spirit and principles of the present invention, the technical solution can also be subjected to several simple modifications and substitutions, and these modifications and substitutions are also within the scope of protection covered by the claims.

Claims

1. A UMCP packaging method based on carrier board and RDL design, characterized in that: The following steps are involved: S1, multi-layer chips are mounted on the carrier board, wired upward, and then plastic-sealed to form a preliminary product; S2, grinding the top plastic packaging material of the preliminary product until the welding wire is exposed, and then rewiring using the RDL process to obtain a secondary product with an RDL wiring layer foundation; S3, mounts FC flip chip and NAND chip on the RDL wiring layer of secondary product, and then wire bonds to obtain tertiary product; S4, the FC+NAND part of the three-time plastic-sealed product is obtained as the four-time product; S5, removing the carrier board from the four products to obtain the finished product.

2. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S1, the carrier plate is made of glass.

3. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S1, the multi-layer chip is an LPDDR chip and is mounted using DAF glue.

4. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S3, the distance between the FC flip chip and the NAND chip is greater than 150μm.

5. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S3, the bottom of the FC flip chip is bonded to the RDL wiring layer using a bump process.

6. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S3, NAND chips are bonded using DAF film.

7. The UMCP packaging method based on carrier board and RDL design according to claim 1, characterized in that: In S1 and S4, epoxy resin is used as the molding material during molding.

8. A product obtained by the UMCP packaging method based on carrier board and RDL design according to any one of claims 1 to 7.

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