Inverse peak voltage control device of power switch tube in converter and converter

Abstract

The invention provides an inverse peak voltage control device of a power switch tube in a converter and the converter, and is applied to the technical field of current limiting. The converter comprises a power switch tube, and the power switch tube is controlled by a PWM signal. The inverse peak voltage control device of the power switch tube in the converter is used for relieving the driving blocking of the power switch tube if the output current of the converter is detected to be smaller than or equal to the preset return difference current value and the rising edge of the PWM signal is detected when the driving blocking is carried out on the power switch tube. According to the invention, the first pulse signal after the driving blocking of the power switch tube is removed each time is a complete period, and the situation that the power switch tube is not completely switched on and switched off immediately is avoided, so that the overhigh inverse peak voltage is avoided, the inverse peak voltage meets the corresponding standard, and the power switching tube is more stable. A power switch tube in the converter can be prevented from being exploded, and the service life of devices is prevented from being affected and the devices are prevented from being damaged.

Description

Technical Field

[0001] The present invention relates to the technical field of current limiting, and in particular to a reverse peak voltage control device of a power switch tube in a converter and a converter. Background Art

[0002] In a power supply system, a converter is usually included, for example, a DC conversion module (DC-DC module), an AC-DC conversion module (AC-DC module or DC-AC module), etc. The converter usually has a power switch tube, such as IGBT (Insulate-Gate Bipolar Transistor), MESFET (Metal-Semiconductor Field Effect Transistor), etc.

[0003] In the related art, when the output current of the converter is higher than the preset current upper limit, the current limiting action is performed to block the drive of the power switch tube in the converter; when the output current of the converter is lower than the preset current upper limit, the drive blockade of the power switch tube is released.

[0004] However, the power switch tube is controlled by a PWM (Pulse Width Modulation) signal, and the duty cycle of the PWM signal is determined according to the control loop of the converter. When the drive blockade of the power switch tube is released, the high level time of the PWM signal may be about to end. At this time, the power switch tube will quickly turn on for a period of time and then turn off immediately, but the high level time of the PWM signal is too short, resulting in the power switch tube being unable to be fully turned on, and the voltage at both ends of the power switch tube has not completely dropped to 0, and it is immediately turned off. Therefore, an excessively high reverse peak voltage appears, resulting in the reverse peak voltage not meeting the corresponding standards, reducing the life of the device, or may cause the power switch tube to explode and damage the device. Summary of the invention

[0005] An embodiment of the present invention provides a reverse peak voltage control device for a power switch tube in a converter and a converter to solve the problem that a higher reverse peak voltage may occur in the existing current limiting unlocking scheme, resulting in the reverse peak voltage not meeting the corresponding standards, reducing the life of the device, or possibly causing the power switch tube to explode and damage the device.

[0006] In a first aspect, an embodiment of the present invention provides a reverse peak voltage control device for a power switch tube in a converter, wherein the converter includes a power switch tube, and the power switch tube is controlled by a PWM signal;

[0007] The reverse peak voltage control device of the power switch tube in the converter is used to release the drive blockade of the power switch tube when the output current of the converter is detected to be less than or equal to the preset hysteresis current value and the rising edge of the PWM signal is detected.

[0008] In a possible implementation, the reverse peak voltage control device of the power switch tube in the converter includes a current limiting signal processing module and a current limiting protection module;

[0009] The first input end of the current limiting signal processing module is used to input an initial current limiting signal, the second input end of the current limiting signal processing module is used to input a PWM signal, and the output end of the current limiting signal processing module is used to output a final current limiting signal; wherein, when the initial current limiting signal is used to indicate the release of the current limiting action, if a rising edge of the PWM signal is detected, the final current limiting signal is the same as the initial current limiting signal;

[0010] The first input end of the current limiting protection module is connected to the output end of the current limiting signal processing module, the second input end of the current limiting protection module is used to input the PWM signal, and the output end of the current limiting protection module is used to output the optimized PWM signal; wherein, the optimized PWM signal is used to control the power switch tube; when the final current limiting signal is used to indicate the release of the current limiting action, the optimized PWM signal is the same as the PWM signal.

[0011] In a possible implementation, when the initial current limiting signal is used to indicate the release of the current limiting action, if the rising edge of the PWM signal is not detected, the final current limiting signal is opposite to the initial current limiting signal;

[0012] When the final current limiting signal is used to indicate to continue the current limiting action, the optimized PWM signal is a preset drive blocking signal.

[0013] In a possible implementation, the current limiting signal processing module includes a D flip-flop and a first AND gate;

[0014] The data input terminal of the D flip-flop and the first input terminal of the first AND gate are both used as the first input terminal of the current limiting signal processing module, the clock input terminal of the D flip-flop is used as the second input terminal of the current limiting signal processing module, the original code output terminal of the D flip-flop is connected to the second input terminal of the first AND gate, and the output terminal of the first AND gate is used as the output terminal of the current limiting signal processing module.

[0015] In a possible implementation, the current limiting signal processing module further includes a first resistor;

[0016] The second input terminal of the first AND gate is connected to the first power supply through a first resistor.

[0017] In a possible implementation, the third input terminal of the current limiting protection module is used to input an enable signal of the converter; when the enable signal of the converter is valid and the final current limiting signal is used to indicate the release of the current limiting action, the optimized PWM signal is the same as the PWM signal.

[0018] In a possible implementation, the current limiting protection module includes an AND gate unit and a driving unit;

[0019] The first input end of the AND gate unit serves as the first input end of the current limiting protection module, the second input end of the AND gate unit serves as the second input end of the current limiting protection module, the third input end of the AND gate unit serves as the third input end of the current limiting protection module, the output end of the AND gate unit is connected to the input end of the driving unit, and the output end of the driving unit serves as the output end of the current limiting protection module;

[0020] The AND gate unit is used to perform an AND operation on the final current limiting signal, the PWM signal and the enable signal of the converter to obtain an intermediate signal; the drive unit is used to perform power amplification on the intermediate signal to obtain an optimized PWM signal.

[0021] In a possible implementation, the AND gate unit includes a second AND gate, a third AND gate, and a second resistor;

[0022] The first input end of the second AND gate serves as the first input end of the AND gate unit, the second input end of the second AND gate serves as the third input end of the AND gate unit, the output end of the second AND gate is connected to the first input end of the third AND gate, the second input end of the third AND gate serves as the second input end of the AND gate unit, the output end of the third AND gate is connected to the first end of the second resistor, and the second end of the second resistor serves as the output end of the AND gate unit.

[0023] In a possible implementation, the driving unit includes a driving chip, a third resistor and a diode;

[0024] The input end of the driver chip is used as the input end of the driver unit. The input end of the driver chip is also connected to the positive electrode of the diode, and the negative electrode of the diode is used to connect the upper and lower power-on blocking signals;

[0025] The output end of the driving chip is connected to the first end of the third resistor, and the second end of the third resistor serves as the output end of the driving unit.

[0026] In a second aspect, an embodiment of the present invention provides a converter, comprising a reverse peak voltage control device for a power switch tube in the converter as described in the first aspect or any possible implementation of the first aspect.

[0027] An embodiment of the present invention provides a reverse peak voltage control device for a power switch tube in a converter and a converter, wherein the power switch tube is controlled by a PWM signal; the reverse peak voltage control device for the power switch tube in the converter is used to release the drive blockade of the power switch tube when the output current of the converter is detected to be less than or equal to a preset hysteresis current value and the rising edge of the PWM signal is detected when the power switch tube is driven and blocked, so that the first pulse signal after each release of the drive blockade of the power switch tube is a complete cycle, and the power switch tube will not be turned off immediately before being fully turned on. Therefore, an excessively high reverse peak voltage will not appear, so that the reverse peak voltage meets the corresponding standard, and the power switch tube in the converter can be prevented from exploding, affecting the life of the device and damaging the device. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0029] Figure 1 Schematic diagram of an application scenario of a reverse peak voltage control device for a power switch tube in a converter provided by an embodiment of the present invention;

[0030] Figure 2 It is a structural schematic diagram of a reverse peak voltage control device of a power switch tube in a converter provided by an embodiment of the present invention;

[0031] Figure 3 is a structural schematic diagram of a current limiting signal processing module provided in an embodiment of the present invention;

[0032] Figure 4 It is a structural schematic diagram of a current limiting protection module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0033] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present invention. However, it should be clear to those skilled in the art that the present invention may be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present invention.

[0034] In order to make the purpose, technical solutions and advantages of the present invention more clear, specific embodiments will be described below in conjunction with the accompanying drawings.

[0035] Figure 1This is a schematic diagram of the application scenario of the reverse peak voltage control device of the power switch tube in the converter. The battery can supply power to the bus or load after passing through the converter. The converter includes a current limiting device, which can perform a current limiting action when its output current is higher than a preset current upper limit value, block the drive of the power switch tube in the converter, and release the drive blockade of the power switch tube when its output current is lower than the preset current upper limit value.

[0036] It should be noted that Figure 1 This is only an example application scenario. The reverse peak voltage control device for the power switch tube in the converter provided in the embodiment of the present application can be applied to any applicable scenario and is not specifically limited here.

[0037] Figure 1 The structure shown can be applied to an uninterruptible power supply UPS, and can also be applied to other equipment or devices, without specific limitation herein.

[0038] when Figure 1 When the structure shown is applied to UPS, when the starting performance test is performed with an output of 200% load, it is found that the power switch tube in the converter explodes.

[0039] Specifically, the battery operates at a rated voltage, for example, 348V; the input switches of the main and bypass circuits of the UPS are both in the disconnected state. When testing, the battery is first controlled to start slowly. When the screen is powered on, the switch corresponding to the battery is controlled to close. At this time, the UPS is in the shutdown state. During the startup operation, the power switch tube explodes.

[0040] In another test, Figure 1 The structure shown in the figure is subjected to a sudden load impact test. Specifically, the battery operates at a low voltage state, such as 330V; the battery initially operates at no-load state, and then a 30kW iodine tungsten lamp impact load is suddenly added to the output, and it is found that the maximum reverse peak voltage of the power switch tube reaches 1450V, exceeding the corresponding standard.

[0041] The inventors have found that in the related technology, when the battery is started with 200% overload or subjected to a sudden load impact test, the battery current limiting drive is triggered, that is, the output current reaches the preset current upper limit, triggering the current limiting action and blocking the drive of the power switch tube. The current limiting method uses hardware circuit current limiting, and the software does not participate in the current limiting control. The software determines the required duty cycle based on the calculation results of the converter control loop.

[0042] In the related art, the basic working principle of the current limiting circuit is: the current limiting signal and the PWM signal are operated, and when the sampled current exceeds the preset current upper limit, a low level is output to block the drive, and after the current drops to a certain level, a high level is output to unlock the drive signal. If the current limiting signal is unlocked and the high level time of the PWM signal is about to end, the power switch tube will be quickly turned on for a period of time and then turned off immediately, but the high level time of the PWM signal is too short, which is less than the time required for the power switch tube to be fully turned on, resulting in the power switch tube being unable to be fully turned on, and the voltage at both ends of the power switch tube is not completely reduced to 0 and is immediately turned off, so the reverse peak voltage is relatively high, reaching 1600V, which exceeds the specification requirements and causes the tube to explode.

[0043] In order to solve the above problems, an embodiment of the present application provides a reverse peak voltage control device of a power switch tube in a converter, wherein the converter includes a power switch tube, and the power switch tube is controlled by a PWM signal;

[0044] The reverse peak voltage control device of the power switch tube in the converter is used to release the drive blockade of the power switch tube when the output current of the converter is detected to be less than or equal to the preset hysteresis current value and the rising edge of the PWM signal is detected.

[0045] The reverse peak voltage control device of the power switch tube in the converter provided by the embodiment of the present application can drive and block all the power switch tubes in the converter when the output current of the converter is greater than or equal to the preset current upper limit value, thereby controlling the output current of the converter to decrease. When the power switch tube is driven and blocked, when it is detected that the output current of the converter is less than or equal to the preset hysteresis current value, and when it is detected that the rising edge of the PWM signal corresponding to the power switch tube arrives, the drive blockade of the power switch tube is released, that is, the current limiting action is stopped, and the on and off of the power switch tube is continued to be controlled according to its corresponding PWM signal.

[0046] The PWM signal may be determined according to a control loop of the converter. When the power switch tube is not blocked and driven, it is controlled by the corresponding PWM signal.

[0047] The converter may be any converter controlled by a PWM signal, for example, a DC-DC converter, a DC-AC converter or an AC-DC converter, etc. The power switch tube may be any power switch tube controlled by a PWM signal, for example, an IGBT, a MOSFET or an IGBT module, etc., and no specific limitation is made here.

[0048] The preset current upper limit value is greater than or equal to the preset hysteresis current value. In order to avoid repeated jumps between current limiting and no current limiting, the preset current upper limit value can be greater than the preset hysteresis current value.

[0049] When the power switch tube is blocked and driven, the power switch tube is in the disconnected state. At this time, it can be controlled by a preset drive blocking signal. The preset drive blocking signal can be a low-level signal, indicating that the power switch tube is always in the disconnected state.

[0050] It should be noted that the number of power switch tubes included in the converter can be set according to actual use requirements, and the embodiments of the present application do not make specific limitations. Different power switch tubes may be controlled by the same PWM signal or by different PWM signals, but when each power switch tube is blocked and driven, the output current of the converter is less than or equal to the preset hysteresis current value and at the rising edge of the corresponding PWM signal, the drive blockade is released.

[0051] In addition, the specific function of the reverse peak voltage control device of the power switch tube in the above-mentioned converter can be realized by a software control method or by a hardware circuit, and no specific limitation is made here.

[0052] In the embodiment of the present application, when the drive block of the power switch tube is performed, if it is detected that the output current of the converter is less than or equal to the preset hysteresis current value and the rising edge of the PWM signal is detected, the drive block of the power switch tube is released, so that the first pulse signal after the drive block of the power switch tube is released each time is a complete cycle, and the power switch tube will not be turned off immediately before it is fully turned on. Therefore, an excessively high reverse peak voltage will not appear, so that the reverse peak voltage meets the corresponding standard, which can prevent the power switch tube in the converter from exploding, affecting the life of the device and damaging the device.

[0053] In some embodiments, see Figure 2 , the reverse peak voltage control device of the power switch tube in the converter includes a current limiting signal processing module 11 and a current limiting protection module 12;

[0054] The first input end of the current limiting signal processing module 11 is used to input the initial current limiting signal X1, the second input end of the current limiting signal processing module 11 is used to input the PWM signal X2, and the output end of the current limiting signal processing module 11 is used to output the final current limiting signal Y1; wherein, when the initial current limiting signal X1 is used to indicate the release of the current limiting action, if the rising edge of the PWM signal X2 is detected, the final current limiting signal Y1 is the same as the initial current limiting signal X1;

[0055] The first input end of the current limiting protection module 12 is connected to the output end of the current limiting signal processing module 11, the second input end of the current limiting protection module 12 is used to input the PWM signal X2, and the output end of the current limiting protection module 12 is used to output the optimized PWM signal Y2; wherein, the optimized PWM signal Y2 is used to control the power switch tube 13; when the final current limiting signal Y1 is used to indicate the release of the current limiting action, the optimized PWM signal Y2 is the same as the PWM signal X2.

[0056] In some embodiments, when the initial current limiting signal X1 is used to indicate the release of the current limiting action, if the rising edge of the PWM signal X2 is not detected, the final current limiting signal Y1 is opposite to the initial current limiting signal X1;

[0057] When the final current limiting signal Y1 is used to indicate to continue the current limiting action, the optimized PWM signal Y2 is the preset driving blocking signal.

[0058] Among them, when the output current of the converter is greater than or equal to the preset current upper limit value, the initial current limiting signal X1 is used to indicate the current limiting action, that is, to block the drive of the power switch tube 13; when the output current of the converter is less than or equal to the preset hysteresis current value, the initial current limiting signal X1 is used to indicate the release of the current limiting action, that is, to stop blocking the drive of the power switch tube 13.

[0059] For example, when the output current of the converter is greater than or equal to the preset current upper limit value, the initial current limiting signal X1 can be a low level signal; when the output current of the converter is less than or equal to the preset hysteresis current value, the initial current limiting signal X1 can be a high level signal. The signals in the two cases can also be interchanged, and no specific restrictions are made here.

[0060] When the initial current limiting signal X1 is used to indicate the current limiting action, the current limiting signal processing module 11 outputs the final current limiting signal Y1 which is the same as the initial current limiting signal X1, regardless of the state of the PWM signal X2, and is also used to indicate the current limiting action. At this time, the optimized PWM signal Y2 output by the current limiting protection module 12 is a preset drive blocking signal, that is, the power switch tube 13 is driven and blocked. Exemplarily, when the initial current limiting signal X1 is a low-level signal, the final current limiting signal Y1 is also a low-level signal, the optimized PWM signal Y2 is also a low-level signal, and the power switch tube 13 is in a disconnected state.

[0061] When the initial current limiting signal X1 is used to indicate the release of the current limiting action, if the current limiting signal processing module 11 detects the arrival of the rising edge of the PWM signal X2, the final current limiting signal Y1 is the same as the initial current limiting signal X1, that is, the final current limiting signal Y1 is also used to indicate the release of the current limiting action. At this time, the optimized PWM signal Y2 output by the current limiting protection module 12 is the same as the PWM signal X2 input to the second input end of the current limiting protection module 12, and is used to control the on and off of the power switch tube 13. Exemplarily, when the initial current limiting signal X1 is a high-level signal, if the arrival of the rising edge of the PWM signal X2 is detected, the final current limiting signal Y1 is also a high-level signal, the optimized PWM signal Y2 is the same as the PWM signal X2, and the power switch tube 13 is turned on or off according to the optimized PWM signal Y2.

[0062] When the initial current limiting signal X1 is used to indicate the release of the current limiting action, if the rising edge of the PWM signal X2 is not detected, the current limiting signal processing module 11, the final current limiting signal Y1 is opposite to the initial current limiting signal X1, that is, the final current limiting signal Y1 is used to continue the current limiting action. At this time, when the final current limiting signal Y1 is used to indicate the continuation of the current limiting action, the optimized PWM signal Y2 output by the current limiting protection module 12 is a preset drive blocking signal, that is, the power switch tube 13 continues to be driven and blocked. Exemplarily, when the initial current limiting signal X1 is a high-level signal, if it is detected that the rising edge of the PWM signal X2 has not arrived, the final current limiting signal Y1 continues to maintain a low-level signal, the optimized PWM signal Y2 is also a low-level signal, and the power switch tube 13 is in a disconnected state.

[0063] The embodiment of the present application can realize, through the cooperation of the current limiting signal processing module 11 and the current limiting protection module 12, that when the power switch tube 13 is driven and blocked, if it is detected that the output current of the converter is less than or equal to the preset hysteresis current value and the rising edge of the PWM signal X2 is detected, the drive blockade of the power switch tube 13 will be released, thereby preventing the reverse peak voltage of the power switch tube 13 from being too high, affecting the life of the device or causing the tube to explode and damage the device.

[0064] In some embodiments, see Figure 3 , the current limiting signal processing module 11 includes a D flip-flop IC1 and a first AND gate IC2;

[0065] The data input end of the D flip-flop IC1 and the first input end of the first AND gate IC2 are both used as the first input end of the current limiting signal processing module 11, the clock input end of the D flip-flop IC1 is used as the second input end of the current limiting signal processing module 11, the original code output end of the D flip-flop IC1 is connected to the second input end of the first AND gate IC2, and the output end of the first AND gate IC2 is used as the output end of the current limiting signal processing module 11.

[0066] Among them, see Figure 3 The data input terminal of D flip-flop IC1 is the DATA pin of D flip-flop IC1, the clock input terminal of D flip-flop IC1 is the CLK pin of D flip-flop IC1, and the original code output terminal of D flip-flop IC1 is the Q pin of D flip-flop IC1. The SET pin of D flip-flop IC1 is the set terminal of D flip-flop IC1, and the RSET pin of D flip-flop IC1 is the reset terminal of D flip-flop IC1, both of which are grounded GND. The pin is the inverted output terminal of the D flip-flop IC1. Exemplarily, the D flip-flop IC1 may be a CD4013 D flip-flop IC1.

[0067] When the rising edge of the signal input to its CLK pin arrives, the D flip-flop IC1 transmits the signal input to its DATA pin to its Q pin. After the signal output from the Q pin of the D flip-flop IC1 is ANDed with the initial current limiting signal X1, the final current limiting signal Y1 is output. That is, when the initial current limiting signal X1 is used to indicate the release of the current limiting action, if the rising edge of the PWM signal X2 is detected, the final current limiting signal Y1 is the same as the initial current limiting signal X1.

[0068] In some embodiments, see Figure 3 , the current limiting signal processing module 11 also includes a first resistor R1;

[0069] The second input terminal of the first AND gate IC2 is connected to the first power source V1 through the first resistor R1.

[0070] The first power source V1 can provide a 5V voltage.

[0071] In some embodiments, see Figure 2 The third input terminal of the current limiting protection module 12 is used to input the enable signal X3 of the converter; when the enable signal X3 of the converter is valid and the final current limiting signal Y1 is used to indicate the release of the current limiting action, the optimized PWM signal Y2 is the same as the PWM signal X2.

[0072] The enable signal X3 of the converter is used to indicate whether the converter needs to be operated. When the converter needs to be operated, the enable signal X3 of the converter is valid and is at a high level. When the converter does not need to be operated, the enable signal X3 of the converter is invalid and is at a low level.

[0073] In this embodiment, when the enable signal X3 of the converter is valid and the final current limiting signal Y1 is used to indicate the release of the current limiting action, the optimized PWM signal Y2 is the same as the PWM signal X2; otherwise, the optimized PWM signal Y2 is a preset drive blocking signal or no signal.

[0074] In some embodiments, see Figure 4 , the current limiting protection module 12 includes an AND gate unit 121 and a driving unit 122;

[0075] The first input end of the AND gate unit 121 serves as the first input end of the current limiting protection module 12, the second input end of the AND gate unit 121 serves as the second input end of the current limiting protection module 12, the third input end of the AND gate unit 121 serves as the third input end of the current limiting protection module 12, the output end of the AND gate unit 121 is connected to the input end of the driving unit 122, and the output end of the driving unit 122 serves as the output end of the current limiting protection module 12;

[0076] The AND gate unit 121 is used to perform an AND operation on the final current limiting signal Y1, the PWM signal X2 and the converter enable signal X3 to obtain an intermediate signal; the driving unit 122 is used to amplify the power of the intermediate signal to obtain an optimized PWM signal Y2.

[0077] In some embodiments, see Figure 4 , the AND gate unit 121 includes a second AND gate IC3, a third AND gate IC4 and a second resistor R2;

[0078] The first input end of the second AND gate IC3 serves as the first input end of the AND gate unit 121, the second input end of the second AND gate IC3 serves as the third input end of the AND gate unit 121, the output end of the second AND gate IC3 is connected to the first input end of the third AND gate IC4, the second input end of the third AND gate IC4 serves as the second input end of the AND gate unit 121, the output end of the third AND gate IC4 is connected to the first end of the second resistor R2, and the second end of the second resistor R2 serves as the output end of the AND gate unit 121.

[0079] The two input signals of the second AND gate IC3 and the input signal of the second input terminal of the third AND gate IC4 can be interchanged.

[0080] In some embodiments, see Figure 4 , the driving unit 122 includes a driving chip IC5, a third resistor R3 and a diode D1;

[0081] The input end of the driver chip IC5 is used as the input end of the driver unit 122. The input end of the driver chip IC5 is also connected to the anode of the diode D1. The cathode of the diode D1 is used to connect the upper and lower power-off lock signal X4.

[0082] The output end of the driving chip IC5 is connected to the first end of the third resistor R3 , and the second end of the third resistor R3 serves as the output end of the driving unit 122 .

[0083] See also Figure 4 The driver chip IC5 also includes a power supply terminal and a ground terminal. The power supply terminal of the driver chip IC5 can be used to connect to the second power supply V2, which can provide a 15V voltage. The power supply terminal of the driver chip IC5 can also be grounded through the capacitor C1; the ground terminal of the driver chip IC5 is used to ground GND. The driver chip IC5 can be a UCC27324DR chip, or any other applicable driver chip IC5, which is not specifically limited here.

[0084] Exemplarily, the driver chip IC5 can perform power amplification on a 5V / 0V PWM signal to obtain a 15V / 0V PWM signal.

[0085] The upper and lower power blocking signal X4 is effective when any power supply of the reverse peak voltage control device of the power switch tube in the converter is abnormal, and is invalid when the power supply of the reverse peak voltage control device of the power switch tube in the converter is normal. For example, when the power supply of the first power supply V1 and / or the second power supply V2 is abnormal, the upper and lower power blocking signal X4 is effective, and when the first power supply V1 and the second power supply V2 are both normally powered, the upper and lower power blocking signal X4 is invalid.

[0086] When the upper and lower power blocking signal X4 is valid, the drive is blocked to realize the blocking drive function when the power supply is abnormal. That is, when the upper and lower power blocking signal X4 is valid, the optimized PWM signal Y2 is a preset drive blocking signal or no signal.

[0087] For example, see Figure 3 and Figure 4 , when the output current of the converter is greater than or equal to the preset current upper limit, the current limiting action is triggered, and the initial current limiting signal X1 is a high level signal. At this time, if the rising edge of the PWM signal X2 has not arrived, the final current limiting signal Y1 still maintains a low level signal and continues to block the drive. If the rising edge of the PWM signal X2 arrives, the final current limiting signal Y1 also becomes a high level signal, contacting the drive block. The first pulse after unlocking is a relatively complete PWM cycle.

[0088] According to the reverse peak voltage control device of the power switch tube in the converter provided in the embodiment of the present application, after testing, the maximum reverse peak voltage is 985V, which meets the corresponding standards and will not explode the tube.

[0089] It should be noted that the reverse peak voltage control device of the power switch tube in the converter provided in the embodiment of the present application can replace Figure 1 Current limiting device shown.

[0090] exist Figure 1 In the application scenario shown, the converter can be a buck-boost conversion circuit. When it works in boost mode, it corresponds to a reverse peak voltage control device of a power switch tube in a converter in boost mode, and the corresponding enable signal is a boost enable signal. When it works in buck mode, it corresponds to a reverse peak voltage control device of a power switch tube in a converter in buck mode, and the corresponding enable signal is a buck enable signal. When it is required to work in boost mode, the boost enable signal is valid, and the reverse peak voltage control device of the power switch tube in the converter in boost mode is used for current limiting. When it is required to work in buck mode, the buck enable signal is valid, and the reverse peak voltage control device of the power switch tube in the converter in buck mode is used for current limiting.

[0091] Corresponding to the reverse peak voltage control device of the power switch tube in the converter, an embodiment of the present application also provides a converter, including any one of the above reverse peak voltage control devices for the power switch tube in the converter, and having the beneficial effects of any one of the above reverse peak voltage control devices for the power switch tube in the converter.

[0092] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0093] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0094] In the embodiments provided by the present invention, it should be understood that the disclosed devices / systems and methods can be implemented in other ways. For example, the device / system embodiments described above are only schematic. For example, the division of the modules or units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0095] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0096] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0097] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the present invention implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium. When the computer program is executed by the processor, it can implement the steps of the embodiment of the reverse peak voltage control device of the power switch tube in each converter. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form. The computer-readable medium may include: any entity or device that can carry the computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal and software distribution medium.

[0098] The embodiments described above are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included in the protection scope of the present invention.

Claims

1. A reverse peak voltage control device for a power switch tube in a converter, characterized in that: The power switch tube is controlled by a PWM signal; The reverse peak voltage control device of the power switch tube in the converter is used to release the drive blockade of the power switch tube when the output current of the converter is detected to be less than or equal to a preset hysteresis current value and the rising edge of the PWM signal is detected when the drive blockade of the power switch tube is performed.

2. The reverse peak voltage control device of the power switch tube in the converter according to claim 1, characterized in that: The reverse peak voltage control device of the power switch tube in the converter includes a current limiting signal processing module and a current limiting protection module; The first input end of the current limiting signal processing module is used to input an initial current limiting signal, the second input end of the current limiting signal processing module is used to input the PWM signal, and the output end of the current limiting signal processing module is used to output a final current limiting signal; wherein, when the initial current limiting signal is used to indicate the release of the current limiting action, if a rising edge of the PWM signal is detected, the final current limiting signal is the same as the initial current limiting signal; The first input end of the current limiting protection module is connected to the output end of the current limiting signal processing module, the second input end of the current limiting protection module is used to input the PWM signal, and the output end of the current limiting protection module is used to output an optimized PWM signal; wherein, the optimized PWM signal is used to control the power switch tube; when the final current limiting signal is used to indicate the release of the current limiting action, the optimized PWM signal is the same as the PWM signal.

3. The reverse peak voltage control device of the power switch tube in the converter according to claim 2, characterized in that: When the initial current limiting signal is used to indicate the release of the current limiting action, if the rising edge of the PWM signal is not detected, the final current limiting signal is opposite to the initial current limiting signal; When the final current limiting signal is used to indicate to continue the current limiting action, the optimized PWM signal is a preset drive blocking signal.

4. The reverse peak voltage control device of the power switch tube in the converter according to claim 2, characterized in that: The current limiting signal processing module includes a D flip-flop and a first AND gate; The data input end of the D flip-flop and the first input end of the first AND gate both serve as the first input end of the current limiting signal processing module, the clock input end of the D flip-flop serves as the second input end of the current limiting signal processing module, the original code output end of the D flip-flop is connected to the second input end of the first AND gate, and the output end of the first AND gate serves as the output end of the current limiting signal processing module.

5. The reverse peak voltage control device of the power switch tube in the converter according to claim 4, characterized in that: The current limiting signal processing module also includes a first resistor; The second input terminal of the first AND gate is connected to the first power supply through the first resistor.

6. The reverse peak voltage control device of the power switch tube in the converter according to claim 2, characterized in that: The third input terminal of the current limiting protection module is used to input the enable signal of the converter; when the enable signal of the converter is valid and the final current limiting signal is used to indicate the release of the current limiting action, the optimized PWM signal is the same as the PWM signal.

7. The reverse peak voltage control device of the power switch tube in the converter according to claim 6, characterized in that: The current limiting protection module includes an AND gate unit and a driving unit; The first input end of the AND gate unit serves as the first input end of the current limiting protection module, the second input end of the AND gate unit serves as the second input end of the current limiting protection module, the third input end of the AND gate unit serves as the third input end of the current limiting protection module, the output end of the AND gate unit is connected to the input end of the driving unit, and the output end of the driving unit serves as the output end of the current limiting protection module; The AND gate unit is used to perform an AND operation on the final current limiting signal, the PWM signal and the enable signal of the converter to obtain an intermediate signal; the drive unit is used to power amplify the intermediate signal to obtain the optimized PWM signal.

8. The reverse peak voltage control device of the power switch tube in the converter according to claim 7, characterized in that: The AND gate unit includes a second AND gate, a third AND gate and a second resistor; The first input end of the second AND gate serves as the first input end of the AND gate unit, the second input end of the second AND gate serves as the third input end of the AND gate unit, the output end of the second AND gate is connected to the first input end of the third AND gate, the second input end of the third AND gate serves as the second input end of the AND gate unit, the output end of the third AND gate is connected to the first end of the second resistor, and the second end of the second resistor serves as the output end of the AND gate unit.

9. The reverse peak voltage control device of a power switch tube in a converter according to claim 7, characterized in that: The driving unit includes a driving chip, a third resistor and a diode; The input end of the driving chip serves as the input end of the driving unit, and the input end of the driving chip is also connected to the positive electrode of the diode, and the negative electrode of the diode is used to connect the upper and lower power-on blocking signals; The output end of the driving chip is connected to the first end of the third resistor, and the second end of the third resistor serves as the output end of the driving unit.

10. A converter, characterized in that: The invention comprises a reverse peak voltage control device for a power switch tube in a converter as claimed in any one of claims 1 to 9.

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