Preparation method of novel power device and power device

Through the gate connection capacitor structure of the SGT MOSFET device, the problem of excessive Vds stress under fast shutdown of the device is solved, the stability of the device is improved, and the preparation process of the capacitor structure is simple.

CN119403158AInactive Publication Date: 2025-02-07SHANGHAI GONGCHENG SEMICON TECH CO LTD
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Patent Information

Application Number
CN202411975009.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-31
Publication Date
2025-02-07
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The Vds stress of the SGT MOSFET device is too high when it is shut down, resulting in the risk of breakdown, damage or even burning of the device.

Method used

By connecting the capacitance structure at the gate, the capacitance structure includes a second substrate, a first metal layer, a second metal layer and a dielectric layer, the dielectric layer is located between the first metal layer and the second metal layer, and the capacitance size of the capacitance structure is adjusted. to reduce the Vds stress of the device.

Benefits of technology

Increase the Cgd of the device, reduce the Vds stress under the fast shutdown of the device, improve the stability of the device, and at the same time, the preparation process of the capacitor structure is simple.

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Abstract

The invention discloses a preparation method of a novel power device and the power device, relates to the technical field of power semiconductor devices, and can solve the problem that the stress of Vds is too large when an SGT MOSFET device is quickly turned off, so that the stability of the device can be improved. The method comprises the following steps: obtaining a first substrate, wherein the first substrate comprises a first surface and a second surface which are opposite to each other; forming a grid electrode and a source electrode on the first surface of the first substrate; forming a drain electrode on the second surface of the first substrate; the grid electrode is connected with a capacitor structure; wherein the capacitor structure comprises a second substrate, a first metal layer, a second metal layer and a dielectric layer, the first metal layer, the second metal layer and the dielectric layer are formed on the basis of the second substrate, and the dielectric layer is located between the first metal layer and the second metal layer.
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Citation Information

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